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* Import ACPICA 20090521.jkim2009-06-057-10/+17
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* Move "options MAC" from opt_mac.h to opt_global.h, as it's now in GENERICrwatson2009-06-052-3/+0
| | | | | | | | and used in a large number of files, but also because an increasing number of incorrect uses of MAC calls were sneaking in due to copy-and-paste of MAC-aware code without the associated opt_mac.h include. Discussed with: pjd
* Remove MAC kernel config files and add "options MAC" to GENERIC, with therwatson2009-06-022-28/+1
| | | | | | | | | | | | | | | goal of shipping 8.0 with MAC support in the default kernel. No policies will be compiled in or enabled by default, but it will now be possible to load them at boot or runtime without a kernel recompile. While the framework is not believed to impose measurable overhead when no policies are loaded (a result of optimization over the past few months in HEAD), we'll continue to benchmark and optimize as the release approaches. Please keep an eye out for performance or functionality regressions that could be a result of this change. Approved by: re (kensmith) Obtained from: TrustedBSD Project
* Implement accept4 syscall.dchagin2009-06-011-0/+1
| | | | | Approved by: kib (mentor) MFC after: 1 month
* Regenerate generated syscall files following changes to struct sysent inrwatson2009-06-012-445/+445
| | | | r193234.
* Fix the MP IPI code to differentiate between bitmapped IPIs and function IPIs.adrian2009-05-312-19/+14
| | | | | | | | | | | | | | | | This attempts to fix the IPI handling code to correctly differentiate between bitmapped IPIs and function IPIs. The Xen IPIs were on low numbers which clashed with the bitmapped IPIs. This commit bumps those IPI numbers up to 240 and above (just like in the i386 code) and fiddles with the ipi_vectors[] logic to call the correct function. This still isn't "right". Specifically, the IPI code may work fine for TLB shootdown events but the rendezvous/lazypmap IPIs are thrown by calling ipi_*() routines which don't set the call_func stuff (function id, addr1, addr2) that the TLB shootdown events are. So the Xen SMP support is still broken. PR: 135069
* Remove some unused code in ipi_selected() .adrian2009-05-311-5/+0
| | | | | | The code path this was copied from (sys/i386/i386/mp_machdep.c:ipi_selected()) handles bitmap'ed IPIs and normal IPIs via separate notification paths. Xen SMP handles them the same way.
* Even though I'm not quite sure that the call_func stuff will work properlyadrian2009-05-301-2/+3
| | | | | | | | | in all the places/cases IPI messages will be generated, at least be consistent with how the call_data pointer is assigned and cleared (ie, all done inside the spinlock. Ensure that its NULL before continuing, just to try and identify situations where things are going horribly wrong.
* Don't schedule a CALL_FUNCTION_VECTOR software IPI if the IPI was signaledadrian2009-05-301-3/+3
| | | | via the bitmap (and thus sent via RESCHEDULE_VECTOR.)
* Correctly report the IPI IRQs being created; make it clear what vectors they ↵adrian2009-05-301-4/+4
| | | | are for.
* Place hostnames and similar information fully under the prison system.jamie2009-05-293-13/+5
| | | | | | | | | | | | | | | | | The system hostname is now stored in prison0, and the global variable "hostname" has been removed, as has the hostname_mtx mutex. Jails may have their own host information, or they may inherit it from the parent/system. The proper way to read the hostname is via getcredhostname(), which will copy either the hostname associated with the passed cred, or the system hostname if you pass NULL. The system hostname can still be accessed directly (and without locking) at prison0.pr_host, but that should be avoided where possible. The "similar information" referred to is domainname, hostid, and hostuuid, which have also become prison parameters and had their associated global variables removed. Approved by: bz (mentor)
* Revert to 2-clause.adrian2009-05-291-2/+0
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* Fix the Xen TOD update when the hypervisor wall clock is nudged.adrian2009-05-291-0/+14
| | | | | | | | | | | | | | | | | | | | | The "wall clock" in the current code is actually the hypervisor start time. The time of day is the "start time" plus the hypervisor "uptime". Large enough bumps in the dom0 clock lead to a hypervisor "bump" which is implemented as a bump in the start time, not the uptime. The clock.c routines were reading in the hypervisor start time and then using this as the TOD. This meant that any hypervisor time bump would cause the FreeBSD DomU to set its TOD to the hypervisor start time, rather than the actual TOD. This fix is a bit hacky and some reshuffling should be done later on to clarify what is going on. I've left the wall clock code alone. (The code which updates shadow_tv and shadow_tv_version.) A new routine adds the uptime to the shadow_tv, which is then used to update the TOD. I've included some debugging so it is obvious when the clock is nudged. PR: 135008
* Migrate the Xen hypervisor clock reading routines into somethingadrian2009-05-293-49/+141
| | | | sharable.
* Say hello to a very basic, read-only, Xen Hypervisor RTC.adrian2009-05-281-0/+191
| | | | | | | | | | | | | | The hypervisor doesn't provide a single "TOD" - it instead provides a "start time" and a "running time". These are added together to form the current TOD. The TOD is in UTC. This RTC is only (initially) designed to be read at startup. There's some further poking that needs to happen to pick up hypervisor time changes (ie, by the Dom0 time being adjusted by something). This time adjustment currently can cause "weird stuff" in the DomU clock; I'll begin investigating and repairing that in subsequent commits. PR: 135008
* We don't need d_thread_t for cross-branch portability here anymore.imp2009-05-201-4/+4
| | | | Move do struct thread * instead.
* Some minor style changes:imp2009-05-201-22/+14
| | | | | | | o Convert K&R function definitions to ANSI o Eliminate spaces/tabs that should have been deleted as part of the de__P efforts o Use struct thread * in preference to d_thread_t *.
* Don't bother reading the initial value of the machine check banks duringjhb2009-05-201-4/+0
| | | | | startup on Pentium 4 CPUs. This wasn't safe to do on APs during AP startup, was of limited value, and won't be used for future processors.
* - Add a tunable 'hw.mca.enabled' that can be used to enable/disable thejhb2009-05-181-11/+14
| | | | | | | | | | machine check code. Disable it by default for now. - When computing the mask of bits that determines a non-restartable event during a machine check exception, or-in the overflow flag rather than replacing the other flags. PR: i386/134586 [2] Submitted by: Andi Kleen andi-fbsd firstfloor.org
* Add a read-only sysctl hw.pci.mcfg to mirror the tunable by the same name.jhb2009-05-181-0/+5
| | | | MFC after: 1 week
* Bump CACHE_LINE_SIZE to 128 for x86. Intel's manuals explicitly recommendjhb2009-05-181-1/+1
| | | | using 128 byte alignment for locks. (See IA-32 SDM Vol 3A 7.11.6.7)
* Add cpu_flush_dcache() for use after non-DMA based I/O so that amarcel2009-05-181-0/+10
| | | | | | | | | | | | | | | | | | | | | possible future I-cache coherency operation can succeed. On ARM for example the L1 cache can be (is) virtually mapped, which means that any I/O that uses temporary mappings will not see the I-cache made coherent. On ia64 a similar behaviour has been observed. By flushing the D-cache, execution of binaries backed by md(4) and/or NFS work reliably. For Book-E (powerpc), execution over NFS exhibits SIGILL once in a while as well, though cpu_flush_dcache() hasn't been implemented yet. Doing an explicit D-cache flush as part of the non-DMA based I/O read operation eliminates the need to do it as part of the I-cache coherency operation itself and as such avoids pessimizing the DMA-based I/O read operations for which D-cache are already flushed/invalidated. It also allows future optimizations whereby the bcopy() followed by the D-cache flush can be integrated in a single operation, which could be implemented using on-chips DMA engines, by-passing the D-cache altogether.
* Somewhere between 2.6.23 and 2.6.27, Linux added SOCK_CLOEXEC anddchagin2009-05-161-0/+1
| | | | | | | | | | SOCK_NONBLOCK flags, that allow to save fcntl() calls. Implement a variation of the socket() syscall which takes a flags in addition to the type argument. Approved by: kib (mentor) MFC after: 1 month
* Trim the default set of device hints on i386 and amd64:jhb2009-05-141-42/+0
| | | | | | | | | - Remove vga0 and the disabled uart2/uart3 hints from both platforms. - Remove hints for ISA adv0, bt0, aha0, aic0, ed0, cs0, sn0, ie0, fe0, and le0 from i386. All these hints were marked 'disabled' and thus already did not work "out of the box". Discussed with: imp
* FreeBSD right now support 32 CPUs on all the architectures at least.attilio2009-05-144-78/+21
| | | | | | | | | | | | | | | | With the arrival of 128+ cores it is necessary to handle more than that. One of the first thing to change is the support for cpumask_t that needs to handle more than 32 bits masking (which happens now). Some places, however, still assume that cpumask_t is a 32 bits mask. Fix that situation by using always correctly cpumask_t when needed. While here, remove the part under STOP_NMI for the Xen support as it is broken in any case. Additively make ipi_nmi_pending as static. Reviewed by: jhb, kmacy Tested by: Giovanni Trematerra <giovanni dot trematerra at gmail dot com>
* Implement simple machine check support for amd64 and i386.jhb2009-05-136-0/+618
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - For CPUs that only support MCE (the machine check exception) but not MCA (i.e. Pentium), all this does is print out the value of the machine check registers and then panic when a machine check exception occurs. - For CPUs that support MCA (the machine check architecture), the support is a bit more involved. - First, there is limited support for decoding the CPU-independent MCA error codes in the kernel, and the kernel uses this to output a short description of any machine check events that occur. - When a machine check exception occurs, all of the MCx banks on the current CPU are scanned and any events are reported to the console before panic'ing. - To catch events for correctable errors, a periodic timer kicks off a task which scans the MCx banks on all CPUs. The frequency of these checks is controlled via the "hw.mca.interval" sysctl. - Userland can request an immediate scan of the MCx banks by writing a non-zero value to "hw.mca.force_scan". - If any correctable events are encountered, the appropriate details are stored in a 'struct mca_record' (defined in <machine/mca.h>). The "hw.mca.count" is a count of such records and each record may be queried via the "hw.mca.records" tree by specifying the record index (0 .. count - 1) as the next name in the MIB similar to using PIDs with the kern.proc.* sysctls. The idea is to export machine check events to userland for more detailed processing. - The periodic timer and hw.mca sysctls are only present if the CPU supports MCA. Discussed with: emaste (briefly) MFC after: 1 month
* Correct a rare use-after-free error in pmap_copy(). This error wasalc2009-05-131-2/+4
| | | | | | | | | | | | | | | | | | introduced in amd64 revision 1.540 and i386 revision 1.547. However, it had no harmful effects until after a recent change, r189698, on amd64. (In other words, the error is harmless in RELENG_7.) The error is triggered by the failure to allocate a pv entry for the one and only mapping in a page table page. I am addressing the error by changing pmap_copy() to abort if either pv entry allocation or page table page allocation fails. This is appropriate because the creation of mappings by pmap_copy() is optional. They are a (possible) optimization, and not a requirement. Correct a nearby whitespace error in the i386 pmap_copy(). Crash reported by: jeff@ MFC after: 6 weeks
* Remove unused variables.brueffer2009-05-121-4/+1
| | | | | Found with: Coverity Prevent(tm) CID: 4285, 4286
* Do not export AT_CLKTCK when emulating Linux kernel priordchagin2009-05-101-1/+11
| | | | | | | | | | | | | | to 2.4.0, as it has appeared in the 2.4.0-rc7 first time. Being exported, AT_CLKTCK is returned by sysconf(_SC_CLK_TCK), glibc falls back to the hard-coded CLK_TCK value when aux entry is not present. Glibc versions prior to 2.2.1 always use hard-coded CLK_TCK value. For older applications/libc's which depends on hard-coded CLK_TCK value user should set compat.linux.osrelease less than 2.4.0. Approved by: kib (mentor)
* Rework r189362, r191883.dchagin2009-05-101-1/+2
| | | | | | | | | The frequency of the statistics clock is given by stathz. Use stathz if it is available, otherwise use hz. Pointed out by: bde Approved by: kib (mentor)
* - Use "device\t" and "options \t" for consistency.kuriyama2009-05-106-24/+24
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* Regenerate system call tables to use SVN ids.ed2009-05-085-7/+12
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* Regenerate ibcs2 system call table.ed2009-05-083-20/+12
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* Burn TTY ioctl bridges in compat layers.ed2009-05-082-33/+2
| | | | | | | | | I really don't want any pieces of code to include ioctl_compat.h, so let the ibcs2 and svr4 compat leave sgtty alone. If they want to support sgtty, they should emulate it on top of termios, not sgtty. The code has been marked with BURN_BRIDGES for a long time. ibcs2 and svr4 are not really popular pieces of code anyway.
* Introduce a new virtualization container, provisionally named vprocg, to holdzec2009-05-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | virtualized instances of hostname and domainname, as well as a new top-level virtualization struct vimage, which holds pointers to struct vnet and struct vprocg. Struct vprocg is likely to become replaced in the near future with a new jail management API import. As a consequence of this change, change struct ucred to point to a struct vimage, instead of directly pointing to a vnet. Merge vnet / vimage / ucred refcounting infrastructure from p4 / vimage branch. Permit kldload / kldunload operations to be executed only from the default vimage context. This change should have no functional impact on nooptions VIMAGE kernel builds. Reviewed by: bz Approved by: julian (mentor)
* Move the per-prison Linux MIB from a private one-off pointer to the newjamie2009-05-071-0/+2
| | | | | | | | | OSD-based jail extensions. This allows the Linux MIB to accessed via jail_set and jail_get, and serves as a demonstration of adding jail support to a module. Reviewed by: dchagin, kib Approved by: bz (mentor)
* To avoid excessive code duplication move MI definitions to the MIdchagin2009-05-071-8/+0
| | | | | | | header file. As it is defined in Linux. Approved by: kib (mentor) MFC after: 1 month
* Do not try to initialize LAPIC timer if we are not going to use it.mav2009-05-051-1/+1
| | | | | It solves assertion, when kernel built with INVARIANTS configured to use i8254 timer.
* Unlock the largest standard CPUID on Intel CPUs for both amd64 and i386 andjkim2009-05-041-11/+18
| | | | | | fix SMP topology detection. On i386, we extend it to cover Core, Core 2, and Core i7 processors, not just Pentium 4 family, and move it to better place. On amd64, all supported Intel CPUs should have this MSR.
* Oops, sorry. Fix for fix.mav2009-05-041-1/+1
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* There is no atrtc driver in pc98, so hide atrtcclock_disable variable usagemav2009-05-041-0/+2
| | | | in APM driver for this platform. This should fix pc98 build.
* Rename statclock_disable variable to atrtcclock_disable that it actually is,mav2009-05-034-24/+17
| | | | | | | | | | | | | and hide it inside of atrtc driver. Add new tunable hint.atrtc.0.clock controlling it. Setting it to 0 disables using RTC clock as stat-/ profclock sources. Teach i386 and amd64 SMP platforms to emulate stat-/profclocks using i8254 hardclock, when LAPIC and RTC clocks are disabled. This allows to reduce global interrupt rate of idle system down to about 100 interrupts per core, permitting C3 and deeper C-states provide maximum CPU power efficiency.
* fix XEN compilationkmacy2009-05-021-0/+3
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* Add support for using i8254 and rtc timers as event sources for i386 SMPmav2009-05-024-3/+69
| | | | system. Redistribute hard-/stat-/profclock events to other CPUs using IPI.
* Move extern variable definitions to the header file.dchagin2009-05-021-3/+1
| | | | | Approved by: kib (mentor) MFC after: 1 month
* Small addition to r191720.mav2009-05-011-1/+5
| | | | | | Restore previous behaviour for the case of unknown interrupt. Invocation of IRQ -1 crashes my system on resume. Returning 0, as it was, is not perfect also, but at least not so dangerous.
* o add uathsam2009-05-011-1/+2
| | | | o sort usb wireless drivers
* Use value -1 instead of 0 for marking unused APIC vectors. This fixesmav2009-05-011-5/+11
| | | | | | | | | | | | | | | | | | | | | | IRQ0 routing on LAPIC-enabled systems. Add hint.apic.0.clock tunable. Setting it 0 disables using LAPIC timers as hard-/stat-/profclock sources falling back to using i8254 and rtc timers. On modern CPUs LAPIC is a part of CPU core which is shutting down when CPU enters C3 or deeper power state. It makes no problems for interrupt processing, as chipset wakes up CPU on interrupt triggering. But entering C3 state kills LAPIC timer and freezes system time, making C3 and deeper states practically unusable. Using i8254 timer allows to avoid this problem. By using i8254 timer my T7700 C2D CPU with UP kernel successfully enters C3 state, saving more then a Watt of total idle power (>10%) in addition to all other power-saving techniques. This technique is not working for SMP yet, as only one CPU receives timer interrupts. But I think that problem could be fixed by forwarding interrupts to other CPUs with IPI.
* Reimplement futexes.dchagin2009-05-011-3/+3
| | | | | | | | | | | | | | | | | | | | Old implemention used Giant to protect the kernel data structures, but at the same time called malloc(M_WAITOK), that could cause the calling thread to sleep and lost Giant protection. User-visible result was the missed wakeup. New implementation uses one sx lock per futex. The sx protects the futex structures and allows to sleep while copyin or copyout are performed. Unlike linux, we return EINVAL when FUTEX_CMP_REQUEUE operation is requested and either caller specified futexes are equial or second futex already exists. This is acceptable since the situation can only occur from the application error, and glibc falls back to old FUTEX_WAKE operation when FUTEX_CMP_REQUEUE returns an error. Approved by: kib (mentor) MFC after: 1 month
* - Fix divide-by-zero panic when SMP kernel is used on UP system[1].jkim2009-04-301-1/+7
| | | | | | | - Avoid possible divide-by-zero panic on SMP system when the CPUID is disabled, unsupported, or buggy. Submitted by: pluknet (pluknet at gmail dot com)[1]
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