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| author | jhb <jhb@FreeBSD.org> | 2009-05-18 19:33:59 +0000 |
|---|---|---|
| committer | jhb <jhb@FreeBSD.org> | 2009-05-18 19:33:59 +0000 |
| commit | f5760f10df7caf283652fa3551951b95d84a2423 (patch) | |
| tree | 00799ea210f8a30761e62b2d2d1c1bb8db98c6d2 /sys/i386 | |
| parent | 0ed2b1e0b5871e7315b4f840de75cd4f8fa65bb2 (diff) | |
| download | FreeBSD-src-f5760f10df7caf283652fa3551951b95d84a2423.zip FreeBSD-src-f5760f10df7caf283652fa3551951b95d84a2423.tar.gz | |
Bump CACHE_LINE_SIZE to 128 for x86. Intel's manuals explicitly recommend
using 128 byte alignment for locks. (See IA-32 SDM Vol 3A 7.11.6.7)
Diffstat (limited to 'sys/i386')
| -rw-r--r-- | sys/i386/include/param.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/i386/include/param.h b/sys/i386/include/param.h index 3c22c7c..a6108db 100644 --- a/sys/i386/include/param.h +++ b/sys/i386/include/param.h @@ -78,7 +78,7 @@ * CACHE_LINE_SIZE is the compile-time maximum cache line size for an * architecture. It should be used with appropriate caution. */ -#define CACHE_LINE_SHIFT 6 +#define CACHE_LINE_SHIFT 7 #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT) #define PAGE_SHIFT 12 /* LOG2(PAGE_SIZE) */ |
