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path: root/sys/i386/pci/pci_pir.c
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* Add support for multiple PCI busses directly connected to the nexus.msmith1999-07-161-4/+180
* Move pcibus (host -> pci bus) probe/attach routines from nexuspeter1999-05-181-3/+47
* Make the class code checks in function pci_cfgcheck less strict.se1997-12-201-2/+2
* Removed unused #includes.bde1997-07-201-2/+1
* Yet another fix for configuration mechanism 1 register accesses:se1997-05-261-4/+5
* Fix previous fix: The enable bit is bit 31 (0x8000000) and not bit 15.se1997-05-261-2/+2
* Set enable bit when writing the configuration address in configurationse1997-05-261-2/+2
* Completely replace the PCI bus driver code to make it better reflectse1997-05-261-463/+190
* Mask out revision register in consistency test of class register.se1997-04-091-2/+2
* Fix spelling of align and interrupt in comments.se1997-04-091-6/+6
* Fix consistency test to not fail on pre PCI 2.0 motherboardsse1997-04-091-2/+2
* improve pcibus_check: Only assume PCI if at least one PCI to anything bridgese1997-03-051-6/+19
* Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are notpeter1997-02-221-1/+1
* Sync with <pci/pcibus.h>. pcibus.c unfortunately still compiled (withbde1997-01-251-1/+0
* Make the long-awaited change from $Id$ to $FreeBSD$jkh1997-01-141-1/+1
* Make the code more consistant by using the INTR*MASK macros througout thenate1997-01-081-2/+2
* More merge and update.asami1996-10-301-1/+5
* Removed unused #includes of <i386/isa/icu.h> and <i386/isa/icu.h>. icu.hbde1996-06-181-2/+1
* Change CONF1_ENABLE_MSK to 0x7ff00000 in another attempt to decidese1996-06-131-2/+2
* Make pcibus_check() ignore Device/Vendor IDs of all 0.se1996-04-301-2/+2
* Removed now-unused #includes of <machine/cpu.h>. They were for bootverbosebde1996-04-071-3/+1
* Count PCI irqs in up to 4 ISAish counters named `pci irqnn' instead ofbde1996-03-291-3/+30
* Completed function declarations and/or added prototypes and/or addedbde1995-12-161-7/+7
* Staticize and cleanup.phk1995-12-101-2/+2
* Make CONF1_ENABLE_MSK1 even less restriktive: Ignore slot ID ...se1995-10-171-2/+2
* At least the ASUS Triton motherboards don't disable the PCI bus configurationse1995-10-171-4/+5
* Go back to separate tests for configuration mechanism 1 and mechanism 2.se1995-10-151-54/+57
* Fix bad typo: CONF1_ENABLE_RES1 was written CONF1_ENABLE_CHK1 ...se1995-10-091-6/+14
* New approach to the PCI bus configuration mechanism probe problem:se1995-09-221-50/+63
* Revert most changes of previous commit.se1995-09-181-18/+52
* Another try to determine the PCI bus configuration mode (and whetherse1995-09-151-59/+40
* Improved verification of configuration space accesses working:se1995-09-141-4/+19
* Make the PCI host bridge probe code more robust when dealing with chip setsse1995-09-131-6/+35
* The PCI config mechanism 1 test failed for the Intel Aries.se1995-06-301-2/+2
* PCI configuration mechanism now determined by a method, that doesn'tse1995-06-281-15/+17
* Correct pcibus_setup() to return as soon as one test succeeds.se1995-03-221-1/+3
* Delete PCI PCI bridge simulator code ...se1995-03-221-90/+1
* Remove spurious declaration of printf().se1995-03-221-3/+1
* New ISA specific PCI code.se1995-03-211-147/+209
* Replace all remaining instances of `i386/include' by `machine' and fixbde1995-02-261-11/+6
* Keep PCI_CONF_MODE in a safe place for later reference, if #defined.se1995-02-251-1/+2
* Initialisation of interrupt masks changed.se1995-02-091-4/+5
* Reviewed by: sese1995-02-011-0/+442
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