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* MFC r313109:kib2017-02-091-6/+4
* MFC r294311:kib2016-02-021-5/+6
* MFC r279936:kib2015-03-151-2/+0
* MFC 274817,274878,276801,276840,278976:jhb2015-02-231-0/+7
* MFC 273988,273989,273995,274057:jhb2014-12-221-156/+399
* MFC 270850,271053,271192,271717:jhb2014-09-221-0/+37
* MFC r267767:kib2014-06-301-0/+7
* Implement vector callback for PVHVM and unify event channel implementationsgibbs2013-08-291-1/+1
* Change (unused) prototype for stmxcsr() to match reality.kib2012-07-301-1/+1
* MFamd64 r238623:kib2012-07-261-15/+14
* MFCamd64 r238598:kib2012-07-211-2/+25
* MFamd64 r238668:kib2012-07-211-16/+13
* MFamd64 r238597:kib2012-07-211-0/+2
* Add a clts() wrapper around the 'clts' instruction to <machine/cpufunc.h>jhb2012-07-091-11/+8
* Add support for the extended FPU states on amd64, both for nativekib2012-01-211-1/+45
* In fpudna()/npxdna(), mark FPU context initialized and optionallykib2010-12-121-1/+3
* Remove npxgetregs(), npxsetregs(), fpugetregs() and fpusetregs()kib2010-11-261-72/+22
* Use unambiguous inline assembly to load a float variable. GNU asdim2010-11-251-1/+1
* Use 'saveintr' instead of 'savecrit' or 'eflags' to hold the state returnedjhb2010-10-251-3/+3
* Simplify fldcw() macro. There is no reason to use pointer here. No objectjkim2010-07-261-5/+5
* Remove an unused macro since r189418.jkim2010-07-261-1/+0
* Reduce diff against fenv.h:jkim2010-07-261-12/+14
* FNSTSW instruction can use AX register as an operand.jkim2010-07-261-1/+1
* After the FPU use requires #MF working due to INT13 FPU exception handlingkib2010-06-231-35/+27
* Remove the support for int13 FPU exception reporting on i386. It iskib2010-06-231-132/+31
* Remove unused i586 optimized bcopy/bzero/etc implementations that utilizekib2010-06-231-54/+1
* Introduce the x86 kernel interfaces to allow kernel code to usekib2010-06-051-19/+158
* Fix a few nits in the earlier changes to prevent local information leakagejhb2009-03-251-4/+8
* Rename (fpu|npx)_cleanstate to (fpu|npx)_initialstate to better reflectjhb2009-03-251-13/+13
* A better fix for handling different FPU initial control words for differentjhb2009-03-051-0/+11
* Some cleanups to the i386 FPU support:jhb2009-03-051-51/+34
* Change the functions to ANSI in those cases where it breaks promotionrdivacky2009-02-241-2/+1
* Some whitespace and style fixes.jhb2009-02-231-5/+4
* merge 186535, 186537, and 186538 from releng_7_xenkmacy2008-12-291-1/+1
* Call in to xen for fpu handling when XEN is setkmacy2008-08-151-1/+10
* Commit 14/14 of sched_lock decomposition.jeff2007-06-051-2/+2
* o break newbus api: add a new argument of type driver_filter_t topiso2007-02-231-4/+5
* Use the method described in IA-32 Intel Architecture Software Developer'sdavidxu2006-05-301-0/+9
* Backout changes trying to inherit floating-point environment, althoughdavidxu2006-05-291-35/+0
* If parent thread never used FPU, the only work is to clear flagdavidxu2006-05-281-1/+6
* When creating a new thread, inherit floating-point environment fromdavidxu2006-05-281-0/+30
* Since DELAY() was moved, most <machine/clock.h> #includes have beenphk2006-05-161-1/+0
* Correct a local information leakage bug affecting AMD FPUs.cperciva2006-04-191-2/+40
* - Don't set CR0_NE and CR0_MP in npx_probe() as they are already setjhb2006-04-061-25/+21
* Don't panic if IRQ 13 doesn't exist. On some machines (see previousjhb2005-12-051-7/+9
* Remove the CPU_ENABLE_SSE option from the i386 and pc98 architectures,delphij2005-07-021-4/+1
* - Move the NPX_DEBUG option to options.{i386,pc98} and use opt_npx.h.nyan2005-05-121-6/+0
* Change a directory layout for pc98.nyan2005-05-101-1/+1
* Initialize the mxcsr properly, so the initial value in a process isn'tdas2005-03-171-0/+10
* Eleminate 3 PC98 ifdefs:imp2005-03-161-17/+5
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