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path: root/sys/i386/i386/local_apic.c
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* Unify local_apic.c for x86 archs,mav2010-05-231-1427/+0
* Rename the cyclic global variable lapic_cyclic_clock_func to justrpaulo2010-04-201-3/+3
* Add a handler for the local APIC error interrupt. For now it just printsjhb2010-03-291-18/+30
* Improving the clocks auto-tunning by firstly checking if the atrtc may beattilio2010-03-031-21/+15
* Handling all the three clocks (hardclock, softclock, profclock) with theattilio2010-01-151-29/+50
* Spell "Hz" correctly wherever it is user-visible.gavin2010-01-121-1/+1
* Don't attempt to bind the current thread to the CPU an IRQ is bound tojhb2009-09-021-9/+12
* Adjust the handling of the local APIC PMC interrupt vector:jhb2009-08-141-3/+83
* * Completely Remove the option STOP_NMI from the kernel. This optionattilio2009-08-131-2/+11
* Improve the handling of cpuset with interrupts.jhb2009-07-011-3/+3
* Whitespace fix.jhb2009-06-241-0/+1
* Move C1E workaround into its own idle function. Previous workaround worksariff2009-06-091-23/+0
* Do not try to initialize LAPIC timer if we are not going to use it.mav2009-05-051-1/+1
* Small addition to r191720.mav2009-05-011-1/+5
* Use value -1 instead of 0 for marking unused APIC vectors. This fixesmav2009-05-011-5/+11
* - Resolve an issue where we may clear an idt while an interrupt on ajeff2009-02-211-0/+8
* - Allocate apic vectors on a per-cpu basis. This allows us to allocatejeff2009-01-291-21/+63
* Add constants for fields in the local APIC error status register and ajhb2008-12-111-0/+13
* Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").jkim2008-11-261-2/+2
* Fix r184323 - set stathz to be the same as lapic_timer_hz when lapic_timer_hzsobomax2008-10-271-4/+3
* Fix division by zero panic if kern.hz less than 32.sobomax2008-10-261-1/+5
* Get initial bootstrap of APs working under xen.kmacy2008-09-101-2/+3
* Adjust the handling the various timer frequencies when using the lapicjhb2008-08-231-10/+17
* Don't try enumerating APICs when running on top of xenkmacy2008-08-221-0/+2
* Add the DTrace hooks for exception handling (Function boundary tracejb2008-05-241-0/+17
* In keeping with style(9)'s recommendations on macros, use a ';'rwatson2008-03-161-2/+2
* This is a follow-up, cleaning-up commit about recent changes involvingattilio2007-09-111-1/+1
* Move mp_topology() from apic_init(i386) and apic_setup_local(amd64) topeter2007-08-021-4/+0
* Handle CPUs with APIC IDs higher than 32 (at least one IBM server usesjhb2007-05-081-9/+2
* Minor fixes and tweaks to the x86 interrupt code:jhb2007-05-081-0/+13
* Disable C1 Enhanced mode on AMD K8 Family Revision F and above to keepariff2007-04-251-0/+23
* Add a new apic0 psuedo-device to claim memory resources for the memoryjhb2007-03-201-0/+2
* Change the x86 interrupt code to use FreeBSD CPU IDs (i.e. PCPU_GET(cpuid))jhb2007-03-061-1/+0
* Use vm_paddr_t rather than uintptr_t when passing the physical address ofjhb2007-03-051-1/+1
* Evidently FreeBSD has long relied on the compiler to treat structureskmacy2006-12-171-7/+7
* MD support for PCI Message Signalled Interrupts on amd64 and i386:jhb2006-11-131-0/+62
* Change the x86 interrupt code to suspend/resume interrupt controllersjhb2006-10-101-5/+21
* Extend comment explaining why code is conditional at !defined(SCHED_ULE).sobomax2006-09-271-0/+4
* Since ULE doesn't honor hlt_cpus_mask don't compile code that preventssobomax2006-09-271-1/+1
* Add a new ddb command 'show lapic' to dump details about the local APICjhb2006-09-111-0/+70
* Unbreak in the case when device apic is compiled into non-SMP kernel.sobomax2006-09-061-0/+2
* The FreeBSD by default "disables" hyper-threading cores, by not schedulingsobomax2006-09-051-0/+10
* Simplify the pager support in DDB. Allowing different db commands tojhb2006-07-121-4/+2
* Drop some unneeded casts since we program the kernel in C rather than C++.jhb2006-03-201-1/+1
* Rework how we wire up interrupt sources to CPUs:jhb2006-02-281-14/+2
* Tweak how the MD code calls the fooclock() methods some. Instead ofjhb2005-12-221-5/+6
* Revert previous commit. The BIOS braindamage is even worse than Ijhb2005-12-131-9/+2
* Don't check the CPUID_APIC bit in the cpu_features flags field to determinejhb2005-12-131-2/+9
* Change the i386 code to pass the interrupt vector as a separate argumentjhb2005-12-051-3/+3
* - Move the code to deal with handling an IPI_STOP IPI out ofjhb2005-12-051-0/+4
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