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FreeBSD-src
RELENG_2_2
RELENG_2_3
RELENG_2_3_0
RELENG_2_3_1
RELENG_2_3_2
RELENG_2_3_3
RELENG_2_3_4
RELENG_2_4
RELENG_2_4_4
RELENG_2_4_OLD
devel
devel-11
releng/10.1
releng/10.3
releng/11.0
releng/11.1
stable/10
stable/11
Raptor Engineering's fork of pfsense FreeBSD src with pfSense changes
Raptor Engineering, LLC
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path:
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/
sys
/
i386
/
acpica
/
madt.c
Commit message (
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)
Author
Age
Files
Lines
*
Completely ignore disabled CPU entries as their APIC IDs tend to be
jhb
2004-06-10
1
-13
/
+8
*
Use the local APIC ID rather than the ACPI Processor ID to index the array
jhb
2004-06-01
1
-28
/
+30
*
Fixup a few bogons in a comment.
jhb
2004-05-11
1
-3
/
+3
*
Rework the APIC mixed mode support a bit:
jhb
2004-05-10
1
-0
/
+2
*
- Change madt_map_table() to verify the checksum of any table it is asked
jhb
2004-05-10
1
-2
/
+30
*
- Change the APIC code to mostly use the recently added intr_trigger
jhb
2004-05-04
1
-36
/
+86
*
Revert part of the "BIOS brain damage" from rev 1.10. It seems that
jhb
2004-04-16
1
-4
/
+5
*
- Call acpi_Startup() before parsing interrupt-related APIC resources so we
jhb
2004-01-26
1
-7
/
+43
*
Use the ACPI-CA definitions for the various APIC tables instead of our
njl
2003-12-09
1
-59
/
+55
*
- Reorder the APIC enumerator SYSINIT's to register enumeators at
jhb
2003-12-03
1
-3
/
+2
*
Minor source sync with amd64. For %.*s printf formats, pass in an
peter
2003-11-14
1
-3
/
+5
*
Some motherboards like to remap the SCI (normally IRQ 9) up to a PCI
jhb
2003-11-11
1
-1
/
+6
*
Bump APIC ID limits up to 32 since a machine with 16 CPUs will have APIC
jhb
2003-11-10
1
-2
/
+2
*
Only disable the old pin when doing a remap if it's current vector is still
jhb
2003-11-06
1
-1
/
+2
*
When remapping an ISA interrupt from one intpin to another, disable the
jhb
2003-11-05
1
-8
/
+16
*
Make this compile with PAE.
peter
2003-11-04
1
-5
/
+6
*
Add the ACPI MADT table APIC enumerator. This code uses the ACPI Multiple
jhb
2003-11-03
1
-0
/
+650