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* MFC r314064, r314060:ian2017-03-011-1/+1
* MFC r311736:ian2017-03-011-24/+21
* MFC r308186, r308188, r308231, r308232:ian2017-03-011-0/+1001
* MFC r311734, r311735, r311951, r314071:ian2017-03-012-0/+326
* MFC r313712:gonzo2017-02-271-1/+3
* MFC r311911, r311923gonzo2017-01-231-0/+370
* MFC: r310309, r310340-310341, r311664, r311793-r311794marius2017-01-183-14/+45
* MFC r308187, r311660, r311693, r311727, r311797:ian2017-01-153-38/+110
* Add a convenience macro that masks all the bits related to clock divisorsian2016-05-261-0/+3
* Make sdhci(4) work after suspend/resume for chipsets that requiretrasz2016-05-111-2/+7
* Fix fallout from r292180 (Dec 2015)... ensure that every driver which hasian2016-03-212-0/+2
* Replace several bus_alloc_resource() calls with bus_alloc_resource_any()jhibbits2016-02-271-2/+2
* Move the DRIVER_MODULE() statements that declare mmc(4) to be a child ofian2015-12-142-0/+2
* Add support for the BCM57765 card reader.adrian2015-10-153-5/+42
* Raise the SDHCI timeout to 10 seconds and add a sysctl to allow changingloos2015-05-212-2/+10
* Detect, report and use 8-bit bus if is available.ian2015-02-271-4/+16
* Add a new SDHCI quirk, SDHCI_QUIRK_DONT_SET_HISPD_BIT. Apparently someian2015-01-172-1/+4
* Add defines for SDHCI 3.0 controllers.ian2015-01-171-0/+29
* Handle the possibility that SDHCI_PLATFORM_START_TRANSFER() can fail, byian2015-01-111-8/+12
* - Switching the mode of Ricoh R5CE823 to SD2.0 causes their PCI device IDmarius2014-12-311-7/+43
* Add a new sdhci quirk, SDHCI_QUIRK_WAITFOR_RESET_ASSERTED, to work aroundian2014-12-202-10/+28
* When command and data interrupts have been aggregated together, don't doian2014-12-202-2/+11
* class, subclass and progif were never used, so don't bother settingimp2014-10-131-4/+0
* - Nuke unused sdhci_softc.marius2014-08-315-42/+34
* Pull in r267961 and r267973 again. Fix for issues reported will follow.hselasky2014-06-282-4/+2
* Revert r267961, r267973:gjb2014-06-272-2/+4
* Extend the meaning of the CTLFLAG_TUN flag to automatically check ifhselasky2014-06-272-4/+2
* Honor the max-frequency property if it appears in the fdt data.ian2014-05-021-5/+11
* When changing the sd bus clock divisor, clear just the bus clock enable bitian2014-04-041-1/+2
* After a timeout, reset the controller using SDHCI_RESET_CMD|SDHCI_RESET_DATAian2014-02-161-3/+3
* Add timeout logic to sdhci, separate from the timeouts done by the hardware.ian2014-02-152-14/+36
* Increase the wait time for acquiring the bus from 10 to 250ms.ian2014-02-151-2/+11
* Fix the definition of the SDHCI_STATE_DAT and SDHCI_STATE_CMD fields, andian2014-02-121-2/+3
* Follow r261352 by updating all drivers which are children of simplebusian2014-02-021-0/+3
* Style changes and typos fixed.rpaulo2013-08-191-8/+13
* Allow a hardware driver to pass clock frequencies into the sdhci driver.ian2013-08-191-8/+18
* Add a new SDHCI_QUIRK_DONT_SHIFT_RESPONSE for hardware that pre-shiftsian2013-08-182-2/+9
* Add named constants for 8-bit bus support. The sdhci and mmc driversian2013-08-161-0/+3
* When the timeout clock is based on the SD clock, the timeout counterian2013-08-161-17/+21
* Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.wkoszek2013-04-271-0/+300
* Add hooks for plugging platform-provided transfer backend.gonzo2013-02-283-7/+49
* Remove accidentally committed debug panic(9) callgonzo2013-02-171-5/+1
* Disable debug accidentally enabled by previous commitgonzo2013-02-161-1/+1
* Various timing-related fixes:gonzo2013-02-163-12/+61
* Use DEVMETHOD_END macro defined in sys/bus.h instead of {0, 0} sentinel on de...sbz2013-01-301-1/+1
* - Get proper maximum clock frequency for SDHCI v3.0 and highergonzo2012-11-302-4/+11
* Add new quirks:gonzo2012-10-292-16/+61
* Split sdhci driver in two parts: sdhci and sdhci_pci.gonzo2012-10-164-565/+882
* Return back double spacing.glebius2012-07-301-1/+1
* Fix typo in comment, should be MHz here.glebius2012-07-211-1/+1
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