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* Adjust the global MSI blacklisting strategy so we don't have to explicitlyjhb2007-02-141-0/+26
| | | | | | | | | blacklist a bunch of old chipsets. If a system contains a PCI-PCI bridge that supports PCI-X, assume the chipset supports PCI-X. If a system contains a PCI-express root port, assume the chipset supports PCI-express. If the chipset doesn't support either PCI-X or PCI-express, then blacklist it by default. We should now only need to explicitly blacklist PCI-X or PCI-express chipsets that don't properly handle MSI.
* - Fix an off by one error in pci_remap_msix_method() that effectivelyjhb2007-02-141-2/+10
| | | | | | broke the method as all the MSI-X table indices were off by one in the backend MD code. - Fix a cosmetic nit in the bootverbose printf in pci_alloc_msix_method().
* Add missing 'break' that in this case is harmless.jhb2007-02-141-0/+1
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* As VPD support still causes hard hangs on boot with some hardware, add arwatson2007-02-081-2/+9
| | | | | | | | | | | tunable allowing automatic parsing of VPD data to be disabled. The default is left as-is; if you are having problems with hard hangs at boot due to VPD, try setting hw.pci.enable_vpd=0. A proper architectural solution has been under discussion for some time, but this allows me to boot my test machines in the mean time. Submitted by: bz Head nod: jmg
* Add constants for the PCIY_VENDOR (vendor-specific), PCIY_DEBUG (EHCIjhb2007-02-021-0/+22
| | | | debug port), and PCIY_EXPRESS (PCI-express) capabilities.
* Expand the MSI/MSI-X API to address some deficiencies in the MSI-X support.jhb2007-01-227-27/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - First off, device drivers really do need to know if they are allocating MSI or MSI-X messages. MSI requires allocating powerof2() messages for example where MSI-X does not. To address this, split out the MSI-X support from pci_msi_count() and pci_alloc_msi() into new driver-visible functions pci_msix_count() and pci_alloc_msix(). As a result, pci_msi_count() now just returns a count of the max supported MSI messages for the device, and pci_alloc_msi() only tries to allocate MSI messages. To get a count of the max supported MSI-X messages, use pci_msix_count(). To allocate MSI-X messages, use pci_alloc_msix(). pci_release_msi() still handles both MSI and MSI-X messages, however. As a result of this change, drivers using the existing API will only use MSI messages and will no longer try to use MSI-X messages. - Because MSI-X allows for each message to have its own data and address values (and thus does not require all of the messages to have their MD vectors allocated as a group), some devices allow for "sparse" use of MSI-X message slots. For example, if a device supports 8 messages but the OS is only able to allocate 2 messages, the device may make the best use of 2 IRQs if it enables the messages at slots 1 and 4 rather than default of using the first N slots (or indicies) at 1 and 2. To support this, add a new pci_remap_msix() function that a driver may call after a successful pci_alloc_msix() (but before allocating any of the SYS_RES_IRQ resources) to allow the allocated IRQ resources to be assigned to different message indices. For example, from the earlier example, after pci_alloc_msix() returned a value of 2, the driver would call pci_remap_msix() passing in array of integers { 1, 4 } as the new message indices to use. The rid's for the SYS_RES_IRQ resources will always match the message indices. Thus, after the call to pci_remap_msix() the driver would be able to access the first message in slot 1 at SYS_RES_IRQ rid 1, and the second message at slot 4 at SYS_RES_IRQ rid 4. Note that the message slots/indices are 1-based rather than 0-based so that they will always correspond to the rid values (SYS_RES_IRQ rid 0 is reserved for the legacy INTx interrupt). To support this API, a new PCIB_REMAP_MSIX() method was added to the pcib interface to change the message index for a single IRQ. Tested by: scottl
* - Change the PCI-X registers constants to be relative to the PCI-X PCIjhb2007-01-191-15/+71
| | | | | | | | | capability rather than hardcoded offsets for a particular card. While I'm here, expand the constants some. - Change the ahd(4) driver to use pci_find_extcap() to locate the PCI-X capability to keep up with the first change. Reviewed by: scottl, gibbs (earlier version)
* Disable MSI for the Intel 845 and 865 chipsets and update comment forjhb2007-01-161-1/+3
| | | | E7210 to note it is the same devid as the 875 chipset.
* Fix the subvendor ID for PCI-PCI bridges.jhb2007-01-162-5/+11
| | | | | | | | | | | - Retire the PCI_SUB*_1 constants and don't try to read a subvendor ID out of them. There isn't a standard subvendor ID field for PCI-PCI bridges. Instead, the dword at offset 0x34 is actually mostly reserved except for the LSB which is the capabilities pointer. - Add support for the PCI-PCI bridge subvendor ID capability (13) and use it to set the subvendor ID for PCI-PCI bridges. MFC after: 1 month
* - Add a new flag to the PCI-PCI driver to disable MSI on devices behind thejhb2007-01-133-0/+16
| | | | | | | | | bridge if it doesn't pass MSI messages up correctly. We set the flag in pcib_attach() if the device ID is disabled via a PCI quirk. - Disable MSI for devices behind the AMD 8131 HT-PCIX bridge. Linux has the same quirk. Tested by: no one despite repeated calls for testers
* Disable MSI for two ServerWorks chipsets. The first is based on a userjhb2007-01-121-0/+7
| | | | report. The second is blacklisted in Linux.
* Blacklist a few more Intel chipsets re: MSI based on user reports:jhb2007-01-121-2/+4
| | | | E7500 and 855.
* - Condense the comment for Intel chipset MSI blacklist entries.jhb2007-01-121-7/+3
| | | | | | | - Blacklist the E7210. PR: kern/105768 (2) Reported by: marcus (2)
* Disable MSI on the Intel E7505 chipset. It is reported broken on a Tyanjhb2006-12-281-0/+6
| | | | | | S2665ANF motherboard. Reported by: "Eugene M. Kim" <blue at white lv>
* Disable MSI for the Intel E7501 chipset.jhb2006-12-141-0/+6
| | | | Reported by: jdp
* Add a first pass at a way to blacklist MSI on systems where it doesn'tjhb2006-12-142-0/+52
| | | | | | | | | | | | work: - A new PCI quirk (PCI_QUIRK_DISABLE_MSI) is added to the quirk table. - A new pci_msi_device_blacklisted() determines if a passed in device matches an MSI quirk in the quirk table. This can be overridden (all quirks ignored) by setting the hw.pci.honor_msi_blacklist to 0. - A global blacklist check is performed in the MI PCI bus code by checking to see if the device at 0:0:0 is blacklisted. Tested by: jdp
* Replace #define<space> with #define<tab> so the code is consistent withjhb2006-12-145-368/+368
| | | | style(9) and avoids mixing the two formats.
* - Add constants for HT PCI capability registers including the variousjhb2006-12-122-0/+51
| | | | | | | subtypes of HT capabilities. - Add constants for the MSI mapping window HT PCI capability. - On i386 and amd64, enable the MSI mapping window on any HT bridges we encounter and report any non-standard mapping window addresses.
* Give the WREG() macro the same lifetime as the REG() macro.jhb2006-12-121-3/+3
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* Add some bootverbose printf's to detail how many MSI messages are allocatedjhb2006-12-121-0/+92
| | | | | | and to which IRQs. Requested by: scottl
* don't mark the cksum as invalid here... off is incorrect when we getjmg2006-11-211-1/+0
| | | | | | | here, it's either unset, or it's valid, so we don't need to do anything different... Reported by: Neterion (via rwatson)
* Look for capabilities in PCI-PCI bridges using the same CAP PTR registerjhb2006-11-161-0/+2
| | | | | | | as for type 0 devices. Submitted by: grehan MFC after: 1 week
* Fix a couple of comment typos.jhb2006-11-141-2/+2
| | | | Reported by: ru
* First cut at MI support for PCI Message Signalled Interrupts (MSI):jhb2006-11-138-8/+605
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add 3 new functions to the pci_if interface along with suitable wrappers to provide the device driver visible API: - pci_alloc_msi(dev, int *count) backed by PCI_ALLOC_MSI(). '*count' here is an in and out parameter. The driver stores the desired number of messages in '*count' before calling the function. On success, '*count' holds the number of messages allocated to the device. Also on success, the driver can access the messages as SYS_RES_IRQ resources starting at rid 1. Note that the legacy INTx interrupt resource will not be available when using MSI. Note that this function will allocate either MSI or MSI-X messages depending on the devices capabilities and the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. Also note that the driver should activate the memory resource that holds the MSI-X table and pending bit array (PBA) before calling this function if the device supports MSI-X. - pci_release_msi(dev) backed by PCI_RELEASE_MSI(). This function releases the messages allocated for this device. All of the SYS_RES_IRQ resources need to be released for this function to succeed. - pci_msi_count(dev) backed by PCI_MSI_COUNT(). This function returns the maximum number of MSI or MSI-X messages supported by this device. MSI-X is preferred if present, but this function will honor the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. This function should return the largest value that pci_alloc_msi() can return (assuming the MD code is able to allocate sufficient backing resources for all of the messages). - Add default implementations for these 3 methods to the pci_driver generic PCI bus driver. (The various other PCI bus drivers such as for ACPI and OFW will inherit these default implementations.) This default implementation depends on 4 new pcib_if methods that bubble up through the PCI bridges to the MD code to allocate IRQ values and perform any needed MD setup code needed: - PCIB_ALLOC_MSI() attempts to allocate a group of MSI messages. - PCIB_RELEASE_MSI() releases a group of MSI messages. - PCIB_ALLOC_MSIX() attempts to allocate a single MSI-X message. - PCIB_RELEASE_MSIX() releases a single MSI-X message. - Add default implementations for these 4 methods that just pass the request up to the parent bus's parent bridge driver and use the default implementation in the various MI PCI bridge drivers. - Add MI functions for use by MD code when managing MSI and MSI-X interrupts: - pci_enable_msi(dev, address, data) programs the MSI capability address and data registers for a group of MSI messages - pci_enable_msix(dev, index, address, data) initializes a single MSI-X message in the MSI-X table - pci_mask_msix(dev, index) masks a single MSI-X message - pci_unmask_msix(dev, index) unmasks a single MSI-X message - pci_pending_msix(dev, index) returns true if the specified MSI-X message is currently pending - Save the MSI capability address and data registers in the pci_cfgreg block in a PCI devices ivars and restore the values when a device is resumed. Note that the MSI-X table is not currently restored during resume. - Add constants for MSI-X register offsets and fields. - Record interesting data about any MSI-X capability blocks we come across in the pci_cfgreg block in the ivars for PCI devices. Tested on: em (i386, MSI), bce (amd64/i386, MSI), mpt (amd64, MSI-X) Reviewed by: scottl, grehan, jfv MFC after: 2 months
* fix hanging on invalid data... (This doesn't fix hanging due to brokenjmg2006-11-091-3/+4
| | | | | | hardware)... Tested by: Ian Dowse, Adam K Kirchhoff and Vladimir Kushnir
* Don't try to print a NULL string during boot. If a device doesn't have ajhb2006-11-091-9/+15
| | | | | | valid name yet, just omit the name during the bootverbose printfs. MFC after: 1 week
* Various whitespace cleanups.jhb2006-11-073-25/+27
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* Doh! Actually commit checking against NULL for res.imp2006-11-041-5/+5
| | | | Noticed by: dougb@
* Assign start to the value we were able to allocate and use that toimp2006-10-301-10/+11
| | | | | | write out the BAR. Otherwise, we were trying to shift a 32-bit quantity on 32-bit platforms. Also, 'start' check sanity to where it is known.
* More fully support 64-bit bars. Prior to this commit, we supportedimp2006-10-303-58/+69
| | | | | | | | | | | | | | | | | | | | | only those bars that had addresses assigned by the BIOS and where the bridges were properly programmed. Now even unprogrammed ones work. This was needed for sun4v. We still only implement up to 2GB memory ranges, even for 64-bit bars. PCI standards at least through 2.2 say that this is the max (or 1GB is, I only know it is < 32bits). o Always define pci_addr_t as uint64_t. A pci address is always 64-bits, but some hosts can't address all of them. o Preserve the upper half of the 64-bit word during resource probing. o Test to make sure that 64-bit values can fit in a u_long (true on some platforms, but not others). Don't use those that can't. o minor pedantry about data sizes. o Better bridge resource reporting in bootverbose case. o Minor formatting changes to cope with different data types on different platforms. Submitted by: jmg, with many changes by me to fully support 64-bit addresses.
* fix tab indentation for CP and RV...jmg2006-10-201-7/+51
| | | | | | | | | | | If the length is zero, catch this early, instead of making dflen go negative and letting bad things happen... We also check to see if RV (checksum) is 0, and handle that has a checksum failure... Properly handle checksum failures by not processing read-write VPD data, and removing all the found read-only data... Tested by: oleg (dflen going negative)
* Remove redundant casts. The casts inside the macros should beimp2006-10-121-4/+4
| | | | sufficient (or fixed if not).
* provide routines to access VPD data at the PCI layer...jmg2006-10-094-3/+390
| | | | | | remove sk's own implementation, and use the new calls to get the data... Reviewed by: -arch
* Actually make bounds checking for PCIOCREAD and PCIOCWRITE work.ru2006-10-061-6/+8
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* spell PCIS_CRYPTO_ENTERTAIN properly...jmg2006-09-201-1/+1
| | | | MFC after: 3 days
* Commit the results of the typo hunt by Darren Pilgrim.yar2006-08-041-2/+2
| | | | | | | | | | This change affects documentation and comments only, no real code involved. PR: misc/101245 Submitted by: Darren Pilgrim <darren pilgrim bitfreak org> Tested by: md5(1) MFC after: 1 week
* Simplify the pager support in DDB. Allowing different db commands tojhb2006-07-121-4/+3
| | | | | | | | | | | | | | | | install custom pager functions didn't actually happen in practice (they all just used the simple pager and passed in a local quit pointer). So, just hardcode the simple pager as the only pager and make it set a global db_pager_quit flag that db commands can check when the user hits 'q' (or a suitable variant) at the pager prompt. Also, now that it's easy to do so, enable paging by default for all ddb commands. Any command that wishes to honor the quit flag can do so by checking db_pager_quit. Note that the pager can also be effectively disabled by setting $lines to 0. Other fixes: - 'show idt' on i386 and pc98 now actually checks the quit flag and terminates early. - 'show intr' now actually checks the quit flag and terminates early.
* Add a define for the Standard SD Host Controller Base Peripheral.imp2006-05-301-0/+1
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* Workaround a hang on some nForce2 systems that can happen if the CPU goesjhb2006-05-241-0/+38
| | | | | | | into and out of the halt state very quickly. Submitted by: Andriy Gapon <avg at icyb dot net dot ua> MFC after: 1 week
* Fixup some comments to allow for the fact that PCI domains are not specificjhb2006-05-111-3/+3
| | | | to Alpha hoses.
* The size of I/O ranges can be anything from 16 bytes to 2G bytes.marcel2006-04-271-2/+2
| | | | | | Lower the minimum for memory mapped I/O from 32 bytes to 16 bytes. This fixes bus enumeration on ia64 now that the Diva auxiliary serial port is attached to.
* Free allocated environment variables after use.jkim2006-04-211-4/+12
| | | | | Coverity ID: 366 Found by: Coverity Prevent
* Don't add an agp child in vgapci's attach routine if the PCIY_AGPjhb2006-02-011-7/+0
| | | | | | | capability is present as not all devices supported by the agp_i810 driver (such as i915) have the AGP capability. Instead, add an identify routine to the agp_i810 driver that uses the PCI ID to determine if it should create an agp child device.
* Make the 'pci_devclass' pointer variable private (drivers really shouldn'tjhb2006-01-202-4/+3
| | | | | | share devclass pointers, a mistake I've encouraged in the past) and move the declaration of the pci_driver kobj class from cardbus.c to pci_private.h so that other drivers can inherit from pci_driver.
* - Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all thejhb2006-01-062-9/+2
| | | | | | | various pcib drivers to use their own private devclass_t variables for their modules. - Use the DEFINE_CLASS_0() macro to declare drivers for the various pcib drivers while I'm here.
* Use __HAVE_ACPI and __PCI_REROUTE_INTERRUPT as appropriate rather thanimp2006-01-011-4/+2
| | | | the complicated #ifdefs.
* Remove left-over #ifdef alpha routines. They aren't used by any ofimp2006-01-011-5/+0
| | | | | our drivers, and don't appear to be necessary for GENERIC and LINT on the alpha. They don't belong in a MI header anyway...
* Remove stray debug from p4 integration.imp2006-01-011-5/+1
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* Make RID2BAR actually return a number that can be plugged into PCIR_BAR()imp2005-12-301-1/+1
| | | | | | rather than a bitmask. Submitted by: ru@
* Remove debug now that I've looped back the big changes into my p4 tree.imp2005-12-301-4/+0
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