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path: root/sys/dev/pci/pcireg.h
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* Add support for vendor specific function for PCI devid acquisition in ITSzbb2015-07-211-0/+1
* Implement interface to create SR-IOV Virtual Functionsrstone2015-03-011-0/+18
* Add some pcib methods to get ARI-related informationrstone2015-03-011-0/+4
* Add IOMMU PCI subclass, found on Tyan S8236 motherboard.mav2014-05-201-0/+1
* Add support for PCIe ARIrstone2014-04-011-0/+8
* Add a method to get the PCI RID for a device.rstone2014-04-011-0/+17
* Revert PCI RID changes.rstone2014-04-011-25/+0
* Add a method to get the PCI Routing ID for a devicerstone2014-04-011-0/+25
* Add some definitions for the bits in root control and status PCIe capkib2013-10-241-0/+9
* Add new capability types encodings from HyperTransport I/O Linkkib2013-05-171-0/+4
* Add missing Extended Capability ID Numbers from PCIe 3.0.imp2012-10-191-2/+12
* Add constants for programming interfaces for NVM/solid state storagejimharris2012-09-191-0/+2
* Add PCI subclass for NVM Express devices.gavin2012-09-191-0/+1
* Align the PCI Express #defines with the style used for the PCI-Xgavin2012-09-181-141/+141
* - Add #defines for the bits within the iPCI Express PCIR_EXPRESS_LINK_CTLgavin2012-09-171-1/+15
* - Add some registers defined in PCI 3.0 including new AER bits.jhb2012-09-131-11/+68
* Add #defines for the bits in the PCI Express SLOT registers. Namesgavin2012-09-051-0/+32
* Save more of config space for PCI Express and PCI-X devices.kan2012-03-081-0/+10
* Fix a spelling mistake in the surprise link down error constant.jhb2012-01-311-1/+1
* Add a constant for the PCI-e surprise link down uncorrectable error.jhb2012-01-301-0/+1
* Add a constant for the Advisory Non-Fatal Error bit in AER corrected errorjhb2011-11-301-0/+1
* Renamed PCI_INTERFACE_XHCI to PCIP_SERIALBUS_USB_XHCI and moved itru2011-05-171-0/+1
* Explicitly track the state of all known BARs for each PCI device. The PCIjhb2011-03-311-0/+1
* Update PCI power management registers per PCI Bus Power Management Interfacejkim2010-10-201-14/+18
* - Rename the constant for the Master Data Parity Error flag in thejhb2010-09-091-24/+24
* - Add register definitions related to extended capability IDs injhb2010-09-081-0/+84
* Provide more defines for PCI-Express device ctrl.raj2010-07-111-0/+3
* Add more bit definitions to PCI express device control and deviceyongari2010-02-011-0/+8
* number of cleanups in i386 and amd64 pci md codeavg2009-09-241-0/+1
* pci: remove definitions of duplicate constantsavg2009-09-101-5/+5
* - Add a few more register defintions for the PCI express capabilityjhb2009-04-171-0/+28
* Always read/write the full 64-bit value of 64-bit BARs. Specifically,jhb2009-03-051-1/+1
* Disable INTx when enabling MSI/MSIXrnoland2009-03-021-0/+1
* Add SATA and PCI Advanced Features capabilities constants.mav2009-02-151-0/+11
* - Add a new ioctl to /dev/pci to fetch details on an individual BAR of ajhb2009-02-021-1/+3
* Nit: Add a few leading zeros to make this match other mask constantsimp2008-11-031-1/+1
* Add HDA multimedia subclass.mav2008-10-211-0/+1
* The config space registers holding the upper 32-bits of the prefetchablejhb2008-08-201-0/+3
* - Fix a small bit slip in PCIM_PCAP_D[0-2]PME defines.sepotvin2007-09-191-3/+5
* Change PCIM_CIS_ASI_TUPLE to _CONFIG.imp2007-05-161-3/+5
* - HT 2.00b added a new flag to the MSI mapping HT capability to indicatejhb2007-04-251-0/+2
* Add constants for the fields in a BAR. Also, add two new macrosjhb2007-03-311-0/+13
* - Add missing constants for subclasses.jhb2007-03-311-5/+31
* - Flesh out list of UART simple comms programming interfaces.jhb2007-03-051-1/+15
* Add constants for the PCIY_VENDOR (vendor-specific), PCIY_DEBUG (EHCIjhb2007-02-021-0/+22
* - Change the PCI-X registers constants to be relative to the PCI-X PCIjhb2007-01-191-15/+71
* Fix the subvendor ID for PCI-PCI bridges.jhb2007-01-161-3/+4
* Replace #define<space> with #define<tab> so the code is consistent withjhb2006-12-141-333/+333
* - Add constants for HT PCI capability registers including the variousjhb2006-12-121-0/+21
* First cut at MI support for PCI Message Signalled Interrupts (MSI):jhb2006-11-131-0/+16
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