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* - Merge from r249476: Ensure that PCI bus BUS_GET_DMA_TAG() method seesmarius2013-05-301-7/+16
* - Correct mispellings of the word occurrencegabor2013-04-171-1/+1
* RX checksum offloading on old Yukon controllers seem to cause moreyongari2013-02-271-0/+6
* Mechanically substitute flags from historic mbuf allocator withglebius2012-12-041-4/+4
* For Yukon II controllers that implement optional temperature sensoryongari2012-04-251-0/+3
* ether_ifattach() sets if_mtu to ETHERMTU, don't bother set it againkevlo2012-01-071-1/+0
* Increase wait time for OP_TCPSTART command processing. It seemsyongari2011-12-191-2/+2
* - There's no need to overwrite the default device method with the defaultmarius2011-11-221-10/+2
* Enable 64bit DMA addressing support for all msk(4) controllers.yongari2011-11-162-67/+177
* Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.yongari2011-10-171-1/+1
* Correctly check MAC running status before disabling TX/RX MACs.yongari2011-05-311-1/+1
* style(9)yongari2011-05-241-16/+17
* When MTU is changed, check whether driver should be reinitialized oryongari2011-05-231-1/+4
* Add initial support for Marvell 88E8055/88E8075 Yukon Supreme.yongari2011-05-232-4/+28
* Do not touch ASF related register for controllers that do not haveyongari2011-05-232-17/+25
* Make sure to enable all clocks before accessing registers.yongari2011-05-231-31/+23
* Do not configure RAM registers for controllers that do not haveyongari2011-05-231-2/+8
* Rework store and forward configuration of TX MAC FIFO. Basically ityongari2011-05-231-23/+10
* Do not blindly clear entire GPHY control register. It seems someyongari2011-05-231-2/+2
* When msk_detach() is called from msk_attach(), ifp may beglebius2011-04-251-1/+2
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-2/+2
* Introduce signed and unsigned version of CTLTYPE_QUAD, renamingmdf2011-01-191-3/+3
* Fix a few more SYSCTL_PROC() that were missing a CTLFLAG type specifier.mdf2011-01-191-1/+1
* Fix endianness bug introduced in r205091.yongari2010-12-311-1/+1
* o Flesh out the generic IEEE 802.3 annex 31B full duplex flow controlmarius2010-11-141-5/+7
* Fix typos.brucec2010-11-091-9/+9
* Convert the PHY drivers to honor the mii_flags passed down and convertmarius2010-10-151-11/+10
* Catch up to rename of the constant for the Master Data Parity Error bit injhb2010-09-091-2/+2
* When VLAN hardware tagging is disabled, make sure to disable VLANyongari2010-05-041-1/+2
* Make sure to check whether driver is running before processingyongari2010-05-041-9/+6
* Drop driver lock before exiting from interrupt handler.yongari2010-05-041-0/+1
* Add basic support for Marvell 88E8059 Yukon Optima.yongari2010-04-302-3/+23
* Disable non-ASF packet flushing on Yukon Extreme as vendor's driveryongari2010-04-302-0/+7
* Both RX_GMF_LP_THR and RX_GMF_UP_THR must be 16 bits register. Ifyongari2010-04-302-4/+4
* With r206844, CSUM_TCP is also set for CSUM_TSO case. Modifyyongari2010-04-191-24/+24
* Partial revert r204545.yongari2010-04-071-1/+4
* It seems PCI_OUR_REG_[1-5] registers are not mapped on PCIyongari2010-03-141-10/+10
* Implement Rx checksum offloading for Yukon EC, Yukon Ultra,yongari2010-03-122-47/+204
* Remove taskqueue based interrupt handling. After r204541 msk(4)yongari2010-03-022-155/+26
* Implement rudimentary interrupt moderation with programmableyongari2010-03-012-20/+23
* Make sure to enable flow-control only if established link isyongari2010-03-011-14/+11
* Properly sync status LEs after processing.yongari2010-03-011-9/+2
* Remove trailing white spaces.yongari2010-02-261-4/+4
* Allocate single MSI message. msk(4) used to allocate 2 MSI messagesyongari2010-02-262-46/+15
* Don't hardcod register offset to set PCIe max read request size.yongari2010-02-262-29/+20
* Optimize inserting LE for TX checksum computation. Controller doesyongari2010-02-262-10/+17
* Add TSO support on VLANs. Controller requires VLAN hardware taggingyongari2010-02-261-6/+11
* Reuse the configured LE for VLAN if new LE was created for TSO.yongari2010-02-261-1/+1
* Correct inversed programming of ethernet hardware address onyongari2010-02-201-10/+16
* Yukon Ultra2 has 126MHz clock.yongari2010-01-221-1/+1
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