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* - Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOPmarius2011-05-031-4/+2
* Partially revert r184106. RX buffer ring also needs bus_dmamap_sync().yongari2011-04-011-2/+5
* 64bit DMA caused data corruption. Unfortunately there is no knownyongari2011-04-011-1/+4
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-4/+4
* Forgot to remove unlock of the driver lock from age_start_locked() whenjhb2011-01-131-2/+0
* Add a 'locked' variant of the foo_start() routine and call it directlyjhb2011-01-032-16/+13
* Convert the PHY drivers to honor the mii_flags passed down and convertmarius2010-10-151-7/+5
* Make sure to not use stale ip/tcp header pointers. The ip/tcpyongari2010-10-141-0/+1
* Remove unnecessary controller reinitialization.yongari2010-08-241-1/+9
* With r206844, CSUM_TCP is also set for CSUM_TSO case. Modifyyongari2010-04-191-15/+13
* Add TSO support on VLANs. While I'm here remove unnecessary checkyongari2010-02-261-22/+9
* Fix multicast handling. All Atheros controllers use big-endian formyongari2009-09-291-1/+1
* Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/rwatson2009-06-261-2/+2
* pci(4) handles PCIM_CMD_INTxDIS so there is no need to poke thisyongari2009-05-201-12/+0
* o Don't access VPD even if hardware advertised the capability.yongari2009-03-282-134/+101
* Fix inversed logic. pci_find_extcap() returns 0 when it findsyongari2009-03-231-1/+1
* Remove informational messages left. These messages were intended toyongari2008-11-071-7/+7
* Remove unused age_txdqkevlo2008-10-211-2/+0
* No need to sync descriptors twice in age_rxintr()kevlo2008-10-211-6/+0
* Fix a typo: jme -> agekevlo2008-08-141-1/+1
* Use DELAY() instead of pause if waiting time is less than 1ms.yongari2008-07-181-2/+2
* Fix typo in comment.rpaulo2008-06-081-1/+1
* Add age(4), a driver for Attansic/Atheros L1 gigabit ethernetyongari2008-05-193-0/+4284
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