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* Add #NO_UNIVERSE to RADXA and RADXA-LITE kernel configsganbold2014-05-312-0/+4
* Reset HSIC hub during EHCI initialization. This makes devices connectedbr2014-05-301-0/+38
* Fix off-by-one error that makes 0-th pins of each bank unreachable.br2014-05-301-1/+1
* o Make keyboard-related properties to be compatible with vendor standardbr2014-05-302-107/+214
* Add common kernel config file for Rockchip RK3188 systems by splittingganbold2014-05-303-95/+154
* Cleanup the RADXA kernel config file a bit and enable modules.rpaulo2014-05-301-5/+2
* Do not hand the VM the memory used for stacks/page tables/etc.cognet2014-05-295-0/+20
* For old CPUs, map the 64 first MB of RAM as it used to be. Some portscognet2014-05-291-1/+25
* Factor out kernel configuration for DWC OTG FDT attach code.hselasky2014-05-292-2/+0
* Add simple polling mechanism that works for KDB.br2014-05-281-1/+22
* Describe I2C arbitrator device in DTS and use it for Chromebook Snow only.br2014-05-281-11/+48
* o Add kernel configuration for HP Chromebook 11br2014-05-284-3/+58
* Rework the Ti GPIO driver to work on multiple SoCs. At the moment it couldandrew2014-05-261-30/+109
* Delete obsolete and unused PJ4B CPU functionszbb2014-05-252-41/+0
* Fix context switch on PJ4Bv7 and remove obsolete pj4b_/arm11 functionszbb2014-05-251-7/+7
* Fix whitespace glitches.ian2014-05-251-2/+2
* Make ti_padconf_devmap static in both places it is defined.andrew2014-05-252-2/+2
* Allow the OMAP4 and AM335x prcm drivers to be compiled in the same kernelandrew2014-05-253-5/+21
* Reduce the diff between the PandaBoard and BeableBone kernel configs toandrew2014-05-252-56/+56
* Enable automatic superpages promotion by default on ARMv6/v7zbb2014-05-241-1/+1
* Eliminate one of the causes of spurious interrupts on armv6. The arm weakian2014-05-244-2/+76
* Remove NetBSD implementation details not relevant to FreeBSD.imp2014-05-231-8/+0
* Map device memory using PTE_DEVICE attributes, and also ensure that theian2014-05-221-8/+10
* Optimise reading of pending interrupt registers. If there are nohselasky2014-05-201-19/+27
* Allow us to compile the Ti iic driver for both OMAP4 and AM335x.andrew2014-05-171-7/+23
* Move the Ti SoCs to use the ARM platform. This should help allowing aandrew2014-05-173-25/+41
* Add FDT_PLATFORM_DEF2 for when there are multiple platforms needing to useandrew2014-05-171-15/+18
* Fix a comment s/initarm_/platform_/andrew2014-05-171-1/+1
* Add the start of the ARM platform code. This is based on the PowerPCandrew2014-05-1721-122/+543
* Fix spelling mistake in comment.gavin2014-05-161-1/+1
* Fix return value. Should be logic one or zero.br2014-05-151-1/+1
* Give suitably-endowed ARMs a register similar to the x86 TSC register.markm2014-05-142-1/+53
* Fix typo.br2014-05-141-1/+1
* Remove extra newlines.ray2014-05-141-8/+0
* Cleanup some style nits.ian2014-05-121-8/+4
* Interrupts need to be disabled on entry to cpu_sleep() for ARM. Givenian2014-05-121-2/+2
* Add cpu_l2cache_drain_writebuf(), use it to implement generic_bs_barrier().ian2014-05-114-1/+39
* Enable SMP for Exynos-based platforms (i.e. Chromebook)grehan2014-05-111-1/+1
* Make the hardware memory and instruction barrier functions work on armv4ian2014-05-111-3/+3
* Rename platform_gpio_init to be SoC specificandrew2014-05-103-3/+3
* Rename platform_gpio_init to be platform specific, and make it static asandrew2014-05-102-4/+4
* Rename platform_gpio_init to be SoC specific, and make it static as it'sandrew2014-05-101-4/+4
* When mapping device memory, use PTE_DEVICE rather than PTE_NOCACHE.ian2014-05-1012-55/+55
* Call idcache_inv_all from the AP core entry code before turning on the MMU.ian2014-05-092-9/+16
* Add the codes for enabling CPU cores of Rockchip RK3188 SoC.ganbold2014-05-094-0/+195
* Consolitate all the AP core startup stuff under a single #ifdef SMP block.ian2014-05-081-16/+6
* Move the mptramp code which is specific to the Marvell ArmadaXP SoC out ofian2014-05-083-47/+58
* Use edge-triggered interrupts rather than polling loops to avoid missingian2014-05-081-15/+28
* Enable PL310 power-saving modes and tune the cache ram latencies for imx6.ian2014-05-061-0/+13
* Add a public routine to set the L2 cache ram latencies. This can beian2014-05-062-0/+42
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