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* Fix vfp:andrew2013-07-161-16/+15
| | | | | | | | | - We should check is_d32 to see howmany registers we have - In vfp_restore mark vfpscr as an output register Without the second part it appears we can return the incorrect value from vfp_bounce if the VFP condition flags are set as it may override the register holding the return value.
* Move the Raspberry Pi low level options out of the kernel config and intorpaulo2013-07-153-12/+20
| | | | | | std.rpi + std.bcm2835. Reviewed by: imp
* Introduce new structure sfstat for collecting sendfile's statisticsae2013-07-151-1/+1
| | | | | | | and remove corresponding fields from struct mbstat. Use PCPU counters and SFSTAT_INC() macro for update these statistics. Discussed with: glebius
* Indent the "scp=... rlv=..." to make it easier to read the backtrace.rpaulo2013-07-131-2/+2
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* Remove trailing whitespaces.ray2013-07-101-6/+6
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* Improve a comment.rpaulo2013-07-091-4/+2
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* Remove extraneous format string converison specifieremaste2013-07-091-1/+1
| | | | Submitted by: wxs@
* Add IDs for TPS65217C and TPS65217Dgonzo2013-07-081-0/+8
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* - AM335x requires updated soft-reset logic toogonzo2013-07-081-4/+7
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* Convert bcm2835_mbox to the new mbox interface.rpaulo2013-07-074-55/+63
| | | | Reviewed by: gonzo
* Another warning.rpaulo2013-07-071-1/+1
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* armadaxp_idcache_wbinv_all() is in this file.rpaulo2013-07-071-1/+2
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* Fix all the compiler warnings in elf_trampoline.c.rpaulo2013-07-071-4/+22
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* - Add USFS driver as an example of device mode for AM335x-based devicesgonzo2013-07-071-0/+4
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* - Add USBSS driver for AM335x SoC. Driver is a wrapper around Mentors Graphicgonzo2013-07-072-0/+482
| | | | USB OTG core.
* Don't clear the SYSCONFIG register on boot.rpaulo2013-07-062-2/+10
| | | | | | This follows section 18.4.2.2 SD Soft Reset Flow in the TI AM335x Technical Reference Manual and seems to fix the "ti_mmchs0: Error: current cmd NULL, already done?" messages.
* Fix the build with gcc.andrew2013-07-051-4/+20
| | | | | | | | | | Gcc outputs pre-UAL asm and expects the ldcl instruction with a condition in the form ldc<c>l, where the code produces the instruction in the UAL form ldcl<c>. Work around this by checking if we are using clang or gcc and adjusting the instruction. While here correct the cmp instruction's value to include the # before the immediate value.
* o Make fields names short.ray2013-07-051-33/+23
| | | | o Slim down reg fields comments.
* Add support for ePWM submodule of PWMSSgonzo2013-07-041-4/+145
| | | | | | | | | ePWM is controlled by sysctl nodes dev.am335x_pwm.N.period, dev.am335x_pwm.N.dutyA and dev.am335x_pwm.N.dutyB that controls PWM period and duty cycles for channels A and B respectively. Period and duty cycle are measured in clock ticks. Default clock frequency for AM335x PWM subsystem is 100MHz
* Remove redundant clearing of the PGA_WRITEABLE flag ingber2013-07-041-1/+0
| | | | | | | | | pmap_remove_all() This flag should already be cleared by pmap_nuke_pv() Submitted by: Zbigniew Bodek <zbb@semihalf.com> Sponsored by: The FreeBSD Foundation, Semihalf
* Fix modified bit emulation for ARMv6/v7gber2013-07-041-2/+7
| | | | | | | | | | | | | | | | | | When doing pmap_enter_locked(), enable write permission only when access type indicates attempt to write. Otherwise, leave the page read only but mark it writable in pv_flags. This will result in: 1. Marking page writable during pmap_enter() but only when ensured that it will be written right away so that we will not get redundant permissions fault on write attempt. 2. Keeping page read only when it is permitted to be written but there was no actual write attempt. Hence, we will get permissions fault on write access and mark page writable in pmap_fault_fixup() what will indicate modification status. Submitted by: Zbigniew Bodek <zbb@semihalf.com> Sponsored by: The FreeBSD Foundation, Semihalf
* Fix one of INVARIANTS-related UMA panics on ARMgonzo2013-07-031-3/+15
| | | | | | Force UMA zone to allocate service structures like slabs using own allocator. uma_debug code performs atomic ops on uma_slab_t fields and safety of this operation is not guaranteed for write-back caches
* Enable VFP on Raspberry Pi. This has worked as of r251712.andrew2013-07-021-0/+3
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* Enable SCTP, since it is also enabled on GENERIC and it works fine ontuexen2013-07-011-0/+1
| | | | | | the Raspberry Pi. Discussed with: rpaulo
* The mbox driver is actually MP safe, so set the right flag inrpaulo2013-07-011-5/+3
| | | | bus_setup_intr().
* Disable debugging.rpaulo2013-07-011-2/+0
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* Use the new FDT_FILE rpi.dts.rpaulo2013-07-011-1/+1
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* Fix issues with zeroing and fetching the counters, on x86 and ppc64.kib2013-07-011-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Issues were noted by Bruce Evans and are present on all architectures. On i386, a counter fetch should use atomic read of 64bit value, otherwise carry from the increment on other CPU could be lost for the given fetch, making error of 2^32. If 64bit read (cmpxchg8b) is not available on the machine, it cannot be SMP and it is enough to disable preemption around read to avoid the split read. On x86 the counter increment is not atomic on purpose, which makes it possible for the store of the incremented result to override just zeroed per-cpu slot. The effect would be a counter going off by arbitrary value after zeroing. Perform the counter zeroing on the same processor which does the increments, making the operations mutually exclusive. On i386, same as for the fetching, if the cmpxchg8b is not available, machine is not SMP and we disable preemption for zeroing. PowerPC64 is treated the same as amd64. For other architectures, the changes made to allow the compilation to succeed, without fixing the issues with zeroing or fetching. It should be possible to handle them by using the 64bit loads and stores atomic WRT preemption (assuming the architectures also converted from using critical sections to proper asm). If architecture does not provide the facility, using global (spin) mutex would be non-optimal but working solution. Noted by: bde Sponsored by: The FreeBSD Foundation
* Add INET6.rpaulo2013-06-301-0/+1
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* Replace some spaces to tab.ray2013-06-301-4/+4
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* Decrypt magic numbers - define names for fields of Generic Timer's CNTKCTL reg.ray2013-06-301-3/+23
| | | | Submitted by: Ruslan Bukin <br@bsdpad.com>
* In generic_bs_map(), use kmem_alloc_nofault() instead of kmem_alloc(), as wecognet2013-06-301-1/+1
| | | | | | only need virtual addresses. Submitted by: alc
* Arndale Board (by Insignal) kernel config file.ray2013-06-291-0/+135
| | | | | | | More info on the Wiki page https://wiki.freebsd.org/FreeBSD/arm/ArndaleBoard Submitted by: Ruslan Bukin <br@bsdpad.com> Reviewed by: gonzo
* - Fix IMAPx registers values calculationgonzo2013-06-291-20/+24
| | | | | | | | | - Initialize SMAPx registers too although they're unused in QEMU - Do not pass IO/MEM resources to upper bus for activation, handle them locally. Previously ACTIVATE method of upper bus was no-op so nothing bad happened. But now FDT maps physaddr to vaddr and it causes troubles: fdtbus_activate_resource resource assumes that bustag/bushandle are already set which in this case is wrong.
* Enable patth-through of IRQ30 and IRQ31 to PIC just as comment statesgonzo2013-06-291-1/+1
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* Import basic support for Samsung Exynos 5 support.ray2013-06-2910-0/+1480
| | | | | Submitted by: Ruslan Bukin <br@bsdpad.com> Reviewed by: gonzo
* Add ARM Generic Timer driver.ray2013-06-291-0/+374
| | | | Submitted by: Ruslan Bukin <br@bsdpad.com>
* o Initialize interrupt groups as Group 0 (secure interrupts).ray2013-06-291-15/+29
| | | | | | o Minor cleanup. Submitted by: Ruslan Bukin <br@bsdpad.com>
* Bump max number of IRQs for Cortex-Ax family to cover Exynos5 requirement.ray2013-06-281-1/+1
| | | | Submitted by: Ruslan Bukin <br@bsdpad.com>
* Add identification for Cortex-A15 (R0) cores.ray2013-06-283-1/+5
| | | | Submitted by: Ruslan Bukin <br@bsdpad.com>
* Support reading registers r0-r3 when unwinding. There is a seperateandrew2013-06-271-0/+19
| | | | | instruction to load these. We only hit it when unwinding past an trap frame as in C r0-r3 would never have been saved onto the stack.
* Add UNWINDSVCFRAME to provide the unwind pseudo ops to allow us to unwindandrew2013-06-272-2/+11
| | | | | | | past a trapframe. Use this macro in exception_exit as it is the function the unwinder enters as the functions that store the frame setting lr to point to it.
* - Request non-cached memory for framebuffergonzo2013-06-271-2/+24
| | | | - Properly probe/initialize syscons
* Print the 'setting internal ...' message only with bootverbose.rpaulo2013-06-261-1/+3
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* Make support for atomics on ARM complete.ed2013-06-151-42/+316
| | | | | | | | | Provide both __sync_*-style and __atomic_*-style functions that perform the atomic operations on ARMv5 by using Restartable Atomic Sequences. While there, clean up some pieces of code where it's sufficient to use regular uint32_t to store register contents and don't need full reg_t's. Also sync this back to the MIPS code.
* Fix the vfp code to work with the 16 register variants of the VFP unit. Weandrew2013-06-132-35/+46
| | | | | | | | check which variant we are on, and if it is a VFPv3 or v4, and has 32 double registers we save these. This fixes VFP support on Raspberry Pi. While here clean fmrx and fmxr up to use the register names from vfp.h as opposed to the raw register names.
* Add C11 atomic fallbacks for ARM.ed2013-06-131-0/+540
| | | | | | | | | | | | | | | | | | Basically the situation is as follows: - When using Clang + armv6, we should not need any intrinsics. It should support it, even though due to a target misconfiguration it does not. We should fix this in Clang. - When using Clang + noarmv6, provide __atomic_* functions that disable interrupts. - When using GCC + armv6, we can provide __sync_* intrinsics, similar to what we did for MIPS. As ARM and MIPS are quite similar, simply base this implementation on the one I did for MIPS. - When using GCC + noarmv6, disable the interrupts, like we do for Clang. This implementation still lacks functions for noarmv6 userspace. To be done.
* Increase the maximum KVM available on TI chips. Not sure why we suddenly needcognet2013-06-091-3/+3
| | | | that much, but that lets me boot with 1GB of RAM.
* Merge in changes from NetBSD:andrew2013-06-081-17/+25
| | | | | | * Remove support for non-elf files. * Add the VFP setjmp magic numbers. * Add the offsets for the VFP registers within the buffer.
* Reduce the difference to NetBSD.andrew2013-06-071-25/+27
| | | | | | | | | | | | * Stop pretending we support anything other than ELF by removing code surrounded by #ifdef __ELF__ ... #endif. * Remove _JB_MAGIC_SETJMP and _JB_MAGIC__SETJMP, they are defined in setjmp.h, which is able to be included from asm. * Fix the spelling of dependent. * Rename END _END and add END and ASEND to complement ENTRY and ASENTRY respectively * Add macros to simplify accessing the Global Offset Table, some of these will be used in the upcoming update to the setjmp functions.
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