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* msdosfs_conv.c references cmos_wall_clock and adjkerntz. Since theseimp2005-07-271-0/+3
* Add extra constraints to tell the compiler that the memory be modifiedjhb2005-07-271-2/+4
* Use a + constraint modifier for a register arg in __bswap16_var().jhb2005-07-271-3/+2
* Convert the atomic_ptr() operations over to operating on uintptr_tjhb2005-07-151-8/+4
* Validate if the value written into {FS,GS}.base is a canonicaldavidxu2005-07-101-1/+2
* - Use a TAILQ instead of parsing the array to find a free dmamap.cognet2005-06-241-20/+32
* Fix a typo.jhb2005-06-231-1/+1
* Remove the va == pa mapping.cognet2005-06-231-10/+7
* Call kdb_trap() on fatal abort.cognet2005-06-231-5/+5
* Implement db_frame() and use it to obtain the registers value.cognet2005-06-231-22/+45
* Don't abuse UMA_SLAB_KMEM.cognet2005-06-232-9/+4
* Add .cvsignore files just like in sys/<arch>/compiled, this keeps CVS fromobrien2005-06-201-0/+1
* Try harder to detect if the allocated memory for L2 PTP comes from a 1MBcognet2005-06-161-1/+5
* Don't pass the kernel_pmap to pmap_fault_fixup() if the fault comes fromcognet2005-06-161-2/+2
* Remove the last use of pmap_initialized.cognet2005-06-101-4/+1
* Introduce a procedure, pmap_page_init(), that initializes thealc2005-06-101-17/+12
* MFP4:jkoshy2005-06-091-0/+14
* Use tabs, not spaces.cognet2005-06-091-6/+6
* Add ata stuff.cognet2005-06-091-1/+10
* - MFp4: modify slightly the arm intr API, there's arm CPUs with more than 32cognet2005-06-097-68/+73
* Add a new arm-specific option, ARM_USE_SMALL_ALLOC. If defined, it providescognet2005-06-076-68/+280
* Bring in bits I forgot while importing write back support for arm9.cognet2005-06-031-11/+13
* Remove a useless printf.cognet2005-06-031-1/+0
* Create nexus in configure_first() instead of in configure(). Thismarcel2005-05-291-2/+3
* Call cninit_finish() and set cold to 0 in configure_final() insteadmarcel2005-05-291-3/+3
* Remove bus_{mem,p}io.h and related code for a micro-optimization on i386nyan2005-05-292-66/+0
* Remove pmap_deactivate(), we do not use it.cognet2005-05-271-6/+0
* s/_KLD_MODULE/KLD_MODULE/cognet2005-05-261-1/+1
* Don't enable interrupts in the dispatcher, there's no need to do so.cognet2005-05-261-2/+1
* Don't call vm_page_dirty() in pmap_nuke_pv(), it's not the place to do so, andcognet2005-05-261-2/+1
* Remove bits specific to CPUs we won't support (< armv4).cognet2005-05-255-538/+15
* Increase the refresh rate.cognet2005-05-251-1/+1
* MFp4: Setup arm9 to write back by default.cognet2005-05-241-13/+17
* Remove kcopy(), we don't use it.cognet2005-05-242-630/+0
* We need to decrease p->p_lock after vm_fault() has been called.cognet2005-05-241-1/+1
* Correctly setup the UND stack in cpu_set_upcall(), and the trapframe incognet2005-05-241-4/+5
* - Try to avoid calling malloc() in bus_dmamap_create() and bus_dmamem_alloc()cognet2005-05-241-17/+65
* Write back affected pages in pmap_qremove() as well. This removes the needcognet2005-05-242-6/+12
* Use a more sane value for HZ.cognet2005-05-241-2/+3
* Use asm versions of in_cksum() and friends.cognet2005-05-243-245/+18
* Asm version of bswap16().cognet2005-05-241-5/+6
* Make sure we clean the RAS start address once we're done.cognet2005-05-241-0/+12
* Don't forget to copy the TP when forking, or bad things will happen to thecognet2005-05-111-0/+1
* Allocating the memory for the kernel stack one time is enough.cognet2005-04-271-7/+0
* Don't use fusufault in casuptr(), as it assumes the current PCB will becognet2005-04-231-23/+18
* Change cpu_set_kse_upcall to more generic style, so we can reuse itdavidxu2005-04-231-4/+19
* Add empty header (except of the multiple-inclusion protection) tomarcel2005-04-201-0/+10
* Break out the definition of bus_space_{tag,handle}_t and a few other typesimp2005-04-182-11/+47
* Unbreak the vector_page == 0x00000000 case. Map the vector page L1PT into thecognet2005-04-141-2/+4
* pmap_update() is gone.cognet2005-04-131-1/+0
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