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* MFC: r312939, r313250, r314811 (partial), r314887 (partial), r315760,marius2017-05-111-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r315845, 315430, r317981, r315466 o Fix some overly long lines, whitespace and other bugs according to style(9) as well as spelling etc. in mmc(4), mmcsd(4) and sdhci(4). o In the mmc(4) bridges and sdhci(4) (bus) front-ends: - Remove redundant assignments of the default bus_generic_print_child device method, - use DEVMETHOD_END, - use NULL instead of 0 for pointers. o Trim/adjust includes. o Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges as kernel drivers and their dependency onto mmc(4). o Add support for eMMC "partitions". Besides the user data area, i. e. the default partition, eMMC v4.41 and later devices can additionally provide up to: 1 enhanced user data area partition 2 boot partitions 1 RPMB (Replay Protected Memory Block) partition 4 general purpose partitions (optionally with a enhanced or extended attribute) Besides simply subdividing eMMC devices, some Intel NUCs having UEFI code in the boot partitions etc., another use case for the partition support is the activation of pseudo-SLC mode, which manufacturers of eMMC chips typically associate with the enhanced user data area and/ or the enhanced attribute of general purpose partitions. CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation. o Now that properly issuing CMD6 is crucial (so data isn't written to the wrong partition for example), make a step into the direction of correctly handling the timeout for these commands in the MMC layer. Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as recommended by relevant specifications. o Add an IOCTL interface to mmcsd(4); this is sufficiently compatible with Linux so that the GNU mmc-utils can be ported to and used with FreeBSD (note that due to the remaining deficiencies outlined above SANITIZE operations issued by/with `mmc` currently most likely will fail). These latter have been added to ports as sysutils/mmc-utils. Among others, the `mmc` tool of mmc-utils allows for partitioning eMMC devices (tested working). o For devices following the eMMC specification v4.41 or later, year 0 is 2013 rather than 1997; so correct this for assembling the device ID string properly. o Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at least for some of the above a matching pair is required. o In the ACPI front-end of sdhci(4) describe the Intel eMMC and SDXC controllers as such in order to match the PCI one. Additionally, in the entry for the 80860F14 SDXC controller remove the eMMC-only SDHCI_QUIRK_INTEL_POWER_UP_RESET.
* MFC r309538:mmel2017-04-163-18/+89
| | | | | | | | | Fixes for NVIDIA Tegra124 clocks: - EMC clock have standard peripheral clock block. Use it. - Implement full frequency set method for PLLD2. This PLL is used as HDMI pixel clock so we must be able to set it to wide range of frequencies, within 5% tolerance allowed by HDMI specification. Due to this, full state space search (over m, n, p fields) is necessary.
* MFC r308286,r308287:mmel2017-04-165-124/+471
| | | | | | | | | r308286: TEGRA: Add basic driver for memory controller. For now, it only reports memory and SMMU access errors. r308287: TEGRA: Fix numerous issues in clock code. Define and export clocks related to XUSB driver.
* MFC r306442,r306444,r306445,r306550:mmel2017-04-163-3/+2
| | | | | | | | | | | | | r306442: TEGRA: Add support for MULTIDELAY option. r306444: TEGRA: Don't include files already included by system or arch configs. r306445: TEGRA: Return back kern_clocksource.c into tegra config file. It was removed in r306444 by mistake. r306550: TEGRA: Extend timeout for PLLs lock to 5 ms. Real lock time for PLLA has been very near to old limit.
* MFC r306262, r306267, r310021: (needed to avoid conflicts on later merges)ian2017-03-012-20/+1
| | | | | | | | | | Remove bus_dma_get_range and bus_dma_get_range_nb on armv6. We only need this on a few earlier arm SoCs. Restrict where we need to define fdt_fixup_table to just PowerPC and Marvell. Add the missing void to function signatures in much of the arm code.
* MFC r306551,r307557:mmel2016-11-062-5/+14
| | | | | | | | | r306551: TEGRA: Fix bindings for cpufreq and coretemp drivers, it was broken in r306477. Correct a description for coretemp driver. r307557: TEGRA: Attach cpufreq and coretemp drivers only on tegra124 SoC. It's needed by GENERIC kernel.
* MFC r306897,r306898:mmel2016-11-051-11/+8
| | | | | | | r306897: Fix MSI allocation for NVidia Tegra r306898: Fix release MSI method for NVidia Tegra PCI controller
* MFC r307556,r307637:mmel2016-11-052-8/+7
| | | | | | | | | r307556: TEGRA: Really implement early printf. The original version was cut&pasted from another SoC. r307637: TEGRA: Raise minimum voltage for CPU, original 0.9 V was too optimistic. While I'm in, remove duplicated line from CPU frequency table.
* MFC r306447,r306477:mmel2016-11-0519-120/+63
| | | | | | | | | | r306447: TEGRA: Rename (cut & pasted) genahci to tegra_ahci. Make device class definition static. r306477: TEGRA: Prepare Tegra subtree for inclusion into ARM generic kernel. - use DEFINE_CLASS_0() for driver classes - unify driver names - cleanup driver definitions and bindings
* MFC r302961,r304460,r304461:mmel2016-11-051-472/+410
| | | | | | | | | | r302961: TEGRA: Subclass Tegra PCIE driver from ofw_pci base driver. Remove now redundant code. r304460: TEGRA: Implement MSI/MSIX interrupts for pcie controller. r304461: TEGRA: Remove forgotten debug printf.
* MFC r304459,r305527:mmel2016-11-051-6/+6
| | | | | | | | | | | | | | | | | | r304459: INTRNG: Rework handling with resources. Partially revert r301453. - Read interrupt properties at bus enumeration time and store it into global mapping table. - At bus_activate_resource() time, given mapping entry is resolved and connected to real interrupt source. A copy of mapping entry is attached to given resource. - At bus_setup_intr() time, mapping entry stored in resource is used for delivery of requested interrupt configuration. - For MSI/MSIX interrupts, mapping entry is created within pci_alloc_msi()/pci_alloc_msix() call. - For legacy PCI interrupts, mapping entry must be created within pcib_route_interrupt() by pcib driver itself. r305527: Fix MIPS INTRNG (both FDT and non-FDT) behaviour broken by r304459
* MFC r307558:mmel2016-11-051-111/+17
| | | | | REGULATOR: Move functions for handling with regulator ranges to common file. They can be useful for other PMICs.
* MFC r306666:mmel2016-11-051-1/+4
| | | | TEGRA: Fix PCIe link timeout.
* MFC r302523,r302528:mmel2016-11-0513-58/+58
| | | | | | | | | | | r302523: Add clk_get_by_ofw_node_index, which is like clk_get_by_ofw_index but operates on a specific OF node instead of the pass in device's OF node. r302528: EXTRES: Add OF node as argument to all <foo>_get_by_ofw_<bar>() functions. In some cases, the driver must handle given properties located in specific OF subnode. Instead of creating duplicate set of function, add 'node' as argument to existing functions, defaulting it to device OF node.
* MFC r306756:mmel2016-10-151-1/+2
| | | | | ARM: SEV/WFE instructions are implemented starting from ARMv6K, use it directly.
* tegra124: use roundup/rounddown macros from <sys/param.h>.pfg2016-06-031-2/+2
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* Return the struct intr_pic pointer from intr_pic_register. This will beandrew2016-05-182-3/+6
| | | | | | | | needed in later changes where we may not be able to lock the pic list lock to perform a lookup, e.g. from within interrupt context. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
* TEGRA: Also attach gpioc to tegra_gpio driver. Forgotten in r299854.mmel2016-05-151-1/+4
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* TEGRA: Don't use common name 'iicb' for tegra specific IIC driver.mmel2016-05-151-2/+6
| | | | Using commn name for different drivers breaks generic kernel creation.
* TEGRA: Don't use common name 'gpio' for tegra specific GPIO driver.mmel2016-05-151-1/+6
| | | | Using commn name for different drivers breaks generic kernel creation.
* Use OF_prop_free instead of direct call to free(9)gonzo2016-05-145-9/+9
| | | | Reviewed by: mmel@
* Pass device tree node as a part of gpio_pin_get_by_ofw_XXX APIgonzo2016-05-101-3/+3
| | | | | | | | | | | Current API assumes that "gpios" property belongs to the device's node but for some binding it's not true: gpiokeys has set of child nodes with this property. Patch adds new argument instead of replacing device_t because device_t will be used to track ownership for allocated pins Reviewed by: mmel Differential Revision: https://reviews.freebsd.org/D6277
* INTRNG - redefine struct intr_map_data to avoid headers pollution. Eachskra2016-05-051-16/+26
| | | | | | | | | | | | | | | | struct associated with some type defined in enum intr_map_data_type must have struct intr_map_data on the top of its own definition now. When such structs are used, correct type and size must be filled in. There are three such structs defined in sys/intr.h now. Their definitions should be moved to corresponding headers by follow-up commits. While this change was propagated to all INTRNG like PICs, pic_map_intr() method implementations were corrected on some places. For this specific method, it's ensured by a caller that the 'data' argument passed to this method is never NULL. Also, the return error values were standardized there.
* Add a MULTIDELAY option to allow the ARM kernel to have multiple DELAYandrew2016-04-301-1/+1
| | | | | | | | | | implementations. Early in the boot the kernel will use an approximate, however after the timer has been probed it will switch to a more accurate implementation. Reviewed by: manu Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D5762
* TEGRA: Add interrupt support for Tegra GPIO controller.mmel2016-04-281-62/+465
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* sys/arm: make use of the howmany() macro when available.pfg2016-04-261-1/+1
| | | | | We have a howmany() macro in the <sys/param.h> header that is convenient to re-use as it makes things easier to read.
* Move arm's devmap to some generic place, so it can be usedbr2016-04-262-5/+5
| | | | | | | | | by other architectures. Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D6091 Sponsored by: DARPA, AFRL Sponsored by: HEIF5
* Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machineandrew2016-04-151-1/+1
| | | | | | | independent code that needs to know about INTRNG such as PCI drivers. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
* ehci_interrupt is MPSAFE code. Most drivers in tree calls bus_setup_intrmmel2016-04-051-2/+2
| | | | | | | with MPSAFE, some are not. Fix those. Submitted by: Howard Su <howard0su@gmail.com> Differential Revision: https://reviews.freebsd.org/D5755
* TEGRA: Fix CPU frequency switching.mmel2016-04-053-16/+25
| | | | | | | The PLL_X, base CPU frequency source, doesn't have a bypass switch and thus we must use another frequency source for CPU while changing its frequency. PLL_P is ideal for this, it runs at 480MHz and CPU can be clocked at this frequency at any CPU voltage.
* Remove FDT specific parts from INTRNG. Change its interface to make itskra2016-04-041-20/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | universal. (1) New struct intr_map_data is defined as a container for arbitrary description of an interrupt used by a device. Typically, an interrupt number and configuration relevant to an interrupt controller is encoded in such description. However, any additional information may be encoded too like a set of cpus on which an interrupt should be enabled or vendor specific data needed for setup of an interrupt in controller. The struct intr_map_data itself is meant to be opaque for INTRNG. (2) An intr_map_irq() function is created which takes an interrupt controller identification and struct intr_map_data as arguments and returns global interrupt number which identifies an interrupt. (3) A set of functions to be used by bus drivers is created as well as a corresponding set of methods for interrupt controller drivers. These sets take both struct resource and struct intr_map_data as one of the arguments. There is a goal to keep struct intr_map_data in struct resource, however, this way a final solution is not limited to that. (4) Other small changes are done to reflect new situation. This is only first step aiming to create stable interface for interrupt controller drivers. Thus, some temporary solution is taken. Interrupt descriptions for devices are stored in INTRNG and two specific mapping function are created to be temporary used by bus drivers. That's why the struct intr_map_data is not opaque for INTRNG now. This temporary solution will be replaced by final one in next step. Differential Revision: https://reviews.freebsd.org/D5730
* TEGRA: Fixes for UART driver:mmel2016-03-261-4/+3
| | | | | | | - add mising 'or' in tegra_uart_attach() Pointed by: kan - fix indentation of tegra_softc - remove forgoten debug printf
* TEGRA: Fix tegra_pcie driver after rman_res_t size change.mmel2016-03-181-8/+7
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* Import basic support for Nvidia Jetson TK1 board and tegra124 SoC.mmel2016-03-1636-0/+16088
The following pheripherals are supported: UART, MMC, AHCI, EHCI, PCIe, I2C, PMIC, GPIO, CPU temperature and clock. Note: The PCIe driver is pure mash at this moment. It will be reworked immediately when both D5237 and D2579 enter the current tree.
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