MFC r302523,r302528:

  r302523:
    Add clk_get_by_ofw_node_index, which is like clk_get_by_ofw_index but
    operates on a specific OF node instead of the pass in device's OF node.
  r302528:
    EXTRES: Add OF node as argument to all <foo>_get_by_ofw_<bar>() functions.
    In some cases, the driver must handle given properties located in specific
    OF subnode. Instead of creating duplicate set of function, add 'node' as
    argument to existing functions, defaulting it to device OF node.

13 files changed, 58 insertions, 58 deletions

diff --git a/sys/arm/nvidia/tegra124/tegra124_cpufreq.c b/sys/arm/nvidia/tegra124/tegra124_cpufreq.c
index 0f14b58..88d40a8 100644
--- a/sys/arm/nvidia/tegra124/tegra124_cpufreq.c
+++ b/sys/arm/nvidia/tegra124/tegra124_cpufreq.c
@@ -432,36 +432,36 @@ get_fdt_resources(struct tegra124_cpufreq_softc *sc, phandle_t node)
 	device_t parent_dev;
 
 	parent_dev =  device_get_parent(sc->dev);
-	rv = regulator_get_by_ofw_property(parent_dev, "vdd-cpu-supply",
+	rv = regulator_get_by_ofw_property(parent_dev, 0, "vdd-cpu-supply",
 	    &sc->supply_vdd_cpu);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'vdd-cpu' regulator\n");
 		return (rv);
 	}
 
-	rv = clk_get_by_ofw_name(parent_dev, "cpu_g", &sc->clk_cpu_g);
+	rv = clk_get_by_ofw_name(parent_dev, 0, "cpu_g", &sc->clk_cpu_g);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'cpu_g' clock: %d\n", rv);
 		return (ENXIO);
 	}
 
-	rv = clk_get_by_ofw_name(parent_dev, "cpu_lp", &sc->clk_cpu_lp);
+	rv = clk_get_by_ofw_name(parent_dev, 0, "cpu_lp", &sc->clk_cpu_lp);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'cpu_lp' clock\n");
 		return (ENXIO);
 	}
 
-	rv = clk_get_by_ofw_name(parent_dev, "pll_x", &sc->clk_pll_x);
+	rv = clk_get_by_ofw_name(parent_dev, 0, "pll_x", &sc->clk_pll_x);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'pll_x' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(parent_dev, "pll_p", &sc->clk_pll_p);
+	rv = clk_get_by_ofw_name(parent_dev, 0, "pll_p", &sc->clk_pll_p);
 	if (rv != 0) {
 		device_printf(parent_dev, "Cannot get 'pll_p' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(parent_dev, "dfll", &sc->clk_dfll);
+	rv = clk_get_by_ofw_name(parent_dev, 0, "dfll", &sc->clk_dfll);
 	if (rv != 0) {
 		/* XXX DPLL is not implemented yet */
 /*
diff --git a/sys/arm/nvidia/tegra124/tegra124_pmc.c b/sys/arm/nvidia/tegra124/tegra124_pmc.c
index 7ff7307..04bebda 100644
--- a/sys/arm/nvidia/tegra124/tegra124_pmc.c
+++ b/sys/arm/nvidia/tegra124/tegra124_pmc.c
@@ -494,7 +494,7 @@ tegra124_pmc_attach(device_t dev)
 		return (rv);
 	}
 
-	rv = clk_get_by_ofw_name(sc->dev, "pclk", &sc->clk);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "pclk", &sc->clk);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get \"pclk\" clock\n");
 		return (ENXIO);
diff --git a/sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c b/sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c
index 9d8b846..2d79e52 100644
--- a/sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c
+++ b/sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c
@@ -556,7 +556,7 @@ xusbpadctl_attach(device_t dev)
 	}
 
 	node = ofw_bus_get_node(dev);
-	rv = hwreset_get_by_ofw_name(dev, "padctl", &sc->rst);
+	rv = hwreset_get_by_ofw_name(dev, 0, "padctl", &sc->rst);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get 'padctl' reset: %d\n", rv);
 		return (rv);
diff --git a/sys/arm/nvidia/tegra_ahci.c b/sys/arm/nvidia/tegra_ahci.c
index 4afba17..fcd6e30 100644
--- a/sys/arm/nvidia/tegra_ahci.c
+++ b/sys/arm/nvidia/tegra_ahci.c
@@ -206,77 +206,77 @@ get_fdt_resources(struct tegra_ahci_sc *sc, phandle_t node)
 	int rv;
 
 
-	rv = regulator_get_by_ofw_property(sc->dev, "hvdd-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "hvdd-supply",
 	    &sc->supply_hvdd );
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'hvdd' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "vddio-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "vddio-supply",
 	    &sc->supply_vddio);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'vddio' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "avdd-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "avdd-supply",
 	    &sc->supply_avdd);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'avdd' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "target-5v-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "target-5v-supply",
 	    &sc->supply_target_5v);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'target-5v' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "target-12v-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "target-12v-supply",
 	    &sc->supply_target_12v);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'target-12v' regulator\n");
 		return (ENXIO);
 	}
 
-	rv = hwreset_get_by_ofw_name(sc->dev, "sata", &sc->hwreset_sata );
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "sata", &sc->hwreset_sata );
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'sata' reset\n");
 		return (ENXIO);
 	}
-	rv = hwreset_get_by_ofw_name(sc->dev, "sata-oob",
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "sata-oob",
 	    &sc->hwreset_sata_oob);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'sata oob' reset\n");
 		return (ENXIO);
 	}
-	rv = hwreset_get_by_ofw_name(sc->dev, "sata-cold",
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "sata-cold",
 	    &sc->hwreset_sata_cold);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'sata cold' reset\n");
 		return (ENXIO);
 	}
 
-	rv = phy_get_by_ofw_name(sc->dev, "sata-phy", &sc->phy);
+	rv = phy_get_by_ofw_name(sc->dev, 0, "sata-phy", &sc->phy);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'sata' phy\n");
 		return (ENXIO);
 	}
 
-	rv = clk_get_by_ofw_name(sc->dev, "sata", &sc->clk_sata);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "sata", &sc->clk_sata);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'sata' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(sc->dev, "sata-oob", &sc->clk_sata_oob);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "sata-oob", &sc->clk_sata_oob);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'sata oob' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(sc->dev, "cml1", &sc->clk_cml);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "cml1", &sc->clk_cml);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'cml1' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(sc->dev, "pll_e", &sc->clk_pll_e);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "pll_e", &sc->clk_pll_e);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'pll_e' clock\n");
 		return (ENXIO);
diff --git a/sys/arm/nvidia/tegra_efuse.c b/sys/arm/nvidia/tegra_efuse.c
index ae3f9ef..848cf50 100644
--- a/sys/arm/nvidia/tegra_efuse.c
+++ b/sys/arm/nvidia/tegra_efuse.c
@@ -291,7 +291,7 @@ tegra_efuse_attach(device_t dev)
 	}
 
 	/* OFW resources. */
-	rv = clk_get_by_ofw_name(dev, "fuse", &sc->clk);
+	rv = clk_get_by_ofw_name(dev, 0, "fuse", &sc->clk);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get fuse clock: %d\n", rv);
 		goto fail;
@@ -301,7 +301,7 @@ tegra_efuse_attach(device_t dev)
 		device_printf(dev, "Cannot enable clock: %d\n", rv);
 		goto fail;
 	}
-	rv = hwreset_get_by_ofw_name(sc->dev, "fuse", &sc->reset);
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "fuse", &sc->reset);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get fuse reset\n");
 		goto fail;
diff --git a/sys/arm/nvidia/tegra_ehci.c b/sys/arm/nvidia/tegra_ehci.c
index 1834b33..2d44ffa 100644
--- a/sys/arm/nvidia/tegra_ehci.c
+++ b/sys/arm/nvidia/tegra_ehci.c
@@ -174,21 +174,21 @@ tegra_ehci_attach(device_t dev)
 		goto out;
 	}
 
-	rv = hwreset_get_by_ofw_name(dev, "usb", &sc->reset);
+	rv = hwreset_get_by_ofw_name(dev, 0, "usb", &sc->reset);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get reset\n");
 		rv = ENXIO;
 		goto out;
 	}
 
-	rv = phy_get_by_ofw_property(sc->dev, "nvidia,phy", &sc->phy);
+	rv = phy_get_by_ofw_property(sc->dev, 0, "nvidia,phy", &sc->phy);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'nvidia,phy' phy\n");
 		rv = ENXIO;
 		goto out;
 	}
 
-	rv = clk_get_by_ofw_index(sc->dev, 0, &sc->clk);
+	rv = clk_get_by_ofw_index(sc->dev, 0, 0, &sc->clk);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get clock\n");
 		goto out;
diff --git a/sys/arm/nvidia/tegra_i2c.c b/sys/arm/nvidia/tegra_i2c.c
index d50d34c..d8f390e 100644
--- a/sys/arm/nvidia/tegra_i2c.c
+++ b/sys/arm/nvidia/tegra_i2c.c
@@ -666,12 +666,12 @@ tegra_i2c_attach(device_t dev)
 	}
 
 	/* FDT resources. */
-	rv = clk_get_by_ofw_name(dev, "div-clk", &sc->clk);
+	rv = clk_get_by_ofw_name(dev, 0, "div-clk", &sc->clk);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get i2c clock: %d\n", rv);
 		goto fail;
 	}
-	rv = hwreset_get_by_ofw_name(sc->dev, "i2c", &sc->reset);
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "i2c", &sc->reset);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get i2c reset\n");
 		return (ENXIO);
diff --git a/sys/arm/nvidia/tegra_pcie.c b/sys/arm/nvidia/tegra_pcie.c
index ac38eb2..4e8013a 100644
--- a/sys/arm/nvidia/tegra_pcie.c
+++ b/sys/arm/nvidia/tegra_pcie.c
@@ -1080,49 +1080,49 @@ tegra_pcib_parse_fdt_resources(struct tegra_pcib_softc *sc, phandle_t node)
 	int rv;
 
 	/* Power supplies. */
-	rv = regulator_get_by_ofw_property(sc->dev, "avddio-pex-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "avddio-pex-supply",
 	    &sc->supply_avddio_pex);
 	if (rv != 0) {
 		device_printf(sc->dev,
 		    "Cannot get 'avddio-pex' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "dvddio-pex-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "dvddio-pex-supply",
 	     &sc->supply_dvddio_pex);
 	if (rv != 0) {
 		device_printf(sc->dev,
 		    "Cannot get 'dvddio-pex' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "avdd-pex-pll-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "avdd-pex-pll-supply",
 	     &sc->supply_avdd_pex_pll);
 	if (rv != 0) {
 		device_printf(sc->dev,
 		    "Cannot get 'avdd-pex-pll' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "hvdd-pex-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "hvdd-pex-supply",
 	     &sc->supply_hvdd_pex);
 	if (rv != 0) {
 		device_printf(sc->dev,
 		    "Cannot get 'hvdd-pex' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "hvdd-pex-pll-e-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "hvdd-pex-pll-e-supply",
 	     &sc->supply_hvdd_pex_pll_e);
 	if (rv != 0) {
 		device_printf(sc->dev,
 		    "Cannot get 'hvdd-pex-pll-e' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "vddio-pex-ctl-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "vddio-pex-ctl-supply",
 	    &sc->supply_vddio_pex_ctl);
 	if (rv != 0) {
 		device_printf(sc->dev,
 		    "Cannot get 'vddio-pex-ctl' regulator\n");
 		return (ENXIO);
 	}
-	rv = regulator_get_by_ofw_property(sc->dev, "avdd-pll-erefe-supply",
+	rv = regulator_get_by_ofw_property(sc->dev, 0, "avdd-pll-erefe-supply",
 	     &sc->supply_avdd_pll_erefe);
 	if (rv != 0) {
 		device_printf(sc->dev,
@@ -1131,46 +1131,46 @@ tegra_pcib_parse_fdt_resources(struct tegra_pcib_softc *sc, phandle_t node)
 	}
 
 	/* Resets. */
-	rv = hwreset_get_by_ofw_name(sc->dev, "pex", &sc->hwreset_pex);
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "pex", &sc->hwreset_pex);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'pex' reset\n");
 		return (ENXIO);
 	}
-	rv = hwreset_get_by_ofw_name(sc->dev, "afi", &sc->hwreset_afi);
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "afi", &sc->hwreset_afi);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'afi' reset\n");
 		return (ENXIO);
 	}
-	rv = hwreset_get_by_ofw_name(sc->dev, "pcie_x", &sc->hwreset_pcie_x);
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "pcie_x", &sc->hwreset_pcie_x);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'pcie_x' reset\n");
 		return (ENXIO);
 	}
 
 	/* Clocks. */
-	rv = clk_get_by_ofw_name(sc->dev, "pex", &sc->clk_pex);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "pex", &sc->clk_pex);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'pex' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(sc->dev, "afi", &sc->clk_afi);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "afi", &sc->clk_afi);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'afi' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(sc->dev, "pll_e", &sc->clk_pll_e);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "pll_e", &sc->clk_pll_e);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'pll_e' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(sc->dev, "cml", &sc->clk_cml);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "cml", &sc->clk_cml);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'cml' clock\n");
 		return (ENXIO);
 	}
 
 	/* Phy. */
-	rv = phy_get_by_ofw_name(sc->dev, "pcie", &sc->phy);
+	rv = phy_get_by_ofw_name(sc->dev, 0, "pcie", &sc->phy);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'pcie' phy\n");
 		return (ENXIO);
diff --git a/sys/arm/nvidia/tegra_rtc.c b/sys/arm/nvidia/tegra_rtc.c
index c15ded3..eceab5d 100644
--- a/sys/arm/nvidia/tegra_rtc.c
+++ b/sys/arm/nvidia/tegra_rtc.c
@@ -219,7 +219,7 @@ tegra_rtc_attach(device_t dev)
 	}
 
 	/* OFW resources. */
-	rv = clk_get_by_ofw_index(dev, 0, &sc->clk);
+	rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get i2c clock: %d\n", rv);
 		goto fail;
diff --git a/sys/arm/nvidia/tegra_sdhci.c b/sys/arm/nvidia/tegra_sdhci.c
index d01f1ad..abd8d06 100644
--- a/sys/arm/nvidia/tegra_sdhci.c
+++ b/sys/arm/nvidia/tegra_sdhci.c
@@ -289,7 +289,7 @@ tegra_sdhci_attach(device_t dev)
 		goto fail;
 	}
 
-	rv = hwreset_get_by_ofw_name(sc->dev, "sdhci", &sc->reset);
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "sdhci", &sc->reset);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'sdhci' reset\n");
 		goto fail;
@@ -304,14 +304,14 @@ tegra_sdhci_attach(device_t dev)
 	gpio_pin_get_by_ofw_property(sc->dev, node, "power-gpios", &sc->gpio_power);
 	gpio_pin_get_by_ofw_property(sc->dev, node, "wp-gpios", &sc->gpio_wp);
 
-	rv = clk_get_by_ofw_index(dev, 0, &sc->clk);
+	rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
 	if (rv != 0) {
 
 		device_printf(dev, "Cannot get clock\n");
 		goto fail;
 	}
 
-	rv = clk_get_by_ofw_index(dev, 0, &sc->clk);
+	rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get clock\n");
 		goto fail;
diff --git a/sys/arm/nvidia/tegra_soctherm.c b/sys/arm/nvidia/tegra_soctherm.c
index 3102173..6851cc2 100644
--- a/sys/arm/nvidia/tegra_soctherm.c
+++ b/sys/arm/nvidia/tegra_soctherm.c
@@ -579,17 +579,17 @@ soctherm_attach(device_t dev)
 */
 
 	/* OWF resources */
-	rv = hwreset_get_by_ofw_name(dev, "soctherm", &sc->reset);
+	rv = hwreset_get_by_ofw_name(dev, 0, "soctherm", &sc->reset);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get fuse reset\n");
 		goto fail;
 	}
-	rv = clk_get_by_ofw_name(dev, "tsensor", &sc->tsensor_clk);
+	rv = clk_get_by_ofw_name(dev, 0, "tsensor", &sc->tsensor_clk);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get 'tsensor' clock: %d\n", rv);
 		goto fail;
 	}
-	rv = clk_get_by_ofw_name(dev, "soctherm", &sc->soctherm_clk);
+	rv = clk_get_by_ofw_name(dev, 0, "soctherm", &sc->soctherm_clk);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get 'soctherm' clock: %d\n", rv);
 		goto fail;
diff --git a/sys/arm/nvidia/tegra_uart.c b/sys/arm/nvidia/tegra_uart.c
index 86972f0..c70303f 100644
--- a/sys/arm/nvidia/tegra_uart.c
+++ b/sys/arm/nvidia/tegra_uart.c
@@ -189,7 +189,7 @@ tegra_uart_probe(device_t dev)
 		return (ENXIO);
 	sc->ns8250_base.base.sc_class = (struct uart_class *)cd->ocd_data;
 
-	rv = hwreset_get_by_ofw_name(dev, "serial", &sc->reset);
+	rv = hwreset_get_by_ofw_name(dev, 0, "serial", &sc->reset);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get 'serial' reset\n");
 		return (ENXIO);
@@ -202,7 +202,7 @@ tegra_uart_probe(device_t dev)
 
 	node = ofw_bus_get_node(dev);
 	shift = uart_fdt_get_shift1(node);
-	rv = clk_get_by_ofw_index(dev, 0, &sc->clk);
+	rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get UART clock: %d\n", rv);
 		return (ENXIO);
diff --git a/sys/arm/nvidia/tegra_usbphy.c b/sys/arm/nvidia/tegra_usbphy.c
index 5446068..68104b8 100644
--- a/sys/arm/nvidia/tegra_usbphy.c
+++ b/sys/arm/nvidia/tegra_usbphy.c
@@ -726,28 +726,28 @@ usbphy_attach(device_t dev)
 
 	node = ofw_bus_get_node(dev);
 
-	rv = hwreset_get_by_ofw_name(sc->dev, "usb", &sc->reset_usb);
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "usb", &sc->reset_usb);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get 'usb' reset\n");
 		return (ENXIO);
 	}
-	rv = hwreset_get_by_ofw_name(sc->dev, "utmi-pads", &sc->reset_pads);
+	rv = hwreset_get_by_ofw_name(sc->dev, 0, "utmi-pads", &sc->reset_pads);
 	if (rv != 0) {
 		device_printf(dev, "Cannot get 'utmi-pads' reset\n");
 		return (ENXIO);
 	}
 
-	rv = clk_get_by_ofw_name(sc->dev, "reg", &sc->clk_reg);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "reg", &sc->clk_reg);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'reg' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(sc->dev, "pll_u", &sc->clk_pllu);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "pll_u", &sc->clk_pllu);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'pll_u' clock\n");
 		return (ENXIO);
 	}
-	rv = clk_get_by_ofw_name(sc->dev, "utmi-pads", &sc->clk_pads);
+	rv = clk_get_by_ofw_name(sc->dev, 0, "utmi-pads", &sc->clk_pads);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot get 'utmi-pads' clock\n");
 		return (ENXIO);
@@ -788,7 +788,7 @@ usbphy_attach(device_t dev)
 		return rv;
 
 	if (OF_hasprop(node, "vbus-supply")) {
-		rv = regulator_get_by_ofw_property(sc->dev, "vbus-supply",
+		rv = regulator_get_by_ofw_property(sc->dev, 0, "vbus-supply",
 		    &sc->supply_vbus);
 		if (rv != 0) {
 			device_printf(sc->dev,