summaryrefslogtreecommitdiffstats
path: root/sys/arm/mv/common.c
Commit message (Collapse)AuthorAgeFilesLines
* decode_win_sdram_fixup() function should be declared, defined and usedgber2013-05-071-0/+4
| | | | | | only by Armada XP Obtained from: Semihalf
* Disable decoding windows with no FDT entry.gber2013-05-061-0/+58
| | | | | | | | | | - On ARMADAXP B0 (GP development board) we are not able to use PCI due to whole 32-bit address space used by 4GB of RAM memory. - Change is required to destroy unnecessary window to free address space for PCI and other devices - Fix offset value for SDRAM decoding windows Obtained from: Semihalf
* Move initialization of CESA decoding windows from common sectiongber2013-05-061-129/+31
| | | | | | | | | | | | to driver specific files. - window initialization is done during device attach - CESA TDMA decoding windows values are set based on DTS, not copied from CPU registers - remove unnecessary virtual mapping - update dts file Obtained from: Semihalf
* Add support for Armada XP A0.gber2012-09-141-6/+69
| | | | | | | | | | - Add functions to calculate clocks instead using hardcoded values - Update reset and timers functions - Update number of interrupts - Change name of platform from db88f78100 to db78460 - Correct DRAM size and PCI IRQ routing in dts file. Obtained from: Semihalf
* - MV_DEV_88F6282 has 256KB 4-way L2 cache.hrs2012-08-181-6/+14
| | | | | | - Sort IDs in win_cpu_can_remap() and remove MV_DEV_MV78100 because it is included in MV_DEV_DISCOVERY. - Add MV_DEV_MV78XXX to xor_max_eng().
* Merging of projects/armv6, part 7gonzo2012-08-151-54/+260
| | | | | | Add Marvell ARMADA XP support Obtained from: Marvell, Semihalf
* Add support for Marvell 88F6282.hrs2012-07-281-2/+13
| | | | Sponsored by: Plat'Home, Co.,Ltd.
* Fix error check.raj2012-03-151-1/+1
| | | | | Submitted by: Lukasz Plachno Obtained from: Semihalf
* Fix OF_finddevice error return value in case of FDT.jchandra2011-12-021-4/+4
| | | | | | | | | | | | | | | | | | | According to the open firmware standard, finddevice call has to return a phandle with value of -1 in case of error. This commit is to: - Fix the FDT implementation of this interface (ofw_fdt_finddevice) to return (phandle_t)-1 in case of error, instead of 0 as it does now. - Fix up the callers of OF_finddevice() to compare the return value with -1 instead of 0 to check for errors. - Since phandle_t is unsigned, the return value of OF_finddevice should be checked with '== -1' rather than '<= 0' or '> 0', fix up these cases as well. Reported by: nwhitehorn Reviewed by: raj Approved by: raj, nwhitehorn
* Fix build when DEBUG is defined in the kernel configuration file (e.g.marcel2011-10-041-3/+0
| | | | LINT).
* Typokevlo2011-06-291-1/+1
| | | | | Submitted by: Damjan Marion <damjan dot marion at gmail dot com> MFC after: 3 days
* Move MRVL FDT fixups and PIC decode routine to a platform specific area.raj2010-07-191-0/+42
| | | | | This allows for better encapsulation (and eliminates generic fdt_arm.c, at least for now).
* Convert Marvell ARM platforms to FDT convention.raj2010-06-131-255/+502
| | | | | | | | | | | | | | | | | | | | | | | | | The following systems are involved: - DB-88F5182 - DB-88F5281 - DB-88F6281 - DB-78100 - SheevaPlug This overhaul covers the following major changes: - All integrated peripherals drivers for Marvell ARM SoC, which are currently in the FreeBSD source tree are reworked and adjusted so they derive config data out of the device tree blob (instead of hard coded / tabelarized values). - Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say good by to obio / mbus drivers and numerous hard-coded config data. Note that world needs to be built WITH_FDT for the affected platforms. Reviewed by: imp Sponsored by: The FreeBSD Foundation.
* Provide correct TCLK value for Kirkwood A1 silicon revision.raj2010-03-051-0/+2
| | | | | | | While there improve SOC ID output accordingly. Obtained from: Semihalf MFC after: 1 week
* Properly handle initial state of power mgmt.raj2009-08-251-0/+119
| | | | | | | | | | Modules on Marvell SOC can be selectively PM-disabled, and we must not access disabled devices' registers (attempt to initialize them) unconditionally, as this leads to the system hang. This patch introduces graceful handling of the PM state during devices init. Submitted by: Michal Hajduk Obtained from: Semihalf
* Move the memory layout definitions and logic from mvreg.h to mvwin.hmarcel2009-06-121-0/+1
| | | | | | | | so that it isn't exposured unless needed. In particular this means that it's easier to tune the memory layout based on board details. While here, remove inclusion of <machine/intr.h> from mvreg.h. This also contains exposure to SoC specifics in MI drivers, because NIRQ depends on the SoC.
* Adjust Marvell Discovery (MV78xxx) support to recognize newest chip revisions,raj2009-04-161-9/+19
| | | | | | handle Z0 revision (early silicon) explicitly due to its quirks. Obtained from: Marvell, Semihalf
* Improve and extend Marvell SOCs platform code.raj2009-01-081-39/+511
| | | | | | | | | | | | | | | - Allow for setting per platform MPP/GPIO configuration in the kernel, so that we can override all settings firmware might set. - Set decode windows for the remaining on-chip peripherals: CESA, SATA and XOR. - Improve handling of USB controllers so that all port are available on the given SOC/platform (e.g. up to three on DB-78xxx), this includes rework of USB decode windows set-up. - Other minor fixes and cosmetics. Obtained from: Semihalf
* Adjust Marvell SOC support for A0 chip revision.raj2009-01-081-11/+4
| | | | | | | | | | - Clean up TCLK handling so that it's dynamically recognized depending on registers settings or chip version/revision. Update registers definitions. - Teach SOC ident routine about A0 (initial silicon version for general audience) Obtained from: Marvell, Semihalf
* Improve style(9) and other cosmetics in Marvell SOCs code.raj2008-11-191-11/+12
|
* PCI/PCI-Express support for Marvell systems.raj2008-11-191-30/+56
| | | | Obtained from: Marvell, Semihalf
* Introduce basic support for Marvell families of system-on-chip ARM devices:raj2008-10-131-0/+965
* Orion - 88F5181 - 88F5182 - 88F5281 * Kirkwood - 88F6281 * Discovery - MV78100 The above families of SOCs are built around CPU cores compliant with ARMv5TE instruction set architecture definition. They share a number of integrated peripherals. This commit brings support for the following basic elements: * GPIO * Interrupt controller * L1, L2 cache * Timers, watchdog, RTC * TWSI (I2C) * UART Other peripherals drivers will be introduced separately. Reviewed by: imp, marcel, stass (Thanks guys!) Obtained from: Marvell, Semihalf
OpenPOWER on IntegriCloud