| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Rename new to newval in inline asm code, to avoid clashes with C++ new. | ian | 2014-09-09 | 1 | -5/+5 |
| * | Do not generate unwind info in asm functions if _STANDALONE is defined. | ian | 2014-09-01 | 1 | -1/+1 |
| * | GIC (Cortex A's interrupt controller) supports up to 1020 IRQs. | br | 2014-08-31 | 1 | -1/+1 |
| * | The Marvell PJ4B cpu family is armv7, not armv6. | ian | 2014-08-31 | 1 | -2/+2 |
| * | Expand the elf brandelf infrastructure to give access to the whole ELF | imp | 2014-08-18 | 1 | -0/+6 |
| * | When the initarm_* routines were renamed to platform_* and moved to their | ian | 2014-08-17 | 1 | -0/+28 |
| * | From https://sourceware.org/ml/newlib/2014/msg00113.html | imp | 2014-08-14 | 2 | -2/+188 |
| * | Set the pl310 L2 cache driver to attach during the middle of BUS_PASS_CPU. | ian | 2014-08-05 | 1 | -0/+3 |
| * | Merge all MD sf_buf allocators into one MI, residing in kern/subr_sfbuf.c | glebius | 2014-08-05 | 2 | -22/+10 |
| * | When arm 64-bit atomic ops are available, define ARM_HAVE_ATOMIC64. Use | ian | 2014-08-02 | 1 | -0/+4 |
| * | Use atomic_load/store_64() in the arm implementation of counter(9), and | ian | 2014-08-01 | 1 | -6/+7 |
| * | Add 64-bit atomic ops for armv4, only for kernel code, mostly so that we | ian | 2014-08-01 | 1 | -0/+69 |
| * | Add 64-bit atomic ops for armv6. The only safe way to access a 64-bit | ian | 2014-08-01 | 1 | -0/+248 |
| * | Fix unwind-info errors in our hand-written arm assembler code. | ian | 2014-08-01 | 1 | -1/+18 |
| * | Add dl_unwind_find_exidx() for ARM EABI, required for C++ exception | ian | 2014-07-19 | 1 | -0/+3 |
| * | Different versions of the ARM processor use different registers. | tuexen | 2014-06-17 | 1 | -0/+9 |
| * | Delete obsolete and unused PJ4B CPU functions | zbb | 2014-05-25 | 1 | -9/+0 |
| * | Eliminate one of the causes of spurious interrupts on armv6. The arm weak | ian | 2014-05-24 | 1 | -0/+2 |
| * | Remove NetBSD implementation details not relevant to FreeBSD. | imp | 2014-05-23 | 1 | -8/+0 |
| * | Add FDT_PLATFORM_DEF2 for when there are multiple platforms needing to use | andrew | 2014-05-17 | 1 | -15/+18 |
| * | Fix a comment s/initarm_/platform_/ | andrew | 2014-05-17 | 1 | -1/+1 |
| * | Add the start of the ARM platform code. This is based on the PowerPC | andrew | 2014-05-17 | 3 | -34/+142 |
| * | Give suitably-endowed ARMs a register similar to the x86 TSC register. | markm | 2014-05-14 | 1 | -1/+16 |
| * | Add cpu_l2cache_drain_writebuf(), use it to implement generic_bs_barrier(). | ian | 2014-05-11 | 1 | -0/+2 |
| * | Make the hardware memory and instruction barrier functions work on armv4 | ian | 2014-05-11 | 1 | -3/+3 |
| * | Add a public routine to set the L2 cache ram latencies. This can be | ian | 2014-05-06 | 1 | -0/+13 |
| * | Add defines for the bits in the PL310 debug control register. | ian | 2014-05-06 | 1 | -0/+2 |
| * | Make this declaration into a proper function prototype. | ian | 2014-04-29 | 1 | -1/+1 |
| * | Move duplicated code to print l2 cache config into the common code. | ian | 2014-04-27 | 1 | -0/+2 |
| * | There is no difference between IPI_STOP and IPI_STOP_HARD on ARM, so | ian | 2014-04-27 | 1 | -1/+1 |
| * | Remove cpu_idcache_wbinv_all() from kdb_cpu_trap(), it's no longer needed. | ian | 2014-04-27 | 1 | -2/+0 |
| * | Provide a proper armv7 implementation of icache_sync_all rather than | ian | 2014-04-27 | 1 | -0/+1 |
| * | Call cpu_icache_sync_range() rather than sync_all since we know the range | ian | 2014-04-26 | 1 | -1/+1 |
| * | Tell VM we now have ARM platforms with physically discontiguous memory. | ian | 2014-04-06 | 1 | -2/+2 |
| * | We don't support any ARM systems with an ISA bus and don't need a freelist | ian | 2014-04-04 | 1 | -7/+2 |
| * | Rename __wchar_t so it no longer conflicts with __wchar_t from clang 3.4 | tijl | 2014-04-01 | 1 | -2/+2 |
| * | Add Cortex-A15 cpu id revisions. | br | 2014-04-01 | 1 | -1/+4 |
| * | VFP fixes/cleanups for ARM11: | andrew | 2014-03-29 | 1 | -0/+3 |
| * | Add more flags for the fpexc register from the ARM1176JZF-S Manual | andrew | 2014-03-29 | 1 | -0/+5 |
| * | Move an else case that was missed in r263676 | andrew | 2014-03-24 | 1 | -25/+25 |
| * | Reorder the pmap macros so "ARM_MMU_V6 + ARM_MMU_V7" is first. As they are | andrew | 2014-03-23 | 1 | -41/+42 |
| * | Simplify how we build MACHINE_ARCH. There are 3 options that may be set | andrew | 2014-03-22 | 1 | -9/+15 |
| * | Remove #include <machine/asmacros.h> from files that don't need it. | ian | 2014-03-11 | 1 | -1/+1 |
| * | Remove the unreferenced DATA() macro. That leaves only GET_CURTHREAD_PTR() | ian | 2014-03-11 | 1 | -26/+8 |
| * | Arrange for arm fork_trampoline() to return to userland via the standard | ian | 2014-03-10 | 1 | -208/+0 |
| * | Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code | ian | 2014-03-10 | 1 | -7/+4 |
| * | Remove all traces of support for ARM chips prior to the arm9 series. We | ian | 2014-03-09 | 6 | -209/+13 |
| * | Always call vfp_discard() on thread death, not just when the VFP is | ian | 2014-03-09 | 1 | -1/+1 |
| * | Remove all dregs of a per-thread undefined-exception-mode stack. This is | ian | 2014-03-09 | 2 | -5/+2 |
| * | Rework the VFP code that handles demand-based save and restore of state. | ian | 2014-03-09 | 2 | -2/+5 |
