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path: root/sys/arm/include/pl310.h
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* Disable PL310 outer cache sync for IO coherent platformszbb2017-09-011-0/+1
* Make pl310_print_config static, it's not called out of pl310.candrew2015-11-171-1/+0
* ARM: Remove trailing whitespace from sys/arm/includemmel2015-11-101-1/+1
* Correct PL310_POWER_CTRL offsetemaste2015-05-071-1/+1
* Set the pl310 L2 cache driver to attach during the middle of BUS_PASS_CPU.ian2014-08-051-0/+3
* Add a public routine to set the L2 cache ram latencies. This can beian2014-05-061-0/+13
* Add defines for the bits in the PL310 debug control register.ian2014-05-061-0/+2
* Move duplicated code to print l2 cache config into the common code.ian2014-04-271-0/+2
* Only work around errata when we are on a part where the erratum applies.andrew2013-01-061-0/+1
* Document the known values of the RTL release field in the cache is registerandrew2013-01-011-0/+8
* PL310 driver update:gonzo2012-12-311-1/+122
* Merging projects/armv6, part 1gonzo2012-08-151-0/+38
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