| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | MFC r271595, r271601, r271607, r271630: | ian | 2014-10-26 | 1 | -0/+2 |
| * | MFC 266621: Eliminte spurious interrupts caused by ARM weak memory ordering. | ian | 2014-05-27 | 1 | -0/+2 |
| * | MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323, | ian | 2014-05-14 | 1 | -2/+0 |
| * | MFC r260161, r260163, r260165, r260166, r260189 | ian | 2014-05-14 | 1 | -0/+3 |
| * | MFC r258359, r258742, r258845, r259936, r259640 | ian | 2014-05-14 | 1 | -0/+2 |
| * | Bump max number of IRQs for Cortex-Ax family to cover Exynos5 requirement. | ray | 2013-06-28 | 1 | -1/+1 |
| * | Eliminate the need for an intermediate array of indices into the arrays of | ian | 2013-01-19 | 1 | -0/+1 |
| * | Replace generic ARM11 option with more specific | gonzo | 2012-12-20 | 1 | -1/+1 |
| * | Add support for MSI in interrupt controlller. | gber | 2012-09-14 | 1 | -1/+6 |
| * | Add support for Armada XP A0. | gber | 2012-09-14 | 1 | -0/+2 |
| * | ARM11 might have more then 32 interrupts, e.g. BCM2835: 72 interrupts | gonzo | 2012-08-25 | 1 | -0/+2 |
| * | Merging projects/armv6, part 1 | gonzo | 2012-08-15 | 1 | -0/+5 |
| * | trim trailing whitespace | imp | 2012-06-13 | 1 | -2/+2 |
| * | Pass the previously returned IRQ back to arm_get_next_irq() so that | marcel | 2009-06-09 | 1 | -1/+1 |
| * | Merge WIP from p4: | sam | 2008-12-13 | 1 | -1/+3 |
| * | Introduce basic support for Marvell families of system-on-chip ARM devices: | raj | 2008-10-13 | 1 | -1/+3 |
| * | ARM interrupts improvements. | raj | 2008-09-11 | 1 | -1/+1 |
| * | Support for the XScale PXA255 SoC as found on the Gumstix Basix and Connex | benno | 2008-06-06 | 1 | -0/+3 |
| * | On the AT91, we need to write on the EOI register after we handle an | cognet | 2008-04-20 | 1 | -0/+1 |
| * | The iop34x has 128 interrupts. | cognet | 2007-06-16 | 1 | -1/+3 |
| * | o break newbus api: add a new argument of type driver_filter_t to | piso | 2007-02-23 | 1 | -2/+2 |
| * | - MFp4: modify slightly the arm intr API, there's arm CPUs with more than 32 | cognet | 2005-06-09 | 1 | -4/+4 |
| * | Define NIRQ to 64 for CPU_ARM9, because Cirrus Logic EP93XX cores provides | cognet | 2005-02-13 | 1 | -0/+4 |
| * | Start all license statements with /*- | imp | 2005-01-05 | 1 | -1/+1 |
| * | Add new functions to know which irqs are pending, and to mask and unmask | cognet | 2004-09-23 | 1 | -35/+4 |
| * | Import FreeBSD/arm kernel bits. | cognet | 2004-05-14 | 1 | -0/+83 |
