index
:
FreeBSD-src
RELENG_2_2
RELENG_2_3
RELENG_2_3_0
RELENG_2_3_1
RELENG_2_3_2
RELENG_2_3_3
RELENG_2_3_4
RELENG_2_4
RELENG_2_4_4
RELENG_2_4_OLD
devel
devel-11
releng/10.1
releng/10.3
releng/11.0
releng/11.1
stable/10
stable/11
Raptor Engineering's fork of pfsense FreeBSD src with pfSense changes
Raptor Engineering, LLC
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
sys
/
arm
/
include
/
cpu-v6.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
MFC r325438:
mmel
2018-02-07
1
-3
/
+3
*
MFC r306756:
mmel
2016-10-15
1
-0
/
+2
*
Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn't
ian
2016-05-25
1
-1
/
+0
*
Add four functions which check a virtual address for stage 1 privileged
skra
2016-04-22
1
-1
/
+49
*
Remove redundant __ARM_ARCH >= 6 check in armv6 specific files.
skra
2016-02-23
1
-3
/
+0
*
ARM: Use new ARMv6 naming conventions for cache and TLB functions
mmel
2016-02-05
1
-2
/
+1
*
ARM: Introduce new cpu-v4.h header and move all ARMv4 specific code
mmel
2016-02-05
1
-53
/
+19
*
Introduce support for HW watchpoints and single stepping for ARMv6/v7
zbb
2016-01-25
1
-0
/
+12
*
Fix cp15 PAR definition and function. While here, add cp15 ATS1CPW
skra
2015-11-10
1
-2
/
+3
*
Provide armv4/v5 implementations of several of the armv6 cache maintenance
ian
2015-10-24
1
-0
/
+48
*
Rename dcache_dma_preread() to dcache_inv_poc_dma() to make it clear that it
ian
2015-10-24
1
-6
/
+8
*
Use pmap_quick* functions in armv6 busdma, for bounce buffers and cache maint...
jah
2015-10-22
1
-0
/
+25
*
Add more cp15_ functions, and use them in cpufunc.c where possible.
andrew
2015-05-24
1
-1
/
+12
*
Add assertions that the addresses passed to tlb maintenance are page-aligned.
ian
2015-05-15
1
-47
/
+63
*
cpu-v6.h should only be used in the kernel, add an error to enforce this.
andrew
2015-05-11
1
-0
/
+7
*
Add new CP15 operations and DB_SHOW_COMMAND to print CP15 registers
zbb
2015-05-06
1
-0
/
+7
*
Add the generic timer registers to sysreg.h and cpu-v6.h, and use the
andrew
2015-04-02
1
-0
/
+47
*
Add minimum cache line sizes to struct cpuinfo, use them in the new cache
ian
2015-03-09
1
-7
/
+23
*
Add the User and PL1 read only and reqd write thread ID registers.
andrew
2015-01-20
1
-0
/
+7
*
Add accessors for the ARM CP15 performance monitor registers. Also ensure
ian
2015-01-08
1
-12
/
+41
*
Fix a "decl is not a prototype" error noticed by gcc (but not clang).
ian
2014-12-28
1
-1
/
+1
*
Add new TLB and cache maintainence functions for armv6 and armv7. These
ian
2014-12-28
1
-0
/
+238
*
Add new code to read and parse cpu identification data using the new CPUID
ian
2014-12-28
1
-0
/
+158