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path: root/sys/arm/include/cpu-v6.h
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* MFC r325438:mmel2018-02-071-3/+3
* MFC r306756:mmel2016-10-151-0/+2
* Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn'tian2016-05-251-1/+0
* Add four functions which check a virtual address for stage 1 privilegedskra2016-04-221-1/+49
* Remove redundant __ARM_ARCH >= 6 check in armv6 specific files.skra2016-02-231-3/+0
* ARM: Use new ARMv6 naming conventions for cache and TLB functionsmmel2016-02-051-2/+1
* ARM: Introduce new cpu-v4.h header and move all ARMv4 specific codemmel2016-02-051-53/+19
* Introduce support for HW watchpoints and single stepping for ARMv6/v7zbb2016-01-251-0/+12
* Fix cp15 PAR definition and function. While here, add cp15 ATS1CPWskra2015-11-101-2/+3
* Provide armv4/v5 implementations of several of the armv6 cache maintenanceian2015-10-241-0/+48
* Rename dcache_dma_preread() to dcache_inv_poc_dma() to make it clear that itian2015-10-241-6/+8
* Use pmap_quick* functions in armv6 busdma, for bounce buffers and cache maint...jah2015-10-221-0/+25
* Add more cp15_ functions, and use them in cpufunc.c where possible.andrew2015-05-241-1/+12
* Add assertions that the addresses passed to tlb maintenance are page-aligned.ian2015-05-151-47/+63
* cpu-v6.h should only be used in the kernel, add an error to enforce this.andrew2015-05-111-0/+7
* Add new CP15 operations and DB_SHOW_COMMAND to print CP15 registerszbb2015-05-061-0/+7
* Add the generic timer registers to sysreg.h and cpu-v6.h, and use theandrew2015-04-021-0/+47
* Add minimum cache line sizes to struct cpuinfo, use them in the new cacheian2015-03-091-7/+23
* Add the User and PL1 read only and reqd write thread ID registers.andrew2015-01-201-0/+7
* Add accessors for the ARM CP15 performance monitor registers. Also ensureian2015-01-081-12/+41
* Fix a "decl is not a prototype" error noticed by gcc (but not clang).ian2014-12-281-1/+1
* Add new TLB and cache maintainence functions for armv6 and armv7. Theseian2014-12-281-0/+238
* Add new code to read and parse cpu identification data using the new CPUIDian2014-12-281-0/+158
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