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path: root/sys/arm/include/armreg.h
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* MFC r306631,r306640,r306641,r306650,r306656:mmel2017-04-161-0/+3
* Start to clean MIDR values using the CPUID scheme. We don't need to knowandrew2016-06-071-18/+36
* Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn'tian2016-05-251-2/+0
* ARM: Add support for new KRAIT 300 CPU revision.mmel2015-11-281-1/+3
* ARM: Remove trailing whitespace from sys/arm/includemmel2015-11-101-1/+1
* Fix comment about unpriviledged instructions. Now, it matches withskra2015-11-041-1/+1
* Add support for branch instruction on armv7 with ptrace single stepzbb2015-11-021-0/+6
* The Broadcom BCM56060 chip has a Cortex-A9R4 core.marcel2015-08-131-0/+1
* Add new CP15 operations and DB_SHOW_COMMAND to print CP15 registerszbb2015-05-061-0/+3
* Resolve cache line size from CP15zbb2015-02-101-0/+3
* Correct cpu type, it was rather Cortex A12 R0.ganbold2015-01-141-1/+1
* Add CPU ID for ARM Cortex A17.ganbold2015-01-131-0/+1
* Add a new trap-v6.c which has support for all armv7 exceptions. Thisian2015-01-031-10/+34
* Unify interrupts bit definition and usage. While here remove PSR_C_bit.andrew2014-09-101-2/+0
* Add more register values to armreg.h and remove CPU_CONTROL_32BP_ENABLEandrew2014-09-101-8/+34
* Add Cortex-A15 cpu id revisions.br2014-04-011-1/+4
* Remove all traces of support for ARM chips prior to the arm9 series. Weian2014-03-091-50/+2
* Use the right symbols for determining arm architecture. Include theian2014-02-121-0/+2
* Add identification and necessary type checks for Krait CPU cores. Krait CPU i...ganbold2013-12-201-0/+1
* Fix undefined behavior: (1 << 31) is not defined as 1 is an int and thiseadler2013-11-301-1/+1
* Remove not working and deprecated PJ4Bv6 supportzbb2013-10-281-4/+0
* Add CPU ID for ARM Cortex A5.br2013-10-161-0/+1
* Add identification for Cortex-A7 (R0) cores.ganbold2013-08-011-0/+1
* Add identification for Cortex-A15 (R0) cores.ray2013-06-281-0/+1
* Switch to AP[2:1] access permissions model. Store "referenced"gber2013-05-231-0/+2
* Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.wkoszek2013-04-271-0/+1
* Replace generic ARM11 option with more specificgonzo2012-12-201-0/+26
* Support identification of new PJ4B cores.gber2012-09-141-2/+3
* Merging projects/armv6, part 1gonzo2012-08-151-12/+74
* trim trailing whitespaceimp2012-06-131-1/+1
* Replace the C implementation of __aeabi_read_tp with an assembly version.andrew2012-04-161-0/+5
* - Revert part of r234005, which I did not intend to commit.stas2012-04-071-1/+1
* - Add kernel config file for QEMU-emulated gumstix board.stas2012-04-071-1/+1
* Correct both FA526/FA626TE cpu ids since the cpu id is alwayskevlo2010-02-201-2/+2
* Correct cpu id for FA526.kevlo2010-02-141-1/+2
* add IXP465 and generic IXP425 definitionsam2008-12-231-0/+2
* Merge WIP from p4:sam2008-12-131-0/+1
* Introduce low-level support for new Marvell core CPUs: 88FR131, 88FR571.raj2008-10-131-0/+15
* Merge definitions for ARM9E, ARM10 and ARM11 processors from p4 (whichimp2007-10-181-2/+14
* XScale core 3 definitions.cognet2007-07-271-0/+5
* Identify the xscale 81342.cognet2006-11-071-0/+1
* Finally bring it support for the i80219 XScale processor.cognet2006-08-241-0/+2
* Add an alternate ID for the arm920t (the real solution is to havecognet2005-11-211-0/+1
* Start all license statements with /*-imp2005-01-051-1/+1
* Import FreeBSD/arm kernel bits.cognet2004-05-141-0/+299
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