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:
FreeBSD-src
RELENG_2_2
RELENG_2_3
RELENG_2_3_0
RELENG_2_3_1
RELENG_2_3_2
RELENG_2_3_3
RELENG_2_3_4
RELENG_2_4
RELENG_2_4_4
RELENG_2_4_OLD
devel
devel-11
releng/10.1
releng/10.3
releng/11.0
releng/11.1
stable/10
stable/11
Raptor Engineering's fork of pfsense FreeBSD src with pfSense changes
Raptor Engineering, LLC
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path:
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sys
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arm
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arm
/
pl310.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
Disable PL310 outer cache sync for IO coherent platforms
zbb
2017-09-01
1
-0
/
+14
*
Make pl310_print_config static, it's not called out of pl310.c
andrew
2015-11-17
1
-1
/
+1
*
Remove trailing whitespace from sys/arm/arm
andrew
2015-05-24
1
-15
/
+15
*
- Make interrupt resource optional: some upstream FDT blobs (e.g. TI's) do
gonzo
2015-04-02
1
-8
/
+13
*
Accept the documented FDT compatible string for the PL310 cache controller
ian
2014-10-24
1
-2
/
+7
*
Set the pl310 L2 cache driver to attach during the middle of BUS_PASS_CPU.
ian
2014-08-05
1
-27
/
+49
*
Add cpu_l2cache_drain_writebuf(), use it to implement generic_bs_barrier().
ian
2014-05-11
1
-0
/
+13
*
Add a public routine to set the L2 cache ram latencies. This can be
ian
2014-05-06
1
-0
/
+29
*
Call platform_pl310_init() before enabling the controller, and handle the
ian
2014-05-06
1
-33
/
+36
*
Break out the code that figures out the L2 cache geometry to its own
ian
2014-05-06
1
-10
/
+20
*
Move the pl310.enabled tunable to hw.pl310.enabled. Clean up a few minor
ian
2014-05-06
1
-4
/
+7
*
Move duplicated code to print l2 cache config into the common code.
ian
2014-04-27
1
-0
/
+43
*
Follow r261352 by updating all drivers which are children of simplebus
ian
2014-02-02
1
-0
/
+3
*
Invalidate the entire L2 cache before enabling it. Say whether it
ian
2013-10-16
1
-0
/
+6
*
The errata 727915 requires a different workaround for r2p0, we have to
cognet
2013-07-29
1
-13
/
+26
*
Remove old declarations.
cognet
2013-01-08
1
-7
/
+0
*
Release version check for erratum 727915 workaround in
gonzo
2013-01-07
1
-6
/
+2
*
Fix the build:
andrew
2013-01-06
1
-11
/
+11
*
Only work around errata when we are on a part where the erratum applies.
andrew
2013-01-06
1
-19
/
+31
*
PL310 driver update:
gonzo
2012-12-31
1
-106
/
+166
*
Make sure the address starts on a cache line boundary.
cognet
2012-11-21
1
-1
/
+13
*
Merging projects/armv6, part 1
gonzo
2012-08-15
1
-0
/
+321