| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | MFC r276191: Display correct value for cache level-of-coherency (needs +1). | ian | 2015-02-12 | 1 | -1/+1 |
| * | MFC 263910, 263913, 263914, 263933, 263934, 263935, 263936, 263981, 263982, | ian | 2014-05-17 | 1 | -1/+7 |
| * | MFC 262952, 262958, 262966, 262979, 262980, 262986, 262987, 262995, 262997, | ian | 2014-05-17 | 1 | -92/+0 |
| * | MFC r258359, r258742, r258845, r259936, r259640 | ian | 2014-05-14 | 1 | -0/+3 |
| * | MFC r257170, r257171, r257172, r257240, r257278, r257279, r257280, r257281, | ian | 2014-05-14 | 1 | -8/+0 |
| * | Add identification for Cortex-A7 (R0) cores. | ganbold | 2013-08-01 | 1 | -0/+2 |
| * | Add identification for Cortex-A15 (R0) cores. | ray | 2013-06-28 | 1 | -0/+2 |
| * | Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port. | wkoszek | 2013-04-27 | 1 | -0/+2 |
| * | Replace generic ARM11 option with more specific | gonzo | 2012-12-20 | 1 | -0/+2 |
| * | Support identification of new PJ4B cores. | gber | 2012-09-14 | 1 | -2/+4 |
| * | Merging projects/armv6, part 1 | gonzo | 2012-08-15 | 1 | -60/+205 |
| * | I need to change uname -p, not uname -m, so back this out. | imp | 2012-05-05 | 1 | -7/+3 |
| * | Big endian arm boxes need to have a uname -m of armeb, not arm, so | imp | 2012-05-05 | 1 | -0/+5 |
| * | The FA526 belongs to the ARM9TDMI family | kevlo | 2010-05-12 | 1 | -2/+1 |
| * | Add support for FA626TE. | kevlo | 2010-05-04 | 1 | -1/+3 |
| * | Let detailed info about CPU features print on Marvell Sheeva CPU as well. | raj | 2010-03-11 | 1 | -0/+2 |
| * | Show the cpu info for fa526 | kevlo | 2010-02-20 | 1 | -0/+4 |
| * | Promote the cpu_class local variable to global and expose it in md_var.h | rpaulo | 2009-09-26 | 1 | -20/+2 |
| * | Merge WIP from p4: | sam | 2008-12-13 | 1 | -0/+4 |
| * | Introduce low-level support for new Marvell core CPUs: 88FR131, 88FR571. | raj | 2008-10-13 | 1 | -1/+11 |
| * | The VM system no longer uses setPQL2(). Remove it and its helpers. | alc | 2008-05-23 | 1 | -8/+0 |
| * | Merge support from p4 (from NetBSD) for arm9e and arm10, arm11 cores. Not | imp | 2007-10-18 | 1 | -8/+54 |
| * | Say if the L2 cache is enabled or disabled as well. | cognet | 2007-07-27 | 1 | -0/+6 |
| * | elaborate on stepping names; add intel terminology to help | sam | 2006-11-19 | 1 | -1/+1 |
| * | Identify the xscale 81342. | cognet | 2006-11-07 | 1 | -0/+10 |
| * | Finally bring it support for the i80219 XScale processor. | cognet | 2006-08-24 | 1 | -0/+6 |
| * | MFp4: Small cleanup of cpu messages at boot. | imp | 2006-02-03 | 1 | -6/+7 |
| * | MI changes: | netchild | 2005-12-31 | 1 | -0/+9 |
| * | Add an alternate ID for the arm920t (the real solution is to have | cognet | 2005-11-21 | 1 | -0/+2 |
| * | Start all license statements with /*- | imp | 2005-01-05 | 1 | -1/+1 |
| * | Be more verbose about cache capacities. | cognet | 2004-11-05 | 1 | -2/+18 |
| * | Add the hw.machine sysctl. | cognet | 2004-09-23 | 1 | -0/+4 |
| * | Import FreeBSD/arm kernel bits. | cognet | 2004-05-14 | 1 | -0/+366 |
