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path: root/sys/amd64/vmm/vmm_instruction_emul.c
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* Add segment protection and limits violation checks in vie_calculate_gla()neel2014-05-271-5/+81
* Do the linear address calculation for the ins/outs emulation using a newneel2014-05-251-38/+32
* Consolidate all the information needed by the guest page table walker intoneel2014-05-241-20/+48
* When injecting a page fault into the guest also update the guest's %cr2 toneel2014-05-241-17/+16
* Check for alignment check violation when processing in/out string instructions.neel2014-05-231-8/+26
* Add emulation of the "outsb" instruction. NetBSD guests use this to write toneel2014-05-231-1/+47
* Inject page fault into the guest if the page table walker detects an invalidneel2014-05-221-23/+52
* Add PG_RW check when translating a guest linear to guest physical address.neel2014-05-201-20/+83
* Add PG_U (user/supervisor) checks when translating a guest linear addressneel2014-05-191-10/+19
* Add support for emulating the byte move and sign extend instructions:tychon2014-04-151-5/+37
* Add support for FreeBSD/i386 guests under bhyve.jhb2014-02-051-25/+77
* Add support for emulating the byte move and zero extend instructions:tychon2014-02-051-0/+91
* Remove unnecessary includes of <machine/pmap.h>neel2013-10-291-1/+0
* Merge projects/bhyve_npt_pmap into head.neel2013-10-051-13/+15
* Fix a bug in decoding an instruction that has an SIB byte as well as anneel2013-09-171-6/+6
* Add support for emulating the byte move instruction "mov r/m8, r8".neel2013-08-271-2/+10
* Add support for emulation of the "or r/m, imm8" instruction.neel2013-07-231-3/+60
* Verify that all bytes in the instruction buffer are consumed during decoding.neel2013-07-031-0/+16
* Switch to standard copyright license textemaste2013-05-021-2/+2
* Add RIP-relative addressing to the instruction decoder.grehan2013-04-251-33/+29
* Allow caller to skip 'guest linear address' validation when doing instructionneel2013-03-281-5/+4
* Add emulation support for instruction "88/r: mov r/m8, r8".neel2013-01-301-0/+58
* Properly screen for the AND 0x81 instruction from the setgrehan2012-11-301-0/+7
* Remove debug printf.grehan2012-11-291-1/+0
* Add support for the 0x81 AND instruction, now generatedgrehan2012-11-291-0/+29
* Revamp the x86 instruction emulation in bhyve.neel2012-11-281-49/+432
* Get rid of assumptions in the hypervisor that the host physical memoryneel2012-10-031-2/+3
* Intel VT-x provides the length of the instruction at the time of the nestedneel2012-09-271-8/+14
* Add support for trapping MMIO writes to local apic registers and emulating them.neel2012-09-251-0/+385
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