| Commit message (Expand) | Author | Age | Files | Lines |
* | MFC r284539, r284630, r284688, r284877, r285217, r285218, | grehan | 2016-02-01 | 1 | -12/+51 |
* | MFC r282209: | neel | 2015-06-28 | 1 | -84/+153 |
* | MFC r279444: | neel | 2015-06-28 | 1 | -72/+214 |
* | MFC r276428: | neel | 2015-06-27 | 1 | -4/+267 |
* | MFC r273375 | neel | 2014-12-30 | 1 | -2/+9 |
* | MFC r270326 | neel | 2014-12-28 | 1 | -62/+143 |
* | MFC r270689: | grehan | 2014-09-16 | 1 | -13/+91 |
* | MFC r267921, r267934, r267949, r267959, r267966, r268202, r268276, | grehan | 2014-08-19 | 1 | -144/+528 |
* | MFC 266424,266476,266524,266573,266595,266626,266627,266633,266641,266642, | jhb | 2014-07-22 | 1 | -48/+311 |
* | MFC 261504: | jhb | 2014-06-12 | 1 | -25/+77 |
* | MFC 261503,264501: | jhb | 2014-06-12 | 1 | -0/+123 |
* | MFC 257297: | jhb | 2014-02-22 | 1 | -1/+0 |
* | Merge projects/bhyve_npt_pmap into head. | neel | 2013-10-05 | 1 | -13/+15 |
* | Fix a bug in decoding an instruction that has an SIB byte as well as an | neel | 2013-09-17 | 1 | -6/+6 |
* | Add support for emulating the byte move instruction "mov r/m8, r8". | neel | 2013-08-27 | 1 | -2/+10 |
* | Add support for emulation of the "or r/m, imm8" instruction. | neel | 2013-07-23 | 1 | -3/+60 |
* | Verify that all bytes in the instruction buffer are consumed during decoding. | neel | 2013-07-03 | 1 | -0/+16 |
* | Switch to standard copyright license text | emaste | 2013-05-02 | 1 | -2/+2 |
* | Add RIP-relative addressing to the instruction decoder. | grehan | 2013-04-25 | 1 | -33/+29 |
* | Allow caller to skip 'guest linear address' validation when doing instruction | neel | 2013-03-28 | 1 | -5/+4 |
* | Add emulation support for instruction "88/r: mov r/m8, r8". | neel | 2013-01-30 | 1 | -0/+58 |
* | Properly screen for the AND 0x81 instruction from the set | grehan | 2012-11-30 | 1 | -0/+7 |
* | Remove debug printf. | grehan | 2012-11-29 | 1 | -1/+0 |
* | Add support for the 0x81 AND instruction, now generated | grehan | 2012-11-29 | 1 | -0/+29 |
* | Revamp the x86 instruction emulation in bhyve. | neel | 2012-11-28 | 1 | -49/+432 |
* | Get rid of assumptions in the hypervisor that the host physical memory | neel | 2012-10-03 | 1 | -2/+3 |
* | Intel VT-x provides the length of the instruction at the time of the nested | neel | 2012-09-27 | 1 | -8/+14 |
* | Add support for trapping MMIO writes to local apic registers and emulating them. | neel | 2012-09-25 | 1 | -0/+385 |