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path: root/sys/amd64/pci
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* Add a read-only sysctl hw.pci.mcfg to mirror the tunable by the same name.jhb2009-05-181-0/+5
* Fall back to using configuration type 1 accesses for PCI config requests ifjhb2009-03-241-0/+2
* Correct parameter types for pcib_{read,write}_config by fixing theimp2009-02-081-5/+5
* Add a 'hw.pci.mcfg' tunable. It can be set to 0 to disable memory-mappedjhb2008-09-111-0/+6
* Some K8 chipsets don't expose all of the PCI devices on bus 0 via PCIejhb2008-09-101-14/+48
* Extend the support for PCI-e memory mapped configuration space access:jhb2008-08-221-3/+137
* Adjust the code to probe for the PCI config mechanism to use.jhb2007-11-281-167/+11
* Make the PCI code aware of PCI domains (aka PCI segments) so we canmarius2007-09-301-0/+5
* Revamp the MSI/MSI-X code a bit to achieve two main goals:jhb2007-05-021-4/+14
* Expand the MSI/MSI-X API to address some deficiencies in the MSI-X support.jhb2007-01-221-0/+1
* Give Host-PCI bridge drivers their own pcib_alloc_msi() andjhb2006-12-121-2/+24
* MD support for PCI Message Signalled Interrupts on amd64 and i386:jhb2006-11-131-0/+4
* MFi386: rename pcib_devclass to hostb_devclass (cosmetic here)peter2006-03-131-2/+2
* - Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all thejhb2006-01-061-11/+3
* Move the hostb driver out of the i386 and amd64 PCI code (where it wasjhb2005-12-201-58/+0
* Modify the pci_cfgdisable() routine to bring it more in line withwpaul2005-10-251-2/+6
* MFi386: pci attribute allocation fixes.imp2005-09-181-1/+3
* MFi386: whitespace, copyright header, etc updatespeter2005-01-211-1/+0
* Begin all license/copyright comments with /*-imp2005-01-052-2/+2
* Add TUNABLE_LONG and TUNABLE_ULONG, and use the latter for thedes2004-10-311-4/+3
* Whitespace cleanupdes2004-10-311-5/+5
* MFi386: sync with latest updatespeter2004-10-111-3/+36
* Add missing <sys/module.h> instances which were shadowed by the nestedphk2004-06-031-0/+1
* MFi386: numerous interrupt and acpi updatespeter2004-05-161-1/+1
* Drastically clean up the legacy host-pci bridge table. We don't needpeter2004-03-131-208/+5
* MFi386: nuke pci_cfgintrpeter2004-03-131-22/+1
* MFi386: change an outb to a DELAY()peter2004-01-281-1/+1
* Various whitespace and cosmetic sync-up's with i386.peter2003-12-062-2/+3
* Initial landing of SMP support for FreeBSD/amd64.peter2003-11-171-1/+1
* GC unused child variablepeter2003-09-231-2/+1
* MFi386 pci_bus.c 1.102 legacyvar.h 1.4: rename nexus_pcib to legacy_pcibpeter2003-09-231-51/+53
* - Rename PCIx_HEADERTYPE* to PCIx_HDRTYPE* so the constants aren't so long.jhb2003-08-281-2/+10
* Prefer new location of pci include files (which have only been in theimp2003-08-221-3/+3
* Use __FBSDID().obrien2003-07-252-6/+6
* Commit MD parts of a loosely functional AMD64 port. This is based onpeter2003-05-012-558/+18
* Initiate de-orbit burn for USE_PCI_BIOS_FOR_READ_WRITE. This has beenpeter2003-02-182-147/+28
* Outdent the string rather than use concatenation.phk2002-12-231-2/+2
* MFp4:imp2002-11-141-1/+1
* Recognize the Serverworks CIOB30 host to pci bridge.peter2002-11-131-0/+5
* MFp4:imp2002-11-021-10/+34
* Use 0xffffffff instead of -1 for id to compare against.imp2002-11-021-10/+11
* Revert last commit, there actually was a -1 waaaaay down in pcireg_cfgread().phk2002-10-201-0/+2
* "id" is never going to be -1 when it is unsigned.phk2002-10-201-2/+0
* Use the global pcib devclass instead of our own static copy.jhb2002-10-161-2/+0
* o go ahead and route the interupt, even if it is supposedly unique.imp2002-10-071-7/+12
* Add 2 Ids for new ServerWorks host to PCI bridge chipset.iwasaki2002-10-021-0/+8
* Don't call function in return() for a void function.phk2002-09-281-3/+5
* Now that we only probe host-PCI bridges once, we no longer have to check tojhb2002-09-231-10/+0
* Put verbose printf's in the PCI BIOS interrupt routing code underjhb2002-09-231-1/+4
* Change the nexus_pcib driver (eventually to be renamed to legacy_pcib) tojhb2002-09-231-7/+7
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