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path: root/sys/amd64/amd64/local_apic.c
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* Adjust the handling the various timer frequencies when using the lapicjhb2008-08-231-10/+17
* Add the DTrace hooks for exception handling (Function boundary tracejb2008-05-241-0/+17
* In keeping with style(9)'s recommendations on macros, use a ';'rwatson2008-03-161-3/+4
* Don't test the APIC flag in the cpuid features for amd64 to see if ajhb2007-10-271-4/+0
* This is a follow-up, cleaning-up commit about recent changes involvingattilio2007-09-111-1/+1
* Move mp_topology() from apic_init(i386) and apic_setup_local(amd64) topeter2007-08-021-4/+0
* Handle CPUs with APIC IDs higher than 32 (at least one IBM server usesjhb2007-05-081-9/+2
* Minor fixes and tweaks to the x86 interrupt code:jhb2007-05-081-0/+12
* Disable C1 Enhanced mode on AMD K8 Family Revision F and above to keepariff2007-04-251-0/+23
* Add a new apic0 psuedo-device to claim memory resources for the memoryjhb2007-03-201-0/+2
* Change the x86 interrupt code to use FreeBSD CPU IDs (i.e. PCPU_GET(cpuid))jhb2007-03-061-1/+0
* Use vm_paddr_t rather than uintptr_t when passing the physical address ofjhb2007-03-051-1/+1
* Newer versions of gcc don't support treating structures passed by valuekmacy2006-12-171-7/+7
* MD support for PCI Message Signalled Interrupts on amd64 and i386:jhb2006-11-131-0/+62
* Change the x86 interrupt code to suspend/resume interrupt controllersjhb2006-10-101-5/+21
* Extend comment explaining why code is conditional at !defined(SCHED_ULE).sobomax2006-09-271-0/+4
* Since ULE doesn't honor hlt_cpus_mask don't compile code that preventssobomax2006-09-271-1/+1
* Add a new ddb command 'show lapic' to dump details about the local APICjhb2006-09-111-0/+70
* Unbreak in the case when device apic is compiled into non-SMP kernel.sobomax2006-09-061-0/+2
* The FreeBSD by default "disables" hyper-threading cores, by not schedulingsobomax2006-09-051-0/+10
* Simplify the pager support in DDB. Allowing different db commands tojhb2006-07-121-4/+2
* Drop some unneeded casts since we program the kernel in C rather than C++.jhb2006-03-201-1/+1
* Rework how we wire up interrupt sources to CPUs:jhb2006-02-281-14/+2
* Tweak how the MD code calls the fooclock() methods some. Instead ofjhb2005-12-221-5/+6
* Revert previous commit. The BIOS braindamage is even worse than Ijhb2005-12-131-0/+4
* Don't check the CPUID_APIC bit in the cpu_features flags field to determinejhb2005-12-131-4/+0
* MFi386:jhb2005-12-081-5/+7
* Change the x86 code to allocate IDT vectors on-demand when an interruptjhb2005-11-021-22/+100
* MFi386: Various apic fixes and tweakspeter2005-10-261-4/+8
* Various trivial comment fixespeter2005-06-241-1/+1
* Move HWPMC_HOOKS into its own opt_hwpmc_hooks.h file. It doesn't meritpeter2005-06-241-0/+2
* MFi386: set PMC vectorpeter2005-05-221-1/+6
* Always use the local APIC timer, even on UP machines.jhb2005-04-141-4/+0
* MFi386: reduce apic clock interrupt ratepeter2005-03-111-15/+5
* MFi386: Bring over John's local apic timer codepeter2005-02-281-2/+185
* JumboMFi386: use bitmapped IPI handler. Update elcr and default mptablepeter2005-01-211-31/+56
* Sync with i386 - fix bounds check in lapic_create()peter2004-08-161-1/+1
* MFi386: numerous interrupt and acpi updatespeter2004-05-161-10/+12
* MFi386: wait for local apic to become free before using itpeter2004-03-081-4/+2
* Merge some more changes from i386.peter2004-01-301-1/+0
* MFi386: mp_topology().peter2004-01-281-0/+4
* MFi386: put the apic disable hook in a better place.peter2003-12-061-0/+4
* Initial landing of SMP support for FreeBSD/amd64.peter2003-11-171-19/+7
* Shuffle the APIC interrupt vectors around a bit:jhb2003-11-141-6/+10
* - Move manipulation of td_intr_nesting_level out of assembly interruptjhb2003-11-121-2/+7
* New APIC support code:jhb2003-11-031-0/+758
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