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path: root/sys/amd64/amd64/amd64_mem.c
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* Avoid preemption while manipulating CRs and MTRRs.jkim2011-01-171-0/+4
* Restore CR0 after MTRR initialization for correctness sakes. There will bejkim2010-11-161-10/+8
* Invalidate TLBs explicitly. r1.4 of sys/i386/i386/i686_mem.c removed thisjkim2010-11-161-1/+3
* Don't call pmap_demote_DMAP() on MTRR entries from the BIOS that are markedalc2010-11-071-2/+2
* [1] According to the x86 architectural specifications, no virtual-to-alc2010-10-271-2/+36
* Enable MTRR on all VIA CPUs that claim support (amd64).rnoland2010-02-021-4/+1
* Initial suspend/resume support for amd64.jkim2009-03-171-1/+27
* Add basic amd64 support for VIA Nano processors.jkim2009-01-121-2/+10
* Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").jkim2008-11-261-2/+3
* The variable MTRR registers actually have variable-sized PhysBase andjhb2008-03-121-6/+24
* Minimize diffs with i686_mem.c:jhb2008-03-121-6/+4
* Style(9) these files. No changes in the compiled code. (Verified byjhb2008-03-111-405/+443
* Add constants for the various fields in MTRR registers.jhb2008-03-111-11/+12
* Move the definition of M_MEMDESC to a non-optional file. This allowsscottl2004-08-071-0/+5
* Various whitespace and cosmetic sync-up's with i386.peter2003-12-061-1/+0
* Argh! The Athlon64 and Opteron only implement 40 bits of address space inpeter2003-11-221-5/+4
* Change all SYSCTLS which are readonly and have a related TUNABLEsilby2003-10-211-1/+1
* AMD64 mtrr driver.peter2003-08-231-75/+80
* Use __FBSDID().obrien2003-06-021-1/+3
* Back out M_* changes, per decision of the TRB.imp2003-02-191-1/+1
* Remove M_TRYWAIT/M_WAITOK/M_WAIT. Callers should use 0.alfred2003-01-211-1/+1
* Loader tunable 'machdep.disable_mtrrs'.mdodd2002-11-131-1/+7
* This patch enables FreeBSD i686 MTRR support on Intel Pentiummdodd2002-09-191-1/+1
* Some BIOSs are using MTRR values that are only documented under NDAdwmalone2002-09-151-0/+11
* Make the MTRR code a bit more defensive - this should help peopledwmalone2002-04-141-30/+51
* Overhaul of the SMP code. Several portions of the SMP kernel support havejhb2001-04-271-4/+1
* Rename the IPI API from smp_ipi_* to ipi_* since the smp_ prefix is justjhb2001-04-111-1/+1
* Remove the old APIC I/O higher level IPI API in favor of the newer MIjhb2001-04-101-1/+1
* Convert more malloc+bzero to malloc+M_ZERO.dwmalone2000-12-081-2/+1
* Remove the NCPU, NAPIC, NBUS, NINTR config options. Make NAPIC,ps2000-09-221-2/+0
* Enable MTRR support for K7 (Athlon) processors, which happens to have thegreen1999-10-121-3/+4
* Zap unneeded #includespeter1999-10-111-2/+1
* $Id$ -> $FreeBSD$peter1999-08-281-1/+1
* Fix typo which would have caused MTRR support on non-SMP systems tomsmith1999-08-041-2/+2
* Update of the i686 MTRR/memory range support.msmith1999-07-201-45/+46
* Harmless change to prevent possible problems in the future. I madegreen1999-06-181-2/+4
* Add a hook that can be called to initialise a slave processor's memorymsmith1999-04-301-18/+49
* mem.cmsmith1999-04-071-0/+554
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