| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | MFC r276045: | ian | 2014-12-27 | 1 | -0/+2 |
| * | MFC 275337: | andrew | 2014-12-14 | 2 | -2/+15 |
| * | MFC r268994: C++ exception/unwind handling fix | ian | 2014-08-25 | 1 | -1/+1 |
| * | MFC r269948: | dim | 2014-08-17 | 1 | -1/+1 |
| * | MFC r265231: | pfg | 2014-05-09 | 1 | -1/+1 |
| * | MFC r260310: | pfg | 2014-01-12 | 1 | -1/+3 |
| * | MFC r259873: | pfg | 2014-01-08 | 2 | -5/+109 |
| * | MFC r259841 | pfg | 2014-01-07 | 2 | -0/+2 |
| * | MFC r259525, r259526, r259529 | pfg | 2013-12-31 | 1 | -3/+12 |
| * | MFC r259005, r259092: | pfg | 2013-12-30 | 3 | -32/+24 |
| * | gcc: Merge upstream changes. | pfg | 2013-12-27 | 1 | -0/+4 |
| * | MFC r258651, r258943: | pfg | 2013-12-19 | 1 | -99/+118 |
| * | MFC r258428, r258445 | pfg | 2013-12-18 | 9 | -279/+301 |
| * | MFC r258081, r258138, r258143, r258179, r258157, r258204, 258205, | pfg | 2013-12-12 | 1 | -4/+2 |
| * | MFC r259111: | dim | 2013-12-11 | 1 | -3/+3 |
| * | On ARM EABI double precision floating point values are stored in the | andrew | 2013-09-07 | 1 | -1/+1 |
| * | add support to gcc for AES and PCLMUL intrinsics... This addes the | jmg | 2013-09-03 | 3 | -0/+18 |
| * | Implement _Unwind_GetIP and _Unwind_GetIPInfo as functions as that is what | andrew | 2013-08-31 | 2 | -0/+21 |
| * | Bring in gcc r128087 to add support for _Unwind_Backtrace on ARM. This is | andrew | 2013-08-31 | 3 | -1/+69 |
| * | GCC: bring back experimental support for amdfam10/barcelona CPUs. | pfg | 2013-06-01 | 11 | -157/+1285 |
| * | For some reason, the gcc intrinsics header tmmintrin.h was imported with | dim | 2013-05-08 | 1 | -224/+0 |
| * | Add #undef TARGET_DEFAULT back as it shouldn't have been removed in r245539 | andrew | 2013-02-04 | 1 | -0/+1 |
| * | Allow the unwind functions int libgcc_s to interact correctly with libthr. | andrew | 2013-02-04 | 1 | -2/+2 |
| * | Clean some 'svn:executable' properties in the tree. | pfg | 2013-01-26 | 3 | -0/+0 |
| * | Add compiler support for the ARM EABI. | andrew | 2013-01-17 | 1 | -3/+27 |
| * | Switch the default CPU to an arm9. This removes compiler support for the | andrew | 2013-01-14 | 1 | -1/+1 |
| * | Don't define CTORS_SECTION_ASM_OP and DTORS_SECTION_ASM_OP on arm when | andrew | 2012-12-15 | 1 | -0/+2 |
| * | Follow clang lead and include mm_malloc.h only in hosted configurations. | kan | 2012-10-27 | 1 | -0/+2 |
| * | Merging of projects/armv6, part 3 | gonzo | 2012-08-15 | 1 | -2/+14 |
| * | Pass --enable-new-dtags to the linker invocation by default. If | kib | 2012-07-15 | 7 | -4/+7 |
| * | Merge r236137 from x86: | marius | 2012-06-14 | 1 | -0/+1 |
| * | Revert r236962 - Experimental amdfam10/barcelona support. | pfg | 2012-06-13 | 11 | -1369/+477 |
| * | Add experimental support for amdfam10/barcelona from the GCC 4.3 branch. | pfg | 2012-06-12 | 11 | -477/+1369 |
| * | Merge r236137 from x86: | marius | 2012-05-30 | 1 | -2/+4 |
| * | Enable gnu hash generation for dynamic ELF binaries on x86. | kib | 2012-05-27 | 2 | -0/+2 |
| * | Bring in a subset of gcc fixes that were back ported to | pfg | 2012-05-18 | 2 | -43/+80 |
| * | Unbreak jemalloc build with MALLOC_PRODUCTION set. New jemalloc version | gonzo | 2012-04-30 | 1 | -2/+26 |
| * | Disable IRIX compatibility flags for DWARF code generator. IRIX-compatible | gonzo | 2012-03-23 | 1 | -1/+2 |
| * | Silence a warning about redefinition of TARGET_ELF on powerpc. | andreast | 2012-01-06 | 1 | -0/+1 |
| * | Rename the linker emulation name for powerpc and powerc64. This is needed that | andreast | 2011-11-19 | 1 | -1/+1 |
| * | Copy over the ASM_DECLARE_FUNCTION_SIZE macro from linux64.h. This macro | andreast | 2011-11-16 | 1 | -0/+19 |
| * | Import gcc fix for -fstack-protector that produces segfaulting | fabient | 2011-11-09 | 1 | -2/+4 |
| * | Adjust posix_memalign() prototype to match what we define in stdlib.h for | stefanf | 2011-10-16 | 1 | -1/+1 |
| * | Upgrade of base gcc and libstdc++ to the last GPLv2-licensed revision | mm | 2011-03-29 | 3 | -3/+40 |
| * | Backport missing tunings for -march=core2: | mm | 2011-03-17 | 1 | -2/+2 |
| * | Fix -march/-mtune=native autodetection for Intel Core 2 CPUs | mm | 2011-03-16 | 1 | -2/+9 |
| * | Backport SSSE3 instruction set support to base gcc. | mm | 2011-03-14 | 7 | -9/+1245 |
| * | Now that TLS is supported for sparc64 by both binutils 2.17.50 committed | marius | 2011-03-11 | 1 | -0/+7 |
| * | Backport Intel Core 2 and AMD Geode CPU types from gcc-4.3 (GPLv2) | mm | 2011-03-07 | 4 | -44/+339 |
| * | Backport svn r124339 from gcc 4.3 and add opteron-sse3, athlon64-sse3 | mm | 2011-02-20 | 1 | -0/+9 |
