diff options
Diffstat (limited to 'sys/powerpc/booke/pmap.c')
| -rw-r--r-- | sys/powerpc/booke/pmap.c | 23 |
1 files changed, 7 insertions, 16 deletions
diff --git a/sys/powerpc/booke/pmap.c b/sys/powerpc/booke/pmap.c index 2fffa3f..4a279af 100644 --- a/sys/powerpc/booke/pmap.c +++ b/sys/powerpc/booke/pmap.c @@ -91,9 +91,6 @@ __FBSDID("$FreeBSD$"); #include "mmu_if.h" -#define DEBUG -#undef DEBUG - #ifdef DEBUG #define debugf(fmt, args...) printf(fmt, ##args) #else @@ -3019,24 +3016,18 @@ tlb1_init(vm_offset_t ccsrbar) { uint32_t mas0; - /* TLB1[1] is used to map the kernel. Save that entry. */ - mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(1); + /* TLB1[0] is used to map the kernel. Save that entry. */ + mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(0); mtspr(SPR_MAS0, mas0); __asm __volatile("isync; tlbre"); - tlb1[1].mas1 = mfspr(SPR_MAS1); - tlb1[1].mas2 = mfspr(SPR_MAS2); - tlb1[1].mas3 = mfspr(SPR_MAS3); + tlb1[0].mas1 = mfspr(SPR_MAS1); + tlb1[0].mas2 = mfspr(SPR_MAS2); + tlb1[0].mas3 = mfspr(SPR_MAS3); - /* Map in CCSRBAR in TLB1[0] */ - tlb1_idx = 0; + /* Map in CCSRBAR in TLB1[1] */ + tlb1_idx = 1; tlb1_set_entry(CCSRBAR_VA, ccsrbar, CCSRBAR_SIZE, _TLB_ENTRY_IO); - /* - * Set the next available TLB1 entry index. Note TLB[1] is reserved - * for initial mapping of kernel text+data, which was set early in - * locore, we need to skip this [busy] entry. - */ - tlb1_idx = 2; /* Setup TLB miss defaults */ set_mas4_defaults(); |
