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-rw-r--r--sys/mips/atheros/ar71xx_setup.h3
-rw-r--r--sys/mips/atheros/ar934xreg.h156
-rw-r--r--sys/mips/include/atomic.h16
-rw-r--r--sys/mips/include/elf.h369
-rw-r--r--sys/mips/mips/uio_machdep.c2
-rw-r--r--sys/mips/mips/vm_machdep.c2
6 files changed, 349 insertions, 199 deletions
diff --git a/sys/mips/atheros/ar71xx_setup.h b/sys/mips/atheros/ar71xx_setup.h
index 5d77c61..1736369 100644
--- a/sys/mips/atheros/ar71xx_setup.h
+++ b/sys/mips/atheros/ar71xx_setup.h
@@ -41,6 +41,9 @@ enum ar71xx_soc_type {
AR71XX_SOC_AR9132,
AR71XX_SOC_AR9330,
AR71XX_SOC_AR9331,
+ AR71XX_SOC_AR9341,
+ AR71XX_SOC_AR9342,
+ AR71XX_SOC_AR9344,
};
extern enum ar71xx_soc_type ar71xx_soc;
diff --git a/sys/mips/atheros/ar934xreg.h b/sys/mips/atheros/ar934xreg.h
new file mode 100644
index 0000000..3b0381f
--- /dev/null
+++ b/sys/mips/atheros/ar934xreg.h
@@ -0,0 +1,156 @@
+/*-
+ * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef __AR934X_REG_H__
+#define __AR934X_REG_H__
+
+#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
+#define AR934X_WMAC_SIZE 0x20000
+#define AR934X_EHCI_BASE 0x1b000000
+#define AR934X_EHCI_SIZE 0x200
+#define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000)
+#define AR934X_SRIF_SIZE 0x1000
+
+#define AR934X_DDR_REG_FLUSH_GE0 (AR71XX_APB_BASE + 0x9c)
+#define AR934X_DDR_REG_FLUSH_GE1 (AR71XX_APB_BASE + 0xa0)
+#define AR934X_DDR_REG_FLUSH_USB (AR71XX_APB_BASE + 0xa4)
+#define AR934X_DDR_REG_FLUSH_PCIE (AR71XX_APB_BASE + 0xa8)
+#define AR934X_DDR_REG_FLUSH_WMAC (AR71XX_APB_BASE + 0xac)
+
+#define AR934X_PLL_CPU_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x00)
+#define AR934X_PLL_DDR_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x04)
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_REG (AR71XX_PLL_CPU_BASE + 0x08)
+
+#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0
+#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f
+#define AR934X_PLL_CPU_CONFIG_NINT_SHIFT 6
+#define AR934X_PLL_CPU_CONFIG_NINT_MASK 0x3f
+#define AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT 12
+#define AR934X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
+#define AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19
+#define AR934X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3
+
+#define AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT 0
+#define AR934X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff
+#define AR934X_PLL_DDR_CONFIG_NINT_SHIFT 10
+#define AR934X_PLL_DDR_CONFIG_NINT_MASK 0x3f
+#define AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT 16
+#define AR934X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f
+#define AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23
+#define AR934X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7
+
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS (1 << 2)
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS (1 << 3)
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS (1 << 4)
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT 5
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK 0x1f
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT 10
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK 0x1f
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT 15
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK 0x1f
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL (1 << 20)
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL (1 << 21)
+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL (1 << 24)
+
+#define AR934X_RESET_REG_RESET_MODULE (AR71XX_RST_BLOCK_BASE + 0x1c)
+#define AR934X_RESET_REG_BOOTSTRAP (AR71XX_RST_BLOCK_BASE + 0xb0)
+#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS (AR71XX_RST_BLOCK_BASE + 0xac)
+
+#define AR934X_RESET_USB_PHY_ANALOG (1 << 11)
+#define AR934X_RESET_USB_HOST (1 << 5)
+#define AR934X_RESET_USB_PHY (1 << 4)
+#define AR934X_RESET_USBSUS_OVERRIDE (1 << 3)
+
+#define AR934X_BOOTSTRAP_SW_OPTION8 (1 << 23)
+#define AR934X_BOOTSTRAP_SW_OPTION7 (1 << 22)
+#define AR934X_BOOTSTRAP_SW_OPTION6 (1 << 21)
+#define AR934X_BOOTSTRAP_SW_OPTION5 (1 << 20)
+#define AR934X_BOOTSTRAP_SW_OPTION4 (1 << 19)
+#define AR934X_BOOTSTRAP_SW_OPTION3 (1 << 18)
+#define AR934X_BOOTSTRAP_SW_OPTION2 (1 << 17)
+#define AR934X_BOOTSTRAP_SW_OPTION1 (1 << 16)
+#define AR934X_BOOTSTRAP_USB_MODE_DEVICE (1 << 7)
+#define AR934X_BOOTSTRAP_PCIE_RC (1 << 6)
+#define AR934X_BOOTSTRAP_EJTAG_MODE (1 << 5)
+#define AR934X_BOOTSTRAP_REF_CLK_40 (1 << 4)
+#define AR934X_BOOTSTRAP_BOOT_FROM_SPI (1 << 2)
+#define AR934X_BOOTSTRAP_SDRAM_DISABLED (1 << 1)
+#define AR934X_BOOTSTRAP_DDR1 (1 << 0)
+
+#define AR934X_PCIE_WMAC_INT_WMAC_MISC (1 << 0)
+#define AR934X_PCIE_WMAC_INT_WMAC_TX (1 << 1)
+#define AR934X_PCIE_WMAC_INT_WMAC_RXLP (1 << 2)
+#define AR934X_PCIE_WMAC_INT_WMAC_RXHP (1 << 3)
+#define AR934X_PCIE_WMAC_INT_PCIE_RC (1 << 4)
+#define AR934X_PCIE_WMAC_INT_PCIE_RC0 (1 << 5)
+#define AR934X_PCIE_WMAC_INT_PCIE_RC1 (1 << 6)
+#define AR934X_PCIE_WMAC_INT_PCIE_RC2 (1 << 7)
+#define AR934X_PCIE_WMAC_INT_PCIE_RC3 (1 << 8)
+#define AR934X_PCIE_WMAC_INT_WMAC_ALL \
+ (AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \
+ AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP)
+
+#define AR934X_PCIE_WMAC_INT_PCIE_ALL \
+ (AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \
+ AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \
+ AR934X_PCIE_WMAC_INT_PCIE_RC3)
+
+#define REV_ID_MAJOR_AR9341 0x0120
+#define REV_ID_MAJOR_AR9342 0x1120
+#define REV_ID_MAJOR_AR9344 0x2120
+
+#define AR934X_REV_ID_REVISION_MASK 0xf
+
+/*
+ * GPIO block
+ */
+#define AR934X_GPIO_REG_FUNC 0x6c
+#define AR934X_GPIO_COUNT 23
+
+/*
+ * SRIF block
+ */
+#define AR934X_SRIF_CPU_DPLL1_REG (AR934X_SRIF_BASE + 0x1c0)
+#define AR934X_SRIF_CPU_DPLL2_REG (AR934X_SRIF_BASE + 0x1c4)
+#define AR934X_SRIF_CPU_DPLL3_REG (AR934X_SRIF_BASE + 0x1c8)
+
+#define AR934X_SRIF_DDR_DPLL1_REG (AR934X_SRIF_BASE + 0x240)
+#define AR934X_SRIF_DDR_DPLL2_REG (AR934X_SRIF_BASE + 0x244)
+#define AR934X_SRIF_DDR_DPLL3_REG (AR934X_SRIF_BASE + 0x248)
+
+#define AR934X_SRIF_DPLL1_REFDIV_SHIFT 27
+#define AR934X_SRIF_DPLL1_REFDIV_MASK 0x1f
+#define AR934X_SRIF_DPLL1_NINT_SHIFT 18
+#define AR934X_SRIF_DPLL1_NINT_MASK 0x1ff
+#define AR934X_SRIF_DPLL1_NFRAC_MASK 0x0003ffff
+
+#define AR934X_SRIF_DPLL2_LOCAL_PLL (1 << 30)
+#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13
+#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
+
+#endif /* __AR934X_REG_H__ */
diff --git a/sys/mips/include/atomic.h b/sys/mips/include/atomic.h
index 9a0c557..b43cc61 100644
--- a/sys/mips/include/atomic.h
+++ b/sys/mips/include/atomic.h
@@ -44,20 +44,16 @@
* do not have atomic operations defined for them, but generally shouldn't
* need atomic operations.
*/
+#ifndef __MIPS_PLATFORM_SYNC_NOPS
+#define __MIPS_PLATFORM_SYNC_NOPS ""
+#endif
static __inline void
mips_sync(void)
{
- __asm __volatile (".set noreorder\n\t"
- "sync\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
+ __asm __volatile (".set noreorder\n"
+ "\tsync\n"
+ __MIPS_PLATFORM_SYNC_NOPS
".set reorder\n"
: : : "memory");
}
diff --git a/sys/mips/include/elf.h b/sys/mips/include/elf.h
index be4d024..427906d 100644
--- a/sys/mips/include/elf.h
+++ b/sys/mips/include/elf.h
@@ -1,7 +1,5 @@
-/* $OpenBSD: elf_abi.h,v 1.1 1998/01/28 11:14:41 pefo Exp $ */
-
-/*-
- * Copyright (c) 1996 Per Fogelstrom
+/*
+ * Copyright (c) 2013 M. Warner Losh. All Rights Reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -11,18 +9,12 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed under OpenBSD by
- * Per Fogelstrom.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
@@ -30,190 +22,60 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * JNPR: elf.h,v 1.4 2006/12/02 09:53:40 katta
* $FreeBSD$
+ */
+
+/*-
+ * Copyright (c) 2013 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * See below starting with the line with $NetBSD...$ for code this applies to.
*/
-#ifndef _MACHINE_ELF_H_
-#define _MACHINE_ELF_H_
+#ifndef __MIPS_ELF_H
+#define __MIPS_ELF_H
-/* Information taken from MIPS ABI supplemental */
+/* FreeBSD specific bits - derived from FreeBSD specific files and changes to old elf.h */
+/*
+ * Define __ELF_WORD_SIZE based on the ABI, if not defined yet. This sets
+ * the proper defaults when we're not trying to do 32-bit on 64-bit systems.
+ * We include both 32 and 64 bit versions so we can support multiple ABIs.
+ */
#ifndef __ELF_WORD_SIZE
#if defined(__mips_n64)
-#define __ELF_WORD_SIZE 64 /* Used by <sys/elf_generic.h> */
+#define __ELF_WORD_SIZE 64
#else
-#define __ELF_WORD_SIZE 32 /* Used by <sys/elf_generic.h> */
+#define __ELF_WORD_SIZE 32
#endif
#endif
-#include <sys/elf32.h> /* Definitions common to all 32 bit architectures. */
-#include <sys/elf64.h> /* Definitions common to all 64 bit architectures. */
+#include <sys/elf32.h>
+#include <sys/elf64.h>
#include <sys/elf_generic.h>
-#define ELF_ARCH EM_MIPS
-#if __ELF_WORD_SIZE == 32
-#define ELF_ARCH32 EM_MIPS
-#endif
-#define ELF_MACHINE_OK(x) ((x) == EM_MIPS || (x) == EM_MIPS_RS4_BE)
-
-/* Architecture dependent Segment types - p_type */
-#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */
-
-/* Architecture dependent d_tag field for Elf32_Dyn. */
-#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime Linker Interface ID */
-#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */
-#define DT_MIPS_ICHECKSUM 0x70000003 /* Cksum of ext str and com sizes */
-#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */
-#define DT_MIPS_FLAGS 0x70000005 /* Flags */
-#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Segment base address */
-#define DT_MIPS_CONFLICT 0x70000008 /* Adr of .conflict section */
-#define DT_MIPS_LIBLIST 0x70000009 /* Address of .liblist section */
-#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local .GOT entries */
-#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of .conflict entries */
-#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of .liblist entries */
-#define DT_MIPS_SYMTABNO 0x70000011 /* Number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */
-#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in .dynsym */
-#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */
-#define DT_MIPS_RLD_MAP 0x70000016 /* Address of debug map pointer */
-
-#define DT_PROCNUM (DT_MIPS_RLD_MAP - DT_LOPROC + 1)
-
-/*
- * Legal values for e_flags field of Elf32_Ehdr.
- */
-#define EF_MIPS_NOREORDER 1 /* .noreorder was used */
-#define EF_MIPS_PIC 2 /* Contains PIC code */
-#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence */
-#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */
-
-/*
- * Mips special sections.
- */
-#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */
-#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
-#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
-
-/*
- * Legal values for sh_type field of Elf32_Shdr.
- */
-#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */
-#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */
-#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */
-#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */
-#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information */
-#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */
-
-/*
- * Legal values for sh_flags field of Elf32_Shdr.
- */
-#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */
-
-/*
- * Entries found in sections of type SHT_MIPS_GPTAB.
- */
-typedef union {
- struct {
- Elf32_Word gt_current_g_value; /* -G val used in compilation */
- Elf32_Word gt_unused; /* Not used */
- } gt_header; /* First entry in section */
- struct {
- Elf32_Word gt_g_value; /* If this val were used for -G */
- Elf32_Word gt_bytes; /* This many bytes would be used */
- } gt_entry; /* Subsequent entries in section */
-} Elf32_gptab;
-typedef union {
- struct {
- Elf64_Word gt_current_g_value; /* -G val used in compilation */
- Elf64_Word gt_unused; /* Not used */
- } gt_header; /* First entry in section */
- struct {
- Elf64_Word gt_g_value; /* If this val were used for -G */
- Elf64_Word gt_bytes; /* This many bytes would be used */
- } gt_entry; /* Subsequent entries in section */
-} Elf64_gptab;
-
-/*
- * Entry found in sections of type SHT_MIPS_REGINFO.
- */
-typedef struct {
- Elf32_Word ri_gprmask; /* General registers used */
- Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */
- Elf32_Sword ri_gp_value; /* $gp register value */
-} Elf32_RegInfo;
-typedef struct {
- Elf64_Word ri_gprmask; /* General registers used */
- Elf64_Word ri_cprmask[4]; /* Coprocessor registers used */
- Elf64_Sword ri_gp_value; /* $gp register value */
-} Elf64_RegInfo;
-
-
-/*
- * Mips relocations.
- */
-
-#define R_MIPS_NONE 0 /* No reloc */
-#define R_MIPS_16 1 /* Direct 16 bit */
-#define R_MIPS_32 2 /* Direct 32 bit */
-#define R_MIPS_REL32 3 /* PC relative 32 bit */
-#define R_MIPS_26 4 /* Direct 26 bit shifted */
-#define R_MIPS_HI16 5 /* High 16 bit */
-#define R_MIPS_LO16 6 /* Low 16 bit */
-#define R_MIPS_GPREL16 7 /* GP relative 16 bit */
-#define R_MIPS_LITERAL 8 /* 16 bit literal entry */
-#define R_MIPS_GOT16 9 /* 16 bit GOT entry */
-#define R_MIPS_PC16 10 /* PC relative 16 bit */
-#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */
-#define R_MIPS_GPREL32 12 /* GP relative 32 bit */
-#define R_MIPS_GOTHI16 21 /* GOT HI 16 bit */
-#define R_MIPS_GOTLO16 22 /* GOT LO 16 bit */
-#define R_MIPS_CALLHI16 30 /* upper 16 bit GOT entry for function */
-#define R_MIPS_CALLLO16 31 /* lower 16 bit GOT entry for function */
-
-/*
- * These are from the 64-bit Irix ELF ABI
- */
-#define R_MIPS_SHIFT5 16
-#define R_MIPS_SHIFT6 17
-#define R_MIPS_64 18
-#define R_MIPS_GOT_DISP 19
-#define R_MIPS_GOT_PAGE 20
-#define R_MIPS_GOT_OFST 21
-#define R_MIPS_GOT_HI16 22
-#define R_MIPS_GOT_LO16 23
-#define R_MIPS_SUB 24
-#define R_MIPS_INSERT_A 25
-#define R_MIPS_INSERT_B 26
-#define R_MIPS_DELETE 27
-#define R_MIPS_HIGHER 28
-#define R_MIPS_HIGHEST 29
-#define R_MIPS_SCN_DISP 32
-#define R_MIPS_REL16 33
-#define R_MIPS_ADD_IMMEDIATE 34
-#define R_MIPS_PJUMP 35
-#define R_MIPS_RELGOT 36
-#define R_MIPS_JALR 37
-
-/*
- * TLS relocations
- */
-#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */
-#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
-#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */
-#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
-#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */
-#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */
-#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
-#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
-#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */
-#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
-#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
-#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
-#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
-
-#define R_MIPS_max 51
-#define R_TYPE(name) __CONCAT(R_MIPS_,name)
+#define ELF_ARCH EM_MIPS
+#define ELF_ARCH32 EM_MIPS
/* Define "machine" characteristics */
#if __ELF_WORD_SIZE == 32
@@ -290,4 +152,137 @@ __ElfType(Auxinfo);
*/
#define SYMTAB_MAGIC 0x64656267
-#endif /* !_MACHINE_ELF_H_ */
+/* from NetBSD's sys/mips/include/elf_machdep.h $NetBSD: elf_machdep.h,v 1.18 2013/05/23 21:39:49 christos Exp $ */
+
+/* mips relocs. */
+
+#define R_MIPS_NONE 0
+#define R_MIPS_16 1
+#define R_MIPS_32 2
+#define R_MIPS_REL32 3
+#define R_MIPS_REL R_MIPS_REL32
+#define R_MIPS_26 4
+#define R_MIPS_HI16 5 /* high 16 bits of symbol value */
+#define R_MIPS_LO16 6 /* low 16 bits of symbol value */
+#define R_MIPS_GPREL16 7 /* GP-relative reference */
+#define R_MIPS_LITERAL 8 /* Reference to literal section */
+#define R_MIPS_GOT16 9 /* Reference to global offset table */
+#define R_MIPS_GOT R_MIPS_GOT16
+#define R_MIPS_PC16 10 /* 16 bit PC relative reference */
+#define R_MIPS_CALL16 11 /* 16 bit call thru glbl offset tbl */
+#define R_MIPS_CALL R_MIPS_CALL16
+#define R_MIPS_GPREL32 12
+
+/* 13, 14, 15 are not defined at this point. */
+#define R_MIPS_UNUSED1 13
+#define R_MIPS_UNUSED2 14
+#define R_MIPS_UNUSED3 15
+
+/*
+ * The remaining relocs are apparently part of the 64-bit Irix ELF ABI.
+ */
+#define R_MIPS_SHIFT5 16
+#define R_MIPS_SHIFT6 17
+
+#define R_MIPS_64 18
+#define R_MIPS_GOT_DISP 19
+#define R_MIPS_GOT_PAGE 20
+#define R_MIPS_GOT_OFST 21
+#define R_MIPS_GOT_HI16 22
+#define R_MIPS_GOT_LO16 23
+#define R_MIPS_SUB 24
+#define R_MIPS_INSERT_A 25
+#define R_MIPS_INSERT_B 26
+#define R_MIPS_DELETE 27
+#define R_MIPS_HIGHER 28
+#define R_MIPS_HIGHEST 29
+#define R_MIPS_CALL_HI16 30
+#define R_MIPS_CALL_LO16 31
+#define R_MIPS_SCN_DISP 32
+#define R_MIPS_REL16 33
+#define R_MIPS_ADD_IMMEDIATE 34
+#define R_MIPS_PJUMP 35
+#define R_MIPS_RELGOT 36
+#define R_MIPS_JALR 37
+/* TLS relocations */
+
+#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */
+#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
+#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */
+#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
+#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */
+#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */
+#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
+#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
+#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */
+#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
+#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
+#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
+#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
+
+#define R_MIPS_max 51
+
+#define R_TYPE(name) __CONCAT(R_MIPS_,name)
+
+#define R_MIPS16_min 100
+#define R_MIPS16_26 100
+#define R_MIPS16_GPREL 101
+#define R_MIPS16_GOT16 102
+#define R_MIPS16_CALL16 103
+#define R_MIPS16_HI16 104
+#define R_MIPS16_LO16 105
+#define R_MIPS16_max 106
+
+#define R_MIPS_COPY 126
+#define R_MIPS_JUMP_SLOT 127
+
+/* mips dynamic tags */
+
+#define DT_MIPS_RLD_VERSION 0x70000001
+#define DT_MIPS_TIME_STAMP 0x70000002
+#define DT_MIPS_ICHECKSUM 0x70000003
+#define DT_MIPS_IVERSION 0x70000004
+#define DT_MIPS_FLAGS 0x70000005
+#define DT_MIPS_BASE_ADDRESS 0x70000006
+#define DT_MIPS_CONFLICT 0x70000008
+#define DT_MIPS_LIBLIST 0x70000009
+#define DT_MIPS_CONFLICTNO 0x7000000b
+#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* number of local got ents */
+#define DT_MIPS_LIBLISTNO 0x70000010
+#define DT_MIPS_SYMTABNO 0x70000011 /* number of .dynsym entries */
+#define DT_MIPS_UNREFEXTNO 0x70000012
+#define DT_MIPS_GOTSYM 0x70000013 /* first dynamic sym in got */
+#define DT_MIPS_HIPAGENO 0x70000014
+#define DT_MIPS_RLD_MAP 0x70000016 /* address of loader map */
+#define DT_MIPS_PLTGOT 0x70000032
+#define DT_MIPS_RWPLT 0x70000034
+
+/*
+ * ELF Flags
+ */
+#define EF_MIPS_PIC 0x00000002 /* Contains PIC code */
+#define EF_MIPS_CPIC 0x00000004 /* STD PIC calling sequence */
+#define EF_MIPS_ABI2 0x00000020 /* N32 */
+
+#define EF_MIPS_ARCH_ASE 0x0f000000 /* Architectural extensions */
+#define EF_MIPS_ARCH_MDMX 0x08000000 /* MDMX multimedia extension */
+#define EF_MIPS_ARCH_M16 0x04000000 /* MIPS-16 ISA extensions */
+
+#define EF_MIPS_ARCH 0xf0000000 /* Architecture field */
+#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code */
+#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code */
+#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code */
+#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code */
+#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code */
+#define EF_MIPS_ARCH_32 0x50000000 /* -mips32 code */
+#define EF_MIPS_ARCH_64 0x60000000 /* -mips64 code */
+#define EF_MIPS_ARCH_32R2 0x70000000 /* -mips32r2 code */
+#define EF_MIPS_ARCH_64R2 0x80000000 /* -mips64r2 code */
+
+#define EF_MIPS_ABI 0x0000f000
+#define EF_MIPS_ABI_O32 0x00001000
+#define EF_MIPS_ABI_O64 0x00002000
+#define EF_MIPS_ABI_EABI32 0x00003000
+#define EF_MIPS_ABI_EABI64 0x00004000
+
+#endif /* __MIPS_ELF_H */
diff --git a/sys/mips/mips/uio_machdep.c b/sys/mips/mips/uio_machdep.c
index 10aa1d6..7fa922b 100644
--- a/sys/mips/mips/uio_machdep.c
+++ b/sys/mips/mips/uio_machdep.c
@@ -39,12 +39,12 @@
__FBSDID("$FreeBSD$");
#include <sys/param.h>
+#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/proc.h>
#include <sys/sf_buf.h>
-#include <sys/systm.h>
#include <sys/uio.h>
#include <vm/vm.h>
diff --git a/sys/mips/mips/vm_machdep.c b/sys/mips/mips/vm_machdep.c
index 4c2460a..0323bb3 100644
--- a/sys/mips/mips/vm_machdep.c
+++ b/sys/mips/mips/vm_machdep.c
@@ -540,7 +540,7 @@ sf_buf_alloc(struct vm_page *m, int flags)
if (flags & SFB_NOWAIT)
break;
sf_buf_alloc_want++;
- mbstat.sf_allocwait++;
+ SFSTAT_INC(sf_allocwait);
error = msleep(&sf_freelist, &sf_freelist.sf_lock,
(flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0);
sf_buf_alloc_want--;
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