diff options
Diffstat (limited to 'sys/i386/include/specialreg.h')
| -rw-r--r-- | sys/i386/include/specialreg.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/sys/i386/include/specialreg.h b/sys/i386/include/specialreg.h index e791a70..cbcc0fa 100644 --- a/sys/i386/include/specialreg.h +++ b/sys/i386/include/specialreg.h @@ -273,6 +273,7 @@ #define MSR_MTRR16kBase 0x258 #define MSR_MTRR4kBase 0x268 #define MSR_PAT 0x277 +#define MSR_MC0_CTL2 0x280 #define MSR_MTRRdefType 0x2ff #define MSR_MC0_CTL 0x400 #define MSR_MC0_STATUS 0x401 @@ -421,8 +422,10 @@ #define MCG_CAP_COUNT 0x000000ff #define MCG_CAP_CTL_P 0x00000100 #define MCG_CAP_EXT_P 0x00000200 +#define MCG_CAP_CMCI_P 0x00000400 #define MCG_CAP_TES_P 0x00000800 #define MCG_CAP_EXT_CNT 0x00ff0000 +#define MCG_CAP_SER_P 0x01000000 #define MCG_STATUS_RIPV 0x00000001 #define MCG_STATUS_EIPV 0x00000002 #define MCG_STATUS_MCIP 0x00000004 @@ -432,9 +435,14 @@ #define MSR_MC_STATUS(x) (MSR_MC0_STATUS + (x) * 4) #define MSR_MC_ADDR(x) (MSR_MC0_ADDR + (x) * 4) #define MSR_MC_MISC(x) (MSR_MC0_MISC + (x) * 4) +#define MSR_MC_CTL2(x) (MSR_MC0_CTL2 + (x)) /* If MCG_CAP_CMCI_P */ #define MC_STATUS_MCA_ERROR 0x000000000000ffffULL #define MC_STATUS_MODEL_ERROR 0x00000000ffff0000ULL #define MC_STATUS_OTHER_INFO 0x01ffffff00000000ULL +#define MC_STATUS_COR_COUNT 0x001fffc000000000ULL /* If MCG_CAP_TES_P */ +#define MC_STATUS_TES_STATUS 0x0060000000000000ULL /* If MCG_CAP_TES_P */ +#define MC_STATUS_AR 0x0080000000000000ULL /* If MCG_CAP_CMCI_P */ +#define MC_STATUS_S 0x0100000000000000ULL /* If MCG_CAP_CMCI_P */ #define MC_STATUS_PCC 0x0200000000000000ULL #define MC_STATUS_ADDRV 0x0400000000000000ULL #define MC_STATUS_MISCV 0x0800000000000000ULL @@ -442,6 +450,10 @@ #define MC_STATUS_UC 0x2000000000000000ULL #define MC_STATUS_OVER 0x4000000000000000ULL #define MC_STATUS_VAL 0x8000000000000000ULL +#define MC_MISC_RA_LSB 0x000000000000003fULL /* If MCG_CAP_SER_P */ +#define MC_MISC_ADDRESS_MODE 0x00000000000001c0ULL /* If MCG_CAP_SER_P */ +#define MC_CTL2_THRESHOLD 0x0000000000003fffULL +#define MC_CTL2_CMCI_EN 0x0000000040000000ULL /* * The following four 3-byte registers control the non-cacheable regions. |
