diff options
Diffstat (limited to 'sys/gnu/dts/arm/qcom-apq8084.dtsi')
| -rw-r--r-- | sys/gnu/dts/arm/qcom-apq8084.dtsi | 230 |
1 files changed, 0 insertions, 230 deletions
diff --git a/sys/gnu/dts/arm/qcom-apq8084.dtsi b/sys/gnu/dts/arm/qcom-apq8084.dtsi deleted file mode 100644 index 1f130bc..0000000 --- a/sys/gnu/dts/arm/qcom-apq8084.dtsi +++ /dev/null @@ -1,230 +0,0 @@ -/dts-v1/; - -#include "skeleton.dtsi" - -#include <dt-bindings/clock/qcom,gcc-apq8084.h> -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Qualcomm APQ 8084"; - compatible = "qcom,apq8084"; - interrupt-parent = <&intc>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "qcom,krait"; - reg = <0>; - enable-method = "qcom,kpss-acc-v2"; - next-level-cache = <&L2>; - qcom,acc = <&acc0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "qcom,krait"; - reg = <1>; - enable-method = "qcom,kpss-acc-v2"; - next-level-cache = <&L2>; - qcom,acc = <&acc1>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "qcom,krait"; - reg = <2>; - enable-method = "qcom,kpss-acc-v2"; - next-level-cache = <&L2>; - qcom,acc = <&acc2>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "qcom,krait"; - reg = <3>; - enable-method = "qcom,kpss-acc-v2"; - next-level-cache = <&L2>; - qcom,acc = <&acc3>; - }; - - L2: l2-cache { - compatible = "qcom,arch-cache"; - cache-level = <2>; - qcom,saw = <&saw_l2>; - }; - }; - - cpu-pmu { - compatible = "qcom,krait-pmu"; - interrupts = <1 7 0xf04>; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 2 0xf08>, - <1 3 0xf08>, - <1 4 0xf08>, - <1 1 0xf08>; - clock-frequency = <19200000>; - }; - - soc: soc { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "simple-bus"; - - intc: interrupt-controller@f9000000 { - compatible = "qcom,msm-qgic2"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0xf9000000 0x1000>, - <0xf9002000 0x1000>; - }; - - timer@f9020000 { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "arm,armv7-timer-mem"; - reg = <0xf9020000 0x1000>; - clock-frequency = <19200000>; - - frame@f9021000 { - frame-number = <0>; - interrupts = <0 8 0x4>, - <0 7 0x4>; - reg = <0xf9021000 0x1000>, - <0xf9022000 0x1000>; - }; - - frame@f9023000 { - frame-number = <1>; - interrupts = <0 9 0x4>; - reg = <0xf9023000 0x1000>; - status = "disabled"; - }; - - frame@f9024000 { - frame-number = <2>; - interrupts = <0 10 0x4>; - reg = <0xf9024000 0x1000>; - status = "disabled"; - }; - - frame@f9025000 { - frame-number = <3>; - interrupts = <0 11 0x4>; - reg = <0xf9025000 0x1000>; - status = "disabled"; - }; - - frame@f9026000 { - frame-number = <4>; - interrupts = <0 12 0x4>; - reg = <0xf9026000 0x1000>; - status = "disabled"; - }; - - frame@f9027000 { - frame-number = <5>; - interrupts = <0 13 0x4>; - reg = <0xf9027000 0x1000>; - status = "disabled"; - }; - - frame@f9028000 { - frame-number = <6>; - interrupts = <0 14 0x4>; - reg = <0xf9028000 0x1000>; - status = "disabled"; - }; - }; - - saw_l2: regulator@f9012000 { - compatible = "qcom,saw2"; - reg = <0xf9012000 0x1000>; - regulator; - }; - - acc0: clock-controller@f9088000 { - compatible = "qcom,kpss-acc-v2"; - reg = <0xf9088000 0x1000>, - <0xf9008000 0x1000>; - }; - - acc1: clock-controller@f9098000 { - compatible = "qcom,kpss-acc-v2"; - reg = <0xf9098000 0x1000>, - <0xf9008000 0x1000>; - }; - - acc2: clock-controller@f90a8000 { - compatible = "qcom,kpss-acc-v2"; - reg = <0xf90a8000 0x1000>, - <0xf9008000 0x1000>; - }; - - acc3: clock-controller@f90b8000 { - compatible = "qcom,kpss-acc-v2"; - reg = <0xf90b8000 0x1000>, - <0xf9008000 0x1000>; - }; - - restart@fc4ab000 { - compatible = "qcom,pshold"; - reg = <0xfc4ab000 0x4>; - }; - - gcc: clock-controller@fc400000 { - compatible = "qcom,gcc-apq8084"; - #clock-cells = <1>; - #reset-cells = <1>; - reg = <0xfc400000 0x4000>; - }; - - tlmm: pinctrl@fd510000 { - compatible = "qcom,apq8084-pinctrl"; - reg = <0xfd510000 0x4000>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <0 208 0>; - }; - - serial@f995e000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0xf995e000 0x1000>; - interrupts = <0 114 0x0>; - clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; - - sdhci@f9824900 { - compatible = "qcom,sdhci-msm-v4"; - reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; - reg-names = "hc_mem", "core_mem"; - interrupts = <0 123 0>, <0 138 0>; - interrupt-names = "hc_irq", "pwr_irq"; - clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; - - sdhci@f98a4900 { - compatible = "qcom,sdhci-msm-v4"; - reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; - reg-names = "hc_mem", "core_mem"; - interrupts = <0 125 0>, <0 221 0>; - interrupt-names = "hc_irq", "pwr_irq"; - clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; - }; -}; |
