diff options
Diffstat (limited to 'sys/dev')
36 files changed, 0 insertions, 49045 deletions
diff --git a/sys/dev/agp/agp.c b/sys/dev/agp/agp.c deleted file mode 100644 index a31c4d0..0000000 --- a/sys/dev/agp/agp.c +++ /dev/null @@ -1,930 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/conf.h> -#include <sys/ioccom.h> -#include <sys/agpio.h> -#include <sys/lock.h> -#include <sys/mutex.h> -#include <sys/proc.h> - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpvar.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/vm_page.h> -#include <vm/vm_pageout.h> -#include <vm/pmap.h> - -#include <machine/md_var.h> -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - -MODULE_VERSION(agp, 1); - -MALLOC_DEFINE(M_AGP, "agp", "AGP data structures"); - - /* agp_drv.c */ -static d_open_t agp_open; -static d_close_t agp_close; -static d_ioctl_t agp_ioctl; -static d_mmap_t agp_mmap; - -static struct cdevsw agp_cdevsw = { - .d_version = D_VERSION, - .d_flags = D_NEEDGIANT, - .d_open = agp_open, - .d_close = agp_close, - .d_ioctl = agp_ioctl, - .d_mmap = agp_mmap, - .d_name = "agp", -}; - -static devclass_t agp_devclass; -#define KDEV2DEV(kdev) devclass_get_device(agp_devclass, minor(kdev)) - -/* Helper functions for implementing chipset mini drivers. */ - -void -agp_flush_cache() -{ -#if defined(__i386__) || defined(__amd64__) - wbinvd(); -#endif -#ifdef __alpha__ - /* FIXME: This is most likely not correct as it doesn't flush CPU - * write caches, but we don't have a facility to do that and - * this is all linux does, too */ - alpha_mb(); -#endif -} - -u_int8_t -agp_find_caps(device_t dev) -{ - u_int32_t status; - u_int8_t ptr, next; - - /* - * Check the CAP_LIST bit of the PCI status register first. - */ - status = pci_read_config(dev, PCIR_STATUS, 2); - if (!(status & 0x10)) - return 0; - - /* - * Traverse the capabilities list. - */ - for (ptr = pci_read_config(dev, AGP_CAPPTR, 1); - ptr != 0; - ptr = next) { - u_int32_t capid = pci_read_config(dev, ptr, 4); - next = AGP_CAPID_GET_NEXT_PTR(capid); - - /* - * If this capability entry ID is 2, then we are done. - */ - if (AGP_CAPID_GET_CAP_ID(capid) == 2) - return ptr; - } - - return 0; -} - -/* - * Find an AGP display device (if any). - */ -static device_t -agp_find_display(void) -{ - devclass_t pci = devclass_find("pci"); - device_t bus, dev = 0; - device_t *kids; - int busnum, numkids, i; - - for (busnum = 0; busnum < devclass_get_maxunit(pci); busnum++) { - bus = devclass_get_device(pci, busnum); - if (!bus) - continue; - device_get_children(bus, &kids, &numkids); - for (i = 0; i < numkids; i++) { - dev = kids[i]; - if (pci_get_class(dev) == PCIC_DISPLAY - && pci_get_subclass(dev) == PCIS_DISPLAY_VGA) - if (agp_find_caps(dev)) { - free(kids, M_TEMP); - return dev; - } - - } - free(kids, M_TEMP); - } - - return 0; -} - -struct agp_gatt * -agp_alloc_gatt(device_t dev) -{ - u_int32_t apsize = AGP_GET_APERTURE(dev); - u_int32_t entries = apsize >> AGP_PAGE_SHIFT; - struct agp_gatt *gatt; - - if (bootverbose) - device_printf(dev, - "allocating GATT for aperture of size %dM\n", - apsize / (1024*1024)); - - if (entries == 0) { - device_printf(dev, "bad aperture size\n"); - return NULL; - } - - gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); - if (!gatt) - return 0; - - gatt->ag_entries = entries; - gatt->ag_virtual = contigmalloc(entries * sizeof(u_int32_t), M_AGP, 0, - 0, ~0, PAGE_SIZE, 0); - if (!gatt->ag_virtual) { - if (bootverbose) - device_printf(dev, "contiguous allocation failed\n"); - free(gatt, M_AGP); - return 0; - } - bzero(gatt->ag_virtual, entries * sizeof(u_int32_t)); - gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); - agp_flush_cache(); - - return gatt; -} - -void -agp_free_gatt(struct agp_gatt *gatt) -{ - contigfree(gatt->ag_virtual, - gatt->ag_entries * sizeof(u_int32_t), M_AGP); - free(gatt, M_AGP); -} - -static int agp_max[][2] = { - {0, 0}, - {32, 4}, - {64, 28}, - {128, 96}, - {256, 204}, - {512, 440}, - {1024, 942}, - {2048, 1920}, - {4096, 3932} -}; -#define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) - -int -agp_generic_attach(device_t dev) -{ - struct agp_softc *sc = device_get_softc(dev); - int rid, memsize, i; - - /* - * Find and map the aperture. - */ - rid = AGP_APBASE; - sc->as_aperture = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->as_aperture) - return ENOMEM; - - /* - * Work out an upper bound for agp memory allocation. This - * uses a heurisitc table from the Linux driver. - */ - memsize = ptoa(Maxmem) >> 20; - for (i = 0; i < agp_max_size; i++) { - if (memsize <= agp_max[i][0]) - break; - } - if (i == agp_max_size) i = agp_max_size - 1; - sc->as_maxmem = agp_max[i][1] << 20U; - - /* - * The lock is used to prevent re-entry to - * agp_generic_bind_memory() since that function can sleep. - */ - mtx_init(&sc->as_lock, "agp lock", NULL, MTX_DEF); - - /* - * Initialise stuff for the userland device. - */ - agp_devclass = devclass_find("agp"); - TAILQ_INIT(&sc->as_memory); - sc->as_nextid = 1; - - sc->as_devnode = make_dev(&agp_cdevsw, - device_get_unit(dev), - UID_ROOT, - GID_WHEEL, - 0600, - "agpgart"); - - return 0; -} - -int -agp_generic_detach(device_t dev) -{ - struct agp_softc *sc = device_get_softc(dev); - bus_release_resource(dev, SYS_RES_MEMORY, AGP_APBASE, sc->as_aperture); - mtx_destroy(&sc->as_lock); - destroy_dev(sc->as_devnode); - agp_flush_cache(); - return 0; -} - -/* - * This does the enable logic for v3, with the same topology - * restrictions as in place for v2 -- one bus, one device on the bus. - */ -static int -agp_v3_enable(device_t dev, device_t mdev, u_int32_t mode) -{ - u_int32_t tstatus, mstatus; - u_int32_t command; - int rq, sba, fw, rate, arqsz, cal; - - tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); - mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); - - /* Set RQ to the min of mode, tstatus and mstatus */ - rq = AGP_MODE_GET_RQ(mode); - if (AGP_MODE_GET_RQ(tstatus) < rq) - rq = AGP_MODE_GET_RQ(tstatus); - if (AGP_MODE_GET_RQ(mstatus) < rq) - rq = AGP_MODE_GET_RQ(mstatus); - - /* - * ARQSZ - Set the value to the maximum one. - * Don't allow the mode register to override values. - */ - arqsz = AGP_MODE_GET_ARQSZ(mode); - if (AGP_MODE_GET_ARQSZ(tstatus) > rq) - rq = AGP_MODE_GET_ARQSZ(tstatus); - if (AGP_MODE_GET_ARQSZ(mstatus) > rq) - rq = AGP_MODE_GET_ARQSZ(mstatus); - - /* Calibration cycle - don't allow override by mode register */ - cal = AGP_MODE_GET_CAL(tstatus); - if (AGP_MODE_GET_CAL(mstatus) < cal) - cal = AGP_MODE_GET_CAL(mstatus); - - /* SBA must be supported for AGP v3. */ - sba = 1; - - /* Set FW if all three support it. */ - fw = (AGP_MODE_GET_FW(tstatus) - & AGP_MODE_GET_FW(mstatus) - & AGP_MODE_GET_FW(mode)); - - /* Figure out the max rate */ - rate = (AGP_MODE_GET_RATE(tstatus) - & AGP_MODE_GET_RATE(mstatus) - & AGP_MODE_GET_RATE(mode)); - if (rate & AGP_MODE_V3_RATE_8x) - rate = AGP_MODE_V3_RATE_8x; - else - rate = AGP_MODE_V3_RATE_4x; - if (bootverbose) - device_printf(dev, "Setting AGP v3 mode %d\n", rate * 4); - - pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, 0, 4); - - /* Construct the new mode word and tell the hardware */ - command = AGP_MODE_SET_RQ(0, rq); - command = AGP_MODE_SET_ARQSZ(command, arqsz); - command = AGP_MODE_SET_CAL(command, cal); - command = AGP_MODE_SET_SBA(command, sba); - command = AGP_MODE_SET_FW(command, fw); - command = AGP_MODE_SET_RATE(command, rate); - command = AGP_MODE_SET_AGP(command, 1); - pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); - pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); - - return 0; -} - -static int -agp_v2_enable(device_t dev, device_t mdev, u_int32_t mode) -{ - u_int32_t tstatus, mstatus; - u_int32_t command; - int rq, sba, fw, rate; - - tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); - mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); - - /* Set RQ to the min of mode, tstatus and mstatus */ - rq = AGP_MODE_GET_RQ(mode); - if (AGP_MODE_GET_RQ(tstatus) < rq) - rq = AGP_MODE_GET_RQ(tstatus); - if (AGP_MODE_GET_RQ(mstatus) < rq) - rq = AGP_MODE_GET_RQ(mstatus); - - /* Set SBA if all three can deal with SBA */ - sba = (AGP_MODE_GET_SBA(tstatus) - & AGP_MODE_GET_SBA(mstatus) - & AGP_MODE_GET_SBA(mode)); - - /* Similar for FW */ - fw = (AGP_MODE_GET_FW(tstatus) - & AGP_MODE_GET_FW(mstatus) - & AGP_MODE_GET_FW(mode)); - - /* Figure out the max rate */ - rate = (AGP_MODE_GET_RATE(tstatus) - & AGP_MODE_GET_RATE(mstatus) - & AGP_MODE_GET_RATE(mode)); - if (rate & AGP_MODE_V2_RATE_4x) - rate = AGP_MODE_V2_RATE_4x; - else if (rate & AGP_MODE_V2_RATE_2x) - rate = AGP_MODE_V2_RATE_2x; - else - rate = AGP_MODE_V2_RATE_1x; - if (bootverbose) - device_printf(dev, "Setting AGP v2 mode %d\n", rate); - - /* Construct the new mode word and tell the hardware */ - command = AGP_MODE_SET_RQ(0, rq); - command = AGP_MODE_SET_SBA(command, sba); - command = AGP_MODE_SET_FW(command, fw); - command = AGP_MODE_SET_RATE(command, rate); - command = AGP_MODE_SET_AGP(command, 1); - pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); - pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); - - return 0; -} - -int -agp_generic_enable(device_t dev, u_int32_t mode) -{ - device_t mdev = agp_find_display(); - u_int32_t tstatus, mstatus; - - if (!mdev) { - AGP_DPF("can't find display\n"); - return ENXIO; - } - - tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); - mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); - - /* - * Check display and bridge for AGP v3 support. AGP v3 allows - * more variety in topology than v2, e.g. multiple AGP devices - * attached to one bridge, or multiple AGP bridges in one - * system. This doesn't attempt to address those situations, - * but should work fine for a classic single AGP slot system - * with AGP v3. - */ - if (AGP_MODE_GET_MODE_3(tstatus) && AGP_MODE_GET_MODE_3(mstatus)) - return (agp_v3_enable(dev, mdev, mode)); - else - return (agp_v2_enable(dev, mdev, mode)); -} - -struct agp_memory * -agp_generic_alloc_memory(device_t dev, int type, vm_size_t size) -{ - struct agp_softc *sc = device_get_softc(dev); - struct agp_memory *mem; - - if ((size & (AGP_PAGE_SIZE - 1)) != 0) - return 0; - - if (sc->as_allocated + size > sc->as_maxmem) - return 0; - - if (type != 0) { - printf("agp_generic_alloc_memory: unsupported type %d\n", - type); - return 0; - } - - mem = malloc(sizeof *mem, M_AGP, M_WAITOK); - mem->am_id = sc->as_nextid++; - mem->am_size = size; - mem->am_type = 0; - mem->am_obj = vm_object_allocate(OBJT_DEFAULT, atop(round_page(size))); - mem->am_physical = 0; - mem->am_offset = 0; - mem->am_is_bound = 0; - TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); - sc->as_allocated += size; - - return mem; -} - -int -agp_generic_free_memory(device_t dev, struct agp_memory *mem) -{ - struct agp_softc *sc = device_get_softc(dev); - - if (mem->am_is_bound) - return EBUSY; - - sc->as_allocated -= mem->am_size; - TAILQ_REMOVE(&sc->as_memory, mem, am_link); - vm_object_deallocate(mem->am_obj); - free(mem, M_AGP); - return 0; -} - -int -agp_generic_bind_memory(device_t dev, struct agp_memory *mem, - vm_offset_t offset) -{ - struct agp_softc *sc = device_get_softc(dev); - vm_offset_t i, j, k; - vm_page_t m; - int error; - - /* Do some sanity checks first. */ - if (offset < 0 || (offset & (AGP_PAGE_SIZE - 1)) != 0 || - offset + mem->am_size > AGP_GET_APERTURE(dev)) { - device_printf(dev, "binding memory at bad offset %#x\n", - (int)offset); - return EINVAL; - } - - /* - * Allocate the pages early, before acquiring the lock, - * because vm_page_grab() used with VM_ALLOC_RETRY may - * block and we can't hold a mutex while blocking. - */ - VM_OBJECT_LOCK(mem->am_obj); - for (i = 0; i < mem->am_size; i += PAGE_SIZE) { - /* - * Find a page from the object and wire it - * down. This page will be mapped using one or more - * entries in the GATT (assuming that PAGE_SIZE >= - * AGP_PAGE_SIZE. If this is the first call to bind, - * the pages will be allocated and zeroed. - */ - m = vm_page_grab(mem->am_obj, OFF_TO_IDX(i), - VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY); - AGP_DPF("found page pa=%#x\n", VM_PAGE_TO_PHYS(m)); - } - VM_OBJECT_UNLOCK(mem->am_obj); - - mtx_lock(&sc->as_lock); - - if (mem->am_is_bound) { - device_printf(dev, "memory already bound\n"); - error = EINVAL; - VM_OBJECT_LOCK(mem->am_obj); - goto bad; - } - - /* - * Bind the individual pages and flush the chipset's - * TLB. - * - * XXX Presumably, this needs to be the pci address on alpha - * (i.e. use alpha_XXX_dmamap()). I don't have access to any - * alpha AGP hardware to check. - */ - VM_OBJECT_LOCK(mem->am_obj); - for (i = 0; i < mem->am_size; i += PAGE_SIZE) { - m = vm_page_lookup(mem->am_obj, OFF_TO_IDX(i)); - - /* - * Install entries in the GATT, making sure that if - * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not - * aligned to PAGE_SIZE, we don't modify too many GATT - * entries. - */ - for (j = 0; j < PAGE_SIZE && i + j < mem->am_size; - j += AGP_PAGE_SIZE) { - vm_offset_t pa = VM_PAGE_TO_PHYS(m) + j; - AGP_DPF("binding offset %#x to pa %#x\n", - offset + i + j, pa); - error = AGP_BIND_PAGE(dev, offset + i + j, pa); - if (error) { - /* - * Bail out. Reverse all the mappings - * and unwire the pages. - */ - vm_page_lock_queues(); - vm_page_wakeup(m); - vm_page_unlock_queues(); - for (k = 0; k < i + j; k += AGP_PAGE_SIZE) - AGP_UNBIND_PAGE(dev, offset + k); - goto bad; - } - } - vm_page_lock_queues(); - vm_page_wakeup(m); - vm_page_unlock_queues(); - } - VM_OBJECT_UNLOCK(mem->am_obj); - - /* - * Flush the cpu cache since we are providing a new mapping - * for these pages. - */ - agp_flush_cache(); - - /* - * Make sure the chipset gets the new mappings. - */ - AGP_FLUSH_TLB(dev); - - mem->am_offset = offset; - mem->am_is_bound = 1; - - mtx_unlock(&sc->as_lock); - - return 0; -bad: - mtx_unlock(&sc->as_lock); - VM_OBJECT_LOCK_ASSERT(mem->am_obj, MA_OWNED); - for (i = 0; i < mem->am_size; i += PAGE_SIZE) { - m = vm_page_lookup(mem->am_obj, OFF_TO_IDX(i)); - vm_page_lock_queues(); - vm_page_unwire(m, 0); - vm_page_unlock_queues(); - } - VM_OBJECT_UNLOCK(mem->am_obj); - - return error; -} - -int -agp_generic_unbind_memory(device_t dev, struct agp_memory *mem) -{ - struct agp_softc *sc = device_get_softc(dev); - vm_page_t m; - int i; - - mtx_lock(&sc->as_lock); - - if (!mem->am_is_bound) { - device_printf(dev, "memory is not bound\n"); - mtx_unlock(&sc->as_lock); - return EINVAL; - } - - - /* - * Unbind the individual pages and flush the chipset's - * TLB. Unwire the pages so they can be swapped. - */ - for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) - AGP_UNBIND_PAGE(dev, mem->am_offset + i); - VM_OBJECT_LOCK(mem->am_obj); - for (i = 0; i < mem->am_size; i += PAGE_SIZE) { - m = vm_page_lookup(mem->am_obj, atop(i)); - vm_page_lock_queues(); - vm_page_unwire(m, 0); - vm_page_unlock_queues(); - } - VM_OBJECT_UNLOCK(mem->am_obj); - - agp_flush_cache(); - AGP_FLUSH_TLB(dev); - - mem->am_offset = 0; - mem->am_is_bound = 0; - - mtx_unlock(&sc->as_lock); - - return 0; -} - -/* Helper functions for implementing user/kernel api */ - -static int -agp_acquire_helper(device_t dev, enum agp_acquire_state state) -{ - struct agp_softc *sc = device_get_softc(dev); - - if (sc->as_state != AGP_ACQUIRE_FREE) - return EBUSY; - sc->as_state = state; - - return 0; -} - -static int -agp_release_helper(device_t dev, enum agp_acquire_state state) -{ - struct agp_softc *sc = device_get_softc(dev); - - if (sc->as_state == AGP_ACQUIRE_FREE) - return 0; - - if (sc->as_state != state) - return EBUSY; - - sc->as_state = AGP_ACQUIRE_FREE; - return 0; -} - -static struct agp_memory * -agp_find_memory(device_t dev, int id) -{ - struct agp_softc *sc = device_get_softc(dev); - struct agp_memory *mem; - - AGP_DPF("searching for memory block %d\n", id); - TAILQ_FOREACH(mem, &sc->as_memory, am_link) { - AGP_DPF("considering memory block %d\n", mem->am_id); - if (mem->am_id == id) - return mem; - } - return 0; -} - -/* Implementation of the userland ioctl api */ - -static int -agp_info_user(device_t dev, agp_info *info) -{ - struct agp_softc *sc = device_get_softc(dev); - - bzero(info, sizeof *info); - info->bridge_id = pci_get_devid(dev); - info->agp_mode = - pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); - info->aper_base = rman_get_start(sc->as_aperture); - info->aper_size = AGP_GET_APERTURE(dev) >> 20; - info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; - info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; - - return 0; -} - -static int -agp_setup_user(device_t dev, agp_setup *setup) -{ - return AGP_ENABLE(dev, setup->agp_mode); -} - -static int -agp_allocate_user(device_t dev, agp_allocate *alloc) -{ - struct agp_memory *mem; - - mem = AGP_ALLOC_MEMORY(dev, - alloc->type, - alloc->pg_count << AGP_PAGE_SHIFT); - if (mem) { - alloc->key = mem->am_id; - alloc->physical = mem->am_physical; - return 0; - } else { - return ENOMEM; - } -} - -static int -agp_deallocate_user(device_t dev, int id) -{ - struct agp_memory *mem = agp_find_memory(dev, id);; - - if (mem) { - AGP_FREE_MEMORY(dev, mem); - return 0; - } else { - return ENOENT; - } -} - -static int -agp_bind_user(device_t dev, agp_bind *bind) -{ - struct agp_memory *mem = agp_find_memory(dev, bind->key); - - if (!mem) - return ENOENT; - - return AGP_BIND_MEMORY(dev, mem, bind->pg_start << AGP_PAGE_SHIFT); -} - -static int -agp_unbind_user(device_t dev, agp_unbind *unbind) -{ - struct agp_memory *mem = agp_find_memory(dev, unbind->key); - - if (!mem) - return ENOENT; - - return AGP_UNBIND_MEMORY(dev, mem); -} - -static int -agp_open(struct cdev *kdev, int oflags, int devtype, struct thread *td) -{ - device_t dev = KDEV2DEV(kdev); - struct agp_softc *sc = device_get_softc(dev); - - if (!sc->as_isopen) { - sc->as_isopen = 1; - device_busy(dev); - } - - return 0; -} - -static int -agp_close(struct cdev *kdev, int fflag, int devtype, struct thread *td) -{ - device_t dev = KDEV2DEV(kdev); - struct agp_softc *sc = device_get_softc(dev); - struct agp_memory *mem; - - /* - * Clear the GATT and force release on last close - */ - while ((mem = TAILQ_FIRST(&sc->as_memory)) != 0) { - if (mem->am_is_bound) - AGP_UNBIND_MEMORY(dev, mem); - AGP_FREE_MEMORY(dev, mem); - } - if (sc->as_state == AGP_ACQUIRE_USER) - agp_release_helper(dev, AGP_ACQUIRE_USER); - sc->as_isopen = 0; - device_unbusy(dev); - - return 0; -} - -static int -agp_ioctl(struct cdev *kdev, u_long cmd, caddr_t data, int fflag, struct thread *td) -{ - device_t dev = KDEV2DEV(kdev); - - switch (cmd) { - case AGPIOC_INFO: - return agp_info_user(dev, (agp_info *) data); - - case AGPIOC_ACQUIRE: - return agp_acquire_helper(dev, AGP_ACQUIRE_USER); - - case AGPIOC_RELEASE: - return agp_release_helper(dev, AGP_ACQUIRE_USER); - - case AGPIOC_SETUP: - return agp_setup_user(dev, (agp_setup *)data); - - case AGPIOC_ALLOCATE: - return agp_allocate_user(dev, (agp_allocate *)data); - - case AGPIOC_DEALLOCATE: - return agp_deallocate_user(dev, *(int *) data); - - case AGPIOC_BIND: - return agp_bind_user(dev, (agp_bind *)data); - - case AGPIOC_UNBIND: - return agp_unbind_user(dev, (agp_unbind *)data); - - } - - return EINVAL; -} - -static int -agp_mmap(struct cdev *kdev, vm_offset_t offset, vm_paddr_t *paddr, int prot) -{ - device_t dev = KDEV2DEV(kdev); - struct agp_softc *sc = device_get_softc(dev); - - if (offset > AGP_GET_APERTURE(dev)) - return -1; - *paddr = rman_get_start(sc->as_aperture) + offset; - return 0; -} - -/* Implementation of the kernel api */ - -device_t -agp_find_device() -{ - if (!agp_devclass) - return 0; - return devclass_get_device(agp_devclass, 0); -} - -enum agp_acquire_state -agp_state(device_t dev) -{ - struct agp_softc *sc = device_get_softc(dev); - return sc->as_state; -} - -void -agp_get_info(device_t dev, struct agp_info *info) -{ - struct agp_softc *sc = device_get_softc(dev); - - info->ai_mode = - pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); - info->ai_aperture_base = rman_get_start(sc->as_aperture); - info->ai_aperture_size = rman_get_size(sc->as_aperture); - info->ai_aperture_va = (vm_offset_t) rman_get_virtual(sc->as_aperture); - info->ai_memory_allowed = sc->as_maxmem; - info->ai_memory_used = sc->as_allocated; -} - -int -agp_acquire(device_t dev) -{ - return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); -} - -int -agp_release(device_t dev) -{ - return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); -} - -int -agp_enable(device_t dev, u_int32_t mode) -{ - return AGP_ENABLE(dev, mode); -} - -void *agp_alloc_memory(device_t dev, int type, vm_size_t bytes) -{ - return (void *) AGP_ALLOC_MEMORY(dev, type, bytes); -} - -void agp_free_memory(device_t dev, void *handle) -{ - struct agp_memory *mem = (struct agp_memory *) handle; - AGP_FREE_MEMORY(dev, mem); -} - -int agp_bind_memory(device_t dev, void *handle, vm_offset_t offset) -{ - struct agp_memory *mem = (struct agp_memory *) handle; - return AGP_BIND_MEMORY(dev, mem, offset); -} - -int agp_unbind_memory(device_t dev, void *handle) -{ - struct agp_memory *mem = (struct agp_memory *) handle; - return AGP_UNBIND_MEMORY(dev, mem); -} - -void agp_memory_info(device_t dev, void *handle, struct - agp_memory_info *mi) -{ - struct agp_memory *mem = (struct agp_memory *) handle; - - mi->ami_size = mem->am_size; - mi->ami_physical = mem->am_physical; - mi->ami_offset = mem->am_offset; - mi->ami_is_bound = mem->am_is_bound; -} diff --git a/sys/dev/agp/agp_ali.c b/sys/dev/agp/agp_ali.c deleted file mode 100644 index f39476b..0000000 --- a/sys/dev/agp/agp_ali.c +++ /dev/null @@ -1,276 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/lock.h> -#include <sys/mutex.h> -#include <sys/proc.h> - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/pmap.h> - -struct agp_ali_softc { - struct agp_softc agp; - u_int32_t initial_aperture; /* aperture size at startup */ - struct agp_gatt *gatt; -}; - -static const char* -agp_ali_match(device_t dev) -{ - if (pci_get_class(dev) != PCIC_BRIDGE - || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) - return NULL; - - if (agp_find_caps(dev) == 0) - return NULL; - - switch (pci_get_devid(dev)) { - case 0x167110b9: - return ("Ali M1671 host to AGP bridge"); - case 0x154110b9: - return ("Ali M1541 host to AGP bridge"); - case 0x162110b9: - return ("Ali M1621 host to AGP bridge"); - }; - - return NULL; -} - -static int -agp_ali_probe(device_t dev) -{ - const char *desc; - - if (resource_disabled("agp", device_get_unit(dev))) - return (ENXIO); - desc = agp_ali_match(dev); - if (desc) { - device_verbose(dev); - device_set_desc(dev, desc); - return BUS_PROBE_DEFAULT; - } - - return ENXIO; -} - -static int -agp_ali_attach(device_t dev) -{ - struct agp_ali_softc *sc = device_get_softc(dev); - struct agp_gatt *gatt; - int error; - u_int32_t attbase; - - error = agp_generic_attach(dev); - if (error) - return error; - - sc->initial_aperture = AGP_GET_APERTURE(dev); - if (sc->initial_aperture == 0) { - device_printf(dev, "bad initial aperture size, disabling\n"); - return ENXIO; - } - - for (;;) { - gatt = agp_alloc_gatt(dev); - if (gatt) - break; - - /* - * Probably contigmalloc failure. Try reducing the - * aperture so that the gatt size reduces. - */ - if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { - agp_generic_detach(dev); - return ENOMEM; - } - } - sc->gatt = gatt; - - /* Install the gatt. */ - attbase = pci_read_config(dev, AGP_ALI_ATTBASE, 4); - pci_write_config(dev, AGP_ALI_ATTBASE, gatt->ag_physical | - (attbase & 0xfff), 4); - - /* Enable the TLB. */ - pci_write_config(dev, AGP_ALI_TLBCTRL, 0x10, 1); - - return 0; -} - -static int -agp_ali_detach(device_t dev) -{ - struct agp_ali_softc *sc = device_get_softc(dev); - int error; - u_int32_t attbase; - - error = agp_generic_detach(dev); - if (error) - return error; - - /* Disable the TLB.. */ - pci_write_config(dev, AGP_ALI_TLBCTRL, 0x90, 1); - - /* Put the aperture back the way it started. */ - AGP_SET_APERTURE(dev, sc->initial_aperture); - attbase = pci_read_config(dev, AGP_ALI_ATTBASE, 4); - pci_write_config(dev, AGP_ALI_ATTBASE, attbase & 0xfff, 4); - - agp_free_gatt(sc->gatt); - return 0; -} - -#define M 1024*1024 - -static u_int32_t agp_ali_table[] = { - 0, /* 0 - invalid */ - 1, /* 1 - invalid */ - 2, /* 2 - invalid */ - 4*M, /* 3 - invalid */ - 8*M, /* 4 - invalid */ - 0, /* 5 - invalid */ - 16*M, /* 6 - invalid */ - 32*M, /* 7 - invalid */ - 64*M, /* 8 - invalid */ - 128*M, /* 9 - invalid */ - 256*M, /* 10 - invalid */ -}; -#define agp_ali_table_size (sizeof(agp_ali_table) / sizeof(agp_ali_table[0])) - -static u_int32_t -agp_ali_get_aperture(device_t dev) -{ - /* - * The aperture size is derived from the low bits of attbase. - * I'm not sure this is correct.. - */ - int i = pci_read_config(dev, AGP_ALI_ATTBASE, 4) & 0xf; - if (i >= agp_ali_table_size) - return 0; - return agp_ali_table[i]; -} - -static int -agp_ali_set_aperture(device_t dev, u_int32_t aperture) -{ - int i; - u_int32_t attbase; - - for (i = 0; i < agp_ali_table_size; i++) - if (agp_ali_table[i] == aperture) - break; - if (i == agp_ali_table_size) - return EINVAL; - - attbase = pci_read_config(dev, AGP_ALI_ATTBASE, 4); - pci_write_config(dev, AGP_ALI_ATTBASE, (attbase & ~0xf) | i, 4); - return 0; -} - -static int -agp_ali_bind_page(device_t dev, int offset, vm_offset_t physical) -{ - struct agp_ali_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical; - return 0; -} - -static int -agp_ali_unbind_page(device_t dev, int offset) -{ - struct agp_ali_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; - return 0; -} - -static void -agp_ali_flush_tlb(device_t dev) -{ - pci_write_config(dev, AGP_ALI_TLBCTRL, 0x90, 1); - pci_write_config(dev, AGP_ALI_TLBCTRL, 0x10, 1); -} - -static device_method_t agp_ali_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, agp_ali_probe), - DEVMETHOD(device_attach, agp_ali_attach), - DEVMETHOD(device_detach, agp_ali_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* AGP interface */ - DEVMETHOD(agp_get_aperture, agp_ali_get_aperture), - DEVMETHOD(agp_set_aperture, agp_ali_set_aperture), - DEVMETHOD(agp_bind_page, agp_ali_bind_page), - DEVMETHOD(agp_unbind_page, agp_ali_unbind_page), - DEVMETHOD(agp_flush_tlb, agp_ali_flush_tlb), - DEVMETHOD(agp_enable, agp_generic_enable), - DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), - DEVMETHOD(agp_free_memory, agp_generic_free_memory), - DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), - DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), - - { 0, 0 } -}; - -static driver_t agp_ali_driver = { - "agp", - agp_ali_methods, - sizeof(struct agp_ali_softc), -}; - -static devclass_t agp_devclass; - -DRIVER_MODULE(agp_ali, pci, agp_ali_driver, agp_devclass, 0, 0); -MODULE_DEPEND(agp_ali, agp, 1, 1, 1); -MODULE_DEPEND(agp_ali, pci, 1, 1, 1); diff --git a/sys/dev/agp/agp_amd.c b/sys/dev/agp/agp_amd.c deleted file mode 100644 index bb1d20e..0000000 --- a/sys/dev/agp/agp_amd.c +++ /dev/null @@ -1,420 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/lock.h> -#include <sys/mutex.h> -#include <sys/proc.h> - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/pmap.h> -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - -MALLOC_DECLARE(M_AGP); - -#define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off) -#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) -#define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v) -#define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v) - -struct agp_amd_gatt { - u_int32_t ag_entries; - u_int32_t *ag_virtual; /* virtual address of gatt */ - vm_offset_t ag_physical; - u_int32_t *ag_vdir; /* virtual address of page dir */ - vm_offset_t ag_pdir; /* physical address of page dir */ -}; - -struct agp_amd_softc { - struct agp_softc agp; - struct resource *regs; /* memory mapped control registers */ - bus_space_tag_t bst; /* bus_space tag */ - bus_space_handle_t bsh; /* bus_space handle */ - u_int32_t initial_aperture; /* aperture size at startup */ - struct agp_amd_gatt *gatt; -}; - -static struct agp_amd_gatt * -agp_amd_alloc_gatt(device_t dev) -{ - u_int32_t apsize = AGP_GET_APERTURE(dev); - u_int32_t entries = apsize >> AGP_PAGE_SHIFT; - struct agp_amd_gatt *gatt; - int i, npages, pdir_offset; - - if (bootverbose) - device_printf(dev, - "allocating GATT for aperture of size %dM\n", - apsize / (1024*1024)); - - gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); - if (!gatt) - return 0; - - /* - * The AMD751 uses a page directory to map a non-contiguous - * gatt so we don't need to use contigmalloc. - * Malloc individual gatt pages and map them into the page - * directory. - */ - gatt->ag_entries = entries; - gatt->ag_virtual = malloc(entries * sizeof(u_int32_t), - M_AGP, M_NOWAIT); - if (!gatt->ag_virtual) { - if (bootverbose) - device_printf(dev, "allocation failed\n"); - free(gatt, M_AGP); - return 0; - } - bzero(gatt->ag_virtual, entries * sizeof(u_int32_t)); - - /* - * Allocate the page directory. - */ - gatt->ag_vdir = malloc(AGP_PAGE_SIZE, M_AGP, M_NOWAIT); - if (!gatt->ag_vdir) { - if (bootverbose) - device_printf(dev, - "failed to allocate page directory\n"); - free(gatt->ag_virtual, M_AGP); - free(gatt, M_AGP); - return 0; - } - bzero(gatt->ag_vdir, AGP_PAGE_SIZE); - - gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir); - if(bootverbose) - device_printf(dev, "gatt -> ag_pdir %#lx\n", - (u_long)gatt->ag_pdir); - /* - * Allocate the gatt pages - */ - gatt->ag_entries = entries; - if(bootverbose) - device_printf(dev, "allocating GATT for %d AGP page entries\n", - gatt->ag_entries); - - gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); - - /* - * Map the pages of the GATT into the page directory. - * - * The GATT page addresses are mapped into the directory offset by - * an amount dependent on the base address of the aperture. This - * is and offset into the page directory, not an offset added to - * the addresses of the gatt pages. - */ - - pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22; - - npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) - >> AGP_PAGE_SHIFT); - - for (i = 0; i < npages; i++) { - vm_offset_t va; - vm_offset_t pa; - - va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE; - pa = vtophys(va); - gatt->ag_vdir[i + pdir_offset] = pa | 1; - } - - /* - * Make sure the chipset can see everything. - */ - agp_flush_cache(); - - return gatt; -} - -static void -agp_amd_free_gatt(struct agp_amd_gatt *gatt) -{ - free(gatt->ag_virtual, M_AGP); - free(gatt->ag_vdir, M_AGP); - free(gatt, M_AGP); -} - -static const char* -agp_amd_match(device_t dev) -{ - if (pci_get_class(dev) != PCIC_BRIDGE - || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) - return NULL; - - if (agp_find_caps(dev) == 0) - return NULL; - - switch (pci_get_devid(dev)) { - case 0x70061022: - return ("AMD 751 host to AGP bridge"); - case 0x700e1022: - return ("AMD 761 host to AGP bridge"); - case 0x700c1022: - return ("AMD 762 host to AGP bridge"); - }; - - return NULL; -} - -static int -agp_amd_probe(device_t dev) -{ - const char *desc; - - if (resource_disabled("agp", device_get_unit(dev))) - return (ENXIO); - desc = agp_amd_match(dev); - if (desc) { - device_verbose(dev); - device_set_desc(dev, desc); - return BUS_PROBE_DEFAULT; - } - - return ENXIO; -} - -static int -agp_amd_attach(device_t dev) -{ - struct agp_amd_softc *sc = device_get_softc(dev); - struct agp_amd_gatt *gatt; - int error, rid; - - error = agp_generic_attach(dev); - if (error) - return error; - - rid = AGP_AMD751_REGISTERS; - sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->regs) { - agp_generic_detach(dev); - return ENOMEM; - } - - sc->bst = rman_get_bustag(sc->regs); - sc->bsh = rman_get_bushandle(sc->regs); - - sc->initial_aperture = AGP_GET_APERTURE(dev); - - for (;;) { - gatt = agp_amd_alloc_gatt(dev); - if (gatt) - break; - - /* - * Probably contigmalloc failure. Try reducing the - * aperture so that the gatt size reduces. - */ - if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) - return ENOMEM; - } - sc->gatt = gatt; - - /* Install the gatt. */ - WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir); - - /* Enable synchronisation between host and agp. */ - pci_write_config(dev, - AGP_AMD751_MODECTRL, - AGP_AMD751_MODECTRL_SYNEN, 1); - - /* Set indexing mode for two-level and enable page dir cache */ - pci_write_config(dev, - AGP_AMD751_MODECTRL2, - AGP_AMD751_MODECTRL2_GPDCE, 1); - - /* Enable the TLB and flush */ - WRITE2(AGP_AMD751_STATUS, - READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); - AGP_FLUSH_TLB(dev); - - return 0; -} - -static int -agp_amd_detach(device_t dev) -{ - struct agp_amd_softc *sc = device_get_softc(dev); - int error; - - error = agp_generic_detach(dev); - if (error) - return error; - - /* Disable the TLB.. */ - WRITE2(AGP_AMD751_STATUS, - READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); - - /* Disable host-agp sync */ - pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1); - - /* Clear the GATT base */ - WRITE4(AGP_AMD751_ATTBASE, 0); - - /* Put the aperture back the way it started. */ - AGP_SET_APERTURE(dev, sc->initial_aperture); - - agp_amd_free_gatt(sc->gatt); - - bus_release_resource(dev, SYS_RES_MEMORY, - AGP_AMD751_REGISTERS, sc->regs); - - return 0; -} - -static u_int32_t -agp_amd_get_aperture(device_t dev) -{ - int vas; - - /* - * The aperture size is equal to 32M<<vas. - */ - vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1; - return (32*1024*1024) << vas; -} - -static int -agp_amd_set_aperture(device_t dev, u_int32_t aperture) -{ - int vas; - - /* - * Check for a power of two and make sure its within the - * programmable range. - */ - if (aperture & (aperture - 1) - || aperture < 32*1024*1024 - || aperture > 2U*1024*1024*1024) - return EINVAL; - - vas = ffs(aperture / 32*1024*1024) - 1; - - /* - * While the size register is bits 1-3 of APCTRL, bit 0 must be - * set for the size value to be 'valid' - */ - pci_write_config(dev, AGP_AMD751_APCTRL, - (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06) - | ((vas << 1) | 1))), 1); - - return 0; -} - -static int -agp_amd_bind_page(device_t dev, int offset, vm_offset_t physical) -{ - struct agp_amd_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; - - /* invalidate the cache */ - AGP_FLUSH_TLB(dev); - return 0; -} - -static int -agp_amd_unbind_page(device_t dev, int offset) -{ - struct agp_amd_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; - return 0; -} - -static void -agp_amd_flush_tlb(device_t dev) -{ - struct agp_amd_softc *sc = device_get_softc(dev); - - /* Set the cache invalidate bit and wait for the chipset to clear */ - WRITE4(AGP_AMD751_TLBCTRL, 1); - do { - DELAY(1); - } while (READ4(AGP_AMD751_TLBCTRL)); -} - -static device_method_t agp_amd_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, agp_amd_probe), - DEVMETHOD(device_attach, agp_amd_attach), - DEVMETHOD(device_detach, agp_amd_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* AGP interface */ - DEVMETHOD(agp_get_aperture, agp_amd_get_aperture), - DEVMETHOD(agp_set_aperture, agp_amd_set_aperture), - DEVMETHOD(agp_bind_page, agp_amd_bind_page), - DEVMETHOD(agp_unbind_page, agp_amd_unbind_page), - DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb), - DEVMETHOD(agp_enable, agp_generic_enable), - DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), - DEVMETHOD(agp_free_memory, agp_generic_free_memory), - DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), - DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), - - { 0, 0 } -}; - -static driver_t agp_amd_driver = { - "agp", - agp_amd_methods, - sizeof(struct agp_amd_softc), -}; - -static devclass_t agp_devclass; - -DRIVER_MODULE(agp_amd, pci, agp_amd_driver, agp_devclass, 0, 0); -MODULE_DEPEND(agp_amd, agp, 1, 1, 1); -MODULE_DEPEND(agp_amd, pci, 1, 1, 1); diff --git a/sys/dev/agp/agp_amd64.c b/sys/dev/agp/agp_amd64.c deleted file mode 100644 index efa71a5..0000000 --- a/sys/dev/agp/agp_amd64.c +++ /dev/null @@ -1,314 +0,0 @@ -/*- - * Copyright (c) 2004 Jung-uk Kim - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/lock.h> -#include <sys/mutex.h> -#include <sys/proc.h> - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/pmap.h> -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - -/* XXX */ -extern void pci_cfgregwrite(int, int, int, int, uint32_t, int); -extern uint32_t pci_cfgregread(int, int, int, int, int); - -MALLOC_DECLARE(M_AGP); - -#define AMD64_MAX_MCTRL 8 - -struct agp_amd64_softc { - struct agp_softc agp; - uint32_t initial_aperture; /* aperture size at startup */ - struct agp_gatt *gatt; - int mctrl[AMD64_MAX_MCTRL]; - int n_mctrl; -}; - -static const char* -agp_amd64_match(device_t dev) -{ - if (pci_get_class(dev) != PCIC_BRIDGE - || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) - return NULL; - - if (agp_find_caps(dev) == 0) - return NULL; - - switch (pci_get_devid(dev)) { - case 0x74541022: - return ("AMD 8151 AGP graphics tunnel"); - case 0x07551039: - return ("SiS 755 host to AGP bridge"); - case 0x00d110de: - return ("NVIDIA nForce3 AGP Controller"); - case 0x00e110de: - return ("NVIDIA nForce3-250 AGP Controller"); - case 0x02041106: - return ("VIA 8380 host to PCI bridge"); - case 0x02821106: - return ("VIA K8T800Pro host to PCI bridge"); - case 0x31881106: - return ("VIA 8385 host to PCI bridge"); - }; - - return NULL; -} - -static int -agp_amd64_probe(device_t dev) -{ - const char *desc; - - if (resource_disabled("agp", device_get_unit(dev))) - return ENXIO; - if ((desc = agp_amd64_match(dev))) { - device_verbose(dev); - device_set_desc(dev, desc); - return BUS_PROBE_DEFAULT; - } - - return ENXIO; -} - -static int -agp_amd64_attach(device_t dev) -{ - struct agp_amd64_softc *sc = device_get_softc(dev); - struct agp_gatt *gatt; - int i, n, error; - - for (i = 0, n = 0; i < PCI_SLOTMAX && n < AMD64_MAX_MCTRL; i++) - if (pci_cfgregread(0, i, 3, 0, 4) == 0x11031022) { - sc->mctrl[n] = i; - n++; - } - - if (n == 0) - return ENXIO; - - sc->n_mctrl = n; - - if (bootverbose) - printf("AMD64: %d Misc. Control unit(s) found.\n", sc->n_mctrl); - - if ((error = agp_generic_attach(dev))) - return error; - - sc->initial_aperture = AGP_GET_APERTURE(dev); - - for (;;) { - gatt = agp_alloc_gatt(dev); - if (gatt) - break; - - /* - * Probably contigmalloc failure. Try reducing the - * aperture so that the gatt size reduces. - */ - if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { - agp_generic_detach(dev); - return ENOMEM; - } - } - sc->gatt = gatt; - - /* Install the gatt and enable aperture. */ - for (i = 0; i < sc->n_mctrl; i++) { - pci_cfgregwrite(0, sc->mctrl[i], 3, AGP_AMD64_ATTBASE, - (uint32_t)(gatt->ag_physical >> 8) & AGP_AMD64_ATTBASE_MASK, - 4); - pci_cfgregwrite(0, sc->mctrl[i], 3, AGP_AMD64_APCTRL, - (pci_cfgregread(0, sc->mctrl[i], 3, AGP_AMD64_APCTRL, 4) | - AGP_AMD64_APCTRL_GARTEN) & - ~(AGP_AMD64_APCTRL_DISGARTCPU | AGP_AMD64_APCTRL_DISGARTIO), - 4); - } - - agp_flush_cache(); - - return 0; -} - -static int -agp_amd64_detach(device_t dev) -{ - struct agp_amd64_softc *sc = device_get_softc(dev); - int i, error; - - if ((error = agp_generic_detach(dev))) - return error; - - for (i = 0; i < sc->n_mctrl; i++) - pci_cfgregwrite(0, sc->mctrl[i], 3, AGP_AMD64_APCTRL, - pci_cfgregread(0, sc->mctrl[i], 3, AGP_AMD64_APCTRL, 4) & - ~AGP_AMD64_APCTRL_GARTEN, 4); - - AGP_SET_APERTURE(dev, sc->initial_aperture); - agp_free_gatt(sc->gatt); - - return 0; -} - -static uint32_t agp_amd64_table[] = { - 0x02000000, /* 32 MB */ - 0x04000000, /* 64 MB */ - 0x08000000, /* 128 MB */ - 0x10000000, /* 256 MB */ - 0x20000000, /* 512 MB */ - 0x40000000, /* 1024 MB */ - 0x80000000, /* 2048 MB */ -}; - -#define AGP_AMD64_TABLE_SIZE \ - (sizeof(agp_amd64_table) / sizeof(agp_amd64_table[0])) - -static uint32_t -agp_amd64_get_aperture(device_t dev) -{ - struct agp_amd64_softc *sc = device_get_softc(dev); - uint32_t i; - - i = (pci_cfgregread(0, sc->mctrl[0], 3, AGP_AMD64_APCTRL, 4) & - AGP_AMD64_APCTRL_SIZE_MASK) >> 1; - - if (i >= AGP_AMD64_TABLE_SIZE) - return 0; - - return (agp_amd64_table[i]); -} - -static int -agp_amd64_set_aperture(device_t dev, uint32_t aperture) -{ - struct agp_amd64_softc *sc = device_get_softc(dev); - uint32_t i; - int j; - - for (i = 0; i < AGP_AMD64_TABLE_SIZE; i++) - if (agp_amd64_table[i] == aperture) - break; - if (i == AGP_AMD64_TABLE_SIZE) - return EINVAL; - - for (j = 0; j < sc->n_mctrl; j++) - pci_cfgregwrite(0, sc->mctrl[j], 3, AGP_AMD64_APCTRL, - (pci_cfgregread(0, sc->mctrl[j], 3, AGP_AMD64_APCTRL, 4) & - ~(AGP_AMD64_APCTRL_SIZE_MASK)) | (i << 1), 4); - - return 0; -} - -static int -agp_amd64_bind_page(device_t dev, int offset, vm_offset_t physical) -{ - struct agp_amd64_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical; - return 0; -} - -static int -agp_amd64_unbind_page(device_t dev, int offset) -{ - struct agp_amd64_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; - return 0; -} - -static void -agp_amd64_flush_tlb(device_t dev) -{ - struct agp_amd64_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->n_mctrl; i++) - pci_cfgregwrite(0, sc->mctrl[i], 3, AGP_AMD64_CACHECTRL, - pci_cfgregread(0, sc->mctrl[i], 3, AGP_AMD64_CACHECTRL, 4) | - AGP_AMD64_CACHECTRL_INVGART, 4); -} - -static device_method_t agp_amd64_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, agp_amd64_probe), - DEVMETHOD(device_attach, agp_amd64_attach), - DEVMETHOD(device_detach, agp_amd64_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* AGP interface */ - DEVMETHOD(agp_get_aperture, agp_amd64_get_aperture), - DEVMETHOD(agp_set_aperture, agp_amd64_set_aperture), - DEVMETHOD(agp_bind_page, agp_amd64_bind_page), - DEVMETHOD(agp_unbind_page, agp_amd64_unbind_page), - DEVMETHOD(agp_flush_tlb, agp_amd64_flush_tlb), - DEVMETHOD(agp_enable, agp_generic_enable), - DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), - DEVMETHOD(agp_free_memory, agp_generic_free_memory), - DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), - DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), - - { 0, 0 } -}; - -static driver_t agp_amd64_driver = { - "agp", - agp_amd64_methods, - sizeof(struct agp_amd64_softc), -}; - -static devclass_t agp_devclass; - -DRIVER_MODULE(agp_amd64, pci, agp_amd64_driver, agp_devclass, 0, 0); -MODULE_DEPEND(agp_amd64, agp, 1, 1, 1); -MODULE_DEPEND(agp_amd64, pci, 1, 1, 1); diff --git a/sys/dev/agp/agp_i810.c b/sys/dev/agp/agp_i810.c deleted file mode 100644 index 3cb8fd4..0000000 --- a/sys/dev/agp/agp_i810.c +++ /dev/null @@ -1,751 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * Copyright (c) 2000 Ruslan Ermilov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Fixes for 830/845G support: David Dawes <dawes@xfree86.org> - * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/lock.h> -#include <sys/mutex.h> -#include <sys/proc.h> - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/vm_page.h> -#include <vm/vm_pageout.h> -#include <vm/pmap.h> - -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - -MALLOC_DECLARE(M_AGP); - -#define READ1(off) bus_space_read_1(sc->bst, sc->bsh, off) -#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) -#define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v) - -#define CHIP_I810 0 /* i810/i815 */ -#define CHIP_I830 1 /* 830M/845G */ -#define CHIP_I855 2 /* 852GM/855GM/865G */ - -struct agp_i810_softc { - struct agp_softc agp; - u_int32_t initial_aperture; /* aperture size at startup */ - struct agp_gatt *gatt; - int chiptype; /* i810-like or i830 */ - u_int32_t dcache_size; /* i810 only */ - u_int32_t stolen; /* number of i830/845 gtt entries for stolen memory */ - device_t bdev; /* bridge device */ - struct resource *regs; /* memory mapped GC registers */ - bus_space_tag_t bst; /* bus_space tag */ - bus_space_handle_t bsh; /* bus_space handle */ -}; - -static const char* -agp_i810_match(device_t dev) -{ - if (pci_get_class(dev) != PCIC_DISPLAY - || pci_get_subclass(dev) != PCIS_DISPLAY_VGA) - return NULL; - - switch (pci_get_devid(dev)) { - case 0x71218086: - return ("Intel 82810 (i810 GMCH) SVGA controller"); - - case 0x71238086: - return ("Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller"); - - case 0x71258086: - return ("Intel 82810E (i810E GMCH) SVGA controller"); - - case 0x11328086: - return ("Intel 82815 (i815 GMCH) SVGA controller"); - - case 0x35778086: - return ("Intel 82830M (830M GMCH) SVGA controller"); - - case 0x25628086: - return ("Intel 82845G (845G GMCH) SVGA controller"); - - case 0x35828086: - switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) { - case AGP_I855_GME: - return ("Intel 82855GME (855GME GMCH) SVGA controller"); - - case AGP_I855_GM: - return ("Intel 82855GM (855GM GMCH) SVGA controller"); - - case AGP_I852_GME: - return ("Intel 82852GME (852GME GMCH) SVGA controller"); - - case AGP_I852_GM: - return ("Intel 82852GM (852GM GMCH) SVGA controller"); - - default: - return ("Intel 8285xM (85xGM GMCH) SVGA controller"); - } - - case 0x25728086: - return ("Intel 82865G (865G GMCH) SVGA controller"); - }; - - return NULL; -} - -/* - * Find bridge device. - */ -static device_t -agp_i810_find_bridge(device_t dev) -{ - device_t *children, child; - int nchildren, i; - u_int32_t devid; - - /* - * Calculate bridge device's ID. - */ - devid = pci_get_devid(dev); - switch (devid) { - case 0x71218086: - case 0x71238086: - case 0x71258086: - devid -= 0x10000; - break; - - case 0x11328086: - case 0x35778086: - case 0x25628086: - case 0x35828086: - case 0x25728086: - devid -= 0x20000; - break; - }; - if (device_get_children(device_get_parent(dev), &children, &nchildren)) - return 0; - - for (i = 0; i < nchildren; i++) { - child = children[i]; - - if (pci_get_devid(child) == devid) { - free(children, M_TEMP); - return child; - } - } - free(children, M_TEMP); - return 0; -} - -static int -agp_i810_probe(device_t dev) -{ - const char *desc; - - if (resource_disabled("agp", device_get_unit(dev))) - return (ENXIO); - desc = agp_i810_match(dev); - if (desc) { - device_t bdev; - u_int8_t smram; - unsigned int gcc1; - int devid = pci_get_devid(dev); - - bdev = agp_i810_find_bridge(dev); - if (!bdev) { - if (bootverbose) - printf("I810: can't find bridge device\n"); - return ENXIO; - } - - /* - * checking whether internal graphics device has been activated. - */ - switch (devid) { - /* i810 */ - case 0x71218086: - case 0x71238086: - case 0x71258086: - case 0x11328086: - smram = pci_read_config(bdev, AGP_I810_SMRAM, 1); - if ((smram & AGP_I810_SMRAM_GMS) - == AGP_I810_SMRAM_GMS_DISABLED) { - if (bootverbose) - printf("I810: disabled, not probing\n"); - return ENXIO; - } - break; - - /* i830 */ - case 0x35778086: - case 0x35828086: - case 0x25628086: - case 0x25728086: - gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1); - if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED) { - if (bootverbose) - printf("I830: disabled, not probing\n"); - return ENXIO; - } - break; - - default: - return ENXIO; - } - - device_verbose(dev); - device_set_desc(dev, desc); - return BUS_PROBE_DEFAULT; - } - - return ENXIO; -} - -static int -agp_i810_attach(device_t dev) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - struct agp_gatt *gatt; - int error, rid; - - sc->bdev = agp_i810_find_bridge(dev); - if (!sc->bdev) - return ENOENT; - - error = agp_generic_attach(dev); - if (error) - return error; - - switch (pci_get_devid(dev)) { - case 0x71218086: - case 0x71238086: - case 0x71258086: - case 0x11328086: - sc->chiptype = CHIP_I810; - break; - case 0x35778086: - case 0x25628086: - sc->chiptype = CHIP_I830; - break; - case 0x35828086: - case 0x25728086: - sc->chiptype = CHIP_I855; - break; - }; - - /* Same for i810 and i830 */ - rid = AGP_I810_MMADR; - sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->regs) { - agp_generic_detach(dev); - return ENOMEM; - } - sc->bst = rman_get_bustag(sc->regs); - sc->bsh = rman_get_bushandle(sc->regs); - - sc->initial_aperture = AGP_GET_APERTURE(dev); - - gatt = malloc( sizeof(struct agp_gatt), M_AGP, M_NOWAIT); - if (!gatt) { - agp_generic_detach(dev); - return ENOMEM; - } - sc->gatt = gatt; - - gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT; - - if ( sc->chiptype == CHIP_I810 ) { - /* Some i810s have on-chip memory called dcache */ - if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) - sc->dcache_size = 4 * 1024 * 1024; - else - sc->dcache_size = 0; - - /* According to the specs the gatt on the i810 must be 64k */ - gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0, - 0, ~0, PAGE_SIZE, 0); - if (!gatt->ag_virtual) { - if (bootverbose) - device_printf(dev, "contiguous allocation failed\n"); - free(gatt, M_AGP); - agp_generic_detach(dev); - return ENOMEM; - } - bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t)); - - gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); - agp_flush_cache(); - /* Install the GATT. */ - WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); - } else if ( sc->chiptype == CHIP_I830 ) { - /* The i830 automatically initializes the 128k gatt on boot. */ - unsigned int gcc1, pgtblctl; - - gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1); - switch (gcc1 & AGP_I830_GCC1_GMS) { - case AGP_I830_GCC1_GMS_STOLEN_512: - sc->stolen = (512 - 132) * 1024 / 4096; - break; - case AGP_I830_GCC1_GMS_STOLEN_1024: - sc->stolen = (1024 - 132) * 1024 / 4096; - break; - case AGP_I830_GCC1_GMS_STOLEN_8192: - sc->stolen = (8192 - 132) * 1024 / 4096; - break; - default: - sc->stolen = 0; - device_printf(dev, "unknown memory configuration, disabling\n"); - agp_generic_detach(dev); - return EINVAL; - } - if (sc->stolen > 0) - device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4); - device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024); - - /* GATT address is already in there, make sure it's enabled */ - pgtblctl = READ4(AGP_I810_PGTBL_CTL); - pgtblctl |= 1; - WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); - - gatt->ag_physical = pgtblctl & ~1; - } else { /* CHIP_I855 */ - /* The i855 automatically initializes the 128k gatt on boot. */ - unsigned int gcc1, pgtblctl; - - gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1); - switch (gcc1 & AGP_I855_GCC1_GMS) { - case AGP_I855_GCC1_GMS_STOLEN_1M: - sc->stolen = (1024 - 132) * 1024 / 4096; - break; - case AGP_I855_GCC1_GMS_STOLEN_4M: - sc->stolen = (4096 - 132) * 1024 / 4096; - break; - case AGP_I855_GCC1_GMS_STOLEN_8M: - sc->stolen = (8192 - 132) * 1024 / 4096; - break; - case AGP_I855_GCC1_GMS_STOLEN_16M: - sc->stolen = (16384 - 132) * 1024 / 4096; - break; - case AGP_I855_GCC1_GMS_STOLEN_32M: - sc->stolen = (32768 - 132) * 1024 / 4096; - break; - default: - sc->stolen = 0; - device_printf(dev, "unknown memory configuration, disabling\n"); - agp_generic_detach(dev); - return EINVAL; - } - if (sc->stolen > 0) - device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4); - device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024); - - /* GATT address is already in there, make sure it's enabled */ - pgtblctl = READ4(AGP_I810_PGTBL_CTL); - pgtblctl |= 1; - WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); - - gatt->ag_physical = pgtblctl & ~1; - } - - /* Add a device for the drm to attach to */ - if (!device_add_child( dev, "drmsub", -1 )) - printf("out of memory...\n"); - - return bus_generic_attach(dev); -} - -static int -agp_i810_detach(device_t dev) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - int error; - device_t child; - - error = agp_generic_detach(dev); - if (error) - return error; - - /* Clear the GATT base. */ - if ( sc->chiptype == CHIP_I810 ) { - WRITE4(AGP_I810_PGTBL_CTL, 0); - } else { - unsigned int pgtblctl; - pgtblctl = READ4(AGP_I810_PGTBL_CTL); - pgtblctl &= ~1; - WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); - } - - /* Put the aperture back the way it started. */ - AGP_SET_APERTURE(dev, sc->initial_aperture); - - if ( sc->chiptype == CHIP_I810 ) { - contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP); - } - free(sc->gatt, M_AGP); - - bus_release_resource(dev, SYS_RES_MEMORY, - AGP_I810_MMADR, sc->regs); - - child = device_find_child( dev, "drmsub", 0 ); - if (child) - device_delete_child( dev, child ); - - return 0; -} - -static u_int32_t -agp_i810_get_aperture(device_t dev) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - - if ( sc->chiptype == CHIP_I810 ) { - u_int16_t miscc; - miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2); - if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32) - return 32 * 1024 * 1024; - else - return 64 * 1024 * 1024; - } else if ( sc->chiptype == CHIP_I830 ) { - unsigned int gcc1; - - gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2); - if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) - return 64 * 1024 * 1024; - else - return 128 * 1024 * 1024; - } else { /* CHIP_I855 */ - return 128 * 1024 * 1024; - } -} - -static int -agp_i810_set_aperture(device_t dev, u_int32_t aperture) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - u_int16_t miscc; - - if ( sc->chiptype == CHIP_I810 ) { - /* - * Double check for sanity. - */ - if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) { - device_printf(dev, "bad aperture size %d\n", aperture); - return EINVAL; - } - - miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2); - miscc &= ~AGP_I810_MISCC_WINSIZE; - if (aperture == 32 * 1024 * 1024) - miscc |= AGP_I810_MISCC_WINSIZE_32; - else - miscc |= AGP_I810_MISCC_WINSIZE_64; - - pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2); - } else if ( sc->chiptype == CHIP_I830 ) { - unsigned int gcc1; - - if (aperture != 64 * 1024 * 1024 && aperture != 128 * 1024 * 1024) { - device_printf(dev, "bad aperture size %d\n", aperture); - return EINVAL; - } - gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2); - gcc1 &= ~AGP_I830_GCC1_GMASIZE; - if (aperture == 64 * 1024 * 1024) - gcc1 |= AGP_I830_GCC1_GMASIZE_64; - else - gcc1 |= AGP_I830_GCC1_GMASIZE_128; - - pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2); - } else { /* CHIP_I855 */ - if (aperture != 128 * 1024 * 1024) { - device_printf(dev, "bad aperture size %d\n", aperture); - return EINVAL; - } - } - - return 0; -} - -static int -agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) { - device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries); - return EINVAL; - } - - if ( sc->chiptype != CHIP_I810 ) { - if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) { - device_printf(dev, "trying to bind into stolen memory"); - return EINVAL; - } - } - - WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, physical | 1); - return 0; -} - -static int -agp_i810_unbind_page(device_t dev, int offset) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - if ( sc->chiptype != CHIP_I810 ) { - if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) { - device_printf(dev, "trying to unbind from stolen memory"); - return EINVAL; - } - } - - WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 0); - return 0; -} - -/* - * Writing via memory mapped registers already flushes all TLBs. - */ -static void -agp_i810_flush_tlb(device_t dev) -{ -} - -static int -agp_i810_enable(device_t dev, u_int32_t mode) -{ - - return 0; -} - -static struct agp_memory * -agp_i810_alloc_memory(device_t dev, int type, vm_size_t size) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - struct agp_memory *mem; - - if ((size & (AGP_PAGE_SIZE - 1)) != 0) - return 0; - - if (sc->agp.as_allocated + size > sc->agp.as_maxmem) - return 0; - - if (type == 1) { - /* - * Mapping local DRAM into GATT. - */ - if ( sc->chiptype != CHIP_I810 ) - return 0; - if (size != sc->dcache_size) - return 0; - } else if (type == 2) { - /* - * Bogus mapping of a single page for the hardware cursor. - */ - if (size != AGP_PAGE_SIZE) - return 0; - } - - mem = malloc(sizeof *mem, M_AGP, M_WAITOK); - mem->am_id = sc->agp.as_nextid++; - mem->am_size = size; - mem->am_type = type; - if (type != 1) - mem->am_obj = vm_object_allocate(OBJT_DEFAULT, - atop(round_page(size))); - else - mem->am_obj = 0; - - if (type == 2) { - /* - * Allocate and wire down the page now so that we can - * get its physical address. - */ - vm_page_t m; - - VM_OBJECT_LOCK(mem->am_obj); - m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NOBUSY | - VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY); - VM_OBJECT_UNLOCK(mem->am_obj); - mem->am_physical = VM_PAGE_TO_PHYS(m); - } else { - mem->am_physical = 0; - } - - mem->am_offset = 0; - mem->am_is_bound = 0; - TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link); - sc->agp.as_allocated += size; - - return mem; -} - -static int -agp_i810_free_memory(device_t dev, struct agp_memory *mem) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - - if (mem->am_is_bound) - return EBUSY; - - if (mem->am_type == 2) { - /* - * Unwire the page which we wired in alloc_memory. - */ - vm_page_t m; - - VM_OBJECT_LOCK(mem->am_obj); - m = vm_page_lookup(mem->am_obj, 0); - VM_OBJECT_UNLOCK(mem->am_obj); - vm_page_lock_queues(); - vm_page_unwire(m, 0); - vm_page_unlock_queues(); - } - - sc->agp.as_allocated -= mem->am_size; - TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link); - if (mem->am_obj) - vm_object_deallocate(mem->am_obj); - free(mem, M_AGP); - return 0; -} - -static int -agp_i810_bind_memory(device_t dev, struct agp_memory *mem, - vm_offset_t offset) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - vm_offset_t i; - - if (mem->am_type != 1) - return agp_generic_bind_memory(dev, mem, offset); - - if ( sc->chiptype != CHIP_I810 ) - return EINVAL; - - for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { - WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, - i | 3); - } - - return 0; -} - -static int -agp_i810_unbind_memory(device_t dev, struct agp_memory *mem) -{ - struct agp_i810_softc *sc = device_get_softc(dev); - vm_offset_t i; - - if (mem->am_type != 1) - return agp_generic_unbind_memory(dev, mem); - - if ( sc->chiptype != CHIP_I810 ) - return EINVAL; - - for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) - WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0); - - return 0; -} - -static int -agp_i810_print_child(device_t dev, device_t child) -{ - int retval = 0; - - retval += bus_print_child_header(dev, child); - retval += printf(": (child of agp_i810.c)"); - retval += bus_print_child_footer(dev, child); - - return retval; -} - -static device_method_t agp_i810_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, agp_i810_probe), - DEVMETHOD(device_attach, agp_i810_attach), - DEVMETHOD(device_detach, agp_i810_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* AGP interface */ - DEVMETHOD(agp_get_aperture, agp_i810_get_aperture), - DEVMETHOD(agp_set_aperture, agp_i810_set_aperture), - DEVMETHOD(agp_bind_page, agp_i810_bind_page), - DEVMETHOD(agp_unbind_page, agp_i810_unbind_page), - DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb), - DEVMETHOD(agp_enable, agp_i810_enable), - DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory), - DEVMETHOD(agp_free_memory, agp_i810_free_memory), - DEVMETHOD(agp_bind_memory, agp_i810_bind_memory), - DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory), - - /* bus methods */ - DEVMETHOD(bus_print_child, agp_i810_print_child), - DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - { 0, 0 } -}; - -static driver_t agp_i810_driver = { - "agp", - agp_i810_methods, - sizeof(struct agp_i810_softc), -}; - -static devclass_t agp_devclass; - -DRIVER_MODULE(agp_i810, pci, agp_i810_driver, agp_devclass, 0, 0); -MODULE_DEPEND(agp_i810, agp, 1, 1, 1); -MODULE_DEPEND(agp_i810, pci, 1, 1, 1); diff --git a/sys/dev/agp/agp_if.m b/sys/dev/agp/agp_if.m deleted file mode 100644 index faf7b1a..0000000 --- a/sys/dev/agp/agp_if.m +++ /dev/null @@ -1,134 +0,0 @@ -#- -# Copyright (c) 2000 Doug Rabson -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# $FreeBSD$ -# - -#include <sys/bus.h> - -# -# The AGP interface is used internally to the agp driver to isolate the -# differences between various AGP chipsets into chipset mini drivers. It -# should not be used outside the AGP driver. The kernel api for accessing -# AGP functionality is described in <pci/agpvar.h> -# -INTERFACE agp; - -# -# Return the current aperture size. -# -METHOD u_int32_t get_aperture { - device_t dev; -}; - -# -# Set the size of the aperture. Return EINVAL on error or 0 on success. -# -METHOD int set_aperture { - device_t dev; - u_int32_t aperture; -}; - -# -# Bind a single page in the AGP aperture to a given physical address. -# The offset is a byte offset within the aperture which must be -# aligned to an AGP page boundary. -# -METHOD int bind_page { - device_t dev; - vm_offset_t offset; - vm_offset_t physical; -}; - -# -# Unbind a single page in the AGP aperture. -# -METHOD int unbind_page { - device_t dev; - vm_offset_t offset; -}; - -# -# Flush the GATT TLB. This is used after a call to bind_page to -# ensure that any mappings cached in the chipset are discarded. -# -METHOD void flush_tlb { - device_t dev; -}; - -# -# Enable the agp hardware with the relavent mode. The mode bits are -# defined in <pci/agpreg.h> -# -METHOD int enable { - device_t dev; - u_int32_t mode; -}; - -# -# Allocate memory of a given type. The type is a chipset-specific -# code which is used by certain integrated agp graphics chips -# (basically just the i810 for now) to access special features of -# the chipset. An opaque handle representing the memory region is -# returned and can be used as an argument to free_memory, bind_memory -# and unbind_memory. -# -# The size is specified in bytes but must be a multiple of the AGP -# page size. -# -METHOD struct agp_memory * alloc_memory { - device_t dev; - int type; - vm_size_t size; -}; - -# -# Free a memory region previously allocated with alloc_memory. Return -# EBUSY if the memory is bound. -# -METHOD int free_memory { - device_t dev; - struct agp_memory *mem; -}; - -# -# Bind a memory region to a specific byte offset within the chipset's -# AGP aperture. This effectively defines a range of contiguous -# physical address which alias the (possibly uncontiguous) pages in -# the memory region. -# -METHOD int bind_memory { - device_t dev; - struct agp_memory *mem; - vm_offset_t offset; -}; - -# -# Unbind a memory region bound with bind_memory. -# -METHOD int unbind_memory { - device_t dev; - struct agp_memory *handle; -}; diff --git a/sys/dev/agp/agp_intel.c b/sys/dev/agp/agp_intel.c deleted file mode 100644 index 7e8477b..0000000 --- a/sys/dev/agp/agp_intel.c +++ /dev/null @@ -1,425 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/lock.h> -#include <sys/mutex.h> -#include <sys/proc.h> - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/pmap.h> - -#define MAX_APSIZE 0x3f /* 256 MB */ - -struct agp_intel_softc { - struct agp_softc agp; - u_int32_t initial_aperture; /* aperture size at startup */ - struct agp_gatt *gatt; - u_int aperture_mask; -}; - -static const char* -agp_intel_match(device_t dev) -{ - if (pci_get_class(dev) != PCIC_BRIDGE - || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) - return NULL; - - if (agp_find_caps(dev) == 0) - return NULL; - - switch (pci_get_devid(dev)) { - /* Intel -- vendor 0x8086 */ - case 0x71808086: - return ("Intel 82443LX (440 LX) host to PCI bridge"); - - case 0x71908086: - return ("Intel 82443BX (440 BX) host to PCI bridge"); - - case 0x71a08086: - return ("Intel 82443GX host to PCI bridge"); - - case 0x71a18086: - return ("Intel 82443GX host to AGP bridge"); - - case 0x11308086: - return ("Intel 82815 (i815 GMCH) host to PCI bridge"); - - case 0x25008086: - case 0x25018086: - return ("Intel 82820 host to AGP bridge"); - - case 0x35758086: - return ("Intel 82830 host to AGP bridge"); - - case 0x1a218086: - return ("Intel 82840 host to AGP bridge"); - - case 0x1a308086: - return ("Intel 82845 host to AGP bridge"); - - case 0x25308086: - return ("Intel 82850 host to AGP bridge"); - - case 0x33408086: - return ("Intel 82855 host to AGP bridge"); - - case 0x25318086: - return ("Intel 82860 host to AGP bridge"); - - case 0x25708086: - return ("Intel 82865 host to AGP bridge"); - - case 0x255d8086: - return ("Intel E7205 host to AGP bridge"); - - case 0x25788086: - return ("Intel 82875P host to AGP bridge"); - - case 0x25608086: /* i845G */ - return ("Intel 82845G host to AGP bridge"); - }; - - return NULL; -} - -static int -agp_intel_probe(device_t dev) -{ - const char *desc; - - if (resource_disabled("agp", device_get_unit(dev))) - return (ENXIO); - desc = agp_intel_match(dev); - if (desc) { - device_verbose(dev); - device_set_desc(dev, desc); - return BUS_PROBE_DEFAULT; - } - - return ENXIO; -} - -static int -agp_intel_attach(device_t dev) -{ - struct agp_intel_softc *sc = device_get_softc(dev); - struct agp_gatt *gatt; - u_int32_t type = pci_get_devid(dev); - u_int32_t value; - int error; - - error = agp_generic_attach(dev); - if (error) - return error; - - /* Determine maximum supported aperture size. */ - value = pci_read_config(dev, AGP_INTEL_APSIZE, 1); - pci_write_config(dev, AGP_INTEL_APSIZE, MAX_APSIZE, 1); - sc->aperture_mask = pci_read_config(dev, AGP_INTEL_APSIZE, 1) & - MAX_APSIZE; - pci_write_config(dev, AGP_INTEL_APSIZE, value, 1); - sc->initial_aperture = AGP_GET_APERTURE(dev); - - for (;;) { - gatt = agp_alloc_gatt(dev); - if (gatt) - break; - - /* - * Probably contigmalloc failure. Try reducing the - * aperture so that the gatt size reduces. - */ - if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { - agp_generic_detach(dev); - return ENOMEM; - } - } - sc->gatt = gatt; - - /* Install the gatt. */ - pci_write_config(dev, AGP_INTEL_ATTBASE, gatt->ag_physical, 4); - - /* Enable the GLTB and setup the control register. */ - switch (type) { - case 0x71908086: /* 440LX/EX */ - pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2080, 4); - break; - case 0x71808086: /* 440BX */ - /* - * XXX: Should be 0xa080? Bit 9 is undefined, and - * bit 13 being on and bit 15 being clear is illegal. - */ - pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4); - break; - default: - value = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4); - pci_write_config(dev, AGP_INTEL_AGPCTRL, value | 0x80, 4); - } - - /* Enable things, clear errors etc. */ - switch (type) { - case 0x1a218086: /* i840 */ - case 0x25308086: /* i850 */ - case 0x25318086: /* i860 */ - pci_write_config(dev, AGP_INTEL_MCHCFG, - (pci_read_config(dev, AGP_INTEL_MCHCFG, 2) - | (1 << 9)), 2); - break; - - case 0x25008086: /* i820 */ - case 0x25018086: /* i820 */ - pci_write_config(dev, AGP_INTEL_I820_RDCR, - (pci_read_config(dev, AGP_INTEL_I820_RDCR, 1) - | (1 << 1)), 1); - break; - - case 0x1a308086: /* i845 */ - case 0x33408086: /* i855 */ - case 0x255d8086: /* E7205 */ - case 0x25708086: /* i865 */ - case 0x25788086: /* i875P */ - case 0x25608086: /* i845G */ - pci_write_config(dev, AGP_INTEL_I845_MCHCFG, - (pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1) - | (1 << 1)), 1); - break; - - default: /* Intel Generic (maybe) */ - pci_write_config(dev, AGP_INTEL_NBXCFG, - (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) - & ~(1 << 10)) | (1 << 9), 4); - } - - switch (type) { - case 0x1a218086: /* i840 */ - pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0xc000, 2); - break; - - case 0x25008086: /* i820 */ - case 0x25018086: /* i820 */ - case 0x1a308086: /* i845 */ - case 0x25308086: /* i850 */ - case 0x33408086: /* i855 */ - case 0x255d8086: /* E7205 */ - case 0x25318086: /* i860 */ - case 0x25708086: /* i865 */ - case 0x25788086: /* i875P */ - case 0x25608086: /* i845G */ - pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x00ff, 2); - break; - - default: /* Intel Generic (maybe) */ - pci_write_config(dev, AGP_INTEL_ERRSTS + 1, 7, 1); - } - - return 0; -} - -static int -agp_intel_detach(device_t dev) -{ - struct agp_intel_softc *sc = device_get_softc(dev); - u_int32_t type = pci_get_devid(dev); - int error; - - error = agp_generic_detach(dev); - if (error) - return error; - - switch (type) { - case 0x1a218086: /* i840 */ - case 0x25308086: /* i850 */ - case 0x25318086: /* i860 */ - printf("%s: set MCHCFG to %x\n", __func__, (unsigned) - (pci_read_config(dev, AGP_INTEL_MCHCFG, 2) - & ~(1 << 9))); - pci_write_config(dev, AGP_INTEL_MCHCFG, - (pci_read_config(dev, AGP_INTEL_MCHCFG, 2) - & ~(1 << 9)), 2); - - case 0x25008086: /* i820 */ - case 0x25018086: /* i820 */ - printf("%s: set RDCR to %x\n", __func__, (unsigned) - (pci_read_config(dev, AGP_INTEL_I820_RDCR, 1) - & ~(1 << 1))); - pci_write_config(dev, AGP_INTEL_I820_RDCR, - (pci_read_config(dev, AGP_INTEL_I820_RDCR, 1) - & ~(1 << 1)), 1); - - case 0x1a308086: /* i845 */ - case 0x25608086: /* i845G */ - case 0x33408086: /* i855 */ - case 0x255d8086: /* E7205 */ - case 0x25708086: /* i865 */ - case 0x25788086: /* i875P */ - printf("%s: set MCHCFG to %x\n", __func__, (unsigned) - (pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1) - & ~(1 << 1))); - pci_write_config(dev, AGP_INTEL_MCHCFG, - (pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1) - & ~(1 << 1)), 1); - - default: /* Intel Generic (maybe) */ - printf("%s: set NBXCFG to %x\n", __func__, - (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) - & ~(1 << 9))); - pci_write_config(dev, AGP_INTEL_NBXCFG, - (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) - & ~(1 << 9)), 4); - } - pci_write_config(dev, AGP_INTEL_ATTBASE, 0, 4); - AGP_SET_APERTURE(dev, sc->initial_aperture); - agp_free_gatt(sc->gatt); - - return 0; -} - -static u_int32_t -agp_intel_get_aperture(device_t dev) -{ - struct agp_intel_softc *sc = device_get_softc(dev); - u_int32_t apsize; - - apsize = pci_read_config(dev, AGP_INTEL_APSIZE, 1) & sc->aperture_mask; - - /* - * The size is determined by the number of low bits of - * register APBASE which are forced to zero. The low 22 bits - * are always forced to zero and each zero bit in the apsize - * field just read forces the corresponding bit in the 27:22 - * to be zero. We calculate the aperture size accordingly. - */ - return (((apsize ^ sc->aperture_mask) << 22) | ((1 << 22) - 1)) + 1; -} - -static int -agp_intel_set_aperture(device_t dev, u_int32_t aperture) -{ - struct agp_intel_softc *sc = device_get_softc(dev); - u_int32_t apsize; - - /* - * Reverse the magic from get_aperture. - */ - apsize = ((aperture - 1) >> 22) ^ sc->aperture_mask; - - /* - * Double check for sanity. - */ - if ((((apsize ^ sc->aperture_mask) << 22) | ((1 << 22) - 1)) + 1 != aperture) - return EINVAL; - - pci_write_config(dev, AGP_INTEL_APSIZE, apsize, 1); - - return 0; -} - -static int -agp_intel_bind_page(device_t dev, int offset, vm_offset_t physical) -{ - struct agp_intel_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 0x17; - return 0; -} - -static int -agp_intel_unbind_page(device_t dev, int offset) -{ - struct agp_intel_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; - return 0; -} - -static void -agp_intel_flush_tlb(device_t dev) -{ - u_int32_t val; - - val = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4); - pci_write_config(dev, AGP_INTEL_AGPCTRL, val & ~(1 << 7), 4); - pci_write_config(dev, AGP_INTEL_AGPCTRL, val, 4); -} - -static device_method_t agp_intel_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, agp_intel_probe), - DEVMETHOD(device_attach, agp_intel_attach), - DEVMETHOD(device_detach, agp_intel_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* AGP interface */ - DEVMETHOD(agp_get_aperture, agp_intel_get_aperture), - DEVMETHOD(agp_set_aperture, agp_intel_set_aperture), - DEVMETHOD(agp_bind_page, agp_intel_bind_page), - DEVMETHOD(agp_unbind_page, agp_intel_unbind_page), - DEVMETHOD(agp_flush_tlb, agp_intel_flush_tlb), - DEVMETHOD(agp_enable, agp_generic_enable), - DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), - DEVMETHOD(agp_free_memory, agp_generic_free_memory), - DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), - DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), - - { 0, 0 } -}; - -static driver_t agp_intel_driver = { - "agp", - agp_intel_methods, - sizeof(struct agp_intel_softc), -}; - -static devclass_t agp_devclass; - -DRIVER_MODULE(agp_intel, pci, agp_intel_driver, agp_devclass, 0, 0); -MODULE_DEPEND(agp_intel, agp, 1, 1, 1); -MODULE_DEPEND(agp_intel, pci, 1, 1, 1); diff --git a/sys/dev/agp/agp_nvidia.c b/sys/dev/agp/agp_nvidia.c deleted file mode 100644 index e49c140..0000000 --- a/sys/dev/agp/agp_nvidia.c +++ /dev/null @@ -1,456 +0,0 @@ -/*- - * Copyright (c) 2003 Matthew N. Dodd <winter@jurai.net> - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Written using information gleaned from the - * NVIDIA nForce/nForce2 AGPGART Linux Kernel Patch. - */ - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/lock.h> - -#if __FreeBSD_version < 500000 -#include "opt_pci.h" -#endif - -#if __FreeBSD_version > 500000 -#include <sys/mutex.h> -#include <sys/proc.h> -#endif - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/pmap.h> - -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - -#define NVIDIA_VENDORID 0x10de -#define NVIDIA_DEVICEID_NFORCE 0x01a4 -#define NVIDIA_DEVICEID_NFORCE2 0x01e0 - -struct agp_nvidia_softc { - struct agp_softc agp; - u_int32_t initial_aperture; /* aperture size at startup */ - struct agp_gatt * gatt; - - device_t dev; /* AGP Controller */ - device_t mc1_dev; /* Memory Controller */ - device_t mc2_dev; /* Memory Controller */ - device_t bdev; /* Bridge */ - - u_int32_t wbc_mask; - int num_dirs; - int num_active_entries; - off_t pg_offset; -}; - -static const char *agp_nvidia_match(device_t dev); -static int agp_nvidia_probe(device_t); -static int agp_nvidia_attach(device_t); -static int agp_nvidia_detach(device_t); -static u_int32_t agp_nvidia_get_aperture(device_t); -static int agp_nvidia_set_aperture(device_t, u_int32_t); -static int agp_nvidia_bind_page(device_t, int, vm_offset_t); -static int agp_nvidia_unbind_page(device_t, int); - -static int nvidia_init_iorr(u_int32_t, u_int32_t); - -static const char * -agp_nvidia_match (device_t dev) -{ - if (pci_get_class(dev) != PCIC_BRIDGE || - pci_get_subclass(dev) != PCIS_BRIDGE_HOST || - pci_get_vendor(dev) != NVIDIA_VENDORID) - return (NULL); - - switch (pci_get_device(dev)) { - case NVIDIA_DEVICEID_NFORCE: - return ("NVIDIA nForce AGP Controller"); - case NVIDIA_DEVICEID_NFORCE2: - return ("NVIDIA nForce2 AGP Controller"); - } - return (NULL); -} - -static int -agp_nvidia_probe (device_t dev) -{ - const char *desc; - - if (resource_disabled("agp", device_get_unit(dev))) - return (ENXIO); - desc = agp_nvidia_match(dev); - if (desc) { - device_verbose(dev); - device_set_desc(dev, desc); - return (BUS_PROBE_DEFAULT); - } - return (ENXIO); -} - -static int -agp_nvidia_attach (device_t dev) -{ - struct agp_nvidia_softc *sc = device_get_softc(dev); - struct agp_gatt *gatt; - u_int32_t apbase; - u_int32_t aplimit; - u_int32_t temp; - int size; - int i; - int error; - - switch (pci_get_device(dev)) { - case NVIDIA_DEVICEID_NFORCE: - sc->wbc_mask = 0x00010000; - break; - case NVIDIA_DEVICEID_NFORCE2: - sc->wbc_mask = 0x80000000; - break; - default: - sc->wbc_mask = 0; - break; - } - - /* AGP Controller */ - sc->dev = dev; - - /* Memory Controller 1 */ - sc->mc1_dev = pci_find_bsf(pci_get_bus(dev), 0, 1); - if (sc->mc1_dev == NULL) { - device_printf(dev, - "Unable to find NVIDIA Memory Controller 1.\n"); - return (ENODEV); - } - - /* Memory Controller 2 */ - sc->mc2_dev = pci_find_bsf(pci_get_bus(dev), 0, 2); - if (sc->mc2_dev == NULL) { - device_printf(dev, - "Unable to find NVIDIA Memory Controller 2.\n"); - return (ENODEV); - } - - /* AGP Host to PCI Bridge */ - sc->bdev = pci_find_bsf(pci_get_bus(dev), 30, 0); - if (sc->bdev == NULL) { - device_printf(dev, - "Unable to find NVIDIA AGP Host to PCI Bridge.\n"); - return (ENODEV); - } - - error = agp_generic_attach(dev); - if (error) - return (error); - - sc->initial_aperture = AGP_GET_APERTURE(dev); - - for (;;) { - gatt = agp_alloc_gatt(dev); - if (gatt) - break; - /* - * Probably contigmalloc failure. Try reducing the - * aperture so that the gatt size reduces. - */ - if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) - goto fail; - } - sc->gatt = gatt; - - apbase = rman_get_start(sc->agp.as_aperture); - aplimit = apbase + AGP_GET_APERTURE(dev) - 1; - pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_APBASE, apbase, 4); - pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_APLIMIT, aplimit, 4); - pci_write_config(sc->bdev, AGP_NVIDIA_3_APBASE, apbase, 4); - pci_write_config(sc->bdev, AGP_NVIDIA_3_APLIMIT, aplimit, 4); - - error = nvidia_init_iorr(apbase, AGP_GET_APERTURE(dev)); - if (error) { - device_printf(dev, "Failed to setup IORRs\n"); - goto fail; - } - - /* directory size is 64k */ - size = AGP_GET_APERTURE(dev) / 1024 / 1024; - sc->num_dirs = size / 64; - sc->num_active_entries = (size == 32) ? 16384 : ((size * 1024) / 4); - sc->pg_offset = 0; - if (sc->num_dirs == 0) { - sc->num_dirs = 1; - sc->num_active_entries /= (64 / size); - sc->pg_offset = (apbase & (64 * 1024 * 1024 - 1) & - ~(AGP_GET_APERTURE(dev) - 1)) / PAGE_SIZE; - } - - /* (G)ATT Base Address */ - for (i = 0; i < 8; i++) { - pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_ATTBASE(i), - (sc->gatt->ag_physical + - (i % sc->num_dirs) * 64 * 1024), - 4); - } - - /* GTLB Control */ - temp = pci_read_config(sc->mc2_dev, AGP_NVIDIA_2_GARTCTRL, 4); - pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_GARTCTRL, temp | 0x11, 4); - - /* GART Control */ - temp = pci_read_config(sc->dev, AGP_NVIDIA_0_APSIZE, 4); - pci_write_config(sc->dev, AGP_NVIDIA_0_APSIZE, temp | 0x100, 4); - - return (0); -fail: - agp_generic_detach(dev); - return (ENOMEM); -} - -static int -agp_nvidia_detach (device_t dev) -{ - struct agp_nvidia_softc *sc = device_get_softc(dev); - int error; - u_int32_t temp; - - error = agp_generic_detach(dev); - if (error) - return (error); - - /* GART Control */ - temp = pci_read_config(sc->dev, AGP_NVIDIA_0_APSIZE, 4); - pci_write_config(sc->dev, AGP_NVIDIA_0_APSIZE, temp & ~(0x100), 4); - - /* GTLB Control */ - temp = pci_read_config(sc->mc2_dev, AGP_NVIDIA_2_GARTCTRL, 4); - pci_write_config(sc->mc2_dev, AGP_NVIDIA_2_GARTCTRL, temp & ~(0x11), 4); - - /* Put the aperture back the way it started. */ - AGP_SET_APERTURE(dev, sc->initial_aperture); - - /* restore iorr for previous aperture size */ - nvidia_init_iorr(rman_get_start(sc->agp.as_aperture), - sc->initial_aperture); - - agp_free_gatt(sc->gatt); - - return (0); -} - -static u_int32_t -agp_nvidia_get_aperture(device_t dev) -{ - u_int8_t key; - - key = ffs(pci_read_config(dev, AGP_NVIDIA_0_APSIZE, 1) & 0x0f); - return (1 << (24 + (key ? key : 5))); -} - -static int -agp_nvidia_set_aperture(device_t dev, u_int32_t aperture) -{ - u_int8_t val; - u_int8_t key; - - switch (aperture) { - case (512 * 1024 * 1024): key = 0; break; - case (256 * 1024 * 1024): key = 8; break; - case (128 * 1024 * 1024): key = 12; break; - case (64 * 1024 * 1024): key = 14; break; - case (32 * 1024 * 1024): key = 15; break; - default: - device_printf(dev, "Invalid aperture size (%dMb)\n", - aperture / 1024 / 1024); - return (EINVAL); - } - val = pci_read_config(dev, AGP_NVIDIA_0_APSIZE, 1); - pci_write_config(dev, AGP_NVIDIA_0_APSIZE, ((val & ~0x0f) | key), 1); - - return (0); -} - -static int -agp_nvidia_bind_page(device_t dev, int offset, vm_offset_t physical) -{ - struct agp_nvidia_softc *sc = device_get_softc(dev); - u_int32_t index; - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return (EINVAL); - - index = (sc->pg_offset + offset) >> AGP_PAGE_SHIFT; - sc->gatt->ag_virtual[index] = physical; - - return (0); -} - -static int -agp_nvidia_unbind_page(device_t dev, int offset) -{ - struct agp_nvidia_softc *sc = device_get_softc(dev); - u_int32_t index; - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return (EINVAL); - - index = (sc->pg_offset + offset) >> AGP_PAGE_SHIFT; - sc->gatt->ag_virtual[index] = 0; - - return (0); -} - -static int -agp_nvidia_flush_tlb (device_t dev, int offset) -{ - struct agp_nvidia_softc *sc; - u_int32_t wbc_reg, temp; - int i; - - sc = (struct agp_nvidia_softc *)device_get_softc(dev); - - if (sc->wbc_mask) { - wbc_reg = pci_read_config(sc->mc1_dev, AGP_NVIDIA_1_WBC, 4); - wbc_reg |= sc->wbc_mask; - pci_write_config(sc->mc1_dev, AGP_NVIDIA_1_WBC, wbc_reg, 4); - - /* Wait no more than 3 seconds. */ - for (i = 0; i < 3000; i++) { - wbc_reg = pci_read_config(sc->mc1_dev, - AGP_NVIDIA_1_WBC, 4); - if ((sc->wbc_mask & wbc_reg) == 0) - break; - else - DELAY(1000); - } - if (i == 3000) - device_printf(dev, - "TLB flush took more than 3 seconds.\n"); - } - - /* Flush TLB entries. */ - for(i = 0; i < 32 + 1; i++) - temp = sc->gatt->ag_virtual[i * PAGE_SIZE / sizeof(u_int32_t)]; - for(i = 0; i < 32 + 1; i++) - temp = sc->gatt->ag_virtual[i * PAGE_SIZE / sizeof(u_int32_t)]; - - return (0); -} - -#define SYSCFG 0xC0010010 -#define IORR_BASE0 0xC0010016 -#define IORR_MASK0 0xC0010017 -#define AMD_K7_NUM_IORR 2 - -static int -nvidia_init_iorr(u_int32_t addr, u_int32_t size) -{ - quad_t base, mask, sys; - u_int32_t iorr_addr, free_iorr_addr; - - /* Find the iorr that is already used for the addr */ - /* If not found, determine the uppermost available iorr */ - free_iorr_addr = AMD_K7_NUM_IORR; - for(iorr_addr = 0; iorr_addr < AMD_K7_NUM_IORR; iorr_addr++) { - base = rdmsr(IORR_BASE0 + 2 * iorr_addr); - mask = rdmsr(IORR_MASK0 + 2 * iorr_addr); - - if ((base & 0xfffff000ULL) == (addr & 0xfffff000)) - break; - - if ((mask & 0x00000800ULL) == 0) - free_iorr_addr = iorr_addr; - } - - if (iorr_addr >= AMD_K7_NUM_IORR) { - iorr_addr = free_iorr_addr; - if (iorr_addr >= AMD_K7_NUM_IORR) - return (EINVAL); - } - - base = (addr & ~0xfff) | 0x18; - mask = (0xfULL << 32) | ((~(size - 1)) & 0xfffff000) | 0x800; - wrmsr(IORR_BASE0 + 2 * iorr_addr, base); - wrmsr(IORR_MASK0 + 2 * iorr_addr, mask); - - sys = rdmsr(SYSCFG); - sys |= 0x00100000ULL; - wrmsr(SYSCFG, sys); - - return (0); -} - -static device_method_t agp_nvidia_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, agp_nvidia_probe), - DEVMETHOD(device_attach, agp_nvidia_attach), - DEVMETHOD(device_detach, agp_nvidia_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* AGP interface */ - DEVMETHOD(agp_get_aperture, agp_nvidia_get_aperture), - DEVMETHOD(agp_set_aperture, agp_nvidia_set_aperture), - DEVMETHOD(agp_bind_page, agp_nvidia_bind_page), - DEVMETHOD(agp_unbind_page, agp_nvidia_unbind_page), - DEVMETHOD(agp_flush_tlb, agp_nvidia_flush_tlb), - - DEVMETHOD(agp_enable, agp_generic_enable), - DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), - DEVMETHOD(agp_free_memory, agp_generic_free_memory), - DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), - DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), - - { 0, 0 } -}; - -static driver_t agp_nvidia_driver = { - "agp", - agp_nvidia_methods, - sizeof(struct agp_nvidia_softc), -}; - -static devclass_t agp_devclass; - -DRIVER_MODULE(agp_nvidia, pci, agp_nvidia_driver, agp_devclass, 0, 0); -MODULE_DEPEND(agp_nvidia, agp, 1, 1, 1); -MODULE_DEPEND(agp_nvidia, pci, 1, 1, 1); diff --git a/sys/dev/agp/agp_sis.c b/sys/dev/agp/agp_sis.c deleted file mode 100644 index 0f3b31a..0000000 --- a/sys/dev/agp/agp_sis.c +++ /dev/null @@ -1,298 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/lock.h> -#include <sys/mutex.h> -#include <sys/proc.h> - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/pmap.h> - -struct agp_sis_softc { - struct agp_softc agp; - u_int32_t initial_aperture; /* aperture size at startup */ - struct agp_gatt *gatt; -}; - -static const char* -agp_sis_match(device_t dev) -{ - if (pci_get_class(dev) != PCIC_BRIDGE - || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) - return NULL; - - if (agp_find_caps(dev) == 0) - return NULL; - - switch (pci_get_devid(dev)) { - case 0x00011039: - return ("SiS 5591 host to AGP bridge"); - case 0x05301039: - return ("SiS 530 host to AGP bridge"); - case 0x05401039: - return ("SiS 540 host to AGP bridge"); - case 0x05501039: - return ("SiS 550 host to AGP bridge"); - case 0x06201039: - return ("SiS 620 host to AGP bridge"); - case 0x06301039: - return ("SiS 630 host to AGP bridge"); - case 0x06451039: - return ("SiS 645 host to AGP bridge"); - case 0x06461039: - return ("SiS 645DX host to AGP bridge"); - case 0x06481039: - return ("SiS 648 host to AGP bridge"); - case 0x06501039: - return ("SiS 650 host to AGP bridge"); - case 0x06511039: - return ("SiS 651 host to AGP bridge"); - case 0x06551039: - return ("SiS 655 host to AGP bridge"); - case 0x06611039: - return ("SiS 661 host to AGP bridge"); - case 0x07301039: - return ("SiS 730 host to AGP bridge"); - case 0x07351039: - return ("SiS 735 host to AGP bridge"); - case 0x07401039: - return ("SiS 740 host to AGP bridge"); - case 0x07411039: - return ("SiS 741 host to AGP bridge"); - case 0x07451039: - return ("SiS 745 host to AGP bridge"); - case 0x07461039: - return ("SiS 746 host to AGP bridge"); - case 0x07601039: - return ("SiS 760 host to AGP bridge"); - }; - - return NULL; -} - -static int -agp_sis_probe(device_t dev) -{ - const char *desc; - - if (resource_disabled("agp", device_get_unit(dev))) - return (ENXIO); - desc = agp_sis_match(dev); - if (desc) { - device_verbose(dev); - device_set_desc(dev, desc); - return BUS_PROBE_DEFAULT; - } - - return ENXIO; -} - -static int -agp_sis_attach(device_t dev) -{ - struct agp_sis_softc *sc = device_get_softc(dev); - struct agp_gatt *gatt; - int error; - - error = agp_generic_attach(dev); - if (error) - return error; - - sc->initial_aperture = AGP_GET_APERTURE(dev); - - for (;;) { - gatt = agp_alloc_gatt(dev); - if (gatt) - break; - - /* - * Probably contigmalloc failure. Try reducing the - * aperture so that the gatt size reduces. - */ - if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { - agp_generic_detach(dev); - return ENOMEM; - } - } - sc->gatt = gatt; - - /* Install the gatt. */ - pci_write_config(dev, AGP_SIS_ATTBASE, gatt->ag_physical, 4); - - /* Enable the aperture. */ - pci_write_config(dev, AGP_SIS_WINCTRL, - pci_read_config(dev, AGP_SIS_WINCTRL, 1) | 3, 1); - - /* - * Enable the TLB and make it automatically invalidate entries - * when the GATT is written. - */ - pci_write_config(dev, AGP_SIS_TLBCTRL, 0x05, 1); - - return 0; -} - -static int -agp_sis_detach(device_t dev) -{ - struct agp_sis_softc *sc = device_get_softc(dev); - int error; - - error = agp_generic_detach(dev); - if (error) - return error; - - /* Disable the aperture.. */ - pci_write_config(dev, AGP_SIS_WINCTRL, - pci_read_config(dev, AGP_SIS_WINCTRL, 1) & ~3, 1); - - /* and the TLB. */ - pci_write_config(dev, AGP_SIS_TLBCTRL, 0, 1); - - /* Put the aperture back the way it started. */ - AGP_SET_APERTURE(dev, sc->initial_aperture); - - agp_free_gatt(sc->gatt); - return 0; -} - -static u_int32_t -agp_sis_get_aperture(device_t dev) -{ - int gws; - - /* - * The aperture size is equal to 4M<<gws. - */ - gws = (pci_read_config(dev, AGP_SIS_WINCTRL, 1) & 0x70) >> 4; - return (4*1024*1024) << gws; -} - -static int -agp_sis_set_aperture(device_t dev, u_int32_t aperture) -{ - int gws; - - /* - * Check for a power of two and make sure its within the - * programmable range. - */ - if (aperture & (aperture - 1) - || aperture < 4*1024*1024 - || aperture > 256*1024*1024) - return EINVAL; - - gws = ffs(aperture / 4*1024*1024) - 1; - - pci_write_config(dev, AGP_SIS_WINCTRL, - ((pci_read_config(dev, AGP_SIS_WINCTRL, 1) & ~0x70) - | gws << 4), 1); - - return 0; -} - -static int -agp_sis_bind_page(device_t dev, int offset, vm_offset_t physical) -{ - struct agp_sis_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical; - return 0; -} - -static int -agp_sis_unbind_page(device_t dev, int offset) -{ - struct agp_sis_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; - return 0; -} - -static void -agp_sis_flush_tlb(device_t dev) -{ - pci_write_config(dev, AGP_SIS_TLBFLUSH, 0x02, 1); -} - -static device_method_t agp_sis_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, agp_sis_probe), - DEVMETHOD(device_attach, agp_sis_attach), - DEVMETHOD(device_detach, agp_sis_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* AGP interface */ - DEVMETHOD(agp_get_aperture, agp_sis_get_aperture), - DEVMETHOD(agp_set_aperture, agp_sis_set_aperture), - DEVMETHOD(agp_bind_page, agp_sis_bind_page), - DEVMETHOD(agp_unbind_page, agp_sis_unbind_page), - DEVMETHOD(agp_flush_tlb, agp_sis_flush_tlb), - DEVMETHOD(agp_enable, agp_generic_enable), - DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), - DEVMETHOD(agp_free_memory, agp_generic_free_memory), - DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), - DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), - - { 0, 0 } -}; - -static driver_t agp_sis_driver = { - "agp", - agp_sis_methods, - sizeof(struct agp_sis_softc), -}; - -static devclass_t agp_devclass; - -DRIVER_MODULE(agp_sis, pci, agp_sis_driver, agp_devclass, 0, 0); -MODULE_DEPEND(agp_sis, agp, 1, 1, 1); -MODULE_DEPEND(agp_sis, pci, 1, 1, 1); diff --git a/sys/dev/agp/agp_via.c b/sys/dev/agp/agp_via.c deleted file mode 100644 index f2cd381..0000000 --- a/sys/dev/agp/agp_via.c +++ /dev/null @@ -1,368 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_bus.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/bus.h> -#include <sys/lock.h> -#include <sys/mutex.h> -#include <sys/proc.h> - -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/agppriv.h> -#include <pci/agpreg.h> - -#include <vm/vm.h> -#include <vm/vm_object.h> -#include <vm/pmap.h> - -#define REG_GARTCTRL 0 -#define REG_APSIZE 1 -#define REG_ATTBASE 2 - -struct agp_via_softc { - struct agp_softc agp; - u_int32_t initial_aperture; /* aperture size at startup */ - struct agp_gatt *gatt; - int *regs; -}; - -static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE, - AGP_VIA_ATTBASE }; -static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE, - AGP3_VIA_ATTBASE }; - -static const char* -agp_via_match(device_t dev) -{ - if (pci_get_class(dev) != PCIC_BRIDGE - || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) - return NULL; - - if (agp_find_caps(dev) == 0) - return NULL; - - switch (pci_get_devid(dev)) { - case 0x01981106: - return ("VIA 8763 (P4X600) host to PCI bridge"); - case 0x02591106: - return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge"); - case 0x02691106: - return ("VIA KT880 host to PCI bridge"); - case 0x02961106: - return ("VIA 3296 (P4M800) host to PCI bridge"); - case 0x03051106: - return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge"); - case 0x03911106: - return ("VIA 8371 (Apollo KX133) host to PCI bridge"); - case 0x05011106: - return ("VIA 8501 (Apollo MVP4) host to PCI bridge"); - case 0x05971106: - return ("VIA 82C597 (Apollo VP3) host to PCI bridge"); - case 0x05981106: - return ("VIA 82C598 (Apollo MVP3) host to PCI bridge"); - case 0x06011106: - return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge"); - case 0x06051106: - return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge"); - case 0x06911106: - return ("VIA 82C691 (Apollo Pro) host to PCI bridge"); - case 0x30911106: - return ("VIA 8633 (Pro 266) host to PCI bridge"); - case 0x30991106: - return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge"); - case 0x31011106: - return ("VIA 8653 (Pro266T) host to PCI bridge"); - case 0x31121106: - return ("VIA 8361 (KLE133) host to PCI bridge"); - case 0x31161106: - return ("VIA XM266 (PM266/KM266) host to PCI bridge"); - case 0x31231106: - return ("VIA 862x (CLE266) host to PCI bridge"); - case 0x31281106: - return ("VIA 8753 (P4X266) host to PCI bridge"); - case 0x31481106: - return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge"); - case 0x31561106: - return ("VIA XN266 (Apollo Pro266) host to PCI bridge"); - case 0x31681106: - return ("VIA 8754 (PT800) host to PCI bridge"); - case 0x31891106: - return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge"); - case 0x32051106: - return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge"); - case 0x32081106: - return ("VIA 8783 (PT890) host to PCI bridge"); - case 0x32581106: - return ("VIA PT880 host to PCI bridge"); - case 0xb1981106: - return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge"); - }; - - return NULL; -} - -static int -agp_via_probe(device_t dev) -{ - const char *desc; - - if (resource_disabled("agp", device_get_unit(dev))) - return (ENXIO); - desc = agp_via_match(dev); - if (desc) { - device_verbose(dev); - device_set_desc(dev, desc); - return BUS_PROBE_DEFAULT; - } - - return ENXIO; -} - -static int -agp_via_attach(device_t dev) -{ - struct agp_via_softc *sc = device_get_softc(dev); - struct agp_gatt *gatt; - int error; - u_int32_t agpsel; - - /* XXX: This should be keying off of whether the bridge is AGP3 capable, - * rather than a bunch of device ids for chipsets that happen to do 8x. - */ - switch (pci_get_devid(dev)) { - case 0x01981106: - case 0x02591106: - case 0x02691106: - case 0x02961106: - case 0x31231106: - case 0x31681106: - case 0x31891106: - case 0x32051106: - case 0x32581106: - case 0xb1981106: - /* The newer VIA chipsets will select the AGP version based on - * what AGP versions the card supports. We still have to - * program it using the v2 registers if it has chosen to use - * compatibility mode. - */ - agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1); - if ((agpsel & (1 << 1)) == 0) - sc->regs = via_v3_regs; - else - sc->regs = via_v2_regs; - break; - default: - sc->regs = via_v2_regs; - break; - } - - error = agp_generic_attach(dev); - if (error) - return error; - - sc->initial_aperture = AGP_GET_APERTURE(dev); - - for (;;) { - gatt = agp_alloc_gatt(dev); - if (gatt) - break; - - /* - * Probably contigmalloc failure. Try reducing the - * aperture so that the gatt size reduces. - */ - if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { - agp_generic_detach(dev); - return ENOMEM; - } - } - sc->gatt = gatt; - - if (sc->regs == via_v2_regs) { - /* Install the gatt. */ - pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4); - - /* Enable the aperture. */ - pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4); - } else { - u_int32_t gartctrl; - - /* Install the gatt. */ - pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4); - - /* Enable the aperture. */ - gartctrl = pci_read_config(dev, sc->regs[REG_ATTBASE], 4); - pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4); - } - - return 0; -} - -static int -agp_via_detach(device_t dev) -{ - struct agp_via_softc *sc = device_get_softc(dev); - int error; - - error = agp_generic_detach(dev); - if (error) - return error; - - pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4); - pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4); - AGP_SET_APERTURE(dev, sc->initial_aperture); - agp_free_gatt(sc->gatt); - - return 0; -} - -static u_int32_t -agp_via_get_aperture(device_t dev) -{ - struct agp_via_softc *sc = device_get_softc(dev); - u_int32_t apsize; - - apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1) & 0x1f; - - /* - * The size is determined by the number of low bits of - * register APBASE which are forced to zero. The low 20 bits - * are always forced to zero and each zero bit in the apsize - * field just read forces the corresponding bit in the 27:20 - * to be zero. We calculate the aperture size accordingly. - */ - return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1; -} - -static int -agp_via_set_aperture(device_t dev, u_int32_t aperture) -{ - struct agp_via_softc *sc = device_get_softc(dev); - u_int32_t apsize; - - /* - * Reverse the magic from get_aperture. - */ - apsize = ((aperture - 1) >> 20) ^ 0xff; - - /* - * Double check for sanity. - */ - if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture) - return EINVAL; - - pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1); - - return 0; -} - -static int -agp_via_bind_page(device_t dev, int offset, vm_offset_t physical) -{ - struct agp_via_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical; - return 0; -} - -static int -agp_via_unbind_page(device_t dev, int offset) -{ - struct agp_via_softc *sc = device_get_softc(dev); - - if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) - return EINVAL; - - sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; - return 0; -} - -static void -agp_via_flush_tlb(device_t dev) -{ - struct agp_via_softc *sc = device_get_softc(dev); - u_int32_t gartctrl; - - if (sc->regs == via_v2_regs) { - pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4); - pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4); - } else { - gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4); - pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl & - ~(1 << 7), 4); - pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4); - } - -} - -static device_method_t agp_via_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, agp_via_probe), - DEVMETHOD(device_attach, agp_via_attach), - DEVMETHOD(device_detach, agp_via_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* AGP interface */ - DEVMETHOD(agp_get_aperture, agp_via_get_aperture), - DEVMETHOD(agp_set_aperture, agp_via_set_aperture), - DEVMETHOD(agp_bind_page, agp_via_bind_page), - DEVMETHOD(agp_unbind_page, agp_via_unbind_page), - DEVMETHOD(agp_flush_tlb, agp_via_flush_tlb), - DEVMETHOD(agp_enable, agp_generic_enable), - DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), - DEVMETHOD(agp_free_memory, agp_generic_free_memory), - DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), - DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), - - { 0, 0 } -}; - -static driver_t agp_via_driver = { - "agp", - agp_via_methods, - sizeof(struct agp_via_softc), -}; - -static devclass_t agp_devclass; - -DRIVER_MODULE(agp_via, pci, agp_via_driver, agp_devclass, 0, 0); -MODULE_DEPEND(agp_via, agp, 1, 1, 1); -MODULE_DEPEND(agp_via, pci, 1, 1, 1); diff --git a/sys/dev/agp/agppriv.h b/sys/dev/agp/agppriv.h deleted file mode 100644 index 7e846d1..0000000 --- a/sys/dev/agp/agppriv.h +++ /dev/null @@ -1,105 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _PCI_AGPPRIV_H_ -#define _PCI_AGPPRIV_H_ - -/* - * This file *must not* be included by code outside the agp driver itself. - */ - -#include <sys/agpio.h> -#include <pci/agpvar.h> - -#define AGP_DEBUGxx - -#ifdef AGP_DEBUG -#define AGP_DPF(x...) do { \ - printf("agp: "); \ - printf(##x); \ -} while (0) -#else -#define AGP_DPF(x...) do {} while (0) -#endif - -#include "agp_if.h" - -/* - * Data structure to describe an AGP memory allocation. - */ -TAILQ_HEAD(agp_memory_list, agp_memory); -struct agp_memory { - TAILQ_ENTRY(agp_memory) am_link; /* wiring for the tailq */ - int am_id; /* unique id for block */ - vm_size_t am_size; /* number of bytes allocated */ - int am_type; /* chipset specific type */ - struct vm_object *am_obj; /* VM object owning pages */ - vm_offset_t am_physical; /* bogus hack for i810 */ - vm_offset_t am_offset; /* page offset if bound */ - int am_is_bound; /* non-zero if bound */ -}; - -/* - * All chipset drivers must have this at the start of their softc. - */ -struct agp_softc { - struct resource *as_aperture; /* location of aperture */ - u_int32_t as_maxmem; /* allocation upper bound */ - u_int32_t as_allocated; /* amount allocated */ - enum agp_acquire_state as_state; - struct agp_memory_list as_memory; /* list of allocated memory */ - int as_nextid; /* next memory block id */ - int as_isopen; /* user device is open */ - struct cdev *as_devnode; /* from make_dev */ - struct mtx as_lock; /* lock for access to GATT */ -}; - -struct agp_gatt { - u_int32_t ag_entries; - u_int32_t *ag_virtual; - vm_offset_t ag_physical; -}; - -void agp_flush_cache(void); -u_int8_t agp_find_caps(device_t dev); -struct agp_gatt *agp_alloc_gatt(device_t dev); -void agp_free_gatt(struct agp_gatt *gatt); -int agp_generic_attach(device_t dev); -int agp_generic_detach(device_t dev); -int agp_generic_enable(device_t dev, u_int32_t mode); -struct agp_memory *agp_generic_alloc_memory(device_t dev, int type, - vm_size_t size); -int agp_generic_free_memory(device_t dev, - struct agp_memory *mem); -int agp_generic_bind_memory(device_t dev, - struct agp_memory *mem, - vm_offset_t offset); -int agp_generic_unbind_memory(device_t dev, - struct agp_memory *mem); - -#endif /* !_PCI_AGPPRIV_H_ */ diff --git a/sys/dev/agp/agpreg.h b/sys/dev/agp/agpreg.h deleted file mode 100644 index 4b2d5b3..0000000 --- a/sys/dev/agp/agpreg.h +++ /dev/null @@ -1,265 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _PCI_AGPREG_H_ -#define _PCI_AGPREG_H_ - -/* - * Offsets for various AGP configuration registers. - */ -#define AGP_APBASE 0x10 -#define AGP_CAPPTR 0x34 - -/* - * Offsets from the AGP Capability pointer. - */ -#define AGP_CAPID 0x0 -#define AGP_CAPID_GET_MAJOR(x) (((x) & 0x00f00000U) >> 20) -#define AGP_CAPID_GET_MINOR(x) (((x) & 0x000f0000U) >> 16) -#define AGP_CAPID_GET_NEXT_PTR(x) (((x) & 0x0000ff00U) >> 8) -#define AGP_CAPID_GET_CAP_ID(x) (((x) & 0x000000ffU) >> 0) - -#define AGP_STATUS 0x4 -#define AGP_COMMAND 0x8 -#define AGP_STATUS_AGP3 0x0008 -#define AGP_STATUS_RQ_MASK 0xff000000 -#define AGP_COMMAND_RQ_MASK 0xff000000 -#define AGP_STATUS_ARQSZ_MASK 0xe000 -#define AGP_COMMAND_ARQSZ_MASK 0xe000 -#define AGP_STATUS_CAL_MASK 0x1c00 -#define AGP_COMMAND_CAL_MASK 0x1c00 -#define AGP_STATUS_ISOCH 0x10000 -#define AGP_STATUS_SBA 0x0200 -#define AGP_STATUS_ITA_COH 0x0100 -#define AGP_STATUS_GART64 0x0080 -#define AGP_STATUS_HTRANS 0x0040 -#define AGP_STATUS_64BIT 0x0020 -#define AGP_STATUS_FW 0x0010 -#define AGP_COMMAND_RQ_MASK 0xff000000 -#define AGP_COMMAND_ARQSZ_MASK 0xe000 -#define AGP_COMMAND_CAL_MASK 0x1c00 -#define AGP_COMMAND_SBA 0x0200 -#define AGP_COMMAND_AGP 0x0100 -#define AGP_COMMAND_GART64 0x0080 -#define AGP_COMMAND_64BIT 0x0020 -#define AGP_COMMAND_FW 0x0010 - -/* - * Config offsets for Intel AGP chipsets. - */ -#define AGP_INTEL_NBXCFG 0x50 -#define AGP_INTEL_ERRSTS 0x91 -#define AGP_INTEL_AGPCTRL 0xb0 -#define AGP_INTEL_APSIZE 0xb4 -#define AGP_INTEL_ATTBASE 0xb8 - -/* - * Config offsets for Intel i820/i840/i845/i850/i860/i865 AGP chipsets. - */ -#define AGP_INTEL_MCHCFG 0x50 -#define AGP_INTEL_I820_RDCR 0x51 -#define AGP_INTEL_I845_MCHCFG 0x51 -#define AGP_INTEL_I8XX_ERRSTS 0xc8 - -/* - * Config offsets for VIA AGP 2.x chipsets. - */ -#define AGP_VIA_GARTCTRL 0x80 -#define AGP_VIA_APSIZE 0x84 -#define AGP_VIA_ATTBASE 0x88 - -/* - * Config offsets for VIA AGP 3.0 chipsets. - */ -#define AGP3_VIA_GARTCTRL 0x90 -#define AGP3_VIA_APSIZE 0x94 -#define AGP3_VIA_ATTBASE 0x98 -#define AGP_VIA_AGPSEL 0xfd - -/* - * Config offsets for SiS AGP chipsets. - */ -#define AGP_SIS_ATTBASE 0x90 -#define AGP_SIS_WINCTRL 0x94 -#define AGP_SIS_TLBCTRL 0x97 -#define AGP_SIS_TLBFLUSH 0x98 - -/* - * Config offsets for Ali AGP chipsets. - */ -#define AGP_ALI_AGPCTRL 0xb8 -#define AGP_ALI_ATTBASE 0xbc -#define AGP_ALI_TLBCTRL 0xc0 - -/* - * Config offsets for the AMD 751 chipset. - */ -#define AGP_AMD751_APBASE 0x10 -#define AGP_AMD751_REGISTERS 0x14 -#define AGP_AMD751_APCTRL 0xac -#define AGP_AMD751_MODECTRL 0xb0 -#define AGP_AMD751_MODECTRL_SYNEN 0x80 -#define AGP_AMD751_MODECTRL2 0xb2 -#define AGP_AMD751_MODECTRL2_G1LM 0x01 -#define AGP_AMD751_MODECTRL2_GPDCE 0x02 -#define AGP_AMD751_MODECTRL2_NGSE 0x08 - -/* - * Memory mapped register offsets for AMD 751 chipset. - */ -#define AGP_AMD751_CAPS 0x00 -#define AGP_AMD751_CAPS_EHI 0x0800 -#define AGP_AMD751_CAPS_P2P 0x0400 -#define AGP_AMD751_CAPS_MPC 0x0200 -#define AGP_AMD751_CAPS_VBE 0x0100 -#define AGP_AMD751_CAPS_REV 0x00ff -#define AGP_AMD751_STATUS 0x02 -#define AGP_AMD751_STATUS_P2PS 0x0800 -#define AGP_AMD751_STATUS_GCS 0x0400 -#define AGP_AMD751_STATUS_MPS 0x0200 -#define AGP_AMD751_STATUS_VBES 0x0100 -#define AGP_AMD751_STATUS_P2PE 0x0008 -#define AGP_AMD751_STATUS_GCE 0x0004 -#define AGP_AMD751_STATUS_VBEE 0x0001 -#define AGP_AMD751_ATTBASE 0x04 -#define AGP_AMD751_TLBCTRL 0x0c - -/* - * Config registers for i810 device 0 - */ -#define AGP_I810_SMRAM 0x70 -#define AGP_I810_SMRAM_GMS 0xc0 -#define AGP_I810_SMRAM_GMS_DISABLED 0x00 -#define AGP_I810_SMRAM_GMS_ENABLED_0 0x40 -#define AGP_I810_SMRAM_GMS_ENABLED_512 0x80 -#define AGP_I810_SMRAM_GMS_ENABLED_1024 0xc0 -#define AGP_I810_MISCC 0x72 -#define AGP_I810_MISCC_WINSIZE 0x0001 -#define AGP_I810_MISCC_WINSIZE_64 0x0000 -#define AGP_I810_MISCC_WINSIZE_32 0x0001 -#define AGP_I810_MISCC_PLCK 0x0008 -#define AGP_I810_MISCC_PLCK_UNLOCKED 0x0000 -#define AGP_I810_MISCC_PLCK_LOCKED 0x0008 -#define AGP_I810_MISCC_WPTC 0x0030 -#define AGP_I810_MISCC_WPTC_NOLIMIT 0x0000 -#define AGP_I810_MISCC_WPTC_62 0x0010 -#define AGP_I810_MISCC_WPTC_50 0x0020 -#define AGP_I810_MISCC_WPTC_37 0x0030 -#define AGP_I810_MISCC_RPTC 0x00c0 -#define AGP_I810_MISCC_RPTC_NOLIMIT 0x0000 -#define AGP_I810_MISCC_RPTC_62 0x0040 -#define AGP_I810_MISCC_RPTC_50 0x0080 -#define AGP_I810_MISCC_RPTC_37 0x00c0 - -/* - * Config registers for i810 device 1 - */ -#define AGP_I810_GMADR 0x10 -#define AGP_I810_MMADR 0x14 - -/* - * Memory mapped register offsets for i810 chipset. - */ -#define AGP_I810_PGTBL_CTL 0x2020 -#define AGP_I810_DRT 0x3000 -#define AGP_I810_DRT_UNPOPULATED 0x00 -#define AGP_I810_DRT_POPULATED 0x01 -#define AGP_I810_GTT 0x10000 - -/* - * Config registers for i830MG device 0 - */ -#define AGP_I830_GCC1 0x52 -#define AGP_I830_GCC1_DEV2 0x08 -#define AGP_I830_GCC1_DEV2_ENABLED 0x00 -#define AGP_I830_GCC1_DEV2_DISABLED 0x08 -#define AGP_I830_GCC1_GMS 0x70 -#define AGP_I830_GCC1_GMS_STOLEN_512 0x20 -#define AGP_I830_GCC1_GMS_STOLEN_1024 0x30 -#define AGP_I830_GCC1_GMS_STOLEN_8192 0x40 -#define AGP_I830_GCC1_GMASIZE 0x01 -#define AGP_I830_GCC1_GMASIZE_64 0x01 -#define AGP_I830_GCC1_GMASIZE_128 0x00 - -/* - * Config registers for 852GM/855GM/865G device 0 - */ -#define AGP_I855_GCC1 0x52 -#define AGP_I855_GCC1_DEV2 0x08 -#define AGP_I855_GCC1_DEV2_ENABLED 0x00 -#define AGP_I855_GCC1_DEV2_DISABLED 0x08 -#define AGP_I855_GCC1_GMS 0x70 -#define AGP_I855_GCC1_GMS_STOLEN_0M 0x00 -#define AGP_I855_GCC1_GMS_STOLEN_1M 0x10 -#define AGP_I855_GCC1_GMS_STOLEN_4M 0x20 -#define AGP_I855_GCC1_GMS_STOLEN_8M 0x30 -#define AGP_I855_GCC1_GMS_STOLEN_16M 0x40 -#define AGP_I855_GCC1_GMS_STOLEN_32M 0x50 - -/* - * 852GM/855GM variant identification - */ -#define AGP_I85X_CAPID 0x44 -#define AGP_I85X_VARIANT_MASK 0x7 -#define AGP_I85X_VARIANT_SHIFT 5 -#define AGP_I855_GME 0x0 -#define AGP_I855_GM 0x4 -#define AGP_I852_GME 0x2 -#define AGP_I852_GM 0x5 - -/* - * NVIDIA nForce/nForce2 registers - */ -#define AGP_NVIDIA_0_APBASE 0x10 -#define AGP_NVIDIA_0_APSIZE 0x80 -#define AGP_NVIDIA_1_WBC 0xf0 -#define AGP_NVIDIA_2_GARTCTRL 0xd0 -#define AGP_NVIDIA_2_APBASE 0xd8 -#define AGP_NVIDIA_2_APLIMIT 0xdc -#define AGP_NVIDIA_2_ATTBASE(i) (0xe0 + (i) * 4) -#define AGP_NVIDIA_3_APBASE 0x50 -#define AGP_NVIDIA_3_APLIMIT 0x54 - -/* - * AMD64 GART registers - */ -#define AGP_AMD64_APCTRL 0x90 -#define AGP_AMD64_APBASE 0x94 -#define AGP_AMD64_ATTBASE 0x98 -#define AGP_AMD64_CACHECTRL 0x9c -#define AGP_AMD64_APCTRL_GARTEN 0x00000001 -#define AGP_AMD64_APCTRL_SIZE_MASK 0x0000000e -#define AGP_AMD64_APCTRL_DISGARTCPU 0x00000010 -#define AGP_AMD64_APCTRL_DISGARTIO 0x00000020 -#define AGP_AMD64_APCTRL_DISWLKPRB 0x00000040 -#define AGP_AMD64_APBASE_MASK 0x00007fff -#define AGP_AMD64_ATTBASE_MASK 0xfffffff0 -#define AGP_AMD64_CACHECTRL_INVGART 0x00000001 -#define AGP_AMD64_CACHECTRL_PTEERR 0x00000002 - -#endif /* !_PCI_AGPREG_H_ */ diff --git a/sys/dev/agp/agpvar.h b/sys/dev/agp/agpvar.h deleted file mode 100644 index 0869c26..0000000 --- a/sys/dev/agp/agpvar.h +++ /dev/null @@ -1,126 +0,0 @@ -/*- - * Copyright (c) 2000 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _PCI_AGPVAR_H_ -#define _PCI_AGPVAR_H_ - -/* - * The AGP chipset can be acquired by user or kernel code. If the - * chipset has already been acquired, it cannot be acquired by another - * user until the previous user has released it. - */ -enum agp_acquire_state { - AGP_ACQUIRE_FREE, - AGP_ACQUIRE_USER, - AGP_ACQUIRE_KERNEL -}; - -/* - * This structure is used to query the state of the AGP system. - */ -struct agp_info { - u_int32_t ai_mode; - vm_offset_t ai_aperture_base; - vm_size_t ai_aperture_size; - vm_offset_t ai_aperture_va; - vm_size_t ai_memory_allowed; - vm_size_t ai_memory_used; - u_int32_t ai_devid; -}; - -struct agp_memory_info { - vm_size_t ami_size; /* size in bytes */ - vm_offset_t ami_physical; /* bogus hack for i810 */ - vm_offset_t ami_offset; /* page offset if bound */ - int ami_is_bound; /* non-zero if bound */ -}; - -/* - * Find the AGP device and return it. - */ -device_t agp_find_device(void); - -/* - * Return the current owner of the AGP chipset. - */ -enum agp_acquire_state agp_state(device_t dev); - -/* - * Query the state of the AGP system. - */ -void agp_get_info(device_t dev, struct agp_info *info); - -/* - * Acquire the AGP chipset for use by the kernel. Returns EBUSY if the - * AGP chipset is already acquired by another user. - */ -int agp_acquire(device_t dev); - -/* - * Release the AGP chipset. - */ -int agp_release(device_t dev); - -/* - * Enable the agp hardware with the relavent mode. The mode bits are - * defined in <pci/agpreg.h> - */ -int agp_enable(device_t dev, u_int32_t mode); - -/* - * Allocate physical memory suitable for mapping into the AGP - * aperture. The value returned is an opaque handle which can be - * passed to agp_bind(), agp_unbind() or agp_deallocate(). - */ -void *agp_alloc_memory(device_t dev, int type, vm_size_t bytes); - -/* - * Free memory which was allocated with agp_allocate(). - */ -void agp_free_memory(device_t dev, void *handle); - -/* - * Bind memory allocated with agp_allocate() at a given offset within - * the AGP aperture. Returns EINVAL if the memory is already bound or - * the offset is not at an AGP page boundary. - */ -int agp_bind_memory(device_t dev, void *handle, vm_offset_t offset); - -/* - * Unbind memory from the AGP aperture. Returns EINVAL if the memory - * is not bound. - */ -int agp_unbind_memory(device_t dev, void *handle); - -/* - * Retrieve information about a memory block allocated with - * agp_alloc_memory(). - */ -void agp_memory_info(device_t dev, void *handle, struct agp_memory_info *mi); - -#endif /* !_PCI_AGPVAR_H_ */ diff --git a/sys/dev/dc/dcphy.c b/sys/dev/dc/dcphy.c deleted file mode 100644 index 3a6a5de..0000000 --- a/sys/dev/dc/dcphy.c +++ /dev/null @@ -1,459 +0,0 @@ -/*- - * Copyright (c) 1997, 1998, 1999 - * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Pseudo-driver for internal NWAY support on DEC 21143 and workalike - * controllers. Technically we're abusing the miibus code to handle - * media selection and NWAY support here since there is no MII - * interface. However the logical operations are roughly the same, - * and the alternative is to create a fake MII interface in the driver, - * which is harder to do. - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/kernel.h> -#include <sys/socket.h> -#include <sys/errno.h> -#include <sys/lock.h> -#include <sys/module.h> -#include <sys/mutex.h> -#include <sys/bus.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/if_media.h> - -#include <dev/mii/mii.h> -#include <dev/mii/miivar.h> -#include "miidevs.h" - -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/bus.h> - -#include <dev/pci/pcivar.h> - -#include <pci/if_dcreg.h> - -#include "miibus_if.h" - -#define DC_SETBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, \ - CSR_READ_4(sc, reg) | x) - -#define DC_CLRBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, \ - CSR_READ_4(sc, reg) & ~x) - -#define MIIF_AUTOTIMEOUT 0x0004 - -/* - * This is the subsystem ID for the built-in 21143 ethernet - * in several Compaq Presario systems. Apparently these are - * 10Mbps only, so we need to treat them specially. - */ -#define COMPAQ_PRESARIO_ID 0xb0bb0e11 - -static int dcphy_probe(device_t); -static int dcphy_attach(device_t); - -static device_method_t dcphy_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, dcphy_probe), - DEVMETHOD(device_attach, dcphy_attach), - DEVMETHOD(device_detach, mii_phy_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - { 0, 0 } -}; - -static devclass_t dcphy_devclass; - -static driver_t dcphy_driver = { - "dcphy", - dcphy_methods, - sizeof(struct mii_softc) -}; - -DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0); - -static int dcphy_service(struct mii_softc *, struct mii_data *, int); -static void dcphy_status(struct mii_softc *); -static void dcphy_reset(struct mii_softc *); -static int dcphy_auto(struct mii_softc *); - -static int -dcphy_probe(dev) - device_t dev; -{ - struct mii_attach_args *ma; - - ma = device_get_ivars(dev); - - /* - * The dc driver will report the 21143 vendor and device - * ID to let us know that it wants us to attach. - */ - if (ma->mii_id1 != DC_VENDORID_DEC || - ma->mii_id2 != DC_DEVICEID_21143) - return(ENXIO); - - device_set_desc(dev, "Intel 21143 NWAY media interface"); - - return (0); -} - -static int -dcphy_attach(dev) - device_t dev; -{ - struct mii_softc *sc; - struct mii_attach_args *ma; - struct mii_data *mii; - struct dc_softc *dc_sc; - - sc = device_get_softc(dev); - ma = device_get_ivars(dev); - sc->mii_dev = device_get_parent(dev); - mii = device_get_softc(sc->mii_dev); - LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); - - sc->mii_inst = mii->mii_instance; - sc->mii_phy = ma->mii_phyno; - sc->mii_service = dcphy_service; - sc->mii_pdata = mii; - - sc->mii_flags |= MIIF_NOISOLATE; - mii->mii_instance++; - -#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) - - ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), - BMCR_ISO); - - /*dcphy_reset(sc);*/ - dc_sc = mii->mii_ifp->if_softc; - CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); - CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); - - switch(pci_read_config(device_get_parent(sc->mii_dev), - DC_PCI_CSID, 4)) { - case COMPAQ_PRESARIO_ID: - /* Example of how to only allow 10Mbps modes. */ - sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; - break; - default: - if (dc_sc->dc_pmode == DC_PMODE_SIA) { - sc->mii_capabilities = - BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX; - } else { - ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, - sc->mii_inst), BMCR_LOOP|BMCR_S100); - - sc->mii_capabilities = - BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX| - BMSR_10TFDX|BMSR_10THDX; - } - break; - } - - sc->mii_capabilities &= ma->mii_capmask; - device_printf(dev, " "); - mii_add_media(sc); - printf("\n"); -#undef ADD - - MIIBUS_MEDIAINIT(sc->mii_dev); - return(0); -} - -static int -dcphy_service(sc, mii, cmd) - struct mii_softc *sc; - struct mii_data *mii; - int cmd; -{ - struct dc_softc *dc_sc; - struct ifmedia_entry *ife = mii->mii_media.ifm_cur; - int reg; - u_int32_t mode; - - dc_sc = mii->mii_ifp->if_softc; - - switch (cmd) { - case MII_POLLSTAT: - /* - * If we're not polling our PHY instance, just return. - */ - if (IFM_INST(ife->ifm_media) != sc->mii_inst) { - return (0); - } - break; - - case MII_MEDIACHG: - /* - * If the media indicates a different PHY instance, - * isolate ourselves. - */ - if (IFM_INST(ife->ifm_media) != sc->mii_inst) { - return (0); - } - - /* - * If the interface is not up, don't do anything. - */ - if ((mii->mii_ifp->if_flags & IFF_UP) == 0) - break; - - sc->mii_flags = 0; - mii->mii_media_active = IFM_NONE; - mode = CSR_READ_4(dc_sc, DC_NETCFG); - mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL| - DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL); - - switch (IFM_SUBTYPE(ife->ifm_media)) { - case IFM_AUTO: - /*dcphy_reset(sc);*/ - (void) dcphy_auto(sc); - break; - case IFM_100_T4: - /* - * XXX Not supported as a manual setting right now. - */ - return (EINVAL); - case IFM_100_TX: - dcphy_reset(sc); - DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); - mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS| - DC_NETCFG_SCRAMBLER; - if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) - mode |= DC_NETCFG_FULLDUPLEX; - else - mode &= ~DC_NETCFG_FULLDUPLEX; - CSR_WRITE_4(dc_sc, DC_NETCFG, mode); - break; - case IFM_10_T: - DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); - DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); - if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) - DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D); - else - DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F); - DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET); - DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); - mode &= ~DC_NETCFG_PORTSEL; - mode |= DC_NETCFG_SPEEDSEL; - if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) - mode |= DC_NETCFG_FULLDUPLEX; - else - mode &= ~DC_NETCFG_FULLDUPLEX; - CSR_WRITE_4(dc_sc, DC_NETCFG, mode); - break; - default: - return(EINVAL); - } - break; - - case MII_TICK: - /* - * If we're not currently selected, just return. - */ - if (IFM_INST(ife->ifm_media) != sc->mii_inst) - return (0); - - /* - * Is the interface even up? - */ - if ((mii->mii_ifp->if_flags & IFF_UP) == 0) - return (0); - - /* - * Only used for autonegotiation. - */ - if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) - break; - - reg = CSR_READ_4(dc_sc, DC_10BTSTAT); - if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) - break; - - /* - * Only retry autonegotiation every 5 seconds. - * - * Otherwise, fall through to calling dcphy_status() - * since real Intel 21143 chips don't show valid link - * status until autonegotiation is switched off, and - * that only happens in dcphy_status(). Without this, - * successful autonegotiation is never recognised on - * these chips. - */ - if (++sc->mii_ticks <= 50) - break; - - sc->mii_ticks = 0; - dcphy_auto(sc); - - break; - } - - /* Update the media status. */ - dcphy_status(sc); - - /* Callback if something changed. */ - mii_phy_update(sc, cmd); - return (0); -} - -static void -dcphy_status(sc) - struct mii_softc *sc; -{ - struct mii_data *mii = sc->mii_pdata; - int reg, anlpar, tstat = 0; - struct dc_softc *dc_sc; - - dc_sc = mii->mii_ifp->if_softc; - - mii->mii_media_status = IFM_AVALID; - mii->mii_media_active = IFM_ETHER; - - if ((mii->mii_ifp->if_flags & IFF_UP) == 0) - return; - - reg = CSR_READ_4(dc_sc, DC_10BTSTAT); - if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100)) - mii->mii_media_status |= IFM_ACTIVE; - - if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) { - /* Erg, still trying, I guess... */ - tstat = CSR_READ_4(dc_sc, DC_10BTSTAT); - if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) { - if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) && - (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE) - goto skip; - mii->mii_media_active |= IFM_NONE; - return; - } - - if (tstat & DC_TSTAT_LP_CAN_NWAY) { - anlpar = tstat >> 16; - if (anlpar & ANLPAR_T4 && - sc->mii_capabilities & BMSR_100TXHDX) - mii->mii_media_active |= IFM_100_T4; - else if (anlpar & ANLPAR_TX_FD && - sc->mii_capabilities & BMSR_100TXFDX) - mii->mii_media_active |= IFM_100_TX|IFM_FDX; - else if (anlpar & ANLPAR_TX && - sc->mii_capabilities & BMSR_100TXHDX) - mii->mii_media_active |= IFM_100_TX; - else if (anlpar & ANLPAR_10_FD) - mii->mii_media_active |= IFM_10_T|IFM_FDX; - else if (anlpar & ANLPAR_10) - mii->mii_media_active |= IFM_10_T; - else - mii->mii_media_active |= IFM_NONE; - if (DC_IS_INTEL(dc_sc)) - DC_CLRBIT(dc_sc, DC_10BTCTRL, - DC_TCTL_AUTONEGENBL); - return; - } - /* - * If the other side doesn't support NWAY, then the - * best we can do is determine if we have a 10Mbps or - * 100Mbps link. There's no way to know if the link - * is full or half duplex, so we default to half duplex - * and hope that the user is clever enough to manually - * change the media settings if we're wrong. - */ - if (!(reg & DC_TSTAT_LS100)) - mii->mii_media_active |= IFM_100_TX; - else if (!(reg & DC_TSTAT_LS10)) - mii->mii_media_active |= IFM_10_T; - else - mii->mii_media_active |= IFM_NONE; - if (DC_IS_INTEL(dc_sc)) - DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); - return; - } - -skip: - - if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL) - mii->mii_media_active |= IFM_10_T; - else - mii->mii_media_active |= IFM_100_TX; - if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) - mii->mii_media_active |= IFM_FDX; - - return; -} - -static int -dcphy_auto(mii) - struct mii_softc *mii; -{ - struct dc_softc *sc; - - sc = mii->mii_pdata->mii_ifp->if_softc; - - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); - DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); - if (mii->mii_capabilities & BMSR_100TXHDX) - CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF); - else - CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF); - DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); - DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL); - DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE); - - return(EJUSTRETURN); -} - -static void -dcphy_reset(mii) - struct mii_softc *mii; -{ - struct dc_softc *sc; - - sc = mii->mii_pdata->mii_ifp->if_softc; - - DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); - DELAY(1000); - DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); - - return; -} - diff --git a/sys/dev/dc/if_dc.c b/sys/dev/dc/if_dc.c deleted file mode 100644 index f86d4e4..0000000 --- a/sys/dev/dc/if_dc.c +++ /dev/null @@ -1,3824 +0,0 @@ -/*- - * Copyright (c) 1997, 1998, 1999 - * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * DEC "tulip" clone ethernet driver. Supports the DEC/Intel 21143 - * series chips and several workalikes including the following: - * - * Macronix 98713/98715/98725/98727/98732 PMAC (www.macronix.com) - * Macronix/Lite-On 82c115 PNIC II (www.macronix.com) - * Lite-On 82c168/82c169 PNIC (www.litecom.com) - * ASIX Electronics AX88140A (www.asix.com.tw) - * ASIX Electronics AX88141 (www.asix.com.tw) - * ADMtek AL981 (www.admtek.com.tw) - * ADMtek AN985 (www.admtek.com.tw) - * Netgear FA511 (www.netgear.com) Appears to be rebadged ADMTek AN985 - * Davicom DM9100, DM9102, DM9102A (www.davicom8.com) - * Accton EN1217 (www.accton.com) - * Xircom X3201 (www.xircom.com) - * Abocom FE2500 - * Conexant LANfinity (www.conexant.com) - * 3Com OfficeConnect 10/100B 3CSOHO100B (www.3com.com) - * - * Datasheets for the 21143 are available at developer.intel.com. - * Datasheets for the clone parts can be found at their respective sites. - * (Except for the PNIC; see www.freebsd.org/~wpaul/PNIC/pnic.ps.gz.) - * The PNIC II is essentially a Macronix 98715A chip; the only difference - * worth noting is that its multicast hash table is only 128 bits wide - * instead of 512. - * - * Written by Bill Paul <wpaul@ee.columbia.edu> - * Electrical Engineering Department - * Columbia University, New York City - */ -/* - * The Intel 21143 is the successor to the DEC 21140. It is basically - * the same as the 21140 but with a few new features. The 21143 supports - * three kinds of media attachments: - * - * o MII port, for 10Mbps and 100Mbps support and NWAY - * autonegotiation provided by an external PHY. - * o SYM port, for symbol mode 100Mbps support. - * o 10baseT port. - * o AUI/BNC port. - * - * The 100Mbps SYM port and 10baseT port can be used together in - * combination with the internal NWAY support to create a 10/100 - * autosensing configuration. - * - * Note that not all tulip workalikes are handled in this driver: we only - * deal with those which are relatively well behaved. The Winbond is - * handled separately due to its different register offsets and the - * special handling needed for its various bugs. The PNIC is handled - * here, but I'm not thrilled about it. - * - * All of the workalike chips use some form of MII transceiver support - * with the exception of the Macronix chips, which also have a SYM port. - * The ASIX AX88140A is also documented to have a SYM port, but all - * the cards I've seen use an MII transceiver, probably because the - * AX88140A doesn't support internal NWAY. - */ - -#include <sys/param.h> -#include <sys/endian.h> -#include <sys/systm.h> -#include <sys/sockio.h> -#include <sys/mbuf.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/socket.h> -#include <sys/sysctl.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/ethernet.h> -#include <net/if_dl.h> -#include <net/if_media.h> -#include <net/if_types.h> -#include <net/if_vlan_var.h> - -#include <net/bpf.h> - -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/bus.h> -#include <sys/rman.h> - -#include <dev/mii/mii.h> -#include <dev/mii/miivar.h> - -#include <dev/pci/pcireg.h> -#include <dev/pci/pcivar.h> - -#define DC_USEIOSPACE -#ifdef __alpha__ -#define SRM_MEDIA -#endif - -#include <pci/if_dcreg.h> - -#ifdef __sparc64__ -#include <dev/ofw/openfirm.h> -#include <machine/ofw_machdep.h> -#endif - -MODULE_DEPEND(dc, pci, 1, 1, 1); -MODULE_DEPEND(dc, ether, 1, 1, 1); -MODULE_DEPEND(dc, miibus, 1, 1, 1); - -/* "controller miibus0" required. See GENERIC if you get errors here. */ -#include "miibus_if.h" - -/* - * Various supported device vendors/types and their names. - */ -static struct dc_type dc_devs[] = { - { DC_VENDORID_DEC, DC_DEVICEID_21143, - "Intel 21143 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9009, - "Davicom DM9009 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9100, - "Davicom DM9100 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102, - "Davicom DM9102 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102, - "Davicom DM9102A 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_AL981, - "ADMtek AL981 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_AN985, - "ADMtek AN985 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511, - "ADMtek ADM9511 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513, - "ADMtek ADM9513 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_FA511, - "Netgear FA511 10/100BaseTX" }, - { DC_VENDORID_ASIX, DC_DEVICEID_AX88140A, - "ASIX AX88140A 10/100BaseTX" }, - { DC_VENDORID_ASIX, DC_DEVICEID_AX88140A, - "ASIX AX88141 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98713, - "Macronix 98713 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98713, - "Macronix 98713A 10/100BaseTX" }, - { DC_VENDORID_CP, DC_DEVICEID_98713_CP, - "Compex RL100-TX 10/100BaseTX" }, - { DC_VENDORID_CP, DC_DEVICEID_98713_CP, - "Compex RL100-TX 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, - "Macronix 98715/98715A 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, - "Macronix 98715AEC-C 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, - "Macronix 98725 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98727, - "Macronix 98727/98732 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C115, - "LC82C115 PNIC II 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C168, - "82c168 PNIC 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C168, - "82c169 PNIC 10/100BaseTX" }, - { DC_VENDORID_ACCTON, DC_DEVICEID_EN1217, - "Accton EN1217 10/100BaseTX" }, - { DC_VENDORID_ACCTON, DC_DEVICEID_EN2242, - "Accton EN2242 MiniPCI 10/100BaseTX" }, - { DC_VENDORID_XIRCOM, DC_DEVICEID_X3201, - "Xircom X3201 10/100BaseTX" }, - { DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500, - "Abocom FE2500 10/100BaseTX" }, - { DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX, - "Abocom FE2500MX 10/100BaseTX" }, - { DC_VENDORID_CONEXANT, DC_DEVICEID_RS7112, - "Conexant LANfinity MiniPCI 10/100BaseTX" }, - { DC_VENDORID_HAWKING, DC_DEVICEID_HAWKING_PN672TX, - "Hawking CB102 CardBus 10/100" }, - { DC_VENDORID_PLANEX, DC_DEVICEID_FNW3602T, - "PlaneX FNW-3602-T CardBus 10/100" }, - { DC_VENDORID_3COM, DC_DEVICEID_3CSOHOB, - "3Com OfficeConnect 10/100B" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN120, - "Microsoft MN-120 CardBus 10/100" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130, - "Microsoft MN-130 10/100" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130_FAKE, - "Microsoft MN-130 10/100" }, - { 0, 0, NULL } -}; - -static int dc_probe(device_t); -static int dc_attach(device_t); -static int dc_detach(device_t); -static int dc_suspend(device_t); -static int dc_resume(device_t); -static struct dc_type *dc_devtype(device_t); -static int dc_newbuf(struct dc_softc *, int, int); -static int dc_encap(struct dc_softc *, struct mbuf **); -static void dc_pnic_rx_bug_war(struct dc_softc *, int); -static int dc_rx_resync(struct dc_softc *); -static void dc_rxeof(struct dc_softc *); -static void dc_txeof(struct dc_softc *); -static void dc_tick(void *); -static void dc_tx_underrun(struct dc_softc *); -static void dc_intr(void *); -static void dc_start(struct ifnet *); -static int dc_ioctl(struct ifnet *, u_long, caddr_t); -static void dc_init(void *); -static void dc_stop(struct dc_softc *); -static void dc_watchdog(struct ifnet *); -static void dc_shutdown(device_t); -static int dc_ifmedia_upd(struct ifnet *); -static void dc_ifmedia_sts(struct ifnet *, struct ifmediareq *); - -static void dc_delay(struct dc_softc *); -static void dc_eeprom_idle(struct dc_softc *); -static void dc_eeprom_putbyte(struct dc_softc *, int); -static void dc_eeprom_getword(struct dc_softc *, int, u_int16_t *); -static void dc_eeprom_getword_pnic(struct dc_softc *, int, u_int16_t *); -static void dc_eeprom_getword_xircom(struct dc_softc *, int, u_int16_t *); -static void dc_eeprom_width(struct dc_softc *); -static void dc_read_eeprom(struct dc_softc *, caddr_t, int, int, int); - -static void dc_mii_writebit(struct dc_softc *, int); -static int dc_mii_readbit(struct dc_softc *); -static void dc_mii_sync(struct dc_softc *); -static void dc_mii_send(struct dc_softc *, u_int32_t, int); -static int dc_mii_readreg(struct dc_softc *, struct dc_mii_frame *); -static int dc_mii_writereg(struct dc_softc *, struct dc_mii_frame *); -static int dc_miibus_readreg(device_t, int, int); -static int dc_miibus_writereg(device_t, int, int, int); -static void dc_miibus_statchg(device_t); -static void dc_miibus_mediainit(device_t); - -static void dc_setcfg(struct dc_softc *, int); -static uint32_t dc_mchash_le(struct dc_softc *, const uint8_t *); -static uint32_t dc_mchash_be(const uint8_t *); -static void dc_setfilt_21143(struct dc_softc *); -static void dc_setfilt_asix(struct dc_softc *); -static void dc_setfilt_admtek(struct dc_softc *); -static void dc_setfilt_xircom(struct dc_softc *); - -static void dc_setfilt(struct dc_softc *); - -static void dc_reset(struct dc_softc *); -static int dc_list_rx_init(struct dc_softc *); -static int dc_list_tx_init(struct dc_softc *); - -static void dc_read_srom(struct dc_softc *, int); -static void dc_parse_21143_srom(struct dc_softc *); -static void dc_decode_leaf_sia(struct dc_softc *, struct dc_eblock_sia *); -static void dc_decode_leaf_mii(struct dc_softc *, struct dc_eblock_mii *); -static void dc_decode_leaf_sym(struct dc_softc *, struct dc_eblock_sym *); -static void dc_apply_fixup(struct dc_softc *, int); - -static void dc_dma_map_txbuf(void *, bus_dma_segment_t *, int, bus_size_t, int); -static void dc_dma_map_rxbuf(void *, bus_dma_segment_t *, int, bus_size_t, int); - -#ifdef DC_USEIOSPACE -#define DC_RES SYS_RES_IOPORT -#define DC_RID DC_PCI_CFBIO -#else -#define DC_RES SYS_RES_MEMORY -#define DC_RID DC_PCI_CFBMA -#endif - -static device_method_t dc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, dc_probe), - DEVMETHOD(device_attach, dc_attach), - DEVMETHOD(device_detach, dc_detach), - DEVMETHOD(device_suspend, dc_suspend), - DEVMETHOD(device_resume, dc_resume), - DEVMETHOD(device_shutdown, dc_shutdown), - - /* bus interface */ - DEVMETHOD(bus_print_child, bus_generic_print_child), - DEVMETHOD(bus_driver_added, bus_generic_driver_added), - - /* MII interface */ - DEVMETHOD(miibus_readreg, dc_miibus_readreg), - DEVMETHOD(miibus_writereg, dc_miibus_writereg), - DEVMETHOD(miibus_statchg, dc_miibus_statchg), - DEVMETHOD(miibus_mediainit, dc_miibus_mediainit), - - { 0, 0 } -}; - -static driver_t dc_driver = { - "dc", - dc_methods, - sizeof(struct dc_softc) -}; - -static devclass_t dc_devclass; -#ifdef __i386__ -static int dc_quick = 1; -SYSCTL_INT(_hw, OID_AUTO, dc_quick, CTLFLAG_RW, &dc_quick, 0, - "do not m_devget() in dc driver"); -#endif - -DRIVER_MODULE(dc, cardbus, dc_driver, dc_devclass, 0, 0); -DRIVER_MODULE(dc, pci, dc_driver, dc_devclass, 0, 0); -DRIVER_MODULE(miibus, dc, miibus_driver, miibus_devclass, 0, 0); - -#define DC_SETBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x)) - -#define DC_CLRBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x)) - -#define SIO_SET(x) DC_SETBIT(sc, DC_SIO, (x)) -#define SIO_CLR(x) DC_CLRBIT(sc, DC_SIO, (x)) - -#define IS_MPSAFE 0 - -static void -dc_delay(struct dc_softc *sc) -{ - int idx; - - for (idx = (300 / 33) + 1; idx > 0; idx--) - CSR_READ_4(sc, DC_BUSCTL); -} - -static void -dc_eeprom_width(struct dc_softc *sc) -{ - int i; - - /* Force EEPROM to idle state. */ - dc_eeprom_idle(sc); - - /* Enter EEPROM access mode. */ - CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ); - dc_delay(sc); - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS); - dc_delay(sc); - - for (i = 3; i--;) { - if (6 & (1 << i)) - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_DATAIN); - else - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_DATAIN); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - } - - for (i = 1; i <= 12; i++) { - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - if (!(CSR_READ_4(sc, DC_SIO) & DC_SIO_EE_DATAOUT)) { - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - break; - } - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - } - - /* Turn off EEPROM access mode. */ - dc_eeprom_idle(sc); - - if (i < 4 || i > 12) - sc->dc_romwidth = 6; - else - sc->dc_romwidth = i; - - /* Enter EEPROM access mode. */ - CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ); - dc_delay(sc); - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS); - dc_delay(sc); - - /* Turn off EEPROM access mode. */ - dc_eeprom_idle(sc); -} - -static void -dc_eeprom_idle(struct dc_softc *sc) -{ - int i; - - CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ); - dc_delay(sc); - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS); - dc_delay(sc); - - for (i = 0; i < 25; i++) { - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - } - - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CS); - dc_delay(sc); - CSR_WRITE_4(sc, DC_SIO, 0x00000000); -} - -/* - * Send a read command and address to the EEPROM, check for ACK. - */ -static void -dc_eeprom_putbyte(struct dc_softc *sc, int addr) -{ - int d, i; - - d = DC_EECMD_READ >> 6; - for (i = 3; i--; ) { - if (d & (1 << i)) - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_DATAIN); - else - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_DATAIN); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - } - - /* - * Feed in each bit and strobe the clock. - */ - for (i = sc->dc_romwidth; i--;) { - if (addr & (1 << i)) { - SIO_SET(DC_SIO_EE_DATAIN); - } else { - SIO_CLR(DC_SIO_EE_DATAIN); - } - dc_delay(sc); - SIO_SET(DC_SIO_EE_CLK); - dc_delay(sc); - SIO_CLR(DC_SIO_EE_CLK); - dc_delay(sc); - } -} - -/* - * Read a word of data stored in the EEPROM at address 'addr.' - * The PNIC 82c168/82c169 has its own non-standard way to read - * the EEPROM. - */ -static void -dc_eeprom_getword_pnic(struct dc_softc *sc, int addr, u_int16_t *dest) -{ - int i; - u_int32_t r; - - CSR_WRITE_4(sc, DC_PN_SIOCTL, DC_PN_EEOPCODE_READ | addr); - - for (i = 0; i < DC_TIMEOUT; i++) { - DELAY(1); - r = CSR_READ_4(sc, DC_SIO); - if (!(r & DC_PN_SIOCTL_BUSY)) { - *dest = (u_int16_t)(r & 0xFFFF); - return; - } - } -} - -/* - * Read a word of data stored in the EEPROM at address 'addr.' - * The Xircom X3201 has its own non-standard way to read - * the EEPROM, too. - */ -static void -dc_eeprom_getword_xircom(struct dc_softc *sc, int addr, u_int16_t *dest) -{ - - SIO_SET(DC_SIO_ROMSEL | DC_SIO_ROMCTL_READ); - - addr *= 2; - CSR_WRITE_4(sc, DC_ROM, addr | 0x160); - *dest = (u_int16_t)CSR_READ_4(sc, DC_SIO) & 0xff; - addr += 1; - CSR_WRITE_4(sc, DC_ROM, addr | 0x160); - *dest |= ((u_int16_t)CSR_READ_4(sc, DC_SIO) & 0xff) << 8; - - SIO_CLR(DC_SIO_ROMSEL | DC_SIO_ROMCTL_READ); -} - -/* - * Read a word of data stored in the EEPROM at address 'addr.' - */ -static void -dc_eeprom_getword(struct dc_softc *sc, int addr, u_int16_t *dest) -{ - int i; - u_int16_t word = 0; - - /* Force EEPROM to idle state. */ - dc_eeprom_idle(sc); - - /* Enter EEPROM access mode. */ - CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ); - dc_delay(sc); - DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK); - dc_delay(sc); - DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS); - dc_delay(sc); - - /* - * Send address of word we want to read. - */ - dc_eeprom_putbyte(sc, addr); - - /* - * Start reading bits from EEPROM. - */ - for (i = 0x8000; i; i >>= 1) { - SIO_SET(DC_SIO_EE_CLK); - dc_delay(sc); - if (CSR_READ_4(sc, DC_SIO) & DC_SIO_EE_DATAOUT) - word |= i; - dc_delay(sc); - SIO_CLR(DC_SIO_EE_CLK); - dc_delay(sc); - } - - /* Turn off EEPROM access mode. */ - dc_eeprom_idle(sc); - - *dest = word; -} - -/* - * Read a sequence of words from the EEPROM. - */ -static void -dc_read_eeprom(struct dc_softc *sc, caddr_t dest, int off, int cnt, int be) -{ - int i; - u_int16_t word = 0, *ptr; - - for (i = 0; i < cnt; i++) { - if (DC_IS_PNIC(sc)) - dc_eeprom_getword_pnic(sc, off + i, &word); - else if (DC_IS_XIRCOM(sc)) - dc_eeprom_getword_xircom(sc, off + i, &word); - else - dc_eeprom_getword(sc, off + i, &word); - ptr = (u_int16_t *)(dest + (i * 2)); - if (be) - *ptr = be16toh(word); - else - *ptr = le16toh(word); - } -} - -/* - * The following two routines are taken from the Macronix 98713 - * Application Notes pp.19-21. - */ -/* - * Write a bit to the MII bus. - */ -static void -dc_mii_writebit(struct dc_softc *sc, int bit) -{ - - if (bit) - CSR_WRITE_4(sc, DC_SIO, - DC_SIO_ROMCTL_WRITE | DC_SIO_MII_DATAOUT); - else - CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_WRITE); - - DC_SETBIT(sc, DC_SIO, DC_SIO_MII_CLK); - DC_CLRBIT(sc, DC_SIO, DC_SIO_MII_CLK); -} - -/* - * Read a bit from the MII bus. - */ -static int -dc_mii_readbit(struct dc_softc *sc) -{ - - CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_READ | DC_SIO_MII_DIR); - CSR_READ_4(sc, DC_SIO); - DC_SETBIT(sc, DC_SIO, DC_SIO_MII_CLK); - DC_CLRBIT(sc, DC_SIO, DC_SIO_MII_CLK); - if (CSR_READ_4(sc, DC_SIO) & DC_SIO_MII_DATAIN) - return (1); - - return (0); -} - -/* - * Sync the PHYs by setting data bit and strobing the clock 32 times. - */ -static void -dc_mii_sync(struct dc_softc *sc) -{ - int i; - - CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_WRITE); - - for (i = 0; i < 32; i++) - dc_mii_writebit(sc, 1); -} - -/* - * Clock a series of bits through the MII. - */ -static void -dc_mii_send(struct dc_softc *sc, u_int32_t bits, int cnt) -{ - int i; - - for (i = (0x1 << (cnt - 1)); i; i >>= 1) - dc_mii_writebit(sc, bits & i); -} - -/* - * Read an PHY register through the MII. - */ -static int -dc_mii_readreg(struct dc_softc *sc, struct dc_mii_frame *frame) -{ - int i, ack; - - DC_LOCK(sc); - - /* - * Set up frame for RX. - */ - frame->mii_stdelim = DC_MII_STARTDELIM; - frame->mii_opcode = DC_MII_READOP; - frame->mii_turnaround = 0; - frame->mii_data = 0; - - /* - * Sync the PHYs. - */ - dc_mii_sync(sc); - - /* - * Send command/address info. - */ - dc_mii_send(sc, frame->mii_stdelim, 2); - dc_mii_send(sc, frame->mii_opcode, 2); - dc_mii_send(sc, frame->mii_phyaddr, 5); - dc_mii_send(sc, frame->mii_regaddr, 5); - -#ifdef notdef - /* Idle bit */ - dc_mii_writebit(sc, 1); - dc_mii_writebit(sc, 0); -#endif - - /* Check for ack. */ - ack = dc_mii_readbit(sc); - - /* - * Now try reading data bits. If the ack failed, we still - * need to clock through 16 cycles to keep the PHY(s) in sync. - */ - if (ack) { - for (i = 0; i < 16; i++) - dc_mii_readbit(sc); - goto fail; - } - - for (i = 0x8000; i; i >>= 1) { - if (!ack) { - if (dc_mii_readbit(sc)) - frame->mii_data |= i; - } - } - -fail: - - dc_mii_writebit(sc, 0); - dc_mii_writebit(sc, 0); - - DC_UNLOCK(sc); - - if (ack) - return (1); - return (0); -} - -/* - * Write to a PHY register through the MII. - */ -static int -dc_mii_writereg(struct dc_softc *sc, struct dc_mii_frame *frame) -{ - - DC_LOCK(sc); - /* - * Set up frame for TX. - */ - - frame->mii_stdelim = DC_MII_STARTDELIM; - frame->mii_opcode = DC_MII_WRITEOP; - frame->mii_turnaround = DC_MII_TURNAROUND; - - /* - * Sync the PHYs. - */ - dc_mii_sync(sc); - - dc_mii_send(sc, frame->mii_stdelim, 2); - dc_mii_send(sc, frame->mii_opcode, 2); - dc_mii_send(sc, frame->mii_phyaddr, 5); - dc_mii_send(sc, frame->mii_regaddr, 5); - dc_mii_send(sc, frame->mii_turnaround, 2); - dc_mii_send(sc, frame->mii_data, 16); - - /* Idle bit. */ - dc_mii_writebit(sc, 0); - dc_mii_writebit(sc, 0); - - DC_UNLOCK(sc); - - return (0); -} - -static int -dc_miibus_readreg(device_t dev, int phy, int reg) -{ - struct dc_mii_frame frame; - struct dc_softc *sc; - int i, rval, phy_reg = 0; - - sc = device_get_softc(dev); - bzero(&frame, sizeof(frame)); - - /* - * Note: both the AL981 and AN985 have internal PHYs, - * however the AL981 provides direct access to the PHY - * registers while the AN985 uses a serial MII interface. - * The AN985's MII interface is also buggy in that you - * can read from any MII address (0 to 31), but only address 1 - * behaves normally. To deal with both cases, we pretend - * that the PHY is at MII address 1. - */ - if (DC_IS_ADMTEK(sc) && phy != DC_ADMTEK_PHYADDR) - return (0); - - /* - * Note: the ukphy probes of the RS7112 report a PHY at - * MII address 0 (possibly HomePNA?) and 1 (ethernet) - * so we only respond to correct one. - */ - if (DC_IS_CONEXANT(sc) && phy != DC_CONEXANT_PHYADDR) - return (0); - - if (sc->dc_pmode != DC_PMODE_MII) { - if (phy == (MII_NPHY - 1)) { - switch (reg) { - case MII_BMSR: - /* - * Fake something to make the probe - * code think there's a PHY here. - */ - return (BMSR_MEDIAMASK); - break; - case MII_PHYIDR1: - if (DC_IS_PNIC(sc)) - return (DC_VENDORID_LO); - return (DC_VENDORID_DEC); - break; - case MII_PHYIDR2: - if (DC_IS_PNIC(sc)) - return (DC_DEVICEID_82C168); - return (DC_DEVICEID_21143); - break; - default: - return (0); - break; - } - } else - return (0); - } - - if (DC_IS_PNIC(sc)) { - CSR_WRITE_4(sc, DC_PN_MII, DC_PN_MIIOPCODE_READ | - (phy << 23) | (reg << 18)); - for (i = 0; i < DC_TIMEOUT; i++) { - DELAY(1); - rval = CSR_READ_4(sc, DC_PN_MII); - if (!(rval & DC_PN_MII_BUSY)) { - rval &= 0xFFFF; - return (rval == 0xFFFF ? 0 : rval); - } - } - return (0); - } - - if (DC_IS_COMET(sc)) { - switch (reg) { - case MII_BMCR: - phy_reg = DC_AL_BMCR; - break; - case MII_BMSR: - phy_reg = DC_AL_BMSR; - break; - case MII_PHYIDR1: - phy_reg = DC_AL_VENID; - break; - case MII_PHYIDR2: - phy_reg = DC_AL_DEVID; - break; - case MII_ANAR: - phy_reg = DC_AL_ANAR; - break; - case MII_ANLPAR: - phy_reg = DC_AL_LPAR; - break; - case MII_ANER: - phy_reg = DC_AL_ANER; - break; - default: - printf("dc%d: phy_read: bad phy register %x\n", - sc->dc_unit, reg); - return (0); - break; - } - - rval = CSR_READ_4(sc, phy_reg) & 0x0000FFFF; - - if (rval == 0xFFFF) - return (0); - return (rval); - } - - frame.mii_phyaddr = phy; - frame.mii_regaddr = reg; - if (sc->dc_type == DC_TYPE_98713) { - phy_reg = CSR_READ_4(sc, DC_NETCFG); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); - } - dc_mii_readreg(sc, &frame); - if (sc->dc_type == DC_TYPE_98713) - CSR_WRITE_4(sc, DC_NETCFG, phy_reg); - - return (frame.mii_data); -} - -static int -dc_miibus_writereg(device_t dev, int phy, int reg, int data) -{ - struct dc_softc *sc; - struct dc_mii_frame frame; - int i, phy_reg = 0; - - sc = device_get_softc(dev); - bzero(&frame, sizeof(frame)); - - if (DC_IS_ADMTEK(sc) && phy != DC_ADMTEK_PHYADDR) - return (0); - - if (DC_IS_CONEXANT(sc) && phy != DC_CONEXANT_PHYADDR) - return (0); - - if (DC_IS_PNIC(sc)) { - CSR_WRITE_4(sc, DC_PN_MII, DC_PN_MIIOPCODE_WRITE | - (phy << 23) | (reg << 10) | data); - for (i = 0; i < DC_TIMEOUT; i++) { - if (!(CSR_READ_4(sc, DC_PN_MII) & DC_PN_MII_BUSY)) - break; - } - return (0); - } - - if (DC_IS_COMET(sc)) { - switch (reg) { - case MII_BMCR: - phy_reg = DC_AL_BMCR; - break; - case MII_BMSR: - phy_reg = DC_AL_BMSR; - break; - case MII_PHYIDR1: - phy_reg = DC_AL_VENID; - break; - case MII_PHYIDR2: - phy_reg = DC_AL_DEVID; - break; - case MII_ANAR: - phy_reg = DC_AL_ANAR; - break; - case MII_ANLPAR: - phy_reg = DC_AL_LPAR; - break; - case MII_ANER: - phy_reg = DC_AL_ANER; - break; - default: - printf("dc%d: phy_write: bad phy register %x\n", - sc->dc_unit, reg); - return (0); - break; - } - - CSR_WRITE_4(sc, phy_reg, data); - return (0); - } - - frame.mii_phyaddr = phy; - frame.mii_regaddr = reg; - frame.mii_data = data; - - if (sc->dc_type == DC_TYPE_98713) { - phy_reg = CSR_READ_4(sc, DC_NETCFG); - CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL); - } - dc_mii_writereg(sc, &frame); - if (sc->dc_type == DC_TYPE_98713) - CSR_WRITE_4(sc, DC_NETCFG, phy_reg); - - return (0); -} - -static void -dc_miibus_statchg(device_t dev) -{ - struct dc_softc *sc; - struct mii_data *mii; - struct ifmedia *ifm; - - sc = device_get_softc(dev); - if (DC_IS_ADMTEK(sc)) - return; - - mii = device_get_softc(sc->dc_miibus); - ifm = &mii->mii_media; - if (DC_IS_DAVICOM(sc) && - IFM_SUBTYPE(ifm->ifm_media) == IFM_HPNA_1) { - dc_setcfg(sc, ifm->ifm_media); - sc->dc_if_media = ifm->ifm_media; - } else { - dc_setcfg(sc, mii->mii_media_active); - sc->dc_if_media = mii->mii_media_active; - } -} - -/* - * Special support for DM9102A cards with HomePNA PHYs. Note: - * with the Davicom DM9102A/DM9801 eval board that I have, it seems - * to be impossible to talk to the management interface of the DM9801 - * PHY (its MDIO pin is not connected to anything). Consequently, - * the driver has to just 'know' about the additional mode and deal - * with it itself. *sigh* - */ -static void -dc_miibus_mediainit(device_t dev) -{ - struct dc_softc *sc; - struct mii_data *mii; - struct ifmedia *ifm; - int rev; - - rev = pci_read_config(dev, DC_PCI_CFRV, 4) & 0xFF; - - sc = device_get_softc(dev); - mii = device_get_softc(sc->dc_miibus); - ifm = &mii->mii_media; - - if (DC_IS_DAVICOM(sc) && rev >= DC_REVISION_DM9102A) - ifmedia_add(ifm, IFM_ETHER | IFM_HPNA_1, 0, NULL); -} - -#define DC_BITS_512 9 -#define DC_BITS_128 7 -#define DC_BITS_64 6 - -static uint32_t -dc_mchash_le(struct dc_softc *sc, const uint8_t *addr) -{ - uint32_t crc; - - /* Compute CRC for the address value. */ - crc = ether_crc32_le(addr, ETHER_ADDR_LEN); - - /* - * The hash table on the PNIC II and the MX98715AEC-C/D/E - * chips is only 128 bits wide. - */ - if (sc->dc_flags & DC_128BIT_HASH) - return (crc & ((1 << DC_BITS_128) - 1)); - - /* The hash table on the MX98715BEC is only 64 bits wide. */ - if (sc->dc_flags & DC_64BIT_HASH) - return (crc & ((1 << DC_BITS_64) - 1)); - - /* Xircom's hash filtering table is different (read: weird) */ - /* Xircom uses the LEAST significant bits */ - if (DC_IS_XIRCOM(sc)) { - if ((crc & 0x180) == 0x180) - return ((crc & 0x0F) + (crc & 0x70) * 3 + (14 << 4)); - else - return ((crc & 0x1F) + ((crc >> 1) & 0xF0) * 3 + - (12 << 4)); - } - - return (crc & ((1 << DC_BITS_512) - 1)); -} - -/* - * Calculate CRC of a multicast group address, return the lower 6 bits. - */ -static uint32_t -dc_mchash_be(const uint8_t *addr) -{ - uint32_t crc; - - /* Compute CRC for the address value. */ - crc = ether_crc32_be(addr, ETHER_ADDR_LEN); - - /* Return the filter bit position. */ - return ((crc >> 26) & 0x0000003F); -} - -/* - * 21143-style RX filter setup routine. Filter programming is done by - * downloading a special setup frame into the TX engine. 21143, Macronix, - * PNIC, PNIC II and Davicom chips are programmed this way. - * - * We always program the chip using 'hash perfect' mode, i.e. one perfect - * address (our node address) and a 512-bit hash filter for multicast - * frames. We also sneak the broadcast address into the hash filter since - * we need that too. - */ -static void -dc_setfilt_21143(struct dc_softc *sc) -{ - struct dc_desc *sframe; - u_int32_t h, *sp; - struct ifmultiaddr *ifma; - struct ifnet *ifp; - int i; - - ifp = sc->dc_ifp; - - i = sc->dc_cdata.dc_tx_prod; - DC_INC(sc->dc_cdata.dc_tx_prod, DC_TX_LIST_CNT); - sc->dc_cdata.dc_tx_cnt++; - sframe = &sc->dc_ldata->dc_tx_list[i]; - sp = sc->dc_cdata.dc_sbuf; - bzero(sp, DC_SFRAME_LEN); - - sframe->dc_data = htole32(sc->dc_saddr); - sframe->dc_ctl = htole32(DC_SFRAME_LEN | DC_TXCTL_SETUP | - DC_TXCTL_TLINK | DC_FILTER_HASHPERF | DC_TXCTL_FINT); - - sc->dc_cdata.dc_tx_chain[i] = (struct mbuf *)sc->dc_cdata.dc_sbuf; - - /* If we want promiscuous mode, set the allframes bit. */ - if (ifp->if_flags & IFF_PROMISC) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC); - else - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC); - - if (ifp->if_flags & IFF_ALLMULTI) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI); - else - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI); - - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - h = dc_mchash_le(sc, - LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); - sp[h >> 4] |= htole32(1 << (h & 0xF)); - } - - if (ifp->if_flags & IFF_BROADCAST) { - h = dc_mchash_le(sc, ifp->if_broadcastaddr); - sp[h >> 4] |= htole32(1 << (h & 0xF)); - } - - /* Set our MAC address */ - sp[39] = DC_SP_MAC(((u_int16_t *)IFP2ENADDR(sc->dc_ifp))[0]); - sp[40] = DC_SP_MAC(((u_int16_t *)IFP2ENADDR(sc->dc_ifp))[1]); - sp[41] = DC_SP_MAC(((u_int16_t *)IFP2ENADDR(sc->dc_ifp))[2]); - - sframe->dc_status = htole32(DC_TXSTAT_OWN); - CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF); - - /* - * The PNIC takes an exceedingly long time to process its - * setup frame; wait 10ms after posting the setup frame - * before proceeding, just so it has time to swallow its - * medicine. - */ - DELAY(10000); - - ifp->if_timer = 5; -} - -static void -dc_setfilt_admtek(struct dc_softc *sc) -{ - struct ifnet *ifp; - struct ifmultiaddr *ifma; - int h = 0; - u_int32_t hashes[2] = { 0, 0 }; - - ifp = sc->dc_ifp; - - /* Init our MAC address. */ - CSR_WRITE_4(sc, DC_AL_PAR0, *(u_int32_t *)(&IFP2ENADDR(sc->dc_ifp)[0])); - CSR_WRITE_4(sc, DC_AL_PAR1, *(u_int32_t *)(&IFP2ENADDR(sc->dc_ifp)[4])); - - /* If we want promiscuous mode, set the allframes bit. */ - if (ifp->if_flags & IFF_PROMISC) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC); - else - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC); - - if (ifp->if_flags & IFF_ALLMULTI) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI); - else - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI); - - /* First, zot all the existing hash bits. */ - CSR_WRITE_4(sc, DC_AL_MAR0, 0); - CSR_WRITE_4(sc, DC_AL_MAR1, 0); - - /* - * If we're already in promisc or allmulti mode, we - * don't have to bother programming the multicast filter. - */ - if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) - return; - - /* Now program new ones. */ - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - if (DC_IS_CENTAUR(sc)) - h = dc_mchash_le(sc, - LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); - else - h = dc_mchash_be( - LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); - if (h < 32) - hashes[0] |= (1 << h); - else - hashes[1] |= (1 << (h - 32)); - } - - CSR_WRITE_4(sc, DC_AL_MAR0, hashes[0]); - CSR_WRITE_4(sc, DC_AL_MAR1, hashes[1]); -} - -static void -dc_setfilt_asix(struct dc_softc *sc) -{ - struct ifnet *ifp; - struct ifmultiaddr *ifma; - int h = 0; - u_int32_t hashes[2] = { 0, 0 }; - - ifp = sc->dc_ifp; - - /* Init our MAC address */ - CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_PAR0); - CSR_WRITE_4(sc, DC_AX_FILTDATA, - *(u_int32_t *)(&IFP2ENADDR(sc->dc_ifp)[0])); - CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_PAR1); - CSR_WRITE_4(sc, DC_AX_FILTDATA, - *(u_int32_t *)(&IFP2ENADDR(sc->dc_ifp)[4])); - - /* If we want promiscuous mode, set the allframes bit. */ - if (ifp->if_flags & IFF_PROMISC) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC); - else - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC); - - if (ifp->if_flags & IFF_ALLMULTI) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI); - else - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI); - - /* - * The ASIX chip has a special bit to enable reception - * of broadcast frames. - */ - if (ifp->if_flags & IFF_BROADCAST) - DC_SETBIT(sc, DC_NETCFG, DC_AX_NETCFG_RX_BROAD); - else - DC_CLRBIT(sc, DC_NETCFG, DC_AX_NETCFG_RX_BROAD); - - /* first, zot all the existing hash bits */ - CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR0); - CSR_WRITE_4(sc, DC_AX_FILTDATA, 0); - CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR1); - CSR_WRITE_4(sc, DC_AX_FILTDATA, 0); - - /* - * If we're already in promisc or allmulti mode, we - * don't have to bother programming the multicast filter. - */ - if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) - return; - - /* now program new ones */ - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - h = dc_mchash_be(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); - if (h < 32) - hashes[0] |= (1 << h); - else - hashes[1] |= (1 << (h - 32)); - } - - CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR0); - CSR_WRITE_4(sc, DC_AX_FILTDATA, hashes[0]); - CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR1); - CSR_WRITE_4(sc, DC_AX_FILTDATA, hashes[1]); -} - -static void -dc_setfilt_xircom(struct dc_softc *sc) -{ - struct ifnet *ifp; - struct ifmultiaddr *ifma; - struct dc_desc *sframe; - u_int32_t h, *sp; - int i; - - ifp = sc->dc_ifp; - DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_TX_ON | DC_NETCFG_RX_ON)); - - i = sc->dc_cdata.dc_tx_prod; - DC_INC(sc->dc_cdata.dc_tx_prod, DC_TX_LIST_CNT); - sc->dc_cdata.dc_tx_cnt++; - sframe = &sc->dc_ldata->dc_tx_list[i]; - sp = sc->dc_cdata.dc_sbuf; - bzero(sp, DC_SFRAME_LEN); - - sframe->dc_data = htole32(sc->dc_saddr); - sframe->dc_ctl = htole32(DC_SFRAME_LEN | DC_TXCTL_SETUP | - DC_TXCTL_TLINK | DC_FILTER_HASHPERF | DC_TXCTL_FINT); - - sc->dc_cdata.dc_tx_chain[i] = (struct mbuf *)sc->dc_cdata.dc_sbuf; - - /* If we want promiscuous mode, set the allframes bit. */ - if (ifp->if_flags & IFF_PROMISC) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC); - else - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC); - - if (ifp->if_flags & IFF_ALLMULTI) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI); - else - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI); - - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - h = dc_mchash_le(sc, - LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); - sp[h >> 4] |= htole32(1 << (h & 0xF)); - } - - if (ifp->if_flags & IFF_BROADCAST) { - h = dc_mchash_le(sc, ifp->if_broadcastaddr); - sp[h >> 4] |= htole32(1 << (h & 0xF)); - } - - /* Set our MAC address */ - sp[0] = DC_SP_MAC(((u_int16_t *)IFP2ENADDR(sc->dc_ifp))[0]); - sp[1] = DC_SP_MAC(((u_int16_t *)IFP2ENADDR(sc->dc_ifp))[1]); - sp[2] = DC_SP_MAC(((u_int16_t *)IFP2ENADDR(sc->dc_ifp))[2]); - - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON); - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ON); - ifp->if_flags |= IFF_RUNNING; - sframe->dc_status = htole32(DC_TXSTAT_OWN); - CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF); - - /* - * Wait some time... - */ - DELAY(1000); - - ifp->if_timer = 5; -} - -static void -dc_setfilt(struct dc_softc *sc) -{ - - if (DC_IS_INTEL(sc) || DC_IS_MACRONIX(sc) || DC_IS_PNIC(sc) || - DC_IS_PNICII(sc) || DC_IS_DAVICOM(sc) || DC_IS_CONEXANT(sc)) - dc_setfilt_21143(sc); - - if (DC_IS_ASIX(sc)) - dc_setfilt_asix(sc); - - if (DC_IS_ADMTEK(sc)) - dc_setfilt_admtek(sc); - - if (DC_IS_XIRCOM(sc)) - dc_setfilt_xircom(sc); -} - -/* - * In order to fiddle with the 'full-duplex' and '100Mbps' bits in - * the netconfig register, we first have to put the transmit and/or - * receive logic in the idle state. - */ -static void -dc_setcfg(struct dc_softc *sc, int media) -{ - int i, restart = 0, watchdogreg; - u_int32_t isr; - - if (IFM_SUBTYPE(media) == IFM_NONE) - return; - - if (CSR_READ_4(sc, DC_NETCFG) & (DC_NETCFG_TX_ON | DC_NETCFG_RX_ON)) { - restart = 1; - DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_TX_ON | DC_NETCFG_RX_ON)); - - for (i = 0; i < DC_TIMEOUT; i++) { - isr = CSR_READ_4(sc, DC_ISR); - if (isr & DC_ISR_TX_IDLE && - ((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED || - (isr & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT)) - break; - DELAY(10); - } - - if (i == DC_TIMEOUT) - printf("dc%d: failed to force tx and " - "rx to idle state\n", sc->dc_unit); - } - - if (IFM_SUBTYPE(media) == IFM_100_TX) { - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_SPEEDSEL); - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_HEARTBEAT); - if (sc->dc_pmode == DC_PMODE_MII) { - if (DC_IS_INTEL(sc)) { - /* There's a write enable bit here that reads as 1. */ - watchdogreg = CSR_READ_4(sc, DC_WATCHDOG); - watchdogreg &= ~DC_WDOG_CTLWREN; - watchdogreg |= DC_WDOG_JABBERDIS; - CSR_WRITE_4(sc, DC_WATCHDOG, watchdogreg); - } else { - DC_SETBIT(sc, DC_WATCHDOG, DC_WDOG_JABBERDIS); - } - DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_PCS | - DC_NETCFG_PORTSEL | DC_NETCFG_SCRAMBLER)); - if (sc->dc_type == DC_TYPE_98713) - DC_SETBIT(sc, DC_NETCFG, (DC_NETCFG_PCS | - DC_NETCFG_SCRAMBLER)); - if (!DC_IS_DAVICOM(sc)) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); - DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF); - if (DC_IS_INTEL(sc)) - dc_apply_fixup(sc, IFM_AUTO); - } else { - if (DC_IS_PNIC(sc)) { - DC_PN_GPIO_SETBIT(sc, DC_PN_GPIO_SPEEDSEL); - DC_PN_GPIO_SETBIT(sc, DC_PN_GPIO_100TX_LOOP); - DC_SETBIT(sc, DC_PN_NWAY, DC_PN_NWAY_SPEEDSEL); - } - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PCS); - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_SCRAMBLER); - if (DC_IS_INTEL(sc)) - dc_apply_fixup(sc, - (media & IFM_GMASK) == IFM_FDX ? - IFM_100_TX | IFM_FDX : IFM_100_TX); - } - } - - if (IFM_SUBTYPE(media) == IFM_10_T) { - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_SPEEDSEL); - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_HEARTBEAT); - if (sc->dc_pmode == DC_PMODE_MII) { - /* There's a write enable bit here that reads as 1. */ - if (DC_IS_INTEL(sc)) { - watchdogreg = CSR_READ_4(sc, DC_WATCHDOG); - watchdogreg &= ~DC_WDOG_CTLWREN; - watchdogreg |= DC_WDOG_JABBERDIS; - CSR_WRITE_4(sc, DC_WATCHDOG, watchdogreg); - } else { - DC_SETBIT(sc, DC_WATCHDOG, DC_WDOG_JABBERDIS); - } - DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_PCS | - DC_NETCFG_PORTSEL | DC_NETCFG_SCRAMBLER)); - if (sc->dc_type == DC_TYPE_98713) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PCS); - if (!DC_IS_DAVICOM(sc)) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); - DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF); - if (DC_IS_INTEL(sc)) - dc_apply_fixup(sc, IFM_AUTO); - } else { - if (DC_IS_PNIC(sc)) { - DC_PN_GPIO_CLRBIT(sc, DC_PN_GPIO_SPEEDSEL); - DC_PN_GPIO_SETBIT(sc, DC_PN_GPIO_100TX_LOOP); - DC_CLRBIT(sc, DC_PN_NWAY, DC_PN_NWAY_SPEEDSEL); - } - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PCS); - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_SCRAMBLER); - if (DC_IS_INTEL(sc)) { - DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET); - DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF); - if ((media & IFM_GMASK) == IFM_FDX) - DC_SETBIT(sc, DC_10BTCTRL, 0x7F3D); - else - DC_SETBIT(sc, DC_10BTCTRL, 0x7F3F); - DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); - DC_CLRBIT(sc, DC_10BTCTRL, - DC_TCTL_AUTONEGENBL); - dc_apply_fixup(sc, - (media & IFM_GMASK) == IFM_FDX ? - IFM_10_T | IFM_FDX : IFM_10_T); - DELAY(20000); - } - } - } - - /* - * If this is a Davicom DM9102A card with a DM9801 HomePNA - * PHY and we want HomePNA mode, set the portsel bit to turn - * on the external MII port. - */ - if (DC_IS_DAVICOM(sc)) { - if (IFM_SUBTYPE(media) == IFM_HPNA_1) { - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); - sc->dc_link = 1; - } else { - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL); - } - } - - if ((media & IFM_GMASK) == IFM_FDX) { - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); - if (sc->dc_pmode == DC_PMODE_SYM && DC_IS_PNIC(sc)) - DC_SETBIT(sc, DC_PN_NWAY, DC_PN_NWAY_DUPLEX); - } else { - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX); - if (sc->dc_pmode == DC_PMODE_SYM && DC_IS_PNIC(sc)) - DC_CLRBIT(sc, DC_PN_NWAY, DC_PN_NWAY_DUPLEX); - } - - if (restart) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON | DC_NETCFG_RX_ON); -} - -static void -dc_reset(struct dc_softc *sc) -{ - int i; - - DC_SETBIT(sc, DC_BUSCTL, DC_BUSCTL_RESET); - - for (i = 0; i < DC_TIMEOUT; i++) { - DELAY(10); - if (!(CSR_READ_4(sc, DC_BUSCTL) & DC_BUSCTL_RESET)) - break; - } - - if (DC_IS_ASIX(sc) || DC_IS_ADMTEK(sc) || DC_IS_CONEXANT(sc) || - DC_IS_XIRCOM(sc) || DC_IS_INTEL(sc)) { - DELAY(10000); - DC_CLRBIT(sc, DC_BUSCTL, DC_BUSCTL_RESET); - i = 0; - } - - if (i == DC_TIMEOUT) - printf("dc%d: reset never completed!\n", sc->dc_unit); - - /* Wait a little while for the chip to get its brains in order. */ - DELAY(1000); - - CSR_WRITE_4(sc, DC_IMR, 0x00000000); - CSR_WRITE_4(sc, DC_BUSCTL, 0x00000000); - CSR_WRITE_4(sc, DC_NETCFG, 0x00000000); - - /* - * Bring the SIA out of reset. In some cases, it looks - * like failing to unreset the SIA soon enough gets it - * into a state where it will never come out of reset - * until we reset the whole chip again. - */ - if (DC_IS_INTEL(sc)) { - DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET); - CSR_WRITE_4(sc, DC_10BTCTRL, 0); - CSR_WRITE_4(sc, DC_WATCHDOG, 0); - } -} - -static struct dc_type * -dc_devtype(device_t dev) -{ - struct dc_type *t; - u_int32_t rev; - - t = dc_devs; - - while (t->dc_name != NULL) { - if ((pci_get_vendor(dev) == t->dc_vid) && - (pci_get_device(dev) == t->dc_did)) { - /* Check the PCI revision */ - rev = pci_read_config(dev, DC_PCI_CFRV, 4) & 0xFF; - if (t->dc_did == DC_DEVICEID_98713 && - rev >= DC_REVISION_98713A) - t++; - if (t->dc_did == DC_DEVICEID_98713_CP && - rev >= DC_REVISION_98713A) - t++; - if (t->dc_did == DC_DEVICEID_987x5 && - rev >= DC_REVISION_98715AEC_C) - t++; - if (t->dc_did == DC_DEVICEID_987x5 && - rev >= DC_REVISION_98725) - t++; - if (t->dc_did == DC_DEVICEID_AX88140A && - rev >= DC_REVISION_88141) - t++; - if (t->dc_did == DC_DEVICEID_82C168 && - rev >= DC_REVISION_82C169) - t++; - if (t->dc_did == DC_DEVICEID_DM9102 && - rev >= DC_REVISION_DM9102A) - t++; - /* - * The Microsoft MN-130 has a device ID of 0x0002, - * which happens to be the same as the PNIC 82c168. - * To keep dc_attach() from getting confused, we - * pretend its ID is something different. - * XXX: ideally, dc_attach() should be checking - * vendorid+deviceid together to avoid such - * collisions. - */ - if (t->dc_vid == DC_VENDORID_MICROSOFT && - t->dc_did == DC_DEVICEID_MSMN130) - t++; - return (t); - } - t++; - } - - return (NULL); -} - -/* - * Probe for a 21143 or clone chip. Check the PCI vendor and device - * IDs against our list and return a device name if we find a match. - * We do a little bit of extra work to identify the exact type of - * chip. The MX98713 and MX98713A have the same PCI vendor/device ID, - * but different revision IDs. The same is true for 98715/98715A - * chips and the 98725, as well as the ASIX and ADMtek chips. In some - * cases, the exact chip revision affects driver behavior. - */ -static int -dc_probe(device_t dev) -{ - struct dc_type *t; - - t = dc_devtype(dev); - - if (t != NULL) { - device_set_desc(dev, t->dc_name); - return (BUS_PROBE_DEFAULT); - } - - return (ENXIO); -} - -static void -dc_apply_fixup(struct dc_softc *sc, int media) -{ - struct dc_mediainfo *m; - u_int8_t *p; - int i; - u_int32_t reg; - - m = sc->dc_mi; - - while (m != NULL) { - if (m->dc_media == media) - break; - m = m->dc_next; - } - - if (m == NULL) - return; - - for (i = 0, p = m->dc_reset_ptr; i < m->dc_reset_len; i++, p += 2) { - reg = (p[0] | (p[1] << 8)) << 16; - CSR_WRITE_4(sc, DC_WATCHDOG, reg); - } - - for (i = 0, p = m->dc_gp_ptr; i < m->dc_gp_len; i++, p += 2) { - reg = (p[0] | (p[1] << 8)) << 16; - CSR_WRITE_4(sc, DC_WATCHDOG, reg); - } -} - -static void -dc_decode_leaf_sia(struct dc_softc *sc, struct dc_eblock_sia *l) -{ - struct dc_mediainfo *m; - - m = malloc(sizeof(struct dc_mediainfo), M_DEVBUF, M_NOWAIT | M_ZERO); - switch (l->dc_sia_code & ~DC_SIA_CODE_EXT) { - case DC_SIA_CODE_10BT: - m->dc_media = IFM_10_T; - break; - case DC_SIA_CODE_10BT_FDX: - m->dc_media = IFM_10_T | IFM_FDX; - break; - case DC_SIA_CODE_10B2: - m->dc_media = IFM_10_2; - break; - case DC_SIA_CODE_10B5: - m->dc_media = IFM_10_5; - break; - default: - break; - } - - /* - * We need to ignore CSR13, CSR14, CSR15 for SIA mode. - * Things apparently already work for cards that do - * supply Media Specific Data. - */ - if (l->dc_sia_code & DC_SIA_CODE_EXT) { - m->dc_gp_len = 2; - m->dc_gp_ptr = - (u_int8_t *)&l->dc_un.dc_sia_ext.dc_sia_gpio_ctl; - } else { - m->dc_gp_len = 2; - m->dc_gp_ptr = - (u_int8_t *)&l->dc_un.dc_sia_noext.dc_sia_gpio_ctl; - } - - m->dc_next = sc->dc_mi; - sc->dc_mi = m; - - sc->dc_pmode = DC_PMODE_SIA; -} - -static void -dc_decode_leaf_sym(struct dc_softc *sc, struct dc_eblock_sym *l) -{ - struct dc_mediainfo *m; - - m = malloc(sizeof(struct dc_mediainfo), M_DEVBUF, M_NOWAIT | M_ZERO); - if (l->dc_sym_code == DC_SYM_CODE_100BT) - m->dc_media = IFM_100_TX; - - if (l->dc_sym_code == DC_SYM_CODE_100BT_FDX) - m->dc_media = IFM_100_TX | IFM_FDX; - - m->dc_gp_len = 2; - m->dc_gp_ptr = (u_int8_t *)&l->dc_sym_gpio_ctl; - - m->dc_next = sc->dc_mi; - sc->dc_mi = m; - - sc->dc_pmode = DC_PMODE_SYM; -} - -static void -dc_decode_leaf_mii(struct dc_softc *sc, struct dc_eblock_mii *l) -{ - struct dc_mediainfo *m; - u_int8_t *p; - - m = malloc(sizeof(struct dc_mediainfo), M_DEVBUF, M_NOWAIT | M_ZERO); - /* We abuse IFM_AUTO to represent MII. */ - m->dc_media = IFM_AUTO; - m->dc_gp_len = l->dc_gpr_len; - - p = (u_int8_t *)l; - p += sizeof(struct dc_eblock_mii); - m->dc_gp_ptr = p; - p += 2 * l->dc_gpr_len; - m->dc_reset_len = *p; - p++; - m->dc_reset_ptr = p; - - m->dc_next = sc->dc_mi; - sc->dc_mi = m; -} - -static void -dc_read_srom(struct dc_softc *sc, int bits) -{ - int size; - - size = 2 << bits; - sc->dc_srom = malloc(size, M_DEVBUF, M_NOWAIT); - dc_read_eeprom(sc, (caddr_t)sc->dc_srom, 0, (size / 2), 0); -} - -static void -dc_parse_21143_srom(struct dc_softc *sc) -{ - struct dc_leaf_hdr *lhdr; - struct dc_eblock_hdr *hdr; - int have_mii, i, loff; - char *ptr; - - have_mii = 0; - loff = sc->dc_srom[27]; - lhdr = (struct dc_leaf_hdr *)&(sc->dc_srom[loff]); - - ptr = (char *)lhdr; - ptr += sizeof(struct dc_leaf_hdr) - 1; - /* - * Look if we got a MII media block. - */ - for (i = 0; i < lhdr->dc_mcnt; i++) { - hdr = (struct dc_eblock_hdr *)ptr; - if (hdr->dc_type == DC_EBLOCK_MII) - have_mii++; - - ptr += (hdr->dc_len & 0x7F); - ptr++; - } - - /* - * Do the same thing again. Only use SIA and SYM media - * blocks if no MII media block is available. - */ - ptr = (char *)lhdr; - ptr += sizeof(struct dc_leaf_hdr) - 1; - for (i = 0; i < lhdr->dc_mcnt; i++) { - hdr = (struct dc_eblock_hdr *)ptr; - switch (hdr->dc_type) { - case DC_EBLOCK_MII: - dc_decode_leaf_mii(sc, (struct dc_eblock_mii *)hdr); - break; - case DC_EBLOCK_SIA: - if (! have_mii) - dc_decode_leaf_sia(sc, - (struct dc_eblock_sia *)hdr); - break; - case DC_EBLOCK_SYM: - if (! have_mii) - dc_decode_leaf_sym(sc, - (struct dc_eblock_sym *)hdr); - break; - default: - /* Don't care. Yet. */ - break; - } - ptr += (hdr->dc_len & 0x7F); - ptr++; - } -} - -static void -dc_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - u_int32_t *paddr; - - KASSERT(nseg == 1, ("wrong number of segments, should be 1")); - paddr = arg; - *paddr = segs->ds_addr; -} - -/* - * Attach the interface. Allocate softc structures, do ifmedia - * setup and ethernet/BPF attach. - */ -static int -dc_attach(device_t dev) -{ - int tmp = 0; - u_char eaddr[ETHER_ADDR_LEN]; - u_int32_t command; - struct dc_softc *sc; - struct ifnet *ifp; - u_int32_t revision; - int unit, error = 0, rid, mac_offset; - int i; - u_int8_t *mac; - - sc = device_get_softc(dev); - unit = device_get_unit(dev); - - mtx_init(&sc->dc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, - MTX_DEF | MTX_RECURSE); - - /* - * Map control/status registers. - */ - pci_enable_busmaster(dev); - - rid = DC_RID; - sc->dc_res = bus_alloc_resource_any(dev, DC_RES, &rid, RF_ACTIVE); - - if (sc->dc_res == NULL) { - printf("dc%d: couldn't map ports/memory\n", unit); - error = ENXIO; - goto fail; - } - - sc->dc_btag = rman_get_bustag(sc->dc_res); - sc->dc_bhandle = rman_get_bushandle(sc->dc_res); - - /* Allocate interrupt. */ - rid = 0; - sc->dc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->dc_irq == NULL) { - printf("dc%d: couldn't map interrupt\n", unit); - error = ENXIO; - goto fail; - } - - /* Need this info to decide on a chip type. */ - sc->dc_info = dc_devtype(dev); - revision = pci_read_config(dev, DC_PCI_CFRV, 4) & 0x000000FF; - - /* Get the eeprom width, but PNIC and XIRCOM have diff eeprom */ - if (sc->dc_info->dc_did != DC_DEVICEID_82C168 && - sc->dc_info->dc_did != DC_DEVICEID_X3201) - dc_eeprom_width(sc); - - switch (sc->dc_info->dc_did) { - case DC_DEVICEID_21143: - sc->dc_type = DC_TYPE_21143; - sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; - sc->dc_flags |= DC_REDUCED_MII_POLL; - /* Save EEPROM contents so we can parse them later. */ - dc_read_srom(sc, sc->dc_romwidth); - break; - case DC_DEVICEID_DM9009: - case DC_DEVICEID_DM9100: - case DC_DEVICEID_DM9102: - sc->dc_type = DC_TYPE_DM9102; - sc->dc_flags |= DC_TX_COALESCE | DC_TX_INTR_ALWAYS; - sc->dc_flags |= DC_REDUCED_MII_POLL | DC_TX_STORENFWD; - sc->dc_flags |= DC_TX_ALIGN; - sc->dc_pmode = DC_PMODE_MII; - /* Increase the latency timer value. */ - command = pci_read_config(dev, DC_PCI_CFLT, 4); - command &= 0xFFFF00FF; - command |= 0x00008000; - pci_write_config(dev, DC_PCI_CFLT, command, 4); - break; - case DC_DEVICEID_AL981: - sc->dc_type = DC_TYPE_AL981; - sc->dc_flags |= DC_TX_USE_TX_INTR; - sc->dc_flags |= DC_TX_ADMTEK_WAR; - sc->dc_pmode = DC_PMODE_MII; - dc_read_srom(sc, sc->dc_romwidth); - break; - case DC_DEVICEID_AN985: - case DC_DEVICEID_ADM9511: - case DC_DEVICEID_ADM9513: - case DC_DEVICEID_FA511: - case DC_DEVICEID_FE2500: - case DC_DEVICEID_EN2242: - case DC_DEVICEID_HAWKING_PN672TX: - case DC_DEVICEID_3CSOHOB: - case DC_DEVICEID_MSMN120: - case DC_DEVICEID_MSMN130_FAKE: /* XXX avoid collision with PNIC*/ - sc->dc_type = DC_TYPE_AN985; - sc->dc_flags |= DC_64BIT_HASH; - sc->dc_flags |= DC_TX_USE_TX_INTR; - sc->dc_flags |= DC_TX_ADMTEK_WAR; - sc->dc_pmode = DC_PMODE_MII; - /* Don't read SROM for - auto-loaded on reset */ - break; - case DC_DEVICEID_98713: - case DC_DEVICEID_98713_CP: - if (revision < DC_REVISION_98713A) { - sc->dc_type = DC_TYPE_98713; - } - if (revision >= DC_REVISION_98713A) { - sc->dc_type = DC_TYPE_98713A; - sc->dc_flags |= DC_21143_NWAY; - } - sc->dc_flags |= DC_REDUCED_MII_POLL; - sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; - break; - case DC_DEVICEID_987x5: - case DC_DEVICEID_EN1217: - /* - * Macronix MX98715AEC-C/D/E parts have only a - * 128-bit hash table. We need to deal with these - * in the same manner as the PNIC II so that we - * get the right number of bits out of the - * CRC routine. - */ - if (revision >= DC_REVISION_98715AEC_C && - revision < DC_REVISION_98725) - sc->dc_flags |= DC_128BIT_HASH; - sc->dc_type = DC_TYPE_987x5; - sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; - sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; - break; - case DC_DEVICEID_98727: - sc->dc_type = DC_TYPE_987x5; - sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; - sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; - break; - case DC_DEVICEID_82C115: - sc->dc_type = DC_TYPE_PNICII; - sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR | DC_128BIT_HASH; - sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; - break; - case DC_DEVICEID_82C168: - sc->dc_type = DC_TYPE_PNIC; - sc->dc_flags |= DC_TX_STORENFWD | DC_TX_INTR_ALWAYS; - sc->dc_flags |= DC_PNIC_RX_BUG_WAR; - sc->dc_pnic_rx_buf = malloc(DC_RXLEN * 5, M_DEVBUF, M_NOWAIT); - if (revision < DC_REVISION_82C169) - sc->dc_pmode = DC_PMODE_SYM; - break; - case DC_DEVICEID_AX88140A: - sc->dc_type = DC_TYPE_ASIX; - sc->dc_flags |= DC_TX_USE_TX_INTR | DC_TX_INTR_FIRSTFRAG; - sc->dc_flags |= DC_REDUCED_MII_POLL; - sc->dc_pmode = DC_PMODE_MII; - break; - case DC_DEVICEID_X3201: - sc->dc_type = DC_TYPE_XIRCOM; - sc->dc_flags |= DC_TX_INTR_ALWAYS | DC_TX_COALESCE | - DC_TX_ALIGN; - /* - * We don't actually need to coalesce, but we're doing - * it to obtain a double word aligned buffer. - * The DC_TX_COALESCE flag is required. - */ - sc->dc_pmode = DC_PMODE_MII; - break; - case DC_DEVICEID_RS7112: - sc->dc_type = DC_TYPE_CONEXANT; - sc->dc_flags |= DC_TX_INTR_ALWAYS; - sc->dc_flags |= DC_REDUCED_MII_POLL; - sc->dc_pmode = DC_PMODE_MII; - dc_read_srom(sc, sc->dc_romwidth); - break; - default: - printf("dc%d: unknown device: %x\n", sc->dc_unit, - sc->dc_info->dc_did); - break; - } - - /* Save the cache line size. */ - if (DC_IS_DAVICOM(sc)) - sc->dc_cachesize = 0; - else - sc->dc_cachesize = pci_read_config(dev, - DC_PCI_CFLT, 4) & 0xFF; - - /* Reset the adapter. */ - dc_reset(sc); - - /* Take 21143 out of snooze mode */ - if (DC_IS_INTEL(sc) || DC_IS_XIRCOM(sc)) { - command = pci_read_config(dev, DC_PCI_CFDD, 4); - command &= ~(DC_CFDD_SNOOZE_MODE | DC_CFDD_SLEEP_MODE); - pci_write_config(dev, DC_PCI_CFDD, command, 4); - } - - /* - * Try to learn something about the supported media. - * We know that ASIX and ADMtek and Davicom devices - * will *always* be using MII media, so that's a no-brainer. - * The tricky ones are the Macronix/PNIC II and the - * Intel 21143. - */ - if (DC_IS_INTEL(sc)) - dc_parse_21143_srom(sc); - else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { - if (sc->dc_type == DC_TYPE_98713) - sc->dc_pmode = DC_PMODE_MII; - else - sc->dc_pmode = DC_PMODE_SYM; - } else if (!sc->dc_pmode) - sc->dc_pmode = DC_PMODE_MII; - - /* - * Get station address from the EEPROM. - */ - switch(sc->dc_type) { - case DC_TYPE_98713: - case DC_TYPE_98713A: - case DC_TYPE_987x5: - case DC_TYPE_PNICII: - dc_read_eeprom(sc, (caddr_t)&mac_offset, - (DC_EE_NODEADDR_OFFSET / 2), 1, 0); - dc_read_eeprom(sc, (caddr_t)&eaddr, (mac_offset / 2), 3, 0); - break; - case DC_TYPE_PNIC: - dc_read_eeprom(sc, (caddr_t)&eaddr, 0, 3, 1); - break; - case DC_TYPE_DM9102: - dc_read_eeprom(sc, (caddr_t)&eaddr, DC_EE_NODEADDR, 3, 0); -#ifdef __sparc64__ - /* - * If this is an onboard dc(4) the station address read from - * the EEPROM is all zero and we have to get it from the fcode. - */ - for (i = 0; i < ETHER_ADDR_LEN; i++) - if (eaddr[i] != 0x00) - break; - if (i >= ETHER_ADDR_LEN) - OF_getetheraddr(dev, eaddr); -#endif - break; - case DC_TYPE_21143: - case DC_TYPE_ASIX: - dc_read_eeprom(sc, (caddr_t)&eaddr, DC_EE_NODEADDR, 3, 0); - break; - case DC_TYPE_AL981: - case DC_TYPE_AN985: - *(u_int32_t *)(&eaddr[0]) = CSR_READ_4(sc, DC_AL_PAR0); - *(u_int16_t *)(&eaddr[4]) = CSR_READ_4(sc, DC_AL_PAR1); - break; - case DC_TYPE_CONEXANT: - bcopy(sc->dc_srom + DC_CONEXANT_EE_NODEADDR, &eaddr, - ETHER_ADDR_LEN); - break; - case DC_TYPE_XIRCOM: - /* The MAC comes from the CIS. */ - mac = pci_get_ether(dev); - if (!mac) { - device_printf(dev, "No station address in CIS!\n"); - error = ENXIO; - goto fail; - } - bcopy(mac, eaddr, ETHER_ADDR_LEN); - break; - default: - dc_read_eeprom(sc, (caddr_t)&eaddr, DC_EE_NODEADDR, 3, 0); - break; - } - - sc->dc_unit = unit; - - /* Allocate a busdma tag and DMA safe memory for TX/RX descriptors. */ - error = bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT, - BUS_SPACE_MAXADDR, NULL, NULL, sizeof(struct dc_list_data), 1, - sizeof(struct dc_list_data), 0, NULL, NULL, &sc->dc_ltag); - if (error) { - printf("dc%d: failed to allocate busdma tag\n", unit); - error = ENXIO; - goto fail; - } - error = bus_dmamem_alloc(sc->dc_ltag, (void **)&sc->dc_ldata, - BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->dc_lmap); - if (error) { - printf("dc%d: failed to allocate DMA safe memory\n", unit); - error = ENXIO; - goto fail; - } - error = bus_dmamap_load(sc->dc_ltag, sc->dc_lmap, sc->dc_ldata, - sizeof(struct dc_list_data), dc_dma_map_addr, &sc->dc_laddr, - BUS_DMA_NOWAIT); - if (error) { - printf("dc%d: cannot get address of the descriptors\n", unit); - error = ENXIO; - goto fail; - } - - /* - * Allocate a busdma tag and DMA safe memory for the multicast - * setup frame. - */ - error = bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT, - BUS_SPACE_MAXADDR, NULL, NULL, DC_SFRAME_LEN + DC_MIN_FRAMELEN, 1, - DC_SFRAME_LEN + DC_MIN_FRAMELEN, 0, NULL, NULL, &sc->dc_stag); - if (error) { - printf("dc%d: failed to allocate busdma tag\n", unit); - error = ENXIO; - goto fail; - } - error = bus_dmamem_alloc(sc->dc_stag, (void **)&sc->dc_cdata.dc_sbuf, - BUS_DMA_NOWAIT, &sc->dc_smap); - if (error) { - printf("dc%d: failed to allocate DMA safe memory\n", unit); - error = ENXIO; - goto fail; - } - error = bus_dmamap_load(sc->dc_stag, sc->dc_smap, sc->dc_cdata.dc_sbuf, - DC_SFRAME_LEN, dc_dma_map_addr, &sc->dc_saddr, BUS_DMA_NOWAIT); - if (error) { - printf("dc%d: cannot get address of the descriptors\n", unit); - error = ENXIO; - goto fail; - } - - /* Allocate a busdma tag for mbufs. */ - error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, - BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, DC_TX_LIST_CNT, MCLBYTES, - 0, NULL, NULL, &sc->dc_mtag); - if (error) { - printf("dc%d: failed to allocate busdma tag\n", unit); - error = ENXIO; - goto fail; - } - - /* Create the TX/RX busdma maps. */ - for (i = 0; i < DC_TX_LIST_CNT; i++) { - error = bus_dmamap_create(sc->dc_mtag, 0, - &sc->dc_cdata.dc_tx_map[i]); - if (error) { - printf("dc%d: failed to init TX ring\n", unit); - error = ENXIO; - goto fail; - } - } - for (i = 0; i < DC_RX_LIST_CNT; i++) { - error = bus_dmamap_create(sc->dc_mtag, 0, - &sc->dc_cdata.dc_rx_map[i]); - if (error) { - printf("dc%d: failed to init RX ring\n", unit); - error = ENXIO; - goto fail; - } - } - error = bus_dmamap_create(sc->dc_mtag, 0, &sc->dc_sparemap); - if (error) { - printf("dc%d: failed to init RX ring\n", unit); - error = ENXIO; - goto fail; - } - - ifp = sc->dc_ifp = if_alloc(IFT_ETHER); - if (ifp == NULL) { - printf("dc%d: can not if_alloc()\n", unit); - error = ENOSPC; - goto fail; - } - ifp->if_softc = sc; - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - /* XXX: bleah, MTU gets overwritten in ether_ifattach() */ - ifp->if_mtu = ETHERMTU; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - if (!IS_MPSAFE) - ifp->if_flags |= IFF_NEEDSGIANT; - ifp->if_ioctl = dc_ioctl; - ifp->if_start = dc_start; - ifp->if_watchdog = dc_watchdog; - ifp->if_init = dc_init; - ifp->if_baudrate = 10000000; - IFQ_SET_MAXLEN(&ifp->if_snd, DC_TX_LIST_CNT - 1); - ifp->if_snd.ifq_drv_maxlen = DC_TX_LIST_CNT - 1; - IFQ_SET_READY(&ifp->if_snd); - - /* - * Do MII setup. If this is a 21143, check for a PHY on the - * MII bus after applying any necessary fixups to twiddle the - * GPIO bits. If we don't end up finding a PHY, restore the - * old selection (SIA only or SIA/SYM) and attach the dcphy - * driver instead. - */ - if (DC_IS_INTEL(sc)) { - dc_apply_fixup(sc, IFM_AUTO); - tmp = sc->dc_pmode; - sc->dc_pmode = DC_PMODE_MII; - } - - /* - * Setup General Purpose port mode and data so the tulip can talk - * to the MII. This needs to be done before mii_phy_probe so that - * we can actually see them. - */ - if (DC_IS_XIRCOM(sc)) { - CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_WRITE_EN | DC_SIAGP_INT1_EN | - DC_SIAGP_MD_GP2_OUTPUT | DC_SIAGP_MD_GP0_OUTPUT); - DELAY(10); - CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_INT1_EN | - DC_SIAGP_MD_GP2_OUTPUT | DC_SIAGP_MD_GP0_OUTPUT); - DELAY(10); - } - - error = mii_phy_probe(dev, &sc->dc_miibus, - dc_ifmedia_upd, dc_ifmedia_sts); - - if (error && DC_IS_INTEL(sc)) { - sc->dc_pmode = tmp; - if (sc->dc_pmode != DC_PMODE_SIA) - sc->dc_pmode = DC_PMODE_SYM; - sc->dc_flags |= DC_21143_NWAY; - mii_phy_probe(dev, &sc->dc_miibus, - dc_ifmedia_upd, dc_ifmedia_sts); - /* - * For non-MII cards, we need to have the 21143 - * drive the LEDs. Except there are some systems - * like the NEC VersaPro NoteBook PC which have no - * LEDs, and twiddling these bits has adverse effects - * on them. (I.e. you suddenly can't get a link.) - */ - if (pci_read_config(dev, DC_PCI_CSID, 4) != 0x80281033) - sc->dc_flags |= DC_TULIP_LEDS; - error = 0; - } - - if (error) { - printf("dc%d: MII without any PHY!\n", sc->dc_unit); - goto fail; - } - - if (DC_IS_ADMTEK(sc)) { - /* - * Set automatic TX underrun recovery for the ADMtek chips - */ - DC_SETBIT(sc, DC_AL_CR, DC_AL_CR_ATUR); - } - - /* - * Tell the upper layer(s) we support long frames. - */ - ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); - ifp->if_capabilities |= IFCAP_VLAN_MTU; -#ifdef DEVICE_POLLING - ifp->if_capabilities |= IFCAP_POLLING; -#endif - ifp->if_capenable = ifp->if_capabilities; - - callout_init(&sc->dc_stat_ch, IS_MPSAFE ? CALLOUT_MPSAFE : 0); - -#ifdef SRM_MEDIA - sc->dc_srm_media = 0; - - /* Remember the SRM console media setting */ - if (DC_IS_INTEL(sc)) { - command = pci_read_config(dev, DC_PCI_CFDD, 4); - command &= ~(DC_CFDD_SNOOZE_MODE | DC_CFDD_SLEEP_MODE); - switch ((command >> 8) & 0xff) { - case 3: - sc->dc_srm_media = IFM_10_T; - break; - case 4: - sc->dc_srm_media = IFM_10_T | IFM_FDX; - break; - case 5: - sc->dc_srm_media = IFM_100_TX; - break; - case 6: - sc->dc_srm_media = IFM_100_TX | IFM_FDX; - break; - } - if (sc->dc_srm_media) - sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; - } -#endif - - /* - * Call MI attach routine. - */ - ether_ifattach(ifp, eaddr); - - /* Hook interrupt last to avoid having to lock softc */ - error = bus_setup_intr(dev, sc->dc_irq, INTR_TYPE_NET | - (IS_MPSAFE ? INTR_MPSAFE : 0), - dc_intr, sc, &sc->dc_intrhand); - - if (error) { - printf("dc%d: couldn't set up irq\n", unit); - ether_ifdetach(ifp); - if_free(ifp); - goto fail; - } - -fail: - if (error) - dc_detach(dev); - return (error); -} - -/* - * Shutdown hardware and free up resources. This can be called any - * time after the mutex has been initialized. It is called in both - * the error case in attach and the normal detach case so it needs - * to be careful about only freeing resources that have actually been - * allocated. - */ -static int -dc_detach(device_t dev) -{ - struct dc_softc *sc; - struct ifnet *ifp; - struct dc_mediainfo *m; - int i; - - sc = device_get_softc(dev); - KASSERT(mtx_initialized(&sc->dc_mtx), ("dc mutex not initialized")); - DC_LOCK(sc); - - ifp = sc->dc_ifp; - - /* These should only be active if attach succeeded */ - if (device_is_attached(dev)) { - dc_stop(sc); - ether_ifdetach(ifp); - if_free(ifp); - } - if (sc->dc_miibus) - device_delete_child(dev, sc->dc_miibus); - bus_generic_detach(dev); - - if (sc->dc_intrhand) - bus_teardown_intr(dev, sc->dc_irq, sc->dc_intrhand); - if (sc->dc_irq) - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->dc_irq); - if (sc->dc_res) - bus_release_resource(dev, DC_RES, DC_RID, sc->dc_res); - - if (sc->dc_cdata.dc_sbuf != NULL) - bus_dmamem_free(sc->dc_stag, sc->dc_cdata.dc_sbuf, sc->dc_smap); - if (sc->dc_ldata != NULL) - bus_dmamem_free(sc->dc_ltag, sc->dc_ldata, sc->dc_lmap); - for (i = 0; i < DC_TX_LIST_CNT; i++) - bus_dmamap_destroy(sc->dc_mtag, sc->dc_cdata.dc_tx_map[i]); - for (i = 0; i < DC_RX_LIST_CNT; i++) - bus_dmamap_destroy(sc->dc_mtag, sc->dc_cdata.dc_rx_map[i]); - bus_dmamap_destroy(sc->dc_mtag, sc->dc_sparemap); - if (sc->dc_stag) - bus_dma_tag_destroy(sc->dc_stag); - if (sc->dc_mtag) - bus_dma_tag_destroy(sc->dc_mtag); - if (sc->dc_ltag) - bus_dma_tag_destroy(sc->dc_ltag); - - free(sc->dc_pnic_rx_buf, M_DEVBUF); - - while (sc->dc_mi != NULL) { - m = sc->dc_mi->dc_next; - free(sc->dc_mi, M_DEVBUF); - sc->dc_mi = m; - } - free(sc->dc_srom, M_DEVBUF); - - DC_UNLOCK(sc); - mtx_destroy(&sc->dc_mtx); - - return (0); -} - -/* - * Initialize the transmit descriptors. - */ -static int -dc_list_tx_init(struct dc_softc *sc) -{ - struct dc_chain_data *cd; - struct dc_list_data *ld; - int i, nexti; - - cd = &sc->dc_cdata; - ld = sc->dc_ldata; - for (i = 0; i < DC_TX_LIST_CNT; i++) { - if (i == DC_TX_LIST_CNT - 1) - nexti = 0; - else - nexti = i + 1; - ld->dc_tx_list[i].dc_next = htole32(DC_TXDESC(sc, nexti)); - cd->dc_tx_chain[i] = NULL; - ld->dc_tx_list[i].dc_data = 0; - ld->dc_tx_list[i].dc_ctl = 0; - } - - cd->dc_tx_prod = cd->dc_tx_cons = cd->dc_tx_cnt = 0; - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, - BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); - return (0); -} - - -/* - * Initialize the RX descriptors and allocate mbufs for them. Note that - * we arrange the descriptors in a closed ring, so that the last descriptor - * points back to the first. - */ -static int -dc_list_rx_init(struct dc_softc *sc) -{ - struct dc_chain_data *cd; - struct dc_list_data *ld; - int i, nexti; - - cd = &sc->dc_cdata; - ld = sc->dc_ldata; - - for (i = 0; i < DC_RX_LIST_CNT; i++) { - if (dc_newbuf(sc, i, 1) != 0) - return (ENOBUFS); - if (i == DC_RX_LIST_CNT - 1) - nexti = 0; - else - nexti = i + 1; - ld->dc_rx_list[i].dc_next = htole32(DC_RXDESC(sc, nexti)); - } - - cd->dc_rx_prod = 0; - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, - BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); - return (0); -} - -static void -dc_dma_map_rxbuf(arg, segs, nseg, mapsize, error) - void *arg; - bus_dma_segment_t *segs; - int nseg; - bus_size_t mapsize; - int error; -{ - struct dc_softc *sc; - struct dc_desc *c; - - sc = arg; - c = &sc->dc_ldata->dc_rx_list[sc->dc_cdata.dc_rx_cur]; - if (error) { - sc->dc_cdata.dc_rx_err = error; - return; - } - - KASSERT(nseg == 1, ("wrong number of segments, should be 1")); - sc->dc_cdata.dc_rx_err = 0; - c->dc_data = htole32(segs->ds_addr); -} - -/* - * Initialize an RX descriptor and attach an MBUF cluster. - */ -static int -dc_newbuf(struct dc_softc *sc, int i, int alloc) -{ - struct mbuf *m_new; - bus_dmamap_t tmp; - int error; - - if (alloc) { - m_new = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); - if (m_new == NULL) - return (ENOBUFS); - } else { - m_new = sc->dc_cdata.dc_rx_chain[i]; - m_new->m_data = m_new->m_ext.ext_buf; - } - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - m_adj(m_new, sizeof(u_int64_t)); - - /* - * If this is a PNIC chip, zero the buffer. This is part - * of the workaround for the receive bug in the 82c168 and - * 82c169 chips. - */ - if (sc->dc_flags & DC_PNIC_RX_BUG_WAR) - bzero(mtod(m_new, char *), m_new->m_len); - - /* No need to remap the mbuf if we're reusing it. */ - if (alloc) { - sc->dc_cdata.dc_rx_cur = i; - error = bus_dmamap_load_mbuf(sc->dc_mtag, sc->dc_sparemap, - m_new, dc_dma_map_rxbuf, sc, 0); - if (error) { - m_freem(m_new); - return (error); - } - if (sc->dc_cdata.dc_rx_err != 0) { - m_freem(m_new); - return (sc->dc_cdata.dc_rx_err); - } - bus_dmamap_unload(sc->dc_mtag, sc->dc_cdata.dc_rx_map[i]); - tmp = sc->dc_cdata.dc_rx_map[i]; - sc->dc_cdata.dc_rx_map[i] = sc->dc_sparemap; - sc->dc_sparemap = tmp; - sc->dc_cdata.dc_rx_chain[i] = m_new; - } - - sc->dc_ldata->dc_rx_list[i].dc_ctl = htole32(DC_RXCTL_RLINK | DC_RXLEN); - sc->dc_ldata->dc_rx_list[i].dc_status = htole32(DC_RXSTAT_OWN); - bus_dmamap_sync(sc->dc_mtag, sc->dc_cdata.dc_rx_map[i], - BUS_DMASYNC_PREREAD); - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, - BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); - return (0); -} - -/* - * Grrrrr. - * The PNIC chip has a terrible bug in it that manifests itself during - * periods of heavy activity. The exact mode of failure if difficult to - * pinpoint: sometimes it only happens in promiscuous mode, sometimes it - * will happen on slow machines. The bug is that sometimes instead of - * uploading one complete frame during reception, it uploads what looks - * like the entire contents of its FIFO memory. The frame we want is at - * the end of the whole mess, but we never know exactly how much data has - * been uploaded, so salvaging the frame is hard. - * - * There is only one way to do it reliably, and it's disgusting. - * Here's what we know: - * - * - We know there will always be somewhere between one and three extra - * descriptors uploaded. - * - * - We know the desired received frame will always be at the end of the - * total data upload. - * - * - We know the size of the desired received frame because it will be - * provided in the length field of the status word in the last descriptor. - * - * Here's what we do: - * - * - When we allocate buffers for the receive ring, we bzero() them. - * This means that we know that the buffer contents should be all - * zeros, except for data uploaded by the chip. - * - * - We also force the PNIC chip to upload frames that include the - * ethernet CRC at the end. - * - * - We gather all of the bogus frame data into a single buffer. - * - * - We then position a pointer at the end of this buffer and scan - * backwards until we encounter the first non-zero byte of data. - * This is the end of the received frame. We know we will encounter - * some data at the end of the frame because the CRC will always be - * there, so even if the sender transmits a packet of all zeros, - * we won't be fooled. - * - * - We know the size of the actual received frame, so we subtract - * that value from the current pointer location. This brings us - * to the start of the actual received packet. - * - * - We copy this into an mbuf and pass it on, along with the actual - * frame length. - * - * The performance hit is tremendous, but it beats dropping frames all - * the time. - */ - -#define DC_WHOLEFRAME (DC_RXSTAT_FIRSTFRAG | DC_RXSTAT_LASTFRAG) -static void -dc_pnic_rx_bug_war(struct dc_softc *sc, int idx) -{ - struct dc_desc *cur_rx; - struct dc_desc *c = NULL; - struct mbuf *m = NULL; - unsigned char *ptr; - int i, total_len; - u_int32_t rxstat = 0; - - i = sc->dc_pnic_rx_bug_save; - cur_rx = &sc->dc_ldata->dc_rx_list[idx]; - ptr = sc->dc_pnic_rx_buf; - bzero(ptr, DC_RXLEN * 5); - - /* Copy all the bytes from the bogus buffers. */ - while (1) { - c = &sc->dc_ldata->dc_rx_list[i]; - rxstat = le32toh(c->dc_status); - m = sc->dc_cdata.dc_rx_chain[i]; - bcopy(mtod(m, char *), ptr, DC_RXLEN); - ptr += DC_RXLEN; - /* If this is the last buffer, break out. */ - if (i == idx || rxstat & DC_RXSTAT_LASTFRAG) - break; - dc_newbuf(sc, i, 0); - DC_INC(i, DC_RX_LIST_CNT); - } - - /* Find the length of the actual receive frame. */ - total_len = DC_RXBYTES(rxstat); - - /* Scan backwards until we hit a non-zero byte. */ - while (*ptr == 0x00) - ptr--; - - /* Round off. */ - if ((uintptr_t)(ptr) & 0x3) - ptr -= 1; - - /* Now find the start of the frame. */ - ptr -= total_len; - if (ptr < sc->dc_pnic_rx_buf) - ptr = sc->dc_pnic_rx_buf; - - /* - * Now copy the salvaged frame to the last mbuf and fake up - * the status word to make it look like a successful - * frame reception. - */ - dc_newbuf(sc, i, 0); - bcopy(ptr, mtod(m, char *), total_len); - cur_rx->dc_status = htole32(rxstat | DC_RXSTAT_FIRSTFRAG); -} - -/* - * This routine searches the RX ring for dirty descriptors in the - * event that the rxeof routine falls out of sync with the chip's - * current descriptor pointer. This may happen sometimes as a result - * of a "no RX buffer available" condition that happens when the chip - * consumes all of the RX buffers before the driver has a chance to - * process the RX ring. This routine may need to be called more than - * once to bring the driver back in sync with the chip, however we - * should still be getting RX DONE interrupts to drive the search - * for new packets in the RX ring, so we should catch up eventually. - */ -static int -dc_rx_resync(struct dc_softc *sc) -{ - struct dc_desc *cur_rx; - int i, pos; - - pos = sc->dc_cdata.dc_rx_prod; - - for (i = 0; i < DC_RX_LIST_CNT; i++) { - cur_rx = &sc->dc_ldata->dc_rx_list[pos]; - if (!(le32toh(cur_rx->dc_status) & DC_RXSTAT_OWN)) - break; - DC_INC(pos, DC_RX_LIST_CNT); - } - - /* If the ring really is empty, then just return. */ - if (i == DC_RX_LIST_CNT) - return (0); - - /* We've fallen behing the chip: catch it. */ - sc->dc_cdata.dc_rx_prod = pos; - - return (EAGAIN); -} - -/* - * A frame has been uploaded: pass the resulting mbuf chain up to - * the higher level protocols. - */ -static void -dc_rxeof(struct dc_softc *sc) -{ - struct mbuf *m; - struct ifnet *ifp; - struct dc_desc *cur_rx; - int i, total_len = 0; - u_int32_t rxstat; - - DC_LOCK_ASSERT(sc); - - ifp = sc->dc_ifp; - i = sc->dc_cdata.dc_rx_prod; - - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, BUS_DMASYNC_POSTREAD); - while (!(le32toh(sc->dc_ldata->dc_rx_list[i].dc_status) & - DC_RXSTAT_OWN)) { -#ifdef DEVICE_POLLING - if (ifp->if_flags & IFF_POLLING) { - if (sc->rxcycles <= 0) - break; - sc->rxcycles--; - } -#endif - cur_rx = &sc->dc_ldata->dc_rx_list[i]; - rxstat = le32toh(cur_rx->dc_status); - m = sc->dc_cdata.dc_rx_chain[i]; - bus_dmamap_sync(sc->dc_mtag, sc->dc_cdata.dc_rx_map[i], - BUS_DMASYNC_POSTREAD); - total_len = DC_RXBYTES(rxstat); - - if (sc->dc_flags & DC_PNIC_RX_BUG_WAR) { - if ((rxstat & DC_WHOLEFRAME) != DC_WHOLEFRAME) { - if (rxstat & DC_RXSTAT_FIRSTFRAG) - sc->dc_pnic_rx_bug_save = i; - if ((rxstat & DC_RXSTAT_LASTFRAG) == 0) { - DC_INC(i, DC_RX_LIST_CNT); - continue; - } - dc_pnic_rx_bug_war(sc, i); - rxstat = le32toh(cur_rx->dc_status); - total_len = DC_RXBYTES(rxstat); - } - } - - /* - * If an error occurs, update stats, clear the - * status word and leave the mbuf cluster in place: - * it should simply get re-used next time this descriptor - * comes up in the ring. However, don't report long - * frames as errors since they could be vlans. - */ - if ((rxstat & DC_RXSTAT_RXERR)) { - if (!(rxstat & DC_RXSTAT_GIANT) || - (rxstat & (DC_RXSTAT_CRCERR | DC_RXSTAT_DRIBBLE | - DC_RXSTAT_MIIERE | DC_RXSTAT_COLLSEEN | - DC_RXSTAT_RUNT | DC_RXSTAT_DE))) { - ifp->if_ierrors++; - if (rxstat & DC_RXSTAT_COLLSEEN) - ifp->if_collisions++; - dc_newbuf(sc, i, 0); - if (rxstat & DC_RXSTAT_CRCERR) { - DC_INC(i, DC_RX_LIST_CNT); - continue; - } else { - dc_init(sc); - return; - } - } - } - - /* No errors; receive the packet. */ - total_len -= ETHER_CRC_LEN; -#ifdef __i386__ - /* - * On the x86 we do not have alignment problems, so try to - * allocate a new buffer for the receive ring, and pass up - * the one where the packet is already, saving the expensive - * copy done in m_devget(). - * If we are on an architecture with alignment problems, or - * if the allocation fails, then use m_devget and leave the - * existing buffer in the receive ring. - */ - if (dc_quick && dc_newbuf(sc, i, 1) == 0) { - m->m_pkthdr.rcvif = ifp; - m->m_pkthdr.len = m->m_len = total_len; - DC_INC(i, DC_RX_LIST_CNT); - } else -#endif - { - struct mbuf *m0; - - m0 = m_devget(mtod(m, char *), total_len, - ETHER_ALIGN, ifp, NULL); - dc_newbuf(sc, i, 0); - DC_INC(i, DC_RX_LIST_CNT); - if (m0 == NULL) { - ifp->if_ierrors++; - continue; - } - m = m0; - } - - ifp->if_ipackets++; - DC_UNLOCK(sc); - (*ifp->if_input)(ifp, m); - DC_LOCK(sc); - } - - sc->dc_cdata.dc_rx_prod = i; -} - -/* - * A frame was downloaded to the chip. It's safe for us to clean up - * the list buffers. - */ - -static void -dc_txeof(struct dc_softc *sc) -{ - struct dc_desc *cur_tx = NULL; - struct ifnet *ifp; - int idx; - u_int32_t ctl, txstat; - - ifp = sc->dc_ifp; - - /* - * Go through our tx list and free mbufs for those - * frames that have been transmitted. - */ - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, BUS_DMASYNC_POSTREAD); - idx = sc->dc_cdata.dc_tx_cons; - while (idx != sc->dc_cdata.dc_tx_prod) { - - cur_tx = &sc->dc_ldata->dc_tx_list[idx]; - txstat = le32toh(cur_tx->dc_status); - ctl = le32toh(cur_tx->dc_ctl); - - if (txstat & DC_TXSTAT_OWN) - break; - - if (!(ctl & DC_TXCTL_LASTFRAG) || ctl & DC_TXCTL_SETUP) { - if (ctl & DC_TXCTL_SETUP) { - /* - * Yes, the PNIC is so brain damaged - * that it will sometimes generate a TX - * underrun error while DMAing the RX - * filter setup frame. If we detect this, - * we have to send the setup frame again, - * or else the filter won't be programmed - * correctly. - */ - if (DC_IS_PNIC(sc)) { - if (txstat & DC_TXSTAT_ERRSUM) - dc_setfilt(sc); - } - sc->dc_cdata.dc_tx_chain[idx] = NULL; - } - sc->dc_cdata.dc_tx_cnt--; - DC_INC(idx, DC_TX_LIST_CNT); - continue; - } - - if (DC_IS_XIRCOM(sc) || DC_IS_CONEXANT(sc)) { - /* - * XXX: Why does my Xircom taunt me so? - * For some reason it likes setting the CARRLOST flag - * even when the carrier is there. wtf?!? - * Who knows, but Conexant chips have the - * same problem. Maybe they took lessons - * from Xircom. - */ - if (/*sc->dc_type == DC_TYPE_21143 &&*/ - sc->dc_pmode == DC_PMODE_MII && - ((txstat & 0xFFFF) & ~(DC_TXSTAT_ERRSUM | - DC_TXSTAT_NOCARRIER))) - txstat &= ~DC_TXSTAT_ERRSUM; - } else { - if (/*sc->dc_type == DC_TYPE_21143 &&*/ - sc->dc_pmode == DC_PMODE_MII && - ((txstat & 0xFFFF) & ~(DC_TXSTAT_ERRSUM | - DC_TXSTAT_NOCARRIER | DC_TXSTAT_CARRLOST))) - txstat &= ~DC_TXSTAT_ERRSUM; - } - - if (txstat & DC_TXSTAT_ERRSUM) { - ifp->if_oerrors++; - if (txstat & DC_TXSTAT_EXCESSCOLL) - ifp->if_collisions++; - if (txstat & DC_TXSTAT_LATECOLL) - ifp->if_collisions++; - if (!(txstat & DC_TXSTAT_UNDERRUN)) { - dc_init(sc); - return; - } - } - - ifp->if_collisions += (txstat & DC_TXSTAT_COLLCNT) >> 3; - - ifp->if_opackets++; - if (sc->dc_cdata.dc_tx_chain[idx] != NULL) { - bus_dmamap_sync(sc->dc_mtag, - sc->dc_cdata.dc_tx_map[idx], - BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(sc->dc_mtag, - sc->dc_cdata.dc_tx_map[idx]); - m_freem(sc->dc_cdata.dc_tx_chain[idx]); - sc->dc_cdata.dc_tx_chain[idx] = NULL; - } - - sc->dc_cdata.dc_tx_cnt--; - DC_INC(idx, DC_TX_LIST_CNT); - } - - if (idx != sc->dc_cdata.dc_tx_cons) { - /* Some buffers have been freed. */ - sc->dc_cdata.dc_tx_cons = idx; - ifp->if_flags &= ~IFF_OACTIVE; - } - ifp->if_timer = (sc->dc_cdata.dc_tx_cnt == 0) ? 0 : 5; -} - -static void -dc_tick(void *xsc) -{ - struct dc_softc *sc; - struct mii_data *mii; - struct ifnet *ifp; - u_int32_t r; - - sc = xsc; - DC_LOCK(sc); - ifp = sc->dc_ifp; - mii = device_get_softc(sc->dc_miibus); - - if (sc->dc_flags & DC_REDUCED_MII_POLL) { - if (sc->dc_flags & DC_21143_NWAY) { - r = CSR_READ_4(sc, DC_10BTSTAT); - if (IFM_SUBTYPE(mii->mii_media_active) == - IFM_100_TX && (r & DC_TSTAT_LS100)) { - sc->dc_link = 0; - mii_mediachg(mii); - } - if (IFM_SUBTYPE(mii->mii_media_active) == - IFM_10_T && (r & DC_TSTAT_LS10)) { - sc->dc_link = 0; - mii_mediachg(mii); - } - if (sc->dc_link == 0) - mii_tick(mii); - } else { - r = CSR_READ_4(sc, DC_ISR); - if ((r & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT && - sc->dc_cdata.dc_tx_cnt == 0) { - mii_tick(mii); - if (!(mii->mii_media_status & IFM_ACTIVE)) - sc->dc_link = 0; - } - } - } else - mii_tick(mii); - - /* - * When the init routine completes, we expect to be able to send - * packets right away, and in fact the network code will send a - * gratuitous ARP the moment the init routine marks the interface - * as running. However, even though the MAC may have been initialized, - * there may be a delay of a few seconds before the PHY completes - * autonegotiation and the link is brought up. Any transmissions - * made during that delay will be lost. Dealing with this is tricky: - * we can't just pause in the init routine while waiting for the - * PHY to come ready since that would bring the whole system to - * a screeching halt for several seconds. - * - * What we do here is prevent the TX start routine from sending - * any packets until a link has been established. After the - * interface has been initialized, the tick routine will poll - * the state of the PHY until the IFM_ACTIVE flag is set. Until - * that time, packets will stay in the send queue, and once the - * link comes up, they will be flushed out to the wire. - */ - if (!sc->dc_link && mii->mii_media_status & IFM_ACTIVE && - IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { - sc->dc_link++; - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - dc_start(ifp); - } - - if (sc->dc_flags & DC_21143_NWAY && !sc->dc_link) - callout_reset(&sc->dc_stat_ch, hz/10, dc_tick, sc); - else - callout_reset(&sc->dc_stat_ch, hz, dc_tick, sc); - - DC_UNLOCK(sc); -} - -/* - * A transmit underrun has occurred. Back off the transmit threshold, - * or switch to store and forward mode if we have to. - */ -static void -dc_tx_underrun(struct dc_softc *sc) -{ - u_int32_t isr; - int i; - - if (DC_IS_DAVICOM(sc)) - dc_init(sc); - - if (DC_IS_INTEL(sc)) { - /* - * The real 21143 requires that the transmitter be idle - * in order to change the transmit threshold or store - * and forward state. - */ - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON); - - for (i = 0; i < DC_TIMEOUT; i++) { - isr = CSR_READ_4(sc, DC_ISR); - if (isr & DC_ISR_TX_IDLE) - break; - DELAY(10); - } - if (i == DC_TIMEOUT) { - printf("dc%d: failed to force tx to idle state\n", - sc->dc_unit); - dc_init(sc); - } - } - - printf("dc%d: TX underrun -- ", sc->dc_unit); - sc->dc_txthresh += DC_TXTHRESH_INC; - if (sc->dc_txthresh > DC_TXTHRESH_MAX) { - printf("using store and forward mode\n"); - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_STORENFWD); - } else { - printf("increasing TX threshold\n"); - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_TX_THRESH); - DC_SETBIT(sc, DC_NETCFG, sc->dc_txthresh); - } - - if (DC_IS_INTEL(sc)) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON); -} - -#ifdef DEVICE_POLLING -static poll_handler_t dc_poll; - -static void -dc_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) -{ - struct dc_softc *sc = ifp->if_softc; - - if (!(ifp->if_capenable & IFCAP_POLLING)) { - ether_poll_deregister(ifp); - cmd = POLL_DEREGISTER; - } - if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */ - /* Re-enable interrupts. */ - CSR_WRITE_4(sc, DC_IMR, DC_INTRS); - return; - } - DC_LOCK(sc); - sc->rxcycles = count; - dc_rxeof(sc); - dc_txeof(sc); - if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) - dc_start(ifp); - - if (cmd == POLL_AND_CHECK_STATUS) { /* also check status register */ - u_int32_t status; - - status = CSR_READ_4(sc, DC_ISR); - status &= (DC_ISR_RX_WATDOGTIMEO | DC_ISR_RX_NOBUF | - DC_ISR_TX_NOBUF | DC_ISR_TX_IDLE | DC_ISR_TX_UNDERRUN | - DC_ISR_BUS_ERR); - if (!status) { - DC_UNLOCK(sc); - return; - } - /* ack what we have */ - CSR_WRITE_4(sc, DC_ISR, status); - - if (status & (DC_ISR_RX_WATDOGTIMEO | DC_ISR_RX_NOBUF)) { - u_int32_t r = CSR_READ_4(sc, DC_FRAMESDISCARDED); - ifp->if_ierrors += (r & 0xffff) + ((r >> 17) & 0x7ff); - - if (dc_rx_resync(sc)) - dc_rxeof(sc); - } - /* restart transmit unit if necessary */ - if (status & DC_ISR_TX_IDLE && sc->dc_cdata.dc_tx_cnt) - CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF); - - if (status & DC_ISR_TX_UNDERRUN) - dc_tx_underrun(sc); - - if (status & DC_ISR_BUS_ERR) { - printf("dc_poll: dc%d bus error\n", sc->dc_unit); - dc_reset(sc); - dc_init(sc); - } - } - DC_UNLOCK(sc); -} -#endif /* DEVICE_POLLING */ - -static void -dc_intr(void *arg) -{ - struct dc_softc *sc; - struct ifnet *ifp; - u_int32_t status; - - sc = arg; - - if (sc->suspended) - return; - - if ((CSR_READ_4(sc, DC_ISR) & DC_INTRS) == 0) - return; - - DC_LOCK(sc); - ifp = sc->dc_ifp; -#ifdef DEVICE_POLLING - if (ifp->if_flags & IFF_POLLING) - goto done; - if ((ifp->if_capenable & IFCAP_POLLING) && - ether_poll_register(dc_poll, ifp)) { /* ok, disable interrupts */ - CSR_WRITE_4(sc, DC_IMR, 0x00000000); - goto done; - } -#endif - - /* Suppress unwanted interrupts */ - if (!(ifp->if_flags & IFF_UP)) { - if (CSR_READ_4(sc, DC_ISR) & DC_INTRS) - dc_stop(sc); - DC_UNLOCK(sc); - return; - } - - /* Disable interrupts. */ - CSR_WRITE_4(sc, DC_IMR, 0x00000000); - - while (((status = CSR_READ_4(sc, DC_ISR)) & DC_INTRS) - && status != 0xFFFFFFFF) { - - CSR_WRITE_4(sc, DC_ISR, status); - - if (status & DC_ISR_RX_OK) { - int curpkts; - curpkts = ifp->if_ipackets; - dc_rxeof(sc); - if (curpkts == ifp->if_ipackets) { - while (dc_rx_resync(sc)) - dc_rxeof(sc); - } - } - - if (status & (DC_ISR_TX_OK | DC_ISR_TX_NOBUF)) - dc_txeof(sc); - - if (status & DC_ISR_TX_IDLE) { - dc_txeof(sc); - if (sc->dc_cdata.dc_tx_cnt) { - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON); - CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF); - } - } - - if (status & DC_ISR_TX_UNDERRUN) - dc_tx_underrun(sc); - - if ((status & DC_ISR_RX_WATDOGTIMEO) - || (status & DC_ISR_RX_NOBUF)) { - int curpkts; - curpkts = ifp->if_ipackets; - dc_rxeof(sc); - if (curpkts == ifp->if_ipackets) { - while (dc_rx_resync(sc)) - dc_rxeof(sc); - } - } - - if (status & DC_ISR_BUS_ERR) { - dc_reset(sc); - dc_init(sc); - } - } - - /* Re-enable interrupts. */ - CSR_WRITE_4(sc, DC_IMR, DC_INTRS); - - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - dc_start(ifp); - -#ifdef DEVICE_POLLING -done: -#endif - - DC_UNLOCK(sc); -} - -static void -dc_dma_map_txbuf(arg, segs, nseg, mapsize, error) - void *arg; - bus_dma_segment_t *segs; - int nseg; - bus_size_t mapsize; - int error; -{ - struct dc_softc *sc; - struct dc_desc *f; - int cur, first, frag, i; - - sc = arg; - if (error) { - sc->dc_cdata.dc_tx_err = error; - return; - } - - first = cur = frag = sc->dc_cdata.dc_tx_prod; - for (i = 0; i < nseg; i++) { - if ((sc->dc_flags & DC_TX_ADMTEK_WAR) && - (frag == (DC_TX_LIST_CNT - 1)) && - (first != sc->dc_cdata.dc_tx_first)) { - bus_dmamap_unload(sc->dc_mtag, - sc->dc_cdata.dc_tx_map[first]); - sc->dc_cdata.dc_tx_err = ENOBUFS; - return; - } - - f = &sc->dc_ldata->dc_tx_list[frag]; - f->dc_ctl = htole32(DC_TXCTL_TLINK | segs[i].ds_len); - if (i == 0) { - f->dc_status = 0; - f->dc_ctl |= htole32(DC_TXCTL_FIRSTFRAG); - } else - f->dc_status = htole32(DC_TXSTAT_OWN); - f->dc_data = htole32(segs[i].ds_addr); - cur = frag; - DC_INC(frag, DC_TX_LIST_CNT); - } - - sc->dc_cdata.dc_tx_err = 0; - sc->dc_cdata.dc_tx_prod = frag; - sc->dc_cdata.dc_tx_cnt += nseg; - sc->dc_ldata->dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_LASTFRAG); - sc->dc_cdata.dc_tx_chain[cur] = sc->dc_cdata.dc_tx_mapping; - if (sc->dc_flags & DC_TX_INTR_FIRSTFRAG) - sc->dc_ldata->dc_tx_list[first].dc_ctl |= - htole32(DC_TXCTL_FINT); - if (sc->dc_flags & DC_TX_INTR_ALWAYS) - sc->dc_ldata->dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_FINT); - if (sc->dc_flags & DC_TX_USE_TX_INTR && sc->dc_cdata.dc_tx_cnt > 64) - sc->dc_ldata->dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_FINT); - sc->dc_ldata->dc_tx_list[first].dc_status = htole32(DC_TXSTAT_OWN); -} - -/* - * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data - * pointers to the fragment pointers. - */ -static int -dc_encap(struct dc_softc *sc, struct mbuf **m_head) -{ - struct mbuf *m; - int error, idx, chainlen = 0; - - /* - * If there's no way we can send any packets, return now. - */ - if (DC_TX_LIST_CNT - sc->dc_cdata.dc_tx_cnt < 6) - return (ENOBUFS); - - /* - * Count the number of frags in this chain to see if - * we need to m_defrag. Since the descriptor list is shared - * by all packets, we'll m_defrag long chains so that they - * do not use up the entire list, even if they would fit. - */ - for (m = *m_head; m != NULL; m = m->m_next) - chainlen++; - - if ((chainlen > DC_TX_LIST_CNT / 4) || - ((DC_TX_LIST_CNT - (chainlen + sc->dc_cdata.dc_tx_cnt)) < 6)) { - m = m_defrag(*m_head, M_DONTWAIT); - if (m == NULL) - return (ENOBUFS); - *m_head = m; - } - - /* - * Start packing the mbufs in this chain into - * the fragment pointers. Stop when we run out - * of fragments or hit the end of the mbuf chain. - */ - idx = sc->dc_cdata.dc_tx_prod; - sc->dc_cdata.dc_tx_mapping = *m_head; - error = bus_dmamap_load_mbuf(sc->dc_mtag, sc->dc_cdata.dc_tx_map[idx], - *m_head, dc_dma_map_txbuf, sc, 0); - if (error) - return (error); - if (sc->dc_cdata.dc_tx_err != 0) - return (sc->dc_cdata.dc_tx_err); - bus_dmamap_sync(sc->dc_mtag, sc->dc_cdata.dc_tx_map[idx], - BUS_DMASYNC_PREWRITE); - bus_dmamap_sync(sc->dc_ltag, sc->dc_lmap, - BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); - return (0); -} - -/* - * Main transmit routine. To avoid having to do mbuf copies, we put pointers - * to the mbuf data regions directly in the transmit lists. We also save a - * copy of the pointers since the transmit list fragment pointers are - * physical addresses. - */ - -static void -dc_start(struct ifnet *ifp) -{ - struct dc_softc *sc; - struct mbuf *m_head = NULL, *m; - unsigned int queued = 0; - int idx; - - sc = ifp->if_softc; - - DC_LOCK(sc); - - if (!sc->dc_link && ifp->if_snd.ifq_len < 10) { - DC_UNLOCK(sc); - return; - } - - if (ifp->if_flags & IFF_OACTIVE) { - DC_UNLOCK(sc); - return; - } - - idx = sc->dc_cdata.dc_tx_first = sc->dc_cdata.dc_tx_prod; - - while (sc->dc_cdata.dc_tx_chain[idx] == NULL) { - IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); - if (m_head == NULL) - break; - - if (sc->dc_flags & DC_TX_COALESCE && - (m_head->m_next != NULL || - sc->dc_flags & DC_TX_ALIGN)) { - m = m_defrag(m_head, M_DONTWAIT); - if (m == NULL) { - IFQ_DRV_PREPEND(&ifp->if_snd, m_head); - ifp->if_flags |= IFF_OACTIVE; - break; - } else { - m_head = m; - } - } - - if (dc_encap(sc, &m_head)) { - IFQ_DRV_PREPEND(&ifp->if_snd, m_head); - ifp->if_flags |= IFF_OACTIVE; - break; - } - idx = sc->dc_cdata.dc_tx_prod; - - queued++; - /* - * If there's a BPF listener, bounce a copy of this frame - * to him. - */ - BPF_MTAP(ifp, m_head); - - if (sc->dc_flags & DC_TX_ONE) { - ifp->if_flags |= IFF_OACTIVE; - break; - } - } - - if (queued > 0) { - /* Transmit */ - if (!(sc->dc_flags & DC_TX_POLL)) - CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF); - - /* - * Set a timeout in case the chip goes out to lunch. - */ - ifp->if_timer = 5; - } - - DC_UNLOCK(sc); -} - -static void -dc_init(void *xsc) -{ - struct dc_softc *sc = xsc; - struct ifnet *ifp = sc->dc_ifp; - struct mii_data *mii; - - DC_LOCK(sc); - - mii = device_get_softc(sc->dc_miibus); - - /* - * Cancel pending I/O and free all RX/TX buffers. - */ - dc_stop(sc); - dc_reset(sc); - - /* - * Set cache alignment and burst length. - */ - if (DC_IS_ASIX(sc) || DC_IS_DAVICOM(sc)) - CSR_WRITE_4(sc, DC_BUSCTL, 0); - else - CSR_WRITE_4(sc, DC_BUSCTL, DC_BUSCTL_MRME | DC_BUSCTL_MRLE); - /* - * Evenly share the bus between receive and transmit process. - */ - if (DC_IS_INTEL(sc)) - DC_SETBIT(sc, DC_BUSCTL, DC_BUSCTL_ARBITRATION); - if (DC_IS_DAVICOM(sc) || DC_IS_INTEL(sc)) { - DC_SETBIT(sc, DC_BUSCTL, DC_BURSTLEN_USECA); - } else { - DC_SETBIT(sc, DC_BUSCTL, DC_BURSTLEN_16LONG); - } - if (sc->dc_flags & DC_TX_POLL) - DC_SETBIT(sc, DC_BUSCTL, DC_TXPOLL_1); - switch(sc->dc_cachesize) { - case 32: - DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_32LONG); - break; - case 16: - DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_16LONG); - break; - case 8: - DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_8LONG); - break; - case 0: - default: - DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_NONE); - break; - } - - if (sc->dc_flags & DC_TX_STORENFWD) - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_STORENFWD); - else { - if (sc->dc_txthresh > DC_TXTHRESH_MAX) { - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_STORENFWD); - } else { - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_STORENFWD); - DC_SETBIT(sc, DC_NETCFG, sc->dc_txthresh); - } - } - - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_NO_RXCRC); - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_TX_BACKOFF); - - if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { - /* - * The app notes for the 98713 and 98715A say that - * in order to have the chips operate properly, a magic - * number must be written to CSR16. Macronix does not - * document the meaning of these bits so there's no way - * to know exactly what they do. The 98713 has a magic - * number all its own; the rest all use a different one. - */ - DC_CLRBIT(sc, DC_MX_MAGICPACKET, 0xFFFF0000); - if (sc->dc_type == DC_TYPE_98713) - DC_SETBIT(sc, DC_MX_MAGICPACKET, DC_MX_MAGIC_98713); - else - DC_SETBIT(sc, DC_MX_MAGICPACKET, DC_MX_MAGIC_98715); - } - - if (DC_IS_XIRCOM(sc)) { - /* - * setup General Purpose Port mode and data so the tulip - * can talk to the MII. - */ - CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_WRITE_EN | DC_SIAGP_INT1_EN | - DC_SIAGP_MD_GP2_OUTPUT | DC_SIAGP_MD_GP0_OUTPUT); - DELAY(10); - CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_INT1_EN | - DC_SIAGP_MD_GP2_OUTPUT | DC_SIAGP_MD_GP0_OUTPUT); - DELAY(10); - } - - DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_TX_THRESH); - DC_SETBIT(sc, DC_NETCFG, DC_TXTHRESH_MIN); - - /* Init circular RX list. */ - if (dc_list_rx_init(sc) == ENOBUFS) { - printf("dc%d: initialization failed: no " - "memory for rx buffers\n", sc->dc_unit); - dc_stop(sc); - DC_UNLOCK(sc); - return; - } - - /* - * Init TX descriptors. - */ - dc_list_tx_init(sc); - - /* - * Load the address of the RX list. - */ - CSR_WRITE_4(sc, DC_RXADDR, DC_RXDESC(sc, 0)); - CSR_WRITE_4(sc, DC_TXADDR, DC_TXDESC(sc, 0)); - - /* - * Enable interrupts. - */ -#ifdef DEVICE_POLLING - /* - * ... but only if we are not polling, and make sure they are off in - * the case of polling. Some cards (e.g. fxp) turn interrupts on - * after a reset. - */ - if (ifp->if_flags & IFF_POLLING) - CSR_WRITE_4(sc, DC_IMR, 0x00000000); - else -#endif - CSR_WRITE_4(sc, DC_IMR, DC_INTRS); - CSR_WRITE_4(sc, DC_ISR, 0xFFFFFFFF); - - /* Enable transmitter. */ - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON); - - /* - * If this is an Intel 21143 and we're not using the - * MII port, program the LED control pins so we get - * link and activity indications. - */ - if (sc->dc_flags & DC_TULIP_LEDS) { - CSR_WRITE_4(sc, DC_WATCHDOG, - DC_WDOG_CTLWREN | DC_WDOG_LINK | DC_WDOG_ACTIVITY); - CSR_WRITE_4(sc, DC_WATCHDOG, 0); - } - - /* - * Load the RX/multicast filter. We do this sort of late - * because the filter programming scheme on the 21143 and - * some clones requires DMAing a setup frame via the TX - * engine, and we need the transmitter enabled for that. - */ - dc_setfilt(sc); - - /* Enable receiver. */ - DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ON); - CSR_WRITE_4(sc, DC_RXSTART, 0xFFFFFFFF); - - mii_mediachg(mii); - dc_setcfg(sc, sc->dc_if_media); - - ifp->if_flags |= IFF_RUNNING; - ifp->if_flags &= ~IFF_OACTIVE; - - /* Don't start the ticker if this is a homePNA link. */ - if (IFM_SUBTYPE(mii->mii_media.ifm_media) == IFM_HPNA_1) - sc->dc_link = 1; - else { - if (sc->dc_flags & DC_21143_NWAY) - callout_reset(&sc->dc_stat_ch, hz/10, dc_tick, sc); - else - callout_reset(&sc->dc_stat_ch, hz, dc_tick, sc); - } - -#ifdef SRM_MEDIA - if(sc->dc_srm_media) { - struct ifreq ifr; - - ifr.ifr_media = sc->dc_srm_media; - ifmedia_ioctl(ifp, &ifr, &mii->mii_media, SIOCSIFMEDIA); - sc->dc_srm_media = 0; - } -#endif - DC_UNLOCK(sc); -} - -/* - * Set media options. - */ -static int -dc_ifmedia_upd(struct ifnet *ifp) -{ - struct dc_softc *sc; - struct mii_data *mii; - struct ifmedia *ifm; - - sc = ifp->if_softc; - mii = device_get_softc(sc->dc_miibus); - mii_mediachg(mii); - ifm = &mii->mii_media; - - if (DC_IS_DAVICOM(sc) && - IFM_SUBTYPE(ifm->ifm_media) == IFM_HPNA_1) - dc_setcfg(sc, ifm->ifm_media); - else - sc->dc_link = 0; - - return (0); -} - -/* - * Report current media status. - */ -static void -dc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) -{ - struct dc_softc *sc; - struct mii_data *mii; - struct ifmedia *ifm; - - sc = ifp->if_softc; - mii = device_get_softc(sc->dc_miibus); - mii_pollstat(mii); - ifm = &mii->mii_media; - if (DC_IS_DAVICOM(sc)) { - if (IFM_SUBTYPE(ifm->ifm_media) == IFM_HPNA_1) { - ifmr->ifm_active = ifm->ifm_media; - ifmr->ifm_status = 0; - return; - } - } - ifmr->ifm_active = mii->mii_media_active; - ifmr->ifm_status = mii->mii_media_status; -} - -static int -dc_ioctl(struct ifnet *ifp, u_long command, caddr_t data) -{ - struct dc_softc *sc = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *)data; - struct mii_data *mii; - int error = 0; - - DC_LOCK(sc); - - switch (command) { - case SIOCSIFFLAGS: - if (ifp->if_flags & IFF_UP) { - int need_setfilt = (ifp->if_flags ^ sc->dc_if_flags) & - (IFF_PROMISC | IFF_ALLMULTI); - - if (ifp->if_flags & IFF_RUNNING) { - if (need_setfilt) - dc_setfilt(sc); - } else { - sc->dc_txthresh = 0; - dc_init(sc); - } - } else { - if (ifp->if_flags & IFF_RUNNING) - dc_stop(sc); - } - sc->dc_if_flags = ifp->if_flags; - error = 0; - break; - case SIOCADDMULTI: - case SIOCDELMULTI: - dc_setfilt(sc); - error = 0; - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: - mii = device_get_softc(sc->dc_miibus); - error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); -#ifdef SRM_MEDIA - if (sc->dc_srm_media) - sc->dc_srm_media = 0; -#endif - break; - case SIOCSIFCAP: - ifp->if_capenable &= ~IFCAP_POLLING; - ifp->if_capenable |= ifr->ifr_reqcap & IFCAP_POLLING; - break; - default: - error = ether_ioctl(ifp, command, data); - break; - } - - DC_UNLOCK(sc); - - return (error); -} - -static void -dc_watchdog(struct ifnet *ifp) -{ - struct dc_softc *sc; - - sc = ifp->if_softc; - - DC_LOCK(sc); - - ifp->if_oerrors++; - printf("dc%d: watchdog timeout\n", sc->dc_unit); - - dc_stop(sc); - dc_reset(sc); - dc_init(sc); - - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - dc_start(ifp); - - DC_UNLOCK(sc); -} - -/* - * Stop the adapter and free any mbufs allocated to the - * RX and TX lists. - */ -static void -dc_stop(struct dc_softc *sc) -{ - struct ifnet *ifp; - struct dc_list_data *ld; - struct dc_chain_data *cd; - int i; - u_int32_t ctl; - - DC_LOCK(sc); - - ifp = sc->dc_ifp; - ifp->if_timer = 0; - ld = sc->dc_ldata; - cd = &sc->dc_cdata; - - callout_stop(&sc->dc_stat_ch); - - ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); -#ifdef DEVICE_POLLING - ether_poll_deregister(ifp); -#endif - - DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_RX_ON | DC_NETCFG_TX_ON)); - CSR_WRITE_4(sc, DC_IMR, 0x00000000); - CSR_WRITE_4(sc, DC_TXADDR, 0x00000000); - CSR_WRITE_4(sc, DC_RXADDR, 0x00000000); - sc->dc_link = 0; - - /* - * Free data in the RX lists. - */ - for (i = 0; i < DC_RX_LIST_CNT; i++) { - if (cd->dc_rx_chain[i] != NULL) { - m_freem(cd->dc_rx_chain[i]); - cd->dc_rx_chain[i] = NULL; - } - } - bzero(&ld->dc_rx_list, sizeof(ld->dc_rx_list)); - - /* - * Free the TX list buffers. - */ - for (i = 0; i < DC_TX_LIST_CNT; i++) { - if (cd->dc_tx_chain[i] != NULL) { - ctl = le32toh(ld->dc_tx_list[i].dc_ctl); - if ((ctl & DC_TXCTL_SETUP) || - !(ctl & DC_TXCTL_LASTFRAG)) { - cd->dc_tx_chain[i] = NULL; - continue; - } - bus_dmamap_unload(sc->dc_mtag, cd->dc_tx_map[i]); - m_freem(cd->dc_tx_chain[i]); - cd->dc_tx_chain[i] = NULL; - } - } - bzero(&ld->dc_tx_list, sizeof(ld->dc_tx_list)); - - DC_UNLOCK(sc); -} - -/* - * Device suspend routine. Stop the interface and save some PCI - * settings in case the BIOS doesn't restore them properly on - * resume. - */ -static int -dc_suspend(device_t dev) -{ - struct dc_softc *sc; - int s; - - s = splimp(); - - sc = device_get_softc(dev); - dc_stop(sc); - sc->suspended = 1; - - splx(s); - return (0); -} - -/* - * Device resume routine. Restore some PCI settings in case the BIOS - * doesn't, re-enable busmastering, and restart the interface if - * appropriate. - */ -static int -dc_resume(device_t dev) -{ - struct dc_softc *sc; - struct ifnet *ifp; - int s; - - s = splimp(); - - sc = device_get_softc(dev); - ifp = sc->dc_ifp; - - /* reinitialize interface if necessary */ - if (ifp->if_flags & IFF_UP) - dc_init(sc); - - sc->suspended = 0; - - splx(s); - return (0); -} - -/* - * Stop all chip I/O so that the kernel's probe routines don't - * get confused by errant DMAs when rebooting. - */ -static void -dc_shutdown(device_t dev) -{ - struct dc_softc *sc; - - sc = device_get_softc(dev); - - dc_stop(sc); -} diff --git a/sys/dev/dc/if_dcreg.h b/sys/dev/dc/if_dcreg.h deleted file mode 100644 index a851a72..0000000 --- a/sys/dev/dc/if_dcreg.h +++ /dev/null @@ -1,1226 +0,0 @@ -/*- - * Copyright (c) 1997, 1998, 1999 - * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * 21143 and clone common register definitions. - */ - -#define DC_BUSCTL 0x00 /* bus control */ -#define DC_TXSTART 0x08 /* tx start demand */ -#define DC_RXSTART 0x10 /* rx start demand */ -#define DC_RXADDR 0x18 /* rx descriptor list start addr */ -#define DC_TXADDR 0x20 /* tx descriptor list start addr */ -#define DC_ISR 0x28 /* interrupt status register */ -#define DC_NETCFG 0x30 /* network config register */ -#define DC_IMR 0x38 /* interrupt mask */ -#define DC_FRAMESDISCARDED 0x40 /* # of discarded frames */ -#define DC_SIO 0x48 /* MII and ROM/EEPROM access */ -#define DC_ROM 0x50 /* ROM programming address */ -#define DC_TIMER 0x58 /* general timer */ -#define DC_10BTSTAT 0x60 /* SIA status */ -#define DC_SIARESET 0x68 /* SIA connectivity */ -#define DC_10BTCTRL 0x70 /* SIA transmit and receive */ -#define DC_WATCHDOG 0x78 /* SIA and general purpose port */ -#define DC_SIAGP 0x78 /* SIA and general purpose port (X3201) */ - -/* - * There are two general 'types' of MX chips that we need to be - * concerned with. One is the original 98713, which has its internal - * NWAY support controlled via the MDIO bits in the serial I/O - * register. The other is everything else (from the 98713A on up), - * which has its internal NWAY controlled via CSR13, CSR14 and CSR15, - * just like the 21143. This type setting also governs which of the - * 'magic' numbers we write to CSR16. The PNIC II falls into the - * 98713A/98715/98715A/98725 category. - */ -#define DC_TYPE_98713 0x1 -#define DC_TYPE_98713A 0x2 -#define DC_TYPE_987x5 0x3 - -/* Other type of supported chips. */ -#define DC_TYPE_21143 0x4 /* Intel 21143 */ -#define DC_TYPE_ASIX 0x5 /* ASIX AX88140A/AX88141 */ -#define DC_TYPE_AL981 0x6 /* ADMtek AL981 Comet */ -#define DC_TYPE_AN985 0x7 /* ADMtek AN985 Centaur */ -#define DC_TYPE_DM9102 0x8 /* Davicom DM9102 */ -#define DC_TYPE_PNICII 0x9 /* 82c115 PNIC II */ -#define DC_TYPE_PNIC 0xA /* 82c168/82c169 PNIC I */ -#define DC_TYPE_XIRCOM 0xB /* Xircom X3201 */ -#define DC_TYPE_CONEXANT 0xC /* Conexant LANfinity RS7112 */ - -#define DC_IS_MACRONIX(x) \ - (x->dc_type == DC_TYPE_98713 || \ - x->dc_type == DC_TYPE_98713A || \ - x->dc_type == DC_TYPE_987x5) - -#define DC_IS_ADMTEK(x) \ - (x->dc_type == DC_TYPE_AL981 || \ - x->dc_type == DC_TYPE_AN985) - -#define DC_IS_INTEL(x) (x->dc_type == DC_TYPE_21143) -#define DC_IS_ASIX(x) (x->dc_type == DC_TYPE_ASIX) -#define DC_IS_COMET(x) (x->dc_type == DC_TYPE_AL981) -#define DC_IS_CENTAUR(x) (x->dc_type == DC_TYPE_AN985) -#define DC_IS_DAVICOM(x) (x->dc_type == DC_TYPE_DM9102) -#define DC_IS_PNICII(x) (x->dc_type == DC_TYPE_PNICII) -#define DC_IS_PNIC(x) (x->dc_type == DC_TYPE_PNIC) -#define DC_IS_XIRCOM(x) (x->dc_type == DC_TYPE_XIRCOM) -#define DC_IS_CONEXANT(x) (x->dc_type == DC_TYPE_CONEXANT) - -/* MII/symbol mode port types */ -#define DC_PMODE_MII 0x1 -#define DC_PMODE_SYM 0x2 -#define DC_PMODE_SIA 0x3 - -/* - * Bus control bits. - */ -#define DC_BUSCTL_RESET 0x00000001 -#define DC_BUSCTL_ARBITRATION 0x00000002 -#define DC_BUSCTL_SKIPLEN 0x0000007C -#define DC_BUSCTL_BUF_BIGENDIAN 0x00000080 -#define DC_BUSCTL_BURSTLEN 0x00003F00 -#define DC_BUSCTL_CACHEALIGN 0x0000C000 -#define DC_BUSCTL_TXPOLL 0x000E0000 -#define DC_BUSCTL_DBO 0x00100000 -#define DC_BUSCTL_MRME 0x00200000 -#define DC_BUSCTL_MRLE 0x00800000 -#define DC_BUSCTL_MWIE 0x01000000 -#define DC_BUSCTL_ONNOW_ENB 0x04000000 - -#define DC_SKIPLEN_1LONG 0x00000004 -#define DC_SKIPLEN_2LONG 0x00000008 -#define DC_SKIPLEN_3LONG 0x00000010 -#define DC_SKIPLEN_4LONG 0x00000020 -#define DC_SKIPLEN_5LONG 0x00000040 - -#define DC_CACHEALIGN_NONE 0x00000000 -#define DC_CACHEALIGN_8LONG 0x00004000 -#define DC_CACHEALIGN_16LONG 0x00008000 -#define DC_CACHEALIGN_32LONG 0x0000C000 - -#define DC_BURSTLEN_USECA 0x00000000 -#define DC_BURSTLEN_1LONG 0x00000100 -#define DC_BURSTLEN_2LONG 0x00000200 -#define DC_BURSTLEN_4LONG 0x00000400 -#define DC_BURSTLEN_8LONG 0x00000800 -#define DC_BURSTLEN_16LONG 0x00001000 -#define DC_BURSTLEN_32LONG 0x00002000 - -#define DC_TXPOLL_OFF 0x00000000 -#define DC_TXPOLL_1 0x00020000 -#define DC_TXPOLL_2 0x00040000 -#define DC_TXPOLL_3 0x00060000 -#define DC_TXPOLL_4 0x00080000 -#define DC_TXPOLL_5 0x000A0000 -#define DC_TXPOLL_6 0x000C0000 -#define DC_TXPOLL_7 0x000E0000 - -/* - * Interrupt status bits. - */ -#define DC_ISR_TX_OK 0x00000001 -#define DC_ISR_TX_IDLE 0x00000002 -#define DC_ISR_TX_NOBUF 0x00000004 -#define DC_ISR_TX_JABBERTIMEO 0x00000008 -#define DC_ISR_LINKGOOD 0x00000010 -#define DC_ISR_TX_UNDERRUN 0x00000020 -#define DC_ISR_RX_OK 0x00000040 -#define DC_ISR_RX_NOBUF 0x00000080 -#define DC_ISR_RX_READ 0x00000100 -#define DC_ISR_RX_WATDOGTIMEO 0x00000200 -#define DC_ISR_TX_EARLY 0x00000400 -#define DC_ISR_TIMER_EXPIRED 0x00000800 -#define DC_ISR_LINKFAIL 0x00001000 -#define DC_ISR_BUS_ERR 0x00002000 -#define DC_ISR_RX_EARLY 0x00004000 -#define DC_ISR_ABNORMAL 0x00008000 -#define DC_ISR_NORMAL 0x00010000 -#define DC_ISR_RX_STATE 0x000E0000 -#define DC_ISR_TX_STATE 0x00700000 -#define DC_ISR_BUSERRTYPE 0x03800000 -#define DC_ISR_100MBPSLINK 0x08000000 -#define DC_ISR_MAGICKPACK 0x10000000 - -#define DC_RXSTATE_STOPPED 0x00000000 /* 000 - Stopped */ -#define DC_RXSTATE_FETCH 0x00020000 /* 001 - Fetching descriptor */ -#define DC_RXSTATE_ENDCHECK 0x00040000 /* 010 - check for rx end */ -#define DC_RXSTATE_WAIT 0x00060000 /* 011 - waiting for packet */ -#define DC_RXSTATE_SUSPEND 0x00080000 /* 100 - suspend rx */ -#define DC_RXSTATE_CLOSE 0x000A0000 /* 101 - close tx desc */ -#define DC_RXSTATE_FLUSH 0x000C0000 /* 110 - flush from FIFO */ -#define DC_RXSTATE_DEQUEUE 0x000E0000 /* 111 - dequeue from FIFO */ - -#define DC_TXSTATE_RESET 0x00000000 /* 000 - reset */ -#define DC_TXSTATE_FETCH 0x00100000 /* 001 - fetching descriptor */ -#define DC_TXSTATE_WAITEND 0x00200000 /* 010 - wait for tx end */ -#define DC_TXSTATE_READING 0x00300000 /* 011 - read and enqueue */ -#define DC_TXSTATE_RSVD 0x00400000 /* 100 - reserved */ -#define DC_TXSTATE_SETUP 0x00500000 /* 101 - setup packet */ -#define DC_TXSTATE_SUSPEND 0x00600000 /* 110 - suspend tx */ -#define DC_TXSTATE_CLOSE 0x00700000 /* 111 - close tx desc */ - -/* - * Network config bits. - */ -#define DC_NETCFG_RX_HASHPERF 0x00000001 -#define DC_NETCFG_RX_ON 0x00000002 -#define DC_NETCFG_RX_HASHONLY 0x00000004 -#define DC_NETCFG_RX_BADFRAMES 0x00000008 -#define DC_NETCFG_RX_INVFILT 0x00000010 -#define DC_NETCFG_BACKOFFCNT 0x00000020 -#define DC_NETCFG_RX_PROMISC 0x00000040 -#define DC_NETCFG_RX_ALLMULTI 0x00000080 -#define DC_NETCFG_FULLDUPLEX 0x00000200 -#define DC_NETCFG_LOOPBACK 0x00000C00 -#define DC_NETCFG_FORCECOLL 0x00001000 -#define DC_NETCFG_TX_ON 0x00002000 -#define DC_NETCFG_TX_THRESH 0x0000C000 -#define DC_NETCFG_TX_BACKOFF 0x00020000 -#define DC_NETCFG_PORTSEL 0x00040000 /* 0 == 10, 1 == 100 */ -#define DC_NETCFG_HEARTBEAT 0x00080000 -#define DC_NETCFG_STORENFWD 0x00200000 -#define DC_NETCFG_SPEEDSEL 0x00400000 /* 1 == 10, 0 == 100 */ -#define DC_NETCFG_PCS 0x00800000 -#define DC_NETCFG_SCRAMBLER 0x01000000 -#define DC_NETCFG_NO_RXCRC 0x02000000 -#define DC_NETCFG_RX_ALL 0x40000000 -#define DC_NETCFG_CAPEFFECT 0x80000000 - -#define DC_OPMODE_NORM 0x00000000 -#define DC_OPMODE_INTLOOP 0x00000400 -#define DC_OPMODE_EXTLOOP 0x00000800 - -#if 0 -#define DC_TXTHRESH_72BYTES 0x00000000 -#define DC_TXTHRESH_96BYTES 0x00004000 -#define DC_TXTHRESH_128BYTES 0x00008000 -#define DC_TXTHRESH_160BYTES 0x0000C000 -#endif - -#define DC_TXTHRESH_MIN 0x00000000 -#define DC_TXTHRESH_INC 0x00004000 -#define DC_TXTHRESH_MAX 0x0000C000 - - -/* - * Interrupt mask bits. - */ -#define DC_IMR_TX_OK 0x00000001 -#define DC_IMR_TX_IDLE 0x00000002 -#define DC_IMR_TX_NOBUF 0x00000004 -#define DC_IMR_TX_JABBERTIMEO 0x00000008 -#define DC_IMR_LINKGOOD 0x00000010 -#define DC_IMR_TX_UNDERRUN 0x00000020 -#define DC_IMR_RX_OK 0x00000040 -#define DC_IMR_RX_NOBUF 0x00000080 -#define DC_IMR_RX_READ 0x00000100 -#define DC_IMR_RX_WATDOGTIMEO 0x00000200 -#define DC_IMR_TX_EARLY 0x00000400 -#define DC_IMR_TIMER_EXPIRED 0x00000800 -#define DC_IMR_LINKFAIL 0x00001000 -#define DC_IMR_BUS_ERR 0x00002000 -#define DC_IMR_RX_EARLY 0x00004000 -#define DC_IMR_ABNORMAL 0x00008000 -#define DC_IMR_NORMAL 0x00010000 -#define DC_IMR_100MBPSLINK 0x08000000 -#define DC_IMR_MAGICKPACK 0x10000000 - -#define DC_INTRS \ - (DC_IMR_RX_OK|DC_IMR_TX_OK|DC_IMR_RX_NOBUF|DC_IMR_RX_WATDOGTIMEO|\ - DC_IMR_TX_NOBUF|DC_IMR_TX_UNDERRUN|DC_IMR_BUS_ERR| \ - DC_IMR_ABNORMAL|DC_IMR_NORMAL/*|DC_IMR_TX_EARLY*/) -/* - * Serial I/O (EEPROM/ROM) bits. - */ -#define DC_SIO_EE_CS 0x00000001 /* EEPROM chip select */ -#define DC_SIO_EE_CLK 0x00000002 /* EEPROM clock */ -#define DC_SIO_EE_DATAIN 0x00000004 /* EEPROM data output */ -#define DC_SIO_EE_DATAOUT 0x00000008 /* EEPROM data input */ -#define DC_SIO_ROMDATA4 0x00000010 -#define DC_SIO_ROMDATA5 0x00000020 -#define DC_SIO_ROMDATA6 0x00000040 -#define DC_SIO_ROMDATA7 0x00000080 -#define DC_SIO_EESEL 0x00000800 -#define DC_SIO_ROMSEL 0x00001000 -#define DC_SIO_ROMCTL_WRITE 0x00002000 -#define DC_SIO_ROMCTL_READ 0x00004000 -#define DC_SIO_MII_CLK 0x00010000 /* MDIO clock */ -#define DC_SIO_MII_DATAOUT 0x00020000 /* MDIO data out */ -#define DC_SIO_MII_DIR 0x00040000 /* MDIO dir */ -#define DC_SIO_MII_DATAIN 0x00080000 /* MDIO data in */ - -#define DC_EECMD_WRITE 0x140 -#define DC_EECMD_READ 0x180 -#define DC_EECMD_ERASE 0x1c0 - -#define DC_EE_NODEADDR_OFFSET 0x70 -#define DC_EE_NODEADDR 10 - -/* - * General purpose timer register - */ -#define DC_TIMER_VALUE 0x0000FFFF -#define DC_TIMER_CONTINUOUS 0x00010000 - -/* - * 10baseT status register - */ -#define DC_TSTAT_MIIACT 0x00000001 /* MII port activity */ -#define DC_TSTAT_LS100 0x00000002 /* link status of 100baseTX */ -#define DC_TSTAT_LS10 0x00000004 /* link status of 10baseT */ -#define DC_TSTAT_AUTOPOLARITY 0x00000008 -#define DC_TSTAT_AUIACT 0x00000100 /* AUI activity */ -#define DC_TSTAT_10BTACT 0x00000200 /* 10baseT activity */ -#define DC_TSTAT_NSN 0x00000400 /* non-stable FLPs detected */ -#define DC_TSTAT_REMFAULT 0x00000800 -#define DC_TSTAT_ANEGSTAT 0x00007000 -#define DC_TSTAT_LP_CAN_NWAY 0x00008000 /* link partner supports NWAY */ -#define DC_TSTAT_LPCODEWORD 0xFFFF0000 /* link partner's code word */ - -#define DC_ASTAT_DISABLE 0x00000000 -#define DC_ASTAT_TXDISABLE 0x00001000 -#define DC_ASTAT_ABDETECT 0x00002000 -#define DC_ASTAT_ACKDETECT 0x00003000 -#define DC_ASTAT_CMPACKDETECT 0x00004000 -#define DC_ASTAT_AUTONEGCMP 0x00005000 -#define DC_ASTAT_LINKCHECK 0x00006000 - -/* - * PHY reset register - */ -#define DC_SIA_RESET 0x00000001 -#define DC_SIA_AUI 0x00000008 /* AUI or 10baseT */ - -/* - * 10baseT control register - */ -#define DC_TCTL_ENCODER_ENB 0x00000001 -#define DC_TCTL_LOOPBACK 0x00000002 -#define DC_TCTL_DRIVER_ENB 0x00000004 -#define DC_TCTL_LNKPULSE_ENB 0x00000008 -#define DC_TCTL_HALFDUPLEX 0x00000040 -#define DC_TCTL_AUTONEGENBL 0x00000080 -#define DC_TCTL_RX_SQUELCH 0x00000100 -#define DC_TCTL_COLL_SQUELCH 0x00000200 -#define DC_TCTL_COLL_DETECT 0x00000400 -#define DC_TCTL_SQE_ENB 0x00000800 -#define DC_TCTL_LINKTEST 0x00001000 -#define DC_TCTL_AUTOPOLARITY 0x00002000 -#define DC_TCTL_SET_POL_PLUS 0x00004000 -#define DC_TCTL_AUTOSENSE 0x00008000 /* 10bt/AUI autosense */ -#define DC_TCTL_100BTXHALF 0x00010000 -#define DC_TCTL_100BTXFULL 0x00020000 -#define DC_TCTL_100BT4 0x00040000 - -/* - * Watchdog timer register - */ -#define DC_WDOG_JABBERDIS 0x00000001 -#define DC_WDOG_HOSTUNJAB 0x00000002 -#define DC_WDOG_JABBERCLK 0x00000004 -#define DC_WDOG_RXWDOGDIS 0x00000010 -#define DC_WDOG_RXWDOGCLK 0x00000020 -#define DC_WDOG_MUSTBEZERO 0x00000100 -#define DC_WDOG_AUIBNC 0x00100000 -#define DC_WDOG_ACTIVITY 0x00200000 -#define DC_WDOG_RX_MATCH 0x00400000 -#define DC_WDOG_LINK 0x00800000 -#define DC_WDOG_CTLWREN 0x08000000 - -/* - * SIA and General Purpose Port register (X3201) - */ -#define DC_SIAGP_RXMATCH 0x40000000 -#define DC_SIAGP_INT1 0x20000000 -#define DC_SIAGP_INT0 0x10000000 -#define DC_SIAGP_WRITE_EN 0x08000000 -#define DC_SIAGP_RXMATCH_EN 0x04000000 -#define DC_SIAGP_INT1_EN 0x02000000 -#define DC_SIAGP_INT0_EN 0x01000000 -#define DC_SIAGP_LED3 0x00800000 -#define DC_SIAGP_LED2 0x00400000 -#define DC_SIAGP_LED1 0x00200000 -#define DC_SIAGP_LED0 0x00100000 -#define DC_SIAGP_MD_GP3_OUTPUT 0x00080000 -#define DC_SIAGP_MD_GP2_OUTPUT 0x00040000 -#define DC_SIAGP_MD_GP1_OUTPUT 0x00020000 -#define DC_SIAGP_MD_GP0_OUTPUT 0x00010000 - -/* - * Size of a setup frame. - */ -#define DC_SFRAME_LEN 192 - -/* - * 21x4x TX/RX list structure. - */ - -struct dc_desc { - u_int32_t dc_status; - u_int32_t dc_ctl; - u_int32_t dc_ptr1; - u_int32_t dc_ptr2; -}; - -#define dc_data dc_ptr1 -#define dc_next dc_ptr2 - -#define DC_RXSTAT_FIFOOFLOW 0x00000001 -#define DC_RXSTAT_CRCERR 0x00000002 -#define DC_RXSTAT_DRIBBLE 0x00000004 -#define DC_RXSTAT_MIIERE 0x00000008 -#define DC_RXSTAT_WATCHDOG 0x00000010 -#define DC_RXSTAT_FRAMETYPE 0x00000020 /* 0 == IEEE 802.3 */ -#define DC_RXSTAT_COLLSEEN 0x00000040 -#define DC_RXSTAT_GIANT 0x00000080 -#define DC_RXSTAT_LASTFRAG 0x00000100 -#define DC_RXSTAT_FIRSTFRAG 0x00000200 -#define DC_RXSTAT_MULTICAST 0x00000400 -#define DC_RXSTAT_RUNT 0x00000800 -#define DC_RXSTAT_RXTYPE 0x00003000 -#define DC_RXSTAT_DE 0x00004000 -#define DC_RXSTAT_RXERR 0x00008000 -#define DC_RXSTAT_RXLEN 0x3FFF0000 -#define DC_RXSTAT_OWN 0x80000000 - -#define DC_RXBYTES(x) ((x & DC_RXSTAT_RXLEN) >> 16) -#define DC_RXSTAT (DC_RXSTAT_FIRSTFRAG|DC_RXSTAT_LASTFRAG|DC_RXSTAT_OWN) - -#define DC_RXCTL_BUFLEN1 0x00000FFF -#define DC_RXCTL_BUFLEN2 0x00FFF000 -#define DC_RXCTL_RLINK 0x01000000 -#define DC_RXCTL_RLAST 0x02000000 - -#define DC_TXSTAT_DEFER 0x00000001 -#define DC_TXSTAT_UNDERRUN 0x00000002 -#define DC_TXSTAT_LINKFAIL 0x00000003 -#define DC_TXSTAT_COLLCNT 0x00000078 -#define DC_TXSTAT_SQE 0x00000080 -#define DC_TXSTAT_EXCESSCOLL 0x00000100 -#define DC_TXSTAT_LATECOLL 0x00000200 -#define DC_TXSTAT_NOCARRIER 0x00000400 -#define DC_TXSTAT_CARRLOST 0x00000800 -#define DC_TXSTAT_JABTIMEO 0x00004000 -#define DC_TXSTAT_ERRSUM 0x00008000 -#define DC_TXSTAT_OWN 0x80000000 - -#define DC_TXCTL_BUFLEN1 0x000007FF -#define DC_TXCTL_BUFLEN2 0x003FF800 -#define DC_TXCTL_FILTTYPE0 0x00400000 -#define DC_TXCTL_PAD 0x00800000 -#define DC_TXCTL_TLINK 0x01000000 -#define DC_TXCTL_TLAST 0x02000000 -#define DC_TXCTL_NOCRC 0x04000000 -#define DC_TXCTL_SETUP 0x08000000 -#define DC_TXCTL_FILTTYPE1 0x10000000 -#define DC_TXCTL_FIRSTFRAG 0x20000000 -#define DC_TXCTL_LASTFRAG 0x40000000 -#define DC_TXCTL_FINT 0x80000000 - -#define DC_FILTER_PERFECT 0x00000000 -#define DC_FILTER_HASHPERF 0x00400000 -#define DC_FILTER_INVERSE 0x10000000 -#define DC_FILTER_HASHONLY 0x10400000 - -#define DC_MAXFRAGS 16 -#ifdef DEVICE_POLLING -#define DC_RX_LIST_CNT 192 -#else -#define DC_RX_LIST_CNT 64 -#endif -#define DC_TX_LIST_CNT 256 -#define DC_MIN_FRAMELEN 60 -#define DC_RXLEN 1536 - -#define DC_INC(x, y) (x) = (x + 1) % y - -/* Macros to easily get the DMA address of a descriptor. */ -#define DC_RXDESC(sc, i) (sc->dc_laddr + \ - (uintptr_t)(sc->dc_ldata->dc_rx_list + i) - (uintptr_t)sc->dc_ldata) -#define DC_TXDESC(sc, i) (sc->dc_laddr + \ - (uintptr_t)(sc->dc_ldata->dc_tx_list + i) - (uintptr_t)sc->dc_ldata) - -#if BYTE_ORDER == BIG_ENDIAN -#define DC_SP_MAC(x) ((x) << 16) -#else -#define DC_SP_MAC(x) (x) -#endif - -struct dc_list_data { - struct dc_desc dc_rx_list[DC_RX_LIST_CNT]; - struct dc_desc dc_tx_list[DC_TX_LIST_CNT]; -}; - -struct dc_chain_data { - struct mbuf *dc_rx_chain[DC_RX_LIST_CNT]; - struct mbuf *dc_tx_chain[DC_TX_LIST_CNT]; - struct mbuf *dc_tx_mapping; - bus_dmamap_t dc_rx_map[DC_RX_LIST_CNT]; - bus_dmamap_t dc_tx_map[DC_TX_LIST_CNT]; - u_int32_t *dc_sbuf; - u_int8_t dc_pad[DC_MIN_FRAMELEN]; - int dc_tx_err; - int dc_tx_first; - int dc_tx_prod; - int dc_tx_cons; - int dc_tx_cnt; - int dc_rx_err; - int dc_rx_cur; - int dc_rx_prod; -}; - -struct dc_mediainfo { - int dc_media; - u_int8_t *dc_gp_ptr; - u_int8_t dc_gp_len; - u_int8_t *dc_reset_ptr; - u_int8_t dc_reset_len; - struct dc_mediainfo *dc_next; -}; - - -struct dc_type { - u_int16_t dc_vid; - u_int16_t dc_did; - char *dc_name; -}; - -struct dc_mii_frame { - u_int8_t mii_stdelim; - u_int8_t mii_opcode; - u_int8_t mii_phyaddr; - u_int8_t mii_regaddr; - u_int8_t mii_turnaround; - u_int16_t mii_data; -}; - -/* - * MII constants - */ -#define DC_MII_STARTDELIM 0x01 -#define DC_MII_READOP 0x02 -#define DC_MII_WRITEOP 0x01 -#define DC_MII_TURNAROUND 0x02 - - -/* - * Registers specific to clone devices. - * This mainly relates to RX filter programming: not all 21x4x clones - * use the standard DEC filter programming mechanism. - */ - -/* - * ADMtek specific registers and constants for the AL981 and AN985. - * The AN985 doesn't use the magic PHY registers. - */ -#define DC_AL_CR 0x88 /* command register */ -#define DC_AL_PAR0 0xA4 /* station address */ -#define DC_AL_PAR1 0xA8 /* station address */ -#define DC_AL_MAR0 0xAC /* multicast hash filter */ -#define DC_AL_MAR1 0xB0 /* multicast hash filter */ -#define DC_AL_BMCR 0xB4 /* built in PHY control */ -#define DC_AL_BMSR 0xB8 /* built in PHY status */ -#define DC_AL_VENID 0xBC /* built in PHY ID0 */ -#define DC_AL_DEVID 0xC0 /* built in PHY ID1 */ -#define DC_AL_ANAR 0xC4 /* built in PHY autoneg advert */ -#define DC_AL_LPAR 0xC8 /* bnilt in PHY link part. ability */ -#define DC_AL_ANER 0xCC /* built in PHY autoneg expansion */ - -#define DC_AL_CR_ATUR 0x00000001 /* automatic TX underrun recovery */ -#define DC_ADMTEK_PHYADDR 0x1 -#define DC_AL_EE_NODEADDR 4 -/* End of ADMtek specific registers */ - -/* - * ASIX specific registers. - */ -#define DC_AX_FILTIDX 0x68 /* RX filter index */ -#define DC_AX_FILTDATA 0x70 /* RX filter data */ - -/* - * Special ASIX-specific bits in the ASIX NETCFG register (CSR6). - */ -#define DC_AX_NETCFG_RX_BROAD 0x00000100 - -/* - * RX Filter Index Register values - */ -#define DC_AX_FILTIDX_PAR0 0x00000000 -#define DC_AX_FILTIDX_PAR1 0x00000001 -#define DC_AX_FILTIDX_MAR0 0x00000002 -#define DC_AX_FILTIDX_MAR1 0x00000003 -/* End of ASIX specific registers */ - -/* - * Macronix specific registers. The Macronix chips have a special - * register for reading the NWAY status, which we don't use, plus - * a magic packet register, which we need to tweak a bit per the - * Macronix application notes. - */ -#define DC_MX_MAGICPACKET 0x80 -#define DC_MX_NWAYSTAT 0xA0 - -/* - * Magic packet register - */ -#define DC_MX_MPACK_DISABLE 0x00400000 - -/* - * NWAY status register. - */ -#define DC_MX_NWAY_10BTHALF 0x08000000 -#define DC_MX_NWAY_10BTFULL 0x10000000 -#define DC_MX_NWAY_100BTHALF 0x20000000 -#define DC_MX_NWAY_100BTFULL 0x40000000 -#define DC_MX_NWAY_100BT4 0x80000000 - -/* - * These are magic values that must be written into CSR16 - * (DC_MX_MAGICPACKET) in order to put the chip into proper - * operating mode. The magic numbers are documented in the - * Macronix 98715 application notes. - */ -#define DC_MX_MAGIC_98713 0x0F370000 -#define DC_MX_MAGIC_98713A 0x0B3C0000 -#define DC_MX_MAGIC_98715 0x0B3C0000 -#define DC_MX_MAGIC_98725 0x0B3C0000 -/* End of Macronix specific registers */ - -/* - * PNIC 82c168/82c169 specific registers. - * The PNIC has its own special NWAY support, which doesn't work, - * and shortcut ways of reading the EEPROM and MII bus. - */ -#define DC_PN_GPIO 0x60 /* general purpose pins control */ -#define DC_PN_PWRUP_CFG 0x90 /* config register, set by EEPROM */ -#define DC_PN_SIOCTL 0x98 /* serial EEPROM control register */ -#define DC_PN_MII 0xA0 /* MII access register */ -#define DC_PN_NWAY 0xB8 /* Internal NWAY register */ - -/* Serial I/O EEPROM register */ -#define DC_PN_SIOCTL_DATA 0x0000003F -#define DC_PN_SIOCTL_OPCODE 0x00000300 -#define DC_PN_SIOCTL_BUSY 0x80000000 - -#define DC_PN_EEOPCODE_ERASE 0x00000300 -#define DC_PN_EEOPCODE_READ 0x00000600 -#define DC_PN_EEOPCODE_WRITE 0x00000100 - -/* - * The first two general purpose pins control speed selection and - * 100Mbps loopback on the 82c168 chip. The control bits should always - * be set (to make the data pins outputs) and the speed selction and - * loopback bits set accordingly when changing media. Physically, this - * will set the state of a relay mounted on the card. - */ -#define DC_PN_GPIO_DATA0 0x000000001 -#define DC_PN_GPIO_DATA1 0x000000002 -#define DC_PN_GPIO_DATA2 0x000000004 -#define DC_PN_GPIO_DATA3 0x000000008 -#define DC_PN_GPIO_CTL0 0x000000010 -#define DC_PN_GPIO_CTL1 0x000000020 -#define DC_PN_GPIO_CTL2 0x000000040 -#define DC_PN_GPIO_CTL3 0x000000080 -#define DC_PN_GPIO_SPEEDSEL DC_PN_GPIO_DATA0/* 1 == 100Mbps, 0 == 10Mbps */ -#define DC_PN_GPIO_100TX_LOOP DC_PN_GPIO_DATA1/* 1 == normal, 0 == loop */ -#define DC_PN_GPIO_BNC_ENB DC_PN_GPIO_DATA2 -#define DC_PN_GPIO_100TX_LNK DC_PN_GPIO_DATA3 -#define DC_PN_GPIO_SETBIT(sc, r) \ - DC_SETBIT(sc, DC_PN_GPIO, ((r) | (r << 4))) -#define DC_PN_GPIO_CLRBIT(sc, r) \ - { \ - DC_SETBIT(sc, DC_PN_GPIO, ((r) << 4)); \ - DC_CLRBIT(sc, DC_PN_GPIO, (r)); \ - } - -/* shortcut MII access register */ -#define DC_PN_MII_DATA 0x0000FFFF -#define DC_PN_MII_RESERVER 0x00020000 -#define DC_PN_MII_REGADDR 0x007C0000 -#define DC_PN_MII_PHYADDR 0x0F800000 -#define DC_PN_MII_OPCODE 0x30000000 -#define DC_PN_MII_BUSY 0x80000000 - -#define DC_PN_MIIOPCODE_READ 0x60020000 -#define DC_PN_MIIOPCODE_WRITE 0x50020000 - -/* Internal NWAY bits */ -#define DC_PN_NWAY_RESET 0x00000001 /* reset */ -#define DC_PN_NWAY_PDOWN 0x00000002 /* power down */ -#define DC_PN_NWAY_BYPASS 0x00000004 /* bypass */ -#define DC_PN_NWAY_AUILOWCUR 0x00000008 /* AUI low current */ -#define DC_PN_NWAY_TPEXTEND 0x00000010 /* low squelch voltage */ -#define DC_PN_NWAY_POLARITY 0x00000020 /* 0 == on, 1 == off */ -#define DC_PN_NWAY_TP 0x00000040 /* 1 == tp, 0 == AUI */ -#define DC_PN_NWAY_AUIVOLT 0x00000080 /* 1 == full, 0 == half */ -#define DC_PN_NWAY_DUPLEX 0x00000100 /* LED, 1 == full, 0 == half */ -#define DC_PN_NWAY_LINKTEST 0x00000200 /* 0 == on, 1 == off */ -#define DC_PN_NWAY_AUTODETECT 0x00000400 /* 1 == off, 0 == on */ -#define DC_PN_NWAY_SPEEDSEL 0x00000800 /* LED, 0 = 10, 1 == 100 */ -#define DC_PN_NWAY_NWAY_ENB 0x00001000 /* 0 == off, 1 == on */ -#define DC_PN_NWAY_CAP10HDX 0x00002000 -#define DC_PN_NWAY_CAP10FDX 0x00004000 -#define DC_PN_NWAY_CAP100FDX 0x00008000 -#define DC_PN_NWAY_CAP100HDX 0x00010000 -#define DC_PN_NWAY_CAP100T4 0x00020000 -#define DC_PN_NWAY_ANEGRESTART 0x02000000 /* resets when aneg done */ -#define DC_PN_NWAY_REMFAULT 0x04000000 -#define DC_PN_NWAY_LPAR10HDX 0x08000000 -#define DC_PN_NWAY_LPAR10FDX 0x10000000 -#define DC_PN_NWAY_LPAR100FDX 0x20000000 -#define DC_PN_NWAY_LPAR100HDX 0x40000000 -#define DC_PN_NWAY_LPAR100T4 0x80000000 - -/* End of PNIC specific registers */ - -/* - * CONEXANT specific registers. - */ - -#define DC_CONEXANT_PHYADDR 0x1 -#define DC_CONEXANT_EE_NODEADDR 0x19A - -/* End of CONEXANT specific registers */ - - -struct dc_softc { - struct ifnet *dc_ifp; /* interface info */ - bus_space_handle_t dc_bhandle; /* bus space handle */ - bus_space_tag_t dc_btag; /* bus space tag */ - bus_dma_tag_t dc_ltag; /* tag for descriptor ring */ - bus_dmamap_t dc_lmap; /* map for descriptor ring */ - u_int32_t dc_laddr; /* DMA address of dc_ldata */ - bus_dma_tag_t dc_mtag; /* tag for mbufs */ - bus_dmamap_t dc_sparemap; - bus_dma_tag_t dc_stag; /* tag for the setup frame */ - bus_dmamap_t dc_smap; /* map for the setup frame */ - u_int32_t dc_saddr; /* DMA address of setup frame */ - void *dc_intrhand; - struct resource *dc_irq; - struct resource *dc_res; - struct dc_type *dc_info; /* adapter info */ - device_t dc_miibus; - u_int8_t dc_unit; /* interface number */ - u_int8_t dc_type; - u_int8_t dc_pmode; - u_int8_t dc_link; - u_int8_t dc_cachesize; - int dc_romwidth; - int dc_pnic_rx_bug_save; - unsigned char *dc_pnic_rx_buf; - int dc_if_flags; - int dc_if_media; - u_int32_t dc_flags; - u_int32_t dc_txthresh; - u_int8_t *dc_srom; - struct dc_mediainfo *dc_mi; - struct dc_list_data *dc_ldata; - struct dc_chain_data dc_cdata; - struct callout dc_stat_ch; -#ifdef SRM_MEDIA - int dc_srm_media; -#endif - struct mtx dc_mtx; -#ifdef DEVICE_POLLING - int rxcycles; /* ... when polling */ -#endif - int suspended; /* 0 = normal 1 = suspended */ -}; - - -#define DC_LOCK(_sc) mtx_lock(&(_sc)->dc_mtx) -#define DC_UNLOCK(_sc) mtx_unlock(&(_sc)->dc_mtx) -#define DC_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->dc_mtx, MA_OWNED) - -#define DC_TX_POLL 0x00000001 -#define DC_TX_COALESCE 0x00000002 -#define DC_TX_ADMTEK_WAR 0x00000004 -#define DC_TX_USE_TX_INTR 0x00000008 -#define DC_RX_FILTER_TULIP 0x00000010 -#define DC_TX_INTR_FIRSTFRAG 0x00000020 -#define DC_PNIC_RX_BUG_WAR 0x00000040 -#define DC_TX_FIXED_RING 0x00000080 -#define DC_TX_STORENFWD 0x00000100 -#define DC_REDUCED_MII_POLL 0x00000200 -#define DC_TX_INTR_ALWAYS 0x00000400 -#define DC_21143_NWAY 0x00000800 -#define DC_128BIT_HASH 0x00001000 -#define DC_64BIT_HASH 0x00002000 -#define DC_TULIP_LEDS 0x00004000 -#define DC_TX_ONE 0x00008000 -#define DC_TX_ALIGN 0x00010000 /* align mbuf on tx */ - -/* - * register space access macros - */ -#define CSR_WRITE_4(sc, reg, val) \ - bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val) - -#define CSR_READ_4(sc, reg) \ - bus_space_read_4(sc->dc_btag, sc->dc_bhandle, reg) - -#define DC_TIMEOUT 1000 -#define ETHER_ALIGN 2 - -/* - * General constants that are fun to know. - */ - -/* - * DEC PCI vendor ID - */ -#define DC_VENDORID_DEC 0x1011 - -/* - * DEC/Intel 21143 PCI device ID - */ -#define DC_DEVICEID_21143 0x0019 - -/* - * Macronix PCI vendor ID - */ -#define DC_VENDORID_MX 0x10D9 - -/* - * Macronix PMAC device IDs. - */ -#define DC_DEVICEID_98713 0x0512 -#define DC_DEVICEID_987x5 0x0531 -#define DC_DEVICEID_98727 0x0532 -#define DC_DEVICEID_98732 0x0532 - -/* Macronix PCI revision codes. */ -#define DC_REVISION_98713 0x00 -#define DC_REVISION_98713A 0x10 -#define DC_REVISION_98715 0x20 -#define DC_REVISION_98715AEC_C 0x25 -#define DC_REVISION_98725 0x30 - -/* - * Compex PCI vendor ID. - */ -#define DC_VENDORID_CP 0x11F6 - -/* - * Compex PMAC PCI device IDs. - */ -#define DC_DEVICEID_98713_CP 0x9881 - -/* - * Lite-On PNIC PCI vendor ID - */ -#define DC_VENDORID_LO 0x11AD - -/* - * 82c168/82c169 PNIC device IDs. Both chips have the same device - * ID but different revisions. Revision 0x10 is the 82c168, and - * 0x20 is the 82c169. - */ -#define DC_DEVICEID_82C168 0x0002 - -#define DC_REVISION_82C168 0x10 -#define DC_REVISION_82C169 0x20 - -/* - * Lite-On PNIC II device ID. Note: this is actually a Macronix 98715A - * with wake on lan/magic packet support. - */ -#define DC_DEVICEID_82C115 0xc115 - -/* - * Davicom vendor ID. - */ -#define DC_VENDORID_DAVICOM 0x1282 - -/* - * Davicom device IDs. - */ -#define DC_DEVICEID_DM9009 0x9009 -#define DC_DEVICEID_DM9100 0x9100 -#define DC_DEVICEID_DM9102 0x9102 - -/* - * The DM9102A has the same PCI device ID as the DM9102, - * but a higher revision code. - */ -#define DC_REVISION_DM9102 0x10 -#define DC_REVISION_DM9102A 0x30 - -/* - * ADMtek vendor ID. - */ -#define DC_VENDORID_ADMTEK 0x1317 - -/* - * ADMtek device IDs. - */ -#define DC_DEVICEID_AL981 0x0981 -#define DC_DEVICEID_AN985 0x0985 -#define DC_DEVICEID_FA511 0x1985 -#define DC_DEVICEID_ADM9511 0x9511 -#define DC_DEVICEID_ADM9513 0x9513 - -/* - * 3COM PCI vendor ID - */ -#define DC_VENDORID_3COM 0x10b7 - -/* - * 3COM OfficeConnect 10/100B (3CSOHO100B-TX) - */ -#define DC_DEVICEID_3CSOHOB 0x9300 - -/* - * ASIX vendor ID. - */ -#define DC_VENDORID_ASIX 0x125B - -/* - * ASIX device IDs. - */ -#define DC_DEVICEID_AX88140A 0x1400 - -/* - * The ASIX AX88140 and ASIX AX88141 have the same vendor and - * device IDs but different revision values. - */ -#define DC_REVISION_88140 0x00 -#define DC_REVISION_88141 0x10 - -/* - * Accton vendor ID. - */ -#define DC_VENDORID_ACCTON 0x1113 - -/* - * Accton device IDs. - */ -#define DC_DEVICEID_EN1217 0x1217 -#define DC_DEVICEID_EN2242 0x1216 - -/* - * Xircom vendor ID - */ -#define DC_VENDORID_XIRCOM 0x115d - -/* - * Xircom device IDs. - */ -#define DC_DEVICEID_X3201 0x0003 - -/* - * Abocom vendor ID - */ -#define DC_VENDORID_ABOCOM 0x13d1 - -/* - * Abocom device IDs. - */ -#define DC_DEVICEID_FE2500 0xAB02 -#define DC_DEVICEID_FE2500MX 0xab08 - -/* - * Conexant vendor ID. - */ -#define DC_VENDORID_CONEXANT 0x14f1 - -/* - * Conexant device IDs. - */ -#define DC_DEVICEID_RS7112 0x1803 - -/* - * Planex vendor ID - */ -#define DC_VENDORID_PLANEX 0x14ea - -/* - * Planex device IDs. - */ -#define DC_DEVICEID_FNW3602T 0xab08 - -/* - * Not sure who this vendor should be, so we'll go with HAWKING until - * I can locate the right one. - */ -#define DC_VENDORID_HAWKING 0x17b3 - -/* - * Sure looks like an abocom device ID, but it found on my hawking PN672TX - * card. Use that for now, and upgrade later. - */ -#define DC_DEVICEID_HAWKING_PN672TX 0xab08 - -/* - * Microsoft device ID. - */ -#define DC_VENDORID_MICROSOFT 0x1414 - -/* - * Supported Microsoft PCI and cardbus NICs. These are really - * ADMtek parts in disguise. - */ - -#define DC_DEVICEID_MSMN120 0x0001 -#define DC_DEVICEID_MSMN130 0x0002 -#define DC_DEVICEID_MSMN130_FAKE 0xFFF2 - -/* - * PCI low memory base and low I/O base register, and - * other PCI registers. - */ - -#define DC_PCI_CFID 0x00 /* Id */ -#define DC_PCI_CFCS 0x04 /* Command and status */ -#define DC_PCI_CFRV 0x08 /* Revision */ -#define DC_PCI_CFLT 0x0C /* Latency timer */ -#define DC_PCI_CFBIO 0x10 /* Base I/O address */ -#define DC_PCI_CFBMA 0x14 /* Base memory address */ -#define DC_PCI_CCIS 0x28 /* Card info struct */ -#define DC_PCI_CSID 0x2C /* Subsystem ID */ -#define DC_PCI_CBER 0x30 /* Expansion ROM base address */ -#define DC_PCI_CCAP 0x34 /* Caps pointer - PD/TD chip only */ -#define DC_PCI_CFIT 0x3C /* Interrupt */ -#define DC_PCI_CFDD 0x40 /* Device and driver area */ -#define DC_PCI_CWUA0 0x44 /* Wake-Up LAN addr 0 */ -#define DC_PCI_CWUA1 0x48 /* Wake-Up LAN addr 1 */ -#define DC_PCI_SOP0 0x4C /* SecureON passwd 0 */ -#define DC_PCI_SOP1 0x50 /* SecureON passwd 1 */ -#define DC_PCI_CWUC 0x54 /* Configuration Wake-Up cmd */ -#define DC_PCI_CCID 0xDC /* Capability ID - PD/TD only */ -#define DC_PCI_CPMC 0xE0 /* Pwrmgmt ctl & sts - PD/TD only */ - -/* PCI ID register */ -#define DC_CFID_VENDOR 0x0000FFFF -#define DC_CFID_DEVICE 0xFFFF0000 - -/* PCI command/status register */ -#define DC_CFCS_IOSPACE 0x00000001 /* I/O space enable */ -#define DC_CFCS_MEMSPACE 0x00000002 /* memory space enable */ -#define DC_CFCS_BUSMASTER 0x00000004 /* bus master enable */ -#define DC_CFCS_MWI_ENB 0x00000010 /* mem write and inval enable */ -#define DC_CFCS_PARITYERR_ENB 0x00000040 /* parity error enable */ -#define DC_CFCS_SYSERR_ENB 0x00000100 /* system error enable */ -#define DC_CFCS_NEWCAPS 0x00100000 /* new capabilities */ -#define DC_CFCS_FAST_B2B 0x00800000 /* fast back-to-back capable */ -#define DC_CFCS_DATAPARITY 0x01000000 /* Parity error report */ -#define DC_CFCS_DEVSELTIM 0x06000000 /* devsel timing */ -#define DC_CFCS_TGTABRT 0x10000000 /* received target abort */ -#define DC_CFCS_MASTERABRT 0x20000000 /* received master abort */ -#define DC_CFCS_SYSERR 0x40000000 /* asserted system error */ -#define DC_CFCS_PARITYERR 0x80000000 /* asserted parity error */ - -/* PCI revision register */ -#define DC_CFRV_STEPPING 0x0000000F -#define DC_CFRV_REVISION 0x000000F0 -#define DC_CFRV_SUBCLASS 0x00FF0000 -#define DC_CFRV_BASECLASS 0xFF000000 - -#define DC_21143_PB_REV 0x00000030 -#define DC_21143_TB_REV 0x00000030 -#define DC_21143_PC_REV 0x00000030 -#define DC_21143_TC_REV 0x00000030 -#define DC_21143_PD_REV 0x00000041 -#define DC_21143_TD_REV 0x00000041 - -/* PCI latency timer register */ -#define DC_CFLT_CACHELINESIZE 0x000000FF -#define DC_CFLT_LATENCYTIMER 0x0000FF00 - -/* PCI subsystem ID register */ -#define DC_CSID_VENDOR 0x0000FFFF -#define DC_CSID_DEVICE 0xFFFF0000 - -/* PCI cababilities pointer */ -#define DC_CCAP_OFFSET 0x000000FF - -/* PCI interrupt config register */ -#define DC_CFIT_INTLINE 0x000000FF -#define DC_CFIT_INTPIN 0x0000FF00 -#define DC_CFIT_MIN_GNT 0x00FF0000 -#define DC_CFIT_MAX_LAT 0xFF000000 - -/* PCI capability register */ -#define DC_CCID_CAPID 0x000000FF -#define DC_CCID_NEXTPTR 0x0000FF00 -#define DC_CCID_PM_VERS 0x00070000 -#define DC_CCID_PME_CLK 0x00080000 -#define DC_CCID_DVSPEC_INT 0x00200000 -#define DC_CCID_STATE_D1 0x02000000 -#define DC_CCID_STATE_D2 0x04000000 -#define DC_CCID_PME_D0 0x08000000 -#define DC_CCID_PME_D1 0x10000000 -#define DC_CCID_PME_D2 0x20000000 -#define DC_CCID_PME_D3HOT 0x40000000 -#define DC_CCID_PME_D3COLD 0x80000000 - -/* PCI power management control/status register */ -#define DC_CPMC_STATE 0x00000003 -#define DC_CPMC_PME_ENB 0x00000100 -#define DC_CPMC_PME_STS 0x00008000 - -#define DC_PSTATE_D0 0x0 -#define DC_PSTATE_D1 0x1 -#define DC_PSTATE_D2 0x2 -#define DC_PSTATE_D3 0x3 - -/* Device specific region */ -/* Configuration and driver area */ -#define DC_CFDD_DRVUSE 0x0000FFFF -#define DC_CFDD_SNOOZE_MODE 0x40000000 -#define DC_CFDD_SLEEP_MODE 0x80000000 - -/* Configuration wake-up command register */ -#define DC_CWUC_MUST_BE_ZERO 0x00000001 -#define DC_CWUC_SECUREON_ENB 0x00000002 -#define DC_CWUC_FORCE_WUL 0x00000004 -#define DC_CWUC_BNC_ABILITY 0x00000008 -#define DC_CWUC_AUI_ABILITY 0x00000010 -#define DC_CWUC_TP10_ABILITY 0x00000020 -#define DC_CWUC_MII_ABILITY 0x00000040 -#define DC_CWUC_SYM_ABILITY 0x00000080 -#define DC_CWUC_LOCK 0x00000100 - -/* - * SROM nonsense. - */ - -#define DC_IB_CTLRCNT 0x13 -#define DC_IB_LEAF0_CNUM 0x1A -#define DC_IB_LEAF0_OFFSET 0x1B - -struct dc_info_leaf { - u_int16_t dc_conntype; - u_int8_t dc_blkcnt; - u_int8_t dc_rsvd; - u_int16_t dc_infoblk; -}; - -#define DC_CTYPE_10BT 0x0000 -#define DC_CTYPE_10BT_NWAY 0x0100 -#define DC_CTYPE_10BT_FDX 0x0204 -#define DC_CTYPE_10B2 0x0001 -#define DC_CTYPE_10B5 0x0002 -#define DC_CTYPE_100BT 0x0003 -#define DC_CTYPE_100BT_FDX 0x0205 -#define DC_CTYPE_100T4 0x0006 -#define DC_CTYPE_100FX 0x0007 -#define DC_CTYPE_100FX_FDX 0x0208 -#define DC_CTYPE_MII_10BT 0x0009 -#define DC_CTYPE_MII_10BT_FDX 0x020A -#define DC_CTYPE_MII_100BT 0x000D -#define DC_CTYPE_MII_100BT_FDX 0x020E -#define DC_CTYPE_MII_100T4 0x000F -#define DC_CTYPE_MII_100FX 0x0010 -#define DC_CTYPE_MII_100FX_FDX 0x0211 -#define DC_CTYPE_DYN_PUP_AUTOSENSE 0x0800 -#define DC_CTYPE_PUP_AUTOSENSE 0x8800 -#define DC_CTYPE_NOMEDIA 0xFFFF - -#define DC_EBLOCK_SIA 0x0002 -#define DC_EBLOCK_MII 0x0003 -#define DC_EBLOCK_SYM 0x0004 -#define DC_EBLOCK_RESET 0x0005 -#define DC_EBLOCK_PHY_SHUTDOWN 0x0006 - -struct dc_leaf_hdr { - u_int16_t dc_mtype; - u_int8_t dc_mcnt; - u_int8_t dc_rsvd; -}; - -struct dc_eblock_hdr { - u_int8_t dc_len; - u_int8_t dc_type; -}; - -struct dc_eblock_sia { - struct dc_eblock_hdr dc_sia_hdr; - u_int8_t dc_sia_code; - union { - struct dc_sia_ext { /* if (dc_sia_code & DC_SIA_CODE_EXT) */ - u_int8_t dc_sia_mediaspec[6]; /* CSR13, CSR14, CSR15 */ - u_int8_t dc_sia_gpio_ctl[2]; - u_int8_t dc_sia_gpio_dat[2]; - } dc_sia_ext; - struct dc_sia_noext { - u_int8_t dc_sia_gpio_ctl[2]; - u_int8_t dc_sia_gpio_dat[2]; - } dc_sia_noext; - } dc_un; -}; - -#define DC_SIA_CODE_10BT 0x00 -#define DC_SIA_CODE_10B2 0x01 -#define DC_SIA_CODE_10B5 0x02 -#define DC_SIA_CODE_10BT_FDX 0x04 -#define DC_SIA_CODE_EXT 0x40 - -/* - * Note that the first word in the gpr and reset - * sequences is always a control word. - */ -struct dc_eblock_mii { - struct dc_eblock_hdr dc_mii_hdr; - u_int8_t dc_mii_phynum; - u_int8_t dc_gpr_len; -/* u_int16_t dc_gpr_dat[n]; */ -/* u_int8_t dc_reset_len; */ -/* u_int16_t dc_reset_dat[n]; */ -/* There are other fields after these, but we don't - * care about them since they can be determined by looking - * at the PHY. - */ -}; - -struct dc_eblock_sym { - struct dc_eblock_hdr dc_sym_hdr; - u_int8_t dc_sym_code; - u_int8_t dc_sym_gpio_ctl[2]; - u_int8_t dc_sym_gpio_dat[2]; - u_int8_t dc_sym_cmd[2]; -}; - -#define DC_SYM_CODE_100BT 0x03 -#define DC_SYM_CODE_100BT_FDX 0x05 -#define DC_SYM_CODE_100T4 0x06 -#define DC_SYM_CODE_100FX 0x07 -#define DC_SYM_CODE_100FX_FDX 0x08 - -struct dc_eblock_reset { - struct dc_eblock_hdr dc_reset_hdr; - u_int8_t dc_reset_len; -/* u_int16_t dc_reset_dat[n]; */ -}; diff --git a/sys/dev/dc/pnphy.c b/sys/dev/dc/pnphy.c deleted file mode 100644 index 98d269a..0000000 --- a/sys/dev/dc/pnphy.c +++ /dev/null @@ -1,274 +0,0 @@ -/* - * Copyright (c) 1997, 1998, 1999 - * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Pseudo-driver for media selection on the Lite-On PNIC 82c168 - * chip. The NWAY support on this chip is horribly broken, so we - * only support manual mode selection. This is lame, but getting - * NWAY to work right is amazingly difficult. - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/kernel.h> -#include <sys/socket.h> -#include <sys/errno.h> -#include <sys/lock.h> -#include <sys/module.h> -#include <sys/mutex.h> -#include <sys/bus.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/if_media.h> - -#include <dev/mii/mii.h> -#include <dev/mii/miivar.h> -#include "miidevs.h" - -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/bus.h> - -#include <pci/if_dcreg.h> - -#include "miibus_if.h" - -#define DC_SETBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, \ - CSR_READ_4(sc, reg) | x) - -#define DC_CLRBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, \ - CSR_READ_4(sc, reg) & ~x) - -static int pnphy_probe(device_t); -static int pnphy_attach(device_t); - -static device_method_t pnphy_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, pnphy_probe), - DEVMETHOD(device_attach, pnphy_attach), - DEVMETHOD(device_detach, mii_phy_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - { 0, 0 } -}; - -static devclass_t pnphy_devclass; - -static driver_t pnphy_driver = { - "pnphy", - pnphy_methods, - sizeof(struct mii_softc) -}; - -DRIVER_MODULE(pnphy, miibus, pnphy_driver, pnphy_devclass, 0, 0); - -static int pnphy_service(struct mii_softc *, struct mii_data *, int); -static void pnphy_status(struct mii_softc *); - -static int -pnphy_probe(dev) - device_t dev; -{ - struct mii_attach_args *ma; - - ma = device_get_ivars(dev); - - /* - * The dc driver will report the 82c168 vendor and device - * ID to let us know that it wants us to attach. - */ - if (ma->mii_id1 != DC_VENDORID_LO || - ma->mii_id2 != DC_DEVICEID_82C168) - return(ENXIO); - - device_set_desc(dev, "PNIC 82c168 media interface"); - - return (0); -} - -static int -pnphy_attach(dev) - device_t dev; -{ - struct mii_softc *sc; - struct mii_attach_args *ma; - struct mii_data *mii; - - sc = device_get_softc(dev); - ma = device_get_ivars(dev); - sc->mii_dev = device_get_parent(dev); - mii = device_get_softc(sc->mii_dev); - LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); - - sc->mii_inst = mii->mii_instance; - sc->mii_phy = ma->mii_phyno; - sc->mii_service = pnphy_service; - sc->mii_pdata = mii; - - sc->mii_flags |= MIIF_NOISOLATE; - mii->mii_instance++; - -#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) - - sc->mii_capabilities = - BMSR_100TXFDX|BMSR_100TXHDX|BMSR_10TFDX|BMSR_10THDX; - sc->mii_capabilities &= ma->mii_capmask; - device_printf(dev, " "); - mii_add_media(sc); - printf("\n"); - ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), - BMCR_ISO); - - ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), - BMCR_LOOP|BMCR_S100); - -#undef ADD - - MIIBUS_MEDIAINIT(sc->mii_dev); - return(0); -} - -static int -pnphy_service(sc, mii, cmd) - struct mii_softc *sc; - struct mii_data *mii; - int cmd; -{ - struct ifmedia_entry *ife = mii->mii_media.ifm_cur; - - switch (cmd) { - case MII_POLLSTAT: - /* - * If we're not polling our PHY instance, just return. - */ - if (IFM_INST(ife->ifm_media) != sc->mii_inst) { - return (0); - } - break; - - case MII_MEDIACHG: - /* - * If the media indicates a different PHY instance, - * isolate ourselves. - */ - if (IFM_INST(ife->ifm_media) != sc->mii_inst) - return (0); - - /* - * If the interface is not up, don't do anything. - */ - if ((mii->mii_ifp->if_flags & IFF_UP) == 0) - break; - - sc->mii_flags = 0; - - switch (IFM_SUBTYPE(ife->ifm_media)) { - case IFM_AUTO: - /* NWAY is busted on this chip */ - case IFM_100_T4: - /* - * XXX Not supported as a manual setting right now. - */ - return (EINVAL); - case IFM_100_TX: - mii->mii_media_active = IFM_ETHER|IFM_100_TX; - if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) - mii->mii_media_active |= IFM_FDX; - MIIBUS_STATCHG(sc->mii_dev); - return(0); - case IFM_10_T: - mii->mii_media_active = IFM_ETHER|IFM_10_T; - if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) - mii->mii_media_active |= IFM_FDX; - MIIBUS_STATCHG(sc->mii_dev); - return(0); - default: - return(EINVAL); - } - break; - - case MII_TICK: - /* - * If we're not currently selected, just return. - */ - if (IFM_INST(ife->ifm_media) != sc->mii_inst) - return (0); - - /* - * Is the interface even up? - */ - if ((mii->mii_ifp->if_flags & IFF_UP) == 0) - return (0); - - break; - } - - /* Update the media status. */ - pnphy_status(sc); - - /* Callback if something changed. */ - mii_phy_update(sc, cmd); - return (0); -} - -static void -pnphy_status(sc) - struct mii_softc *sc; -{ - struct mii_data *mii = sc->mii_pdata; - int reg; - struct dc_softc *dc_sc; - - dc_sc = mii->mii_ifp->if_softc; - - mii->mii_media_status = IFM_AVALID; - mii->mii_media_active = IFM_ETHER; - - reg = CSR_READ_4(dc_sc, DC_ISR); - - if (!(reg & DC_ISR_LINKFAIL)) - mii->mii_media_status |= IFM_ACTIVE; - - if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL) - mii->mii_media_active |= IFM_10_T; - else - mii->mii_media_active |= IFM_100_TX; - if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX) - mii->mii_media_active |= IFM_FDX; - - return; -} diff --git a/sys/dev/de/dc21040reg.h b/sys/dev/de/dc21040reg.h deleted file mode 100644 index c0ff191..0000000 --- a/sys/dev/de/dc21040reg.h +++ /dev/null @@ -1,583 +0,0 @@ -/* $NetBSD: dc21040reg.h,v 1.15 1998/05/22 18:50:59 matt Exp $ */ - -/* $FreeBSD$ */ - -/*- - * Copyright (c) 1994, 1995, 1996 Matt Thomas <matt@3am-software.com> - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Id: dc21040reg.h,v 1.24 1997/05/16 19:47:09 thomas Exp - */ - -#if !defined(_DC21040_H) -#define _DC21040_H - -#if defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN -#define TULIP_BITFIELD2(a, b) b, a -#define TULIP_BITFIELD3(a, b, c) c, b, a -#define TULIP_BITFIELD4(a, b, c, d) d, c, b, a -#else -#define TULIP_BITFIELD2(a, b) a, b -#define TULIP_BITFIELD3(a, b, c) a, b, c -#define TULIP_BITFIELD4(a, b, c, d) a, b, c, d -#endif - -typedef struct { - u_int32_t d_status; - u_int32_t TULIP_BITFIELD3(d_length1 : 11, - d_length2 : 11, - d_flag : 10); - u_int32_t d_addr1; - u_int32_t d_addr2; -} tulip_desc_t; - -#define TULIP_DSTS_OWNER 0x80000000 /* Owner (1 = 21040) */ -#define TULIP_DSTS_ERRSUM 0x00008000 /* Error Summary */ -/* - * Transmit Status - */ -#define TULIP_DSTS_TxBABBLE 0x00004000 /* Transmitter Babbled */ -#define TULIP_DSTS_TxCARRLOSS 0x00000800 /* Carrier Loss */ -#define TULIP_DSTS_TxNOCARR 0x00000400 /* No Carrier */ -#define TULIP_DSTS_TxLATECOLL 0x00000200 /* Late Collision */ -#define TULIP_DSTS_TxEXCCOLL 0x00000100 /* Excessive Collisions */ -#define TULIP_DSTS_TxNOHRTBT 0x00000080 /* No Heartbeat */ -#define TULIP_DSTS_TxCOLLMASK 0x00000078 /* Collision Count (mask) */ -#define TULIP_DSTS_V_TxCOLLCNT 0x00000003 /* Collision Count (bit) */ -#define TULIP_DSTS_TxLINKFAIL 0x00000004 /* Link Failure */ -#define TULIP_DSTS_TxUNDERFLOW 0x00000002 /* Underflow Error */ -#define TULIP_DSTS_TxDEFERRED 0x00000001 /* Initially Deferred */ -/* - * Receive Status - */ -#define TULIP_DSTS_RxBADLENGTH 0x00004000 /* Length Error */ -#define TULIP_DSTS_RxDATATYPE 0x00003000 /* Data Type */ -#define TULIP_DSTS_RxRUNT 0x00000800 /* Runt Frame */ -#define TULIP_DSTS_RxMULTICAST 0x00000400 /* Multicast Frame */ -#define TULIP_DSTS_RxFIRSTDESC 0x00000200 /* First Descriptor */ -#define TULIP_DSTS_RxLASTDESC 0x00000100 /* Last Descriptor */ -#define TULIP_DSTS_RxTOOLONG 0x00000080 /* Frame Too Long */ -#define TULIP_DSTS_RxCOLLSEEN 0x00000040 /* Collision Seen */ -#define TULIP_DSTS_RxFRAMETYPE 0x00000020 /* Frame Type */ -#define TULIP_DSTS_RxWATCHDOG 0x00000010 /* Receive Watchdog */ -#define TULIP_DSTS_RxDRBBLBIT 0x00000004 /* Dribble Bit */ -#define TULIP_DSTS_RxBADCRC 0x00000002 /* CRC Error */ -#define TULIP_DSTS_RxOVERFLOW 0x00000001 /* Overflow */ - - -#define TULIP_DFLAG_ENDRING 0x0008 /* End of Transmit Ring */ -#define TULIP_DFLAG_CHAIN 0x0004 /* Chain using d_addr2 */ - -#define TULIP_DFLAG_TxWANTINTR 0x0200 /* Signal Interrupt on Completion */ -#define TULIP_DFLAG_TxLASTSEG 0x0100 /* Last Segment */ -#define TULIP_DFLAG_TxFIRSTSEG 0x0080 /* First Segment */ -#define TULIP_DFLAG_TxINVRSFILT 0x0040 /* Inverse Filtering */ -#define TULIP_DFLAG_TxSETUPPKT 0x0020 /* Setup Packet */ -#define TULIP_DFLAG_TxHASCRC 0x0010 /* Don't Append the CRC */ -#define TULIP_DFLAG_TxNOPADDING 0x0002 /* Don't AutoPad */ -#define TULIP_DFLAG_TxHASHFILT 0x0001 /* Hash/Perfect Filtering */ - -/* - * The 21040 Registers (IO Space Addresses) - */ -#define TULIP_REG_BUSMODE 0x00 /* CSR0 -- Bus Mode */ -#define TULIP_REG_TXPOLL 0x08 /* CSR1 -- Transmit Poll Demand */ -#define TULIP_REG_RXPOLL 0x10 /* CSR2 -- Receive Poll Demand */ -#define TULIP_REG_RXLIST 0x18 /* CSR3 -- Receive List Base Addr */ -#define TULIP_REG_TXLIST 0x20 /* CSR4 -- Transmit List Base Addr */ -#define TULIP_REG_STATUS 0x28 /* CSR5 -- Status */ -#define TULIP_REG_CMD 0x30 /* CSR6 -- Command */ -#define TULIP_REG_INTR 0x38 /* CSR7 -- Interrupt Control */ -#define TULIP_REG_MISSES 0x40 /* CSR8 -- Missed Frame Counter */ -#define TULIP_REG_ADDRROM 0x48 /* CSR9 -- ENET ROM Register */ -#define TULIP_REG_RSRVD 0x50 /* CSR10 -- Reserved */ -#define TULIP_REG_FULL_DUPLEX 0x58 /* CSR11 -- Full Duplex */ -#define TULIP_REG_SIA_STATUS 0x60 /* CSR12 -- SIA Status */ -#define TULIP_REG_SIA_CONN 0x68 /* CSR13 -- SIA Connectivity */ -#define TULIP_REG_SIA_TXRX 0x70 /* CSR14 -- SIA Tx Rx */ -#define TULIP_REG_SIA_GEN 0x78 /* CSR15 -- SIA General */ - -/* - * CSR5 -- Status Register - * CSR7 -- Interrupt Control - */ -#define TULIP_STS_ERRORMASK 0x03800000L /* ( R) Error Bits (Valid when SYSERROR is set) */ -#define TULIP_STS_ERR_PARITY 0x00000000L /* 000 - Parity Error (Perform Reset) */ -#define TULIP_STS_ERR_MASTER 0x00800000L /* 001 - Master Abort */ -#define TULIP_STS_ERR_TARGET 0x01000000L /* 010 - Target Abort */ -#define TULIP_STS_ERR_SHIFT 23 -#define TULIP_STS_TXSTATEMASK 0x00700000L /* ( R) Transmission Process State */ -#define TULIP_STS_TXS_RESET 0x00000000L /* 000 - Rset or transmit jabber expired */ -#define TULIP_STS_TXS_FETCH 0x00100000L /* 001 - Fetching transmit descriptor */ -#define TULIP_STS_TXS_WAITEND 0x00200000L /* 010 - Wait for end of transmission */ -#define TULIP_STS_TXS_READING 0x00300000L /* 011 - Read buffer and enqueue data */ -#define TULIP_STS_TXS_RSRVD 0x00400000L /* 100 - Reserved */ -#define TULIP_STS_TXS_SETUP 0x00500000L /* 101 - Setup Packet */ -#define TULIP_STS_TXS_SUSPEND 0x00600000L /* 110 - Transmit FIFO underflow or an - unavailable transmit descriptor */ -#define TULIP_STS_TXS_CLOSE 0x00700000L /* 111 - Close transmit descriptor */ -#define TULIP_STS_RXSTATEMASK 0x000E0000L /* ( R) Receive Process State*/ -#define TULIP_STS_RXS_STOPPED 0x00000000L /* 000 - Stopped */ -#define TULIP_STS_RXS_FETCH 0x00020000L /* 001 - Running -- Fetch receive descriptor */ -#define TULIP_STS_RXS_ENDCHECK 0x00040000L /* 010 - Running -- Check for end of receive - packet before prefetch of next descriptor */ -#define TULIP_STS_RXS_WAIT 0x00060000L /* 011 - Running -- Wait for receive packet */ -#define TULIP_STS_RXS_SUSPEND 0x00080000L /* 100 - Suspended -- As a result of - unavailable receive buffers */ -#define TULIP_STS_RXS_CLOSE 0x000A0000L /* 101 - Running -- Close receive descriptor */ -#define TULIP_STS_RXS_FLUSH 0x000C0000L /* 110 - Running -- Flush the current frame - from the receive FIFO as a result of - an unavailable receive buffer */ -#define TULIP_STS_RXS_DEQUEUE 0x000E0000L /* 111 - Running -- Dequeue the receive frame - from the receive FIFO into the receive - buffer. */ -#define TULIP_STS_NORMALINTR 0x00010000L /* (RW) Normal Interrupt */ -#define TULIP_STS_ABNRMLINTR 0x00008000L /* (RW) Abnormal Interrupt */ -#define TULIP_STS_SYSERROR 0x00002000L /* (RW) System Error */ -#define TULIP_STS_LINKFAIL 0x00001000L /* (RW) Link Failure (21040) */ -#define TULIP_STS_FULDPLXSHRT 0x00000800L /* (RW) Full Duplex Short Fram Rcvd (21040) */ -#define TULIP_STS_GPTIMEOUT 0x00000800L /* (RW) General Purpose Timeout (21140) */ -#define TULIP_STS_AUI 0x00000400L /* (RW) AUI/TP Switch (21040) */ -#define TULIP_STS_RXTIMEOUT 0x00000200L /* (RW) Receive Watchbog Timeout */ -#define TULIP_STS_RXSTOPPED 0x00000100L /* (RW) Receive Process Stopped */ -#define TULIP_STS_RXNOBUF 0x00000080L /* (RW) Receive Buffer Unavailable */ -#define TULIP_STS_RXINTR 0x00000040L /* (RW) Receive Interrupt */ -#define TULIP_STS_TXUNDERFLOW 0x00000020L /* (RW) Transmit Underflow */ -#define TULIP_STS_LINKPASS 0x00000010L /* (RW) LinkPass (21041) */ -#define TULIP_STS_TXBABBLE 0x00000008L /* (RW) Transmit Jabber Timeout */ -#define TULIP_STS_TXNOBUF 0x00000004L /* (RW) Transmit Buffer Unavailable */ -#define TULIP_STS_TXSTOPPED 0x00000002L /* (RW) Transmit Process Stopped */ -#define TULIP_STS_TXINTR 0x00000001L /* (RW) Transmit Interrupt */ - -/* - * CSR6 -- Command (Operation Mode) Register - */ -#define TULIP_CMD_MUSTBEONE 0x02000000L /* (RW) Must Be One (21140) */ -#define TULIP_CMD_SCRAMBLER 0x01000000L /* (RW) Scrambler Mode (21140) */ -#define TULIP_CMD_PCSFUNCTION 0x00800000L /* (RW) PCS Function (21140) */ -#define TULIP_CMD_TXTHRSHLDCTL 0x00400000L /* (RW) Transmit Threshold Mode (21140) */ -#define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Foward (21140) */ -#define TULIP_CMD_NOHEARTBEAT 0x00080000L /* (RW) No Heartbeat (21140) */ -#define TULIP_CMD_PORTSELECT 0x00040000L /* (RW) Post Select (100Mb) (21140) */ -#define TULIP_CMD_ENHCAPTEFFCT 0x00040000L /* (RW) Enhanced Capture Effecty (21041) */ -#define TULIP_CMD_CAPTREFFCT 0x00020000L /* (RW) Capture Effect (!802.3) */ -#define TULIP_CMD_BACKPRESSURE 0x00010000L /* (RW) Back Pressure (!802.3) (21040) */ -#define TULIP_CMD_THRESHOLDCTL 0x0000C000L /* (RW) Threshold Control */ -#define TULIP_CMD_THRSHLD72 0x00000000L /* 00 - 72 Bytes */ -#define TULIP_CMD_THRSHLD96 0x00004000L /* 01 - 96 Bytes */ -#define TULIP_CMD_THRSHLD128 0x00008000L /* 10 - 128 bytes */ -#define TULIP_CMD_THRSHLD160 0x0000C000L /* 11 - 160 Bytes */ -#define TULIP_CMD_TXRUN 0x00002000L /* (RW) Start/Stop Transmitter */ -#define TULIP_CMD_FORCECOLL 0x00001000L /* (RW) Force Collisions */ -#define TULIP_CMD_OPERMODE 0x00000C00L /* (RW) Operating Mode */ -#define TULIP_CMD_FULLDUPLEX 0x00000200L /* (RW) Full Duplex Mode */ -#define TULIP_CMD_FLAKYOSCDIS 0x00000100L /* (RW) Flakey Oscillator Disable */ -#define TULIP_CMD_ALLMULTI 0x00000080L /* (RW) Pass All Multicasts */ -#define TULIP_CMD_PROMISCUOUS 0x00000040L /* (RW) Promiscuous Mode */ -#define TULIP_CMD_BACKOFFCTR 0x00000020L /* (RW) Start/Stop Backoff Counter (!802.3) */ -#define TULIP_CMD_INVFILTER 0x00000010L /* (R ) Inverse Filtering */ -#define TULIP_CMD_PASSBADPKT 0x00000008L /* (RW) Pass Bad Frames */ -#define TULIP_CMD_HASHONLYFLTR 0x00000004L /* (R ) Hash Only Filtering */ -#define TULIP_CMD_RXRUN 0x00000002L /* (RW) Start/Stop Receive Filtering */ -#define TULIP_CMD_HASHPRFCTFLTR 0x00000001L /* (R ) Hash/Perfect Receive Filtering */ - -#define TULIP_SIASTS_OTHERRXACTIVITY 0x00000200L -#define TULIP_SIASTS_RXACTIVITY 0x00000100L -#define TULIP_SIASTS_LINKFAIL 0x00000004L -#define TULIP_SIASTS_LINK100FAIL 0x00000002L -#define TULIP_SIACONN_RESET 0x00000000L - -/* - * 21040 SIA definitions - */ -#define TULIP_21040_PROBE_10BASET_TIMEOUT 2500 -#define TULIP_21040_PROBE_AUIBNC_TIMEOUT 300 -#define TULIP_21040_PROBE_EXTSIA_TIMEOUT 300 - -#define TULIP_21040_SIACONN_10BASET 0x0000EF01L -#define TULIP_21040_SIATXRX_10BASET 0x0000FFFFL -#define TULIP_21040_SIAGEN_10BASET 0x00000000L - -#define TULIP_21040_SIACONN_10BASET_FD 0x0000EF01L -#define TULIP_21040_SIATXRX_10BASET_FD 0x0000FFFDL -#define TULIP_21040_SIAGEN_10BASET_FD 0x00000000L - -#define TULIP_21040_SIACONN_AUIBNC 0x0000EF09L -#define TULIP_21040_SIATXRX_AUIBNC 0x00000705L -#define TULIP_21040_SIAGEN_AUIBNC 0x00000006L - -#define TULIP_21040_SIACONN_EXTSIA 0x00003041L -#define TULIP_21040_SIATXRX_EXTSIA 0x00000000L -#define TULIP_21040_SIAGEN_EXTSIA 0x00000006L - -/* - * 21041 SIA definitions - */ - -#define TULIP_21041_PROBE_10BASET_TIMEOUT 2500 -#define TULIP_21041_PROBE_AUIBNC_TIMEOUT 300 - -#define TULIP_21041_SIACONN_10BASET 0x0000EF01L -#define TULIP_21041_SIATXRX_10BASET 0x0000FF3FL -#define TULIP_21041_SIAGEN_10BASET 0x00000000L - -#define TULIP_21041P2_SIACONN_10BASET 0x0000EF01L -#define TULIP_21041P2_SIATXRX_10BASET 0x0000FFFFL -#define TULIP_21041P2_SIAGEN_10BASET 0x00000000L - -#define TULIP_21041_SIACONN_10BASET_FD 0x0000EF01L -#define TULIP_21041_SIATXRX_10BASET_FD 0x0000FF3DL -#define TULIP_21041_SIAGEN_10BASET_FD 0x00000000L - -#define TULIP_21041P2_SIACONN_10BASET_FD 0x0000EF01L -#define TULIP_21041P2_SIATXRX_10BASET_FD 0x0000FFFFL -#define TULIP_21041P2_SIAGEN_10BASET_FD 0x00000000L - -#define TULIP_21041_SIACONN_AUI 0x0000EF09L -#define TULIP_21041_SIATXRX_AUI 0x0000F73DL -#define TULIP_21041_SIAGEN_AUI 0x0000000EL - -#define TULIP_21041P2_SIACONN_AUI 0x0000EF09L -#define TULIP_21041P2_SIATXRX_AUI 0x0000F7FDL -#define TULIP_21041P2_SIAGEN_AUI 0x0000000EL - -#define TULIP_21041_SIACONN_BNC 0x0000EF09L -#define TULIP_21041_SIATXRX_BNC 0x0000F73DL -#define TULIP_21041_SIAGEN_BNC 0x00000006L - -#define TULIP_21041P2_SIACONN_BNC 0x0000EF09L -#define TULIP_21041P2_SIATXRX_BNC 0x0000F7FDL -#define TULIP_21041P2_SIAGEN_BNC 0x00000006L - -/* - * 21142 SIA definitions - */ - -#define TULIP_21142_PROBE_10BASET_TIMEOUT 2500 -#define TULIP_21142_PROBE_AUIBNC_TIMEOUT 300 - -#define TULIP_21142_SIACONN_10BASET 0x00000001L -#define TULIP_21142_SIATXRX_10BASET 0x00007F3FL -#define TULIP_21142_SIAGEN_10BASET 0x00000008L - -#define TULIP_21142_SIACONN_10BASET_FD 0x00000001L -#define TULIP_21142_SIATXRX_10BASET_FD 0x00007F3DL -#define TULIP_21142_SIAGEN_10BASET_FD 0x00000008L - -#define TULIP_21142_SIACONN_AUI 0x00000009L -#define TULIP_21142_SIATXRX_AUI 0x00000705L -#define TULIP_21142_SIAGEN_AUI 0x0000000EL - -#define TULIP_21142_SIACONN_BNC 0x00000009L -#define TULIP_21142_SIATXRX_BNC 0x00000705L -#define TULIP_21142_SIAGEN_BNC 0x00000006L - - - - -#define TULIP_WATCHDOG_TXDISABLE 0x00000001L -#define TULIP_WATCHDOG_RXDISABLE 0x00000010L - -#define TULIP_BUSMODE_SWRESET 0x00000001L -#define TULIP_BUSMODE_DESCSKIPLEN_MASK 0x0000007CL -#define TULIP_BUSMODE_BIGENDIAN 0x00000080L -#define TULIP_BUSMODE_BURSTLEN_MASK 0x00003F00L -#define TULIP_BUSMODE_BURSTLEN_DEFAULT 0x00000000L -#define TULIP_BUSMODE_BURSTLEN_1LW 0x00000100L -#define TULIP_BUSMODE_BURSTLEN_2LW 0x00000200L -#define TULIP_BUSMODE_BURSTLEN_4LW 0x00000400L -#define TULIP_BUSMODE_BURSTLEN_8LW 0x00000800L -#define TULIP_BUSMODE_BURSTLEN_16LW 0x00001000L -#define TULIP_BUSMODE_BURSTLEN_32LW 0x00002000L -#define TULIP_BUSMODE_CACHE_NOALIGN 0x00000000L -#define TULIP_BUSMODE_CACHE_ALIGN8 0x00004000L -#define TULIP_BUSMODE_CACHE_ALIGN16 0x00008000L -#define TULIP_BUSMODE_CACHE_ALIGN32 0x0000C000L -#define TULIP_BUSMODE_TXPOLL_NEVER 0x00000000L -#define TULIP_BUSMODE_TXPOLL_200000ns 0x00020000L -#define TULIP_BUSMODE_TXPOLL_800000ns 0x00040000L -#define TULIP_BUSMODE_TXPOLL_1600000ns 0x00060000L -#define TULIP_BUSMODE_TXPOLL_12800ns 0x00080000L /* 21041 only */ -#define TULIP_BUSMODE_TXPOLL_25600ns 0x000A0000L /* 21041 only */ -#define TULIP_BUSMODE_TXPOLL_51200ns 0x000C0000L /* 21041 only */ -#define TULIP_BUSMODE_TXPOLL_102400ns 0x000E0000L /* 21041 only */ -#define TULIP_BUSMODE_DESC_BIGENDIAN 0x00100000L /* 21041 only */ -#define TULIP_BUSMODE_READMULTIPLE 0x00200000L /* */ - -#define TULIP_REG_CFDA 0x40 -#define TULIP_CFDA_SLEEP 0x80000000L -#define TULIP_CFDA_SNOOZE 0x40000000L - -#define TULIP_GP_PINSET 0x00000100L -/* - * These are the defintitions used for the DEC 21140 - * evaluation board. - */ -#define TULIP_GP_EB_PINS 0x0000001F /* General Purpose Pin directions */ -#define TULIP_GP_EB_OK10 0x00000080 /* 10 Mb/sec Signal Detect gep<7> */ -#define TULIP_GP_EB_OK100 0x00000040 /* 100 Mb/sec Signal Detect gep<6> */ -#define TULIP_GP_EB_INIT 0x0000000B /* No loopback --- point-to-point */ - -/* - * These are the defintitions used for the SMC9332 (21140) board. - */ -#define TULIP_GP_SMC_9332_PINS 0x0000003F /* General Purpose Pin directions */ -#define TULIP_GP_SMC_9332_OK10 0x00000080 /* 10 Mb/sec Signal Detect gep<7> */ -#define TULIP_GP_SMC_9332_OK100 0x00000040 /* 100 Mb/sec Signal Detect gep<6> */ -#define TULIP_GP_SMC_9332_INIT 0x00000009 /* No loopback --- point-to-point */ - -/* - * There are the definitions used for the DEC DE500 - * 10/100 family of boards - */ -#define TULIP_GP_DE500_PINS 0x0000001FL -#define TULIP_GP_DE500_LINK_PASS 0x00000080L -#define TULIP_GP_DE500_SYM_LINK 0x00000040L -#define TULIP_GP_DE500_SIGNAL_DETECT 0x00000020L -#define TULIP_GP_DE500_PHY_RESET 0x00000010L -#define TULIP_GP_DE500_HALFDUPLEX 0x00000008L -#define TULIP_GP_DE500_PHY_LOOPBACK 0x00000004L -#define TULIP_GP_DE500_FORCE_LED 0x00000002L -#define TULIP_GP_DE500_FORCE_100 0x00000001L - -/* - * These are the defintitions used for the Cogent EM100 - * 21140 board. - */ -#define TULIP_GP_EM100_PINS 0x0000003F /* General Purpose Pin directions */ -#define TULIP_GP_EM100_INIT 0x00000009 /* No loopback --- point-to-point */ -#define TULIP_COGENT_EM100TX_ID 0x12 -#define TULIP_COGENT_EM100FX_ID 0x15 - - -/* - * These are the defintitions used for the Znyx ZX342 - * 10/100 board - */ -#define TULIP_ZNYX_ID_ZX312 0x0602 -#define TULIP_ZNYX_ID_ZX312T 0x0622 -#define TULIP_ZNYX_ID_ZX314_INTA 0x0701 -#define TULIP_ZNYX_ID_ZX314 0x0711 -#define TULIP_ZNYX_ID_ZX315_INTA 0x0801 -#define TULIP_ZNYX_ID_ZX315 0x0811 -#define TULIP_ZNYX_ID_ZX342 0x0901 -#define TULIP_ZNYX_ID_ZX342B 0x0921 -#define TULIP_ZNYX_ID_ZX342_X3 0x0902 -#define TULIP_ZNYX_ID_ZX342_X4 0x0903 -#define TULIP_ZNYX_ID_ZX344 0x0A01 -#define TULIP_ZNYX_ID_ZX351 0x0B01 -#define TULIP_ZNYX_ID_ZX345 0x0C01 -#define TULIP_ZNYX_ID_ZX311 0x0D01 -#define TULIP_ZNYX_ID_ZX346 0x0E01 - -#define TULIP_GP_ZX34X_PINS 0x0000001F /* General Purpose Pin directions */ -#define TULIP_GP_ZX344_PINS 0x0000000B /* General Purpose Pin directions */ -#define TULIP_GP_ZX345_PINS 0x00000003 /* General Purpose Pin directions */ -#define TULIP_GP_ZX346_PINS 0x00000043 /* General Purpose Pin directions */ -#define TULIP_GP_ZX34X_LNKFAIL 0x00000080 /* 10Mb/s Link Failure */ -#define TULIP_GP_ZX34X_SYMDET 0x00000040 /* 100Mb/s Symbol Detect */ -#define TULIP_GP_ZX345_PHYACT 0x00000040 /* PHY Activity */ -#define TULIP_GP_ZX34X_SIGDET 0x00000020 /* 100Mb/s Signal Detect */ -#define TULIP_GP_ZX346_AUTONEG_ENABLED 0x00000020 /* 802.3u autoneg enabled */ -#define TULIP_GP_ZX342_COLENA 0x00000008 /* 10t Ext LB */ -#define TULIP_GP_ZX344_ROTINT 0x00000008 /* PPB IRQ rotation */ -#define TULIP_GP_ZX345_SPEED10 0x00000008 /* 10Mb speed detect */ -#define TULIP_GP_ZX346_SPEED100 0x00000008 /* 100Mb speed detect */ -#define TULIP_GP_ZX34X_NCOLENA 0x00000004 /* 10t Int LB */ -#define TULIP_GP_ZX34X_RXMATCH 0x00000004 /* RX Match */ -#define TULIP_GP_ZX346_FULLDUPLEX 0x00000004 /* Full Duplex Sensed */ -#define TULIP_GP_ZX34X_LB102 0x00000002 /* 100tx twister LB */ -#define TULIP_GP_ZX34X_NLB101 0x00000001 /* PDT/PDR LB */ -#define TULIP_GP_ZX34X_INIT 0x00000009 - -/* - * Asante's stuff... - */ -#define TULIP_GP_ASANTE_PINS 0x000000bf /* GP pin config */ -#define TULIP_GP_ASANTE_PHYRESET 0x00000008 /* Reset PHY */ - -/* - * ACCTON EN1207 specialties - */ - -#define TULIP_CSR8_EN1207 0x08 -#define TULIP_CSR9_EN1207 0x00 -#define TULIP_CSR10_EN1207 0x03 -#define TULIP_CSR11_EN1207 0x1F - -#define TULIP_GP_EN1207_BNC_INIT 0x0000011B -#define TULIP_GP_EN1207_UTP_INIT 0x9E00000B -#define TULIP_GP_EN1207_100_INIT 0x6D00031B - -/* - * SROM definitions for the 21140 and 21041. - */ -#define SROMXREG 0x0400 -#define SROMSEL 0x0800 -#define SROMRD 0x4000 -#define SROMWR 0x2000 -#define SROMDIN 0x0008 -#define SROMDOUT 0x0004 -#define SROMDOUTON 0x0004 -#define SROMDOUTOFF 0x0004 -#define SROMCLKON 0x0002 -#define SROMCLKOFF 0x0002 -#define SROMCSON 0x0001 -#define SROMCSOFF 0x0001 -#define SROMCS 0x0001 - -#define SROMCMD_MODE 4 -#define SROMCMD_WR 5 -#define SROMCMD_RD 6 - -#define SROM_BITWIDTH 6 - -/* - * MII Definitions for the 21041 and 21140/21140A/21142 - */ -#define MII_PREAMBLE (~0) -#define MII_TEST 0xAAAAAAAA -#define MII_RDCMD 0xF6 /* 1111.0110 */ -#define MII_WRCMD 0xF5 /* 1111.0101 */ -#define MII_DIN 0x00080000 -#define MII_RD 0x00040000 -#define MII_WR 0x00000000 -#define MII_DOUT 0x00020000 -#define MII_CLK 0x00010000 -#define MII_CLKON MII_CLK -#define MII_CLKOFF MII_CLK - -#define PHYREG_CONTROL 0 -#define PHYREG_STATUS 1 -#define PHYREG_IDLOW 2 -#define PHYREG_IDHIGH 3 -#define PHYREG_AUTONEG_ADVERTISEMENT 4 -#define PHYREG_AUTONEG_ABILITIES 5 -#define PHYREG_AUTONEG_EXPANSION 6 -#define PHYREG_AUTONEG_NEXTPAGE 7 - -#define PHYSTS_100BASET4 0x8000 -#define PHYSTS_100BASETX_FD 0x4000 -#define PHYSTS_100BASETX 0x2000 -#define PHYSTS_10BASET_FD 0x1000 -#define PHYSTS_10BASET 0x0800 -#define PHYSTS_AUTONEG_DONE 0x0020 -#define PHYSTS_REMOTE_FAULT 0x0010 -#define PHYSTS_CAN_AUTONEG 0x0008 -#define PHYSTS_LINK_UP 0x0004 -#define PHYSTS_JABBER_DETECT 0x0002 -#define PHYSTS_EXTENDED_REGS 0x0001 - -#define PHYCTL_RESET 0x8000 -#define PHYCTL_SELECT_100MB 0x2000 -#define PHYCTL_AUTONEG_ENABLE 0x1000 -#define PHYCTL_ISOLATE 0x0400 -#define PHYCTL_AUTONEG_RESTART 0x0200 -#define PHYCTL_FULL_DUPLEX 0x0100 - -/* - * Definitions for the DE425. - */ -#define DE425_CFID 0x08 /* Configuration Id */ -#define DE425_CFCS 0x0C /* Configuration Command-Status */ -#define DE425_CFRV 0x18 /* Configuration Revision */ -#define DE425_CFLT 0x1C /* Configuration Latency Timer */ -#define DE425_CBIO 0x28 /* Configuration Base IO Address */ -#define DE425_CFDA 0x2C /* Configuration Driver Area */ -#define DE425_ENETROM_OFFSET 0xC90 /* Offset in I/O space for ENETROM */ -#define DE425_CFG0 0xC88 /* IRQ register */ -#define DE425_EISAID 0x10a34250 /* EISA device id */ -#define DE425_EISA_IOSIZE 0x100 - -#define DEC_VENDORID 0x1011 -#define CHIPID_21040 0x0002 -#define CHIPID_21140 0x0009 -#define CHIPID_21041 0x0014 -#define CHIPID_21142 0x0019 -#define PCI_VENDORID(x) ((x) & 0xFFFF) -#define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF) - -/* - * Generic SROM Format - * - * - */ - -typedef struct { - u_int8_t sh_idbuf[18]; - u_int8_t sh_version; - u_int8_t sh_adapter_count; - u_int8_t sh_ieee802_address[6]; -} tulip_srom_header_t; - -typedef struct { - u_int8_t sai_device; - u_int8_t sai_leaf_offset_lowbyte; - u_int8_t sai_leaf_offset_highbyte; -} tulip_srom_adapter_info_t; - -typedef enum { - TULIP_SROM_CONNTYPE_10BASET =0x0000, - TULIP_SROM_CONNTYPE_BNC =0x0001, - TULIP_SROM_CONNTYPE_AUI =0x0002, - TULIP_SROM_CONNTYPE_100BASETX =0x0003, - TULIP_SROM_CONNTYPE_100BASET4 =0x0006, - TULIP_SROM_CONNTYPE_100BASEFX =0x0007, - TULIP_SROM_CONNTYPE_MII_10BASET =0x0009, - TULIP_SROM_CONNTYPE_MII_100BASETX =0x000D, - TULIP_SROM_CONNTYPE_MII_100BASET4 =0x000F, - TULIP_SROM_CONNTYPE_MII_100BASEFX =0x0010, - TULIP_SROM_CONNTYPE_10BASET_NWAY =0x0100, - TULIP_SROM_CONNTYPE_10BASET_FD =0x0204, - TULIP_SROM_CONNTYPE_MII_10BASET_FD =0x020A, - TULIP_SROM_CONNTYPE_100BASETX_FD =0x020E, - TULIP_SROM_CONNTYPE_MII_100BASETX_FD =0x0211, - TULIP_SROM_CONNTYPE_10BASET_NOLINKPASS =0x0400, - TULIP_SROM_CONNTYPE_AUTOSENSE =0x0800, - TULIP_SROM_CONNTYPE_AUTOSENSE_POWERUP =0x8800, - TULIP_SROM_CONNTYPE_AUTOSENSE_NWAY =0x9000, - TULIP_SROM_CONNTYPE_NOT_USED =0xFFFF -} tulip_srom_connection_t; - -typedef enum { - TULIP_SROM_MEDIA_10BASET =0x0000, - TULIP_SROM_MEDIA_BNC =0x0001, - TULIP_SROM_MEDIA_AUI =0x0002, - TULIP_SROM_MEDIA_100BASETX =0x0003, - TULIP_SROM_MEDIA_10BASET_FD =0x0004, - TULIP_SROM_MEDIA_100BASETX_FD =0x0005, - TULIP_SROM_MEDIA_100BASET4 =0x0006, - TULIP_SROM_MEDIA_100BASEFX =0x0007, - TULIP_SROM_MEDIA_100BASEFX_FD =0x0008 -} tulip_srom_media_t; - -#define TULIP_SROM_21041_EXTENDED 0x40 - -#define TULIP_SROM_2114X_NOINDICATOR 0x8000 -#define TULIP_SROM_2114X_DEFAULT 0x4000 -#define TULIP_SROM_2114X_POLARITY 0x0080 -#define TULIP_SROM_2114X_CMDBITS(n) (((n) & 0x0071) << 18) -#define TULIP_SROM_2114X_BITPOS(b) (1 << (((b) & 0x0E) >> 1)) - - - -#endif /* !defined(_DC21040_H) */ diff --git a/sys/dev/de/if_de.c b/sys/dev/de/if_de.c deleted file mode 100644 index c8bf575..0000000 --- a/sys/dev/de/if_de.c +++ /dev/null @@ -1,5229 +0,0 @@ -/* $NetBSD: if_de.c,v 1.86 1999/06/01 19:17:59 thorpej Exp $ */ -/*- - * Copyright (c) 1994-1997 Matt Thomas (matt@3am-software.com) - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Id: if_de.c,v 1.94 1997/07/03 16:55:07 thomas Exp - */ - -/* - * DEC 21040 PCI Ethernet Controller - * - * Written by Matt Thomas - * BPF support code stolen directly from if_ec.c - * - * This driver supports the DEC DE435 or any other PCI - * board which support 21040, 21041, or 21140 (mostly). - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#define TULIP_HDR_DATA - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/endian.h> -#include <sys/mbuf.h> -#include <sys/socket.h> -#include <sys/sockio.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/eventhandler.h> -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/bus.h> -#include <sys/rman.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/ethernet.h> -#include <net/if_media.h> -#include <net/if_types.h> -#include <net/if_dl.h> -#ifdef TULIP_USE_SOFTINTR -#include <net/netisr.h> -#endif - -#include <net/bpf.h> - -#ifdef INET -#include <netinet/in.h> -#include <netinet/if_ether.h> -#endif - -#include <vm/vm.h> - -#include <net/if_var.h> -#include <vm/pmap.h> -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <pci/dc21040reg.h> - -/* - * Intel CPUs should use I/O mapped access. - */ -#if defined(__i386__) -#define TULIP_IOMAPPED -#endif - -#if 0 -/* - * This turns on all sort of debugging stuff and make the - * driver much larger. - */ -#define TULIP_DEBUG -#endif - -#if 0 -#define TULIP_PERFSTATS -#endif - -#if 0 -#define TULIP_USE_SOFTINTR -#endif - -#define TULIP_HZ 10 - -#include <pci/if_devar.h> - -/* - * This module supports - * the DEC 21040 PCI Ethernet Controller. - * the DEC 21041 PCI Ethernet Controller. - * the DEC 21140 PCI Fast Ethernet Controller. - */ -static void tulip_addr_filter(tulip_softc_t * const sc); -static void tulip_ifinit(void *); -static int tulip_ifmedia_change(struct ifnet * const ifp); -static void tulip_ifmedia_status(struct ifnet * const ifp, - struct ifmediareq *req); -static void tulip_ifstart(struct ifnet *ifp); -static void tulip_init(tulip_softc_t * const sc); -static void tulip_intr_shared(void *arg); -static void tulip_intr_normal(void *arg); -static void tulip_mii_autonegotiate(tulip_softc_t * const sc, - const unsigned phyaddr); -static int tulip_mii_map_abilities(tulip_softc_t * const sc, - unsigned abilities); -static tulip_media_t - tulip_mii_phy_readspecific(tulip_softc_t * const sc); -static unsigned tulip_mii_readreg(tulip_softc_t * const sc, unsigned devaddr, - unsigned regno); -static void tulip_mii_writereg(tulip_softc_t * const sc, unsigned devaddr, - unsigned regno, unsigned data); -static void tulip_reset(tulip_softc_t * const sc); -static void tulip_rx_intr(tulip_softc_t * const sc); -static int tulip_srom_decode(tulip_softc_t * const sc); -static struct mbuf * - tulip_txput(tulip_softc_t * const sc, struct mbuf *m); -static void tulip_txput_setup(tulip_softc_t * const sc); - -static void -tulip_timeout_callback( - void *arg) -{ - tulip_softc_t * const sc = arg; - int s = splimp(); - - TULIP_PERFSTART(timeout) - - sc->tulip_flags &= ~TULIP_TIMEOUTPENDING; - sc->tulip_probe_timeout -= 1000 / TULIP_HZ; - (sc->tulip_boardsw->bd_media_poll)(sc, TULIP_MEDIAPOLL_TIMER); - - TULIP_PERFEND(timeout); - splx(s); -} - -static void -tulip_timeout( - tulip_softc_t * const sc) -{ - if (sc->tulip_flags & TULIP_TIMEOUTPENDING) - return; - sc->tulip_flags |= TULIP_TIMEOUTPENDING; - timeout(tulip_timeout_callback, sc, (hz + TULIP_HZ / 2) / TULIP_HZ); -} - -#if defined(TULIP_NEED_FASTTIMEOUT) -static void -tulip_fasttimeout_callback( - void *arg) -{ - tulip_softc_t * const sc = arg; - int s = splimp(); - - sc->tulip_flags &= ~TULIP_FASTTIMEOUTPENDING; - (sc->tulip_boardsw->bd_media_poll)(sc, TULIP_MEDIAPOLL_FASTTIMER); - splx(s); -} - -static void -tulip_fasttimeout( - tulip_softc_t * const sc) -{ - if (sc->tulip_flags & TULIP_FASTTIMEOUTPENDING) - return; - sc->tulip_flags |= TULIP_FASTTIMEOUTPENDING; - timeout(tulip_fasttimeout_callback, sc, 1); -} -#endif - -static int -tulip_txprobe( - tulip_softc_t * const sc) -{ - struct mbuf *m; - /* - * Before we are sure this is the right media we need - * to send a small packet to make sure there's carrier. - * Strangely, BNC and AUI will "see" receive data if - * either is connected so the transmit is the only way - * to verify the connectivity. - */ - MGETHDR(m, M_DONTWAIT, MT_DATA); - if (m == NULL) - return 0; - /* - * Construct a LLC TEST message which will point to ourselves. - */ - bcopy(IFP2ENADDR(sc->tulip_ifp), mtod(m, struct ether_header *)->ether_dhost, 6); - bcopy(IFP2ENADDR(sc->tulip_ifp), mtod(m, struct ether_header *)->ether_shost, 6); - mtod(m, struct ether_header *)->ether_type = htons(3); - mtod(m, unsigned char *)[14] = 0; - mtod(m, unsigned char *)[15] = 0; - mtod(m, unsigned char *)[16] = 0xE3; /* LLC Class1 TEST (no poll) */ - m->m_len = m->m_pkthdr.len = sizeof(struct ether_header) + 3; - /* - * send it! - */ - sc->tulip_cmdmode |= TULIP_CMD_TXRUN; - sc->tulip_intrmask |= TULIP_STS_TXINTR; - sc->tulip_flags |= TULIP_TXPROBE_ACTIVE; - TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode); - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - if ((m = tulip_txput(sc, m)) != NULL) - m_freem(m); - sc->tulip_probe.probe_txprobes++; - return 1; -} - -#ifdef BIG_PACKET -#define TULIP_SIAGEN_WATCHDOG (sc->tulip_ifp->if_mtu > ETHERMTU ? TULIP_WATCHDOG_RXDISABLE|TULIP_WATCHDOG_TXDISABLE : 0) -#else -#define TULIP_SIAGEN_WATCHDOG 0 -#endif - -static void -tulip_media_set( - tulip_softc_t * const sc, - tulip_media_t media) -{ - const tulip_media_info_t *mi = sc->tulip_mediums[media]; - - if (mi == NULL) - return; - - /* - * If we are switching media, make sure we don't think there's - * any stale RX activity - */ - sc->tulip_flags &= ~TULIP_RXACT; - if (mi->mi_type == TULIP_MEDIAINFO_SIA) { - TULIP_CSR_WRITE(sc, csr_sia_connectivity, TULIP_SIACONN_RESET); - TULIP_CSR_WRITE(sc, csr_sia_tx_rx, mi->mi_sia_tx_rx); - if (sc->tulip_features & TULIP_HAVE_SIAGP) { - TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_sia_gp_control|mi->mi_sia_general|TULIP_SIAGEN_WATCHDOG); - DELAY(50); - TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_sia_gp_data|mi->mi_sia_general|TULIP_SIAGEN_WATCHDOG); - } else { - TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_sia_general|TULIP_SIAGEN_WATCHDOG); - } - TULIP_CSR_WRITE(sc, csr_sia_connectivity, mi->mi_sia_connectivity); - } else if (mi->mi_type == TULIP_MEDIAINFO_GPR) { -#define TULIP_GPR_CMDBITS (TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION|TULIP_CMD_SCRAMBLER|TULIP_CMD_TXTHRSHLDCTL) - /* - * If the cmdmode bits don't match the currently operating mode, - * set the cmdmode appropriately and reset the chip. - */ - if (((mi->mi_cmdmode ^ TULIP_CSR_READ(sc, csr_command)) & TULIP_GPR_CMDBITS) != 0) { - sc->tulip_cmdmode &= ~TULIP_GPR_CMDBITS; - sc->tulip_cmdmode |= mi->mi_cmdmode; - tulip_reset(sc); - } - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET|sc->tulip_gpinit); - DELAY(10); - TULIP_CSR_WRITE(sc, csr_gp, (u_int8_t) mi->mi_gpdata); - } else if (mi->mi_type == TULIP_MEDIAINFO_SYM) { - /* - * If the cmdmode bits don't match the currently operating mode, - * set the cmdmode appropriately and reset the chip. - */ - if (((mi->mi_cmdmode ^ TULIP_CSR_READ(sc, csr_command)) & TULIP_GPR_CMDBITS) != 0) { - sc->tulip_cmdmode &= ~TULIP_GPR_CMDBITS; - sc->tulip_cmdmode |= mi->mi_cmdmode; - tulip_reset(sc); - } - TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_gpcontrol); - TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_gpdata); - } else if (mi->mi_type == TULIP_MEDIAINFO_MII - && sc->tulip_probe_state != TULIP_PROBE_INACTIVE) { - int idx; - if (sc->tulip_features & TULIP_HAVE_SIAGP) { - const u_int8_t *dp; - dp = &sc->tulip_rombuf[mi->mi_reset_offset]; - for (idx = 0; idx < mi->mi_reset_length; idx++, dp += 2) { - DELAY(10); - TULIP_CSR_WRITE(sc, csr_sia_general, (dp[0] + 256 * dp[1]) << 16); - } - sc->tulip_phyaddr = mi->mi_phyaddr; - dp = &sc->tulip_rombuf[mi->mi_gpr_offset]; - for (idx = 0; idx < mi->mi_gpr_length; idx++, dp += 2) { - DELAY(10); - TULIP_CSR_WRITE(sc, csr_sia_general, (dp[0] + 256 * dp[1]) << 16); - } - } else { - for (idx = 0; idx < mi->mi_reset_length; idx++) { - DELAY(10); - TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_rombuf[mi->mi_reset_offset + idx]); - } - sc->tulip_phyaddr = mi->mi_phyaddr; - for (idx = 0; idx < mi->mi_gpr_length; idx++) { - DELAY(10); - TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_rombuf[mi->mi_gpr_offset + idx]); - } - } - if (sc->tulip_flags & TULIP_TRYNWAY) { - tulip_mii_autonegotiate(sc, sc->tulip_phyaddr); - } else if ((sc->tulip_flags & TULIP_DIDNWAY) == 0) { - u_int32_t data = tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_CONTROL); - data &= ~(PHYCTL_SELECT_100MB|PHYCTL_FULL_DUPLEX|PHYCTL_AUTONEG_ENABLE); - sc->tulip_flags &= ~TULIP_DIDNWAY; - if (TULIP_IS_MEDIA_FD(media)) - data |= PHYCTL_FULL_DUPLEX; - if (TULIP_IS_MEDIA_100MB(media)) - data |= PHYCTL_SELECT_100MB; - tulip_mii_writereg(sc, sc->tulip_phyaddr, PHYREG_CONTROL, data); - } - } -} - -static void -tulip_linkup( - tulip_softc_t * const sc, - tulip_media_t media) -{ - if ((sc->tulip_flags & TULIP_LINKUP) == 0) - sc->tulip_flags |= TULIP_PRINTLINKUP; - sc->tulip_flags |= TULIP_LINKUP; - sc->tulip_ifp->if_flags &= ~IFF_OACTIVE; -#if 0 /* XXX how does with work with ifmedia? */ - if ((sc->tulip_flags & TULIP_DIDNWAY) == 0) { - if (sc->tulip_ifp->if_flags & IFF_FULLDUPLEX) { - if (TULIP_CAN_MEDIA_FD(media) - && sc->tulip_mediums[TULIP_FD_MEDIA_OF(media)] != NULL) - media = TULIP_FD_MEDIA_OF(media); - } else { - if (TULIP_IS_MEDIA_FD(media) - && sc->tulip_mediums[TULIP_HD_MEDIA_OF(media)] != NULL) - media = TULIP_HD_MEDIA_OF(media); - } - } -#endif - if (sc->tulip_media != media) { -#ifdef TULIP_DEBUG - sc->tulip_dbg.dbg_last_media = sc->tulip_media; -#endif - sc->tulip_media = media; - sc->tulip_flags |= TULIP_PRINTMEDIA; - if (TULIP_IS_MEDIA_FD(sc->tulip_media)) { - sc->tulip_cmdmode |= TULIP_CMD_FULLDUPLEX; - } else if (sc->tulip_chipid != TULIP_21041 || (sc->tulip_flags & TULIP_DIDNWAY) == 0) { - sc->tulip_cmdmode &= ~TULIP_CMD_FULLDUPLEX; - } - } - /* - * We could set probe_timeout to 0 but setting to 3000 puts this - * in one central place and the only matters is tulip_link is - * followed by a tulip_timeout. Therefore setting it should not - * result in aberrant behavour. - */ - sc->tulip_probe_timeout = 3000; - sc->tulip_probe_state = TULIP_PROBE_INACTIVE; - sc->tulip_flags &= ~(TULIP_TXPROBE_ACTIVE|TULIP_TRYNWAY); - if (sc->tulip_flags & TULIP_INRESET) { - tulip_media_set(sc, sc->tulip_media); - } else if (sc->tulip_probe_media != sc->tulip_media) { - /* - * No reason to change media if we have the right media. - */ - tulip_reset(sc); - } - tulip_init(sc); -} - -static void -tulip_media_print( - tulip_softc_t * const sc) -{ - struct ifnet *ifp = sc->tulip_ifp; - - if ((sc->tulip_flags & TULIP_LINKUP) == 0) - return; - if (sc->tulip_flags & TULIP_PRINTMEDIA) { - if_printf(ifp, "enabling %s port\n", - tulip_mediums[sc->tulip_media]); - sc->tulip_flags &= ~(TULIP_PRINTMEDIA|TULIP_PRINTLINKUP); - } else if (sc->tulip_flags & TULIP_PRINTLINKUP) { - if_printf(ifp, "link up\n"); - sc->tulip_flags &= ~TULIP_PRINTLINKUP; - } -} - -#if defined(TULIP_DO_GPR_SENSE) -static tulip_media_t -tulip_21140_gpr_media_sense( - tulip_softc_t * const sc) -{ - struct ifnet *ifp sc->tulip_ifp; - tulip_media_t maybe_media = TULIP_MEDIA_UNKNOWN; - tulip_media_t last_media = TULIP_MEDIA_UNKNOWN; - tulip_media_t media; - - /* - * If one of the media blocks contained a default media flag, - * use that. - */ - for (media = TULIP_MEDIA_UNKNOWN; media < TULIP_MEDIA_MAX; media++) { - const tulip_media_info_t *mi; - /* - * Media is not supported (or is full-duplex). - */ - if ((mi = sc->tulip_mediums[media]) == NULL || TULIP_IS_MEDIA_FD(media)) - continue; - if (mi->mi_type != TULIP_MEDIAINFO_GPR) - continue; - - /* - * Remember the media is this is the "default" media. - */ - if (mi->mi_default && maybe_media == TULIP_MEDIA_UNKNOWN) - maybe_media = media; - - /* - * No activity mask? Can't see if it is active if there's no mask. - */ - if (mi->mi_actmask == 0) - continue; - - /* - * Does the activity data match? - */ - if ((TULIP_CSR_READ(sc, csr_gp) & mi->mi_actmask) != mi->mi_actdata) - continue; - -#if defined(TULIP_DEBUG) - if_printf(ifp, "gpr_media_sense: %s: 0x%02x & 0x%02x == 0x%02x\n", - tulip_mediums[media], - TULIP_CSR_READ(sc, csr_gp) & 0xFF, - mi->mi_actmask, mi->mi_actdata); -#endif - /* - * It does! If this is the first media we detected, then - * remember this media. If isn't the first, then there were - * multiple matches which we equate to no match (since we don't - * which to select (if any). - */ - if (last_media == TULIP_MEDIA_UNKNOWN) { - last_media = media; - } else if (last_media != media) { - last_media = TULIP_MEDIA_UNKNOWN; - } - } - return (last_media != TULIP_MEDIA_UNKNOWN) ? last_media : maybe_media; -} -#endif /* TULIP_DO_GPR_SENSE */ - -static tulip_link_status_t -tulip_media_link_monitor( - tulip_softc_t * const sc) -{ - struct ifnet *ifp = sc->tulip_ifp; - const tulip_media_info_t * const mi = sc->tulip_mediums[sc->tulip_media]; - tulip_link_status_t linkup = TULIP_LINK_DOWN; - - if (mi == NULL) { -#if defined(DIAGNOSTIC) || defined(TULIP_DEBUG) - panic("tulip_media_link_monitor: %s: botch at line %d\n", - tulip_mediums[sc->tulip_media],__LINE__); -#else - return TULIP_LINK_UNKNOWN; -#endif - } - - - /* - * Have we seen some packets? If so, the link must be good. - */ - if ((sc->tulip_flags & (TULIP_RXACT|TULIP_LINKUP)) == (TULIP_RXACT|TULIP_LINKUP)) { - sc->tulip_flags &= ~TULIP_RXACT; - sc->tulip_probe_timeout = 3000; - return TULIP_LINK_UP; - } - - sc->tulip_flags &= ~TULIP_RXACT; - if (mi->mi_type == TULIP_MEDIAINFO_MII) { - u_int32_t status; - /* - * Read the PHY status register. - */ - status = tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_STATUS); - if (status & PHYSTS_AUTONEG_DONE) { - /* - * If the PHY has completed autonegotiation, see the if the - * remote systems abilities have changed. If so, upgrade or - * downgrade as appropriate. - */ - u_int32_t abilities = tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_AUTONEG_ABILITIES); - abilities = (abilities << 6) & status; - if (abilities != sc->tulip_abilities) { -#if defined(TULIP_DEBUG) - loudprintf("%s(phy%d): autonegotiation changed: 0x%04x -> 0x%04x\n", - ifp->if_xname, sc->tulip_phyaddr, - sc->tulip_abilities, abilities); -#endif - if (tulip_mii_map_abilities(sc, abilities)) { - tulip_linkup(sc, sc->tulip_probe_media); - return TULIP_LINK_UP; - } - /* - * if we had selected media because of autonegotiation, - * we need to probe for the new media. - */ - sc->tulip_probe_state = TULIP_PROBE_INACTIVE; - if (sc->tulip_flags & TULIP_DIDNWAY) - return TULIP_LINK_DOWN; - } - } - /* - * The link is now up. If was down, say its back up. - */ - if ((status & (PHYSTS_LINK_UP|PHYSTS_REMOTE_FAULT)) == PHYSTS_LINK_UP) - linkup = TULIP_LINK_UP; - } else if (mi->mi_type == TULIP_MEDIAINFO_GPR) { - /* - * No activity sensor? Assume all's well. - */ - if (mi->mi_actmask == 0) - return TULIP_LINK_UNKNOWN; - /* - * Does the activity data match? - */ - if ((TULIP_CSR_READ(sc, csr_gp) & mi->mi_actmask) == mi->mi_actdata) - linkup = TULIP_LINK_UP; - } else if (mi->mi_type == TULIP_MEDIAINFO_SIA) { - /* - * Assume non TP ok for now. - */ - if (!TULIP_IS_MEDIA_TP(sc->tulip_media)) - return TULIP_LINK_UNKNOWN; - if ((TULIP_CSR_READ(sc, csr_sia_status) & TULIP_SIASTS_LINKFAIL) == 0) - linkup = TULIP_LINK_UP; -#if defined(TULIP_DEBUG) - if (sc->tulip_probe_timeout <= 0) - if_printf(ifp, "sia status = 0x%08x\n", - TULIP_CSR_READ(sc, csr_sia_status)); -#endif - } else if (mi->mi_type == TULIP_MEDIAINFO_SYM) { - return TULIP_LINK_UNKNOWN; - } - /* - * We will wait for 3 seconds until the link goes into suspect mode. - */ - if (sc->tulip_flags & TULIP_LINKUP) { - if (linkup == TULIP_LINK_UP) - sc->tulip_probe_timeout = 3000; - if (sc->tulip_probe_timeout > 0) - return TULIP_LINK_UP; - - sc->tulip_flags &= ~TULIP_LINKUP; - if_printf(ifp, "link down: cable problem?\n"); - } -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_link_downed++; -#endif - return TULIP_LINK_DOWN; -} - -static void -tulip_media_poll( - tulip_softc_t * const sc, - tulip_mediapoll_event_t event) -{ - struct ifnet *ifp = sc->tulip_ifp; - -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_events[event]++; -#endif - if (sc->tulip_probe_state == TULIP_PROBE_INACTIVE - && event == TULIP_MEDIAPOLL_TIMER) { - switch (tulip_media_link_monitor(sc)) { - case TULIP_LINK_DOWN: { - /* - * Link Monitor failed. Probe for new media. - */ - event = TULIP_MEDIAPOLL_LINKFAIL; - break; - } - case TULIP_LINK_UP: { - /* - * Check again soon. - */ - tulip_timeout(sc); - return; - } - case TULIP_LINK_UNKNOWN: { - /* - * We can't tell so don't bother. - */ - return; - } - } - } - - if (event == TULIP_MEDIAPOLL_LINKFAIL) { - if (sc->tulip_probe_state == TULIP_PROBE_INACTIVE) { - if (TULIP_DO_AUTOSENSE(sc)) { -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_link_failures++; -#endif - sc->tulip_media = TULIP_MEDIA_UNKNOWN; - if (sc->tulip_ifp->if_flags & IFF_UP) - tulip_reset(sc); /* restart probe */ - } - return; - } -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_link_pollintrs++; -#endif - } - - if (event == TULIP_MEDIAPOLL_START) { - sc->tulip_ifp->if_flags |= IFF_OACTIVE; - if (sc->tulip_probe_state != TULIP_PROBE_INACTIVE) - return; - sc->tulip_probe_mediamask = 0; - sc->tulip_probe_passes = 0; -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_media_probes++; -#endif - /* - * If the SROM contained an explicit media to use, use it. - */ - sc->tulip_cmdmode &= ~(TULIP_CMD_RXRUN|TULIP_CMD_FULLDUPLEX); - sc->tulip_flags |= TULIP_TRYNWAY|TULIP_PROBE1STPASS; - sc->tulip_flags &= ~(TULIP_DIDNWAY|TULIP_PRINTMEDIA|TULIP_PRINTLINKUP); - /* - * connidx is defaulted to a media_unknown type. - */ - sc->tulip_probe_media = tulip_srom_conninfo[sc->tulip_connidx].sc_media; - if (sc->tulip_probe_media != TULIP_MEDIA_UNKNOWN) { - tulip_linkup(sc, sc->tulip_probe_media); - tulip_timeout(sc); - return; - } - - if (sc->tulip_features & TULIP_HAVE_GPR) { - sc->tulip_probe_state = TULIP_PROBE_GPRTEST; - sc->tulip_probe_timeout = 2000; - } else { - sc->tulip_probe_media = TULIP_MEDIA_MAX; - sc->tulip_probe_timeout = 0; - sc->tulip_probe_state = TULIP_PROBE_MEDIATEST; - } - } - - /* - * Ignore txprobe failures or spurious callbacks. - */ - if (event == TULIP_MEDIAPOLL_TXPROBE_FAILED - && sc->tulip_probe_state != TULIP_PROBE_MEDIATEST) { - sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE; - return; - } - - /* - * If we really transmitted a packet, then that's the media we'll use. - */ - if (event == TULIP_MEDIAPOLL_TXPROBE_OK || event == TULIP_MEDIAPOLL_LINKPASS) { - if (event == TULIP_MEDIAPOLL_LINKPASS) { - /* XXX Check media status just to be sure */ - sc->tulip_probe_media = TULIP_MEDIA_10BASET; -#if defined(TULIP_DEBUG) - } else { - sc->tulip_dbg.dbg_txprobes_ok[sc->tulip_probe_media]++; -#endif - } - tulip_linkup(sc, sc->tulip_probe_media); - tulip_timeout(sc); - return; - } - - if (sc->tulip_probe_state == TULIP_PROBE_GPRTEST) { -#if defined(TULIP_DO_GPR_SENSE) - /* - * Check for media via the general purpose register. - * - * Try to sense the media via the GPR. If the same value - * occurs 3 times in a row then just use that. - */ - if (sc->tulip_probe_timeout > 0) { - tulip_media_t new_probe_media = tulip_21140_gpr_media_sense(sc); -#if defined(TULIP_DEBUG) - if_printf(ifp, "media_poll: gpr sensing = %s\n", - tulip_mediums[new_probe_media]); -#endif - if (new_probe_media != TULIP_MEDIA_UNKNOWN) { - if (new_probe_media == sc->tulip_probe_media) { - if (--sc->tulip_probe_count == 0) - tulip_linkup(sc, sc->tulip_probe_media); - } else { - sc->tulip_probe_count = 10; - } - } - sc->tulip_probe_media = new_probe_media; - tulip_timeout(sc); - return; - } -#endif /* TULIP_DO_GPR_SENSE */ - /* - * Brute force. We cycle through each of the media types - * and try to transmit a packet. - */ - sc->tulip_probe_state = TULIP_PROBE_MEDIATEST; - sc->tulip_probe_media = TULIP_MEDIA_MAX; - sc->tulip_probe_timeout = 0; - tulip_timeout(sc); - return; - } - - if (sc->tulip_probe_state != TULIP_PROBE_MEDIATEST - && (sc->tulip_features & TULIP_HAVE_MII)) { - tulip_media_t old_media = sc->tulip_probe_media; - tulip_mii_autonegotiate(sc, sc->tulip_phyaddr); - switch (sc->tulip_probe_state) { - case TULIP_PROBE_FAILED: - case TULIP_PROBE_MEDIATEST: { - /* - * Try the next media. - */ - sc->tulip_probe_mediamask |= sc->tulip_mediums[sc->tulip_probe_media]->mi_mediamask; - sc->tulip_probe_timeout = 0; -#ifdef notyet - if (sc->tulip_probe_state == TULIP_PROBE_FAILED) - break; - if (sc->tulip_probe_media != tulip_mii_phy_readspecific(sc)) - break; - sc->tulip_probe_timeout = TULIP_IS_MEDIA_TP(sc->tulip_probe_media) ? 2500 : 300; -#endif - break; - } - case TULIP_PROBE_PHYAUTONEG: { - return; - } - case TULIP_PROBE_INACTIVE: { - /* - * Only probe if we autonegotiated a media that hasn't failed. - */ - sc->tulip_probe_timeout = 0; - if (sc->tulip_probe_mediamask & TULIP_BIT(sc->tulip_probe_media)) { - sc->tulip_probe_media = old_media; - break; - } - tulip_linkup(sc, sc->tulip_probe_media); - tulip_timeout(sc); - return; - } - default: { -#if defined(DIAGNOSTIC) || defined(TULIP_DEBUG) - panic("tulip_media_poll: botch at line %d\n", __LINE__); -#endif - break; - } - } - } - - if (event == TULIP_MEDIAPOLL_TXPROBE_FAILED) { -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txprobes_failed[sc->tulip_probe_media]++; -#endif - sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE; - return; - } - - /* - * switch to another media if we tried this one enough. - */ - if (/* event == TULIP_MEDIAPOLL_TXPROBE_FAILED || */ sc->tulip_probe_timeout <= 0) { -#if defined(TULIP_DEBUG) - if (sc->tulip_probe_media == TULIP_MEDIA_UNKNOWN) { - if_printf(ifp, "poll media unknown!\n"); - sc->tulip_probe_media = TULIP_MEDIA_MAX; - } -#endif - /* - * Find the next media type to check for. Full Duplex - * types are not allowed. - */ - do { - sc->tulip_probe_media -= 1; - if (sc->tulip_probe_media == TULIP_MEDIA_UNKNOWN) { - if (++sc->tulip_probe_passes == 3) { - if_printf(ifp, "autosense failed: cable problem?\n"); - if ((sc->tulip_ifp->if_flags & IFF_UP) == 0) { - sc->tulip_ifp->if_flags &= ~IFF_RUNNING; - sc->tulip_probe_state = TULIP_PROBE_INACTIVE; - return; - } - } - sc->tulip_flags ^= TULIP_TRYNWAY; /* XXX */ - sc->tulip_probe_mediamask = 0; - sc->tulip_probe_media = TULIP_MEDIA_MAX - 1; - } - } while (sc->tulip_mediums[sc->tulip_probe_media] == NULL - || (sc->tulip_probe_mediamask & TULIP_BIT(sc->tulip_probe_media)) - || TULIP_IS_MEDIA_FD(sc->tulip_probe_media)); - -#if defined(TULIP_DEBUG) - if_printf(ifp, "%s: probing %s\n", - event == TULIP_MEDIAPOLL_TXPROBE_FAILED ? "txprobe failed" : "timeout", - tulip_mediums[sc->tulip_probe_media]); -#endif - sc->tulip_probe_timeout = TULIP_IS_MEDIA_TP(sc->tulip_probe_media) ? 2500 : 1000; - sc->tulip_probe_state = TULIP_PROBE_MEDIATEST; - sc->tulip_probe.probe_txprobes = 0; - tulip_reset(sc); - tulip_media_set(sc, sc->tulip_probe_media); - sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE; - } - tulip_timeout(sc); - - /* - * If this is hanging off a phy, we know are doing NWAY and we have - * forced the phy to a specific speed. Wait for link up before - * before sending a packet. - */ - switch (sc->tulip_mediums[sc->tulip_probe_media]->mi_type) { - case TULIP_MEDIAINFO_MII: { - if (sc->tulip_probe_media != tulip_mii_phy_readspecific(sc)) - return; - break; - } - case TULIP_MEDIAINFO_SIA: { - if (TULIP_IS_MEDIA_TP(sc->tulip_probe_media)) { - if (TULIP_CSR_READ(sc, csr_sia_status) & TULIP_SIASTS_LINKFAIL) - return; - tulip_linkup(sc, sc->tulip_probe_media); -#ifdef notyet - if (sc->tulip_features & TULIP_HAVE_MII) - tulip_timeout(sc); -#endif - return; - } - break; - } - case TULIP_MEDIAINFO_RESET: - case TULIP_MEDIAINFO_SYM: - case TULIP_MEDIAINFO_NONE: - case TULIP_MEDIAINFO_GPR: { - break; - } - } - /* - * Try to send a packet. - */ - tulip_txprobe(sc); -} - -static void -tulip_media_select( - tulip_softc_t * const sc) -{ - if (sc->tulip_features & TULIP_HAVE_GPR) { - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET|sc->tulip_gpinit); - DELAY(10); - TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_gpdata); - } - /* - * If this board has no media, just return - */ - if (sc->tulip_features & TULIP_HAVE_NOMEDIA) - return; - - if (sc->tulip_media == TULIP_MEDIA_UNKNOWN) { - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - (*sc->tulip_boardsw->bd_media_poll)(sc, TULIP_MEDIAPOLL_START); - } else { - tulip_media_set(sc, sc->tulip_media); - } -} - -static void -tulip_21040_mediainfo_init( - tulip_softc_t * const sc, - tulip_media_t media) -{ - sc->tulip_cmdmode |= TULIP_CMD_CAPTREFFCT|TULIP_CMD_THRSHLD160 - |TULIP_CMD_BACKOFFCTR; - sc->tulip_ifp->if_baudrate = 10000000; - - if (media == TULIP_MEDIA_10BASET || media == TULIP_MEDIA_UNKNOWN) { - TULIP_MEDIAINFO_SIA_INIT(sc, &sc->tulip_mediainfo[0], 21040, 10BASET); - TULIP_MEDIAINFO_SIA_INIT(sc, &sc->tulip_mediainfo[1], 21040, 10BASET_FD); - sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL; - } - - if (media == TULIP_MEDIA_AUIBNC || media == TULIP_MEDIA_UNKNOWN) { - TULIP_MEDIAINFO_SIA_INIT(sc, &sc->tulip_mediainfo[2], 21040, AUIBNC); - } - - if (media == TULIP_MEDIA_UNKNOWN) { - TULIP_MEDIAINFO_SIA_INIT(sc, &sc->tulip_mediainfo[3], 21040, EXTSIA); - } -} - -static void -tulip_21040_media_probe( - tulip_softc_t * const sc) -{ - tulip_21040_mediainfo_init(sc, TULIP_MEDIA_UNKNOWN); - return; -} - -static void -tulip_21040_10baset_only_media_probe( - tulip_softc_t * const sc) -{ - tulip_21040_mediainfo_init(sc, TULIP_MEDIA_10BASET); - tulip_media_set(sc, TULIP_MEDIA_10BASET); - sc->tulip_media = TULIP_MEDIA_10BASET; -} - -static void -tulip_21040_10baset_only_media_select( - tulip_softc_t * const sc) -{ - sc->tulip_flags |= TULIP_LINKUP; - if (sc->tulip_media == TULIP_MEDIA_10BASET_FD) { - sc->tulip_cmdmode |= TULIP_CMD_FULLDUPLEX; - sc->tulip_flags &= ~TULIP_SQETEST; - } else { - sc->tulip_cmdmode &= ~TULIP_CMD_FULLDUPLEX; - sc->tulip_flags |= TULIP_SQETEST; - } - tulip_media_set(sc, sc->tulip_media); -} - -static void -tulip_21040_auibnc_only_media_probe( - tulip_softc_t * const sc) -{ - tulip_21040_mediainfo_init(sc, TULIP_MEDIA_AUIBNC); - sc->tulip_flags |= TULIP_SQETEST|TULIP_LINKUP; - tulip_media_set(sc, TULIP_MEDIA_AUIBNC); - sc->tulip_media = TULIP_MEDIA_AUIBNC; -} - -static void -tulip_21040_auibnc_only_media_select( - tulip_softc_t * const sc) -{ - tulip_media_set(sc, TULIP_MEDIA_AUIBNC); - sc->tulip_cmdmode &= ~TULIP_CMD_FULLDUPLEX; -} - -static const tulip_boardsw_t tulip_21040_boardsw = { - TULIP_21040_GENERIC, - tulip_21040_media_probe, - tulip_media_select, - tulip_media_poll, -}; - -static const tulip_boardsw_t tulip_21040_10baset_only_boardsw = { - TULIP_21040_GENERIC, - tulip_21040_10baset_only_media_probe, - tulip_21040_10baset_only_media_select, - NULL, -}; - -static const tulip_boardsw_t tulip_21040_auibnc_only_boardsw = { - TULIP_21040_GENERIC, - tulip_21040_auibnc_only_media_probe, - tulip_21040_auibnc_only_media_select, - NULL, -}; - -static void -tulip_21041_mediainfo_init( - tulip_softc_t * const sc) -{ - tulip_media_info_t * const mi = sc->tulip_mediainfo; - -#ifdef notyet - if (sc->tulip_revinfo >= 0x20) { - TULIP_MEDIAINFO_SIA_INIT(sc, &mi[0], 21041P2, 10BASET); - TULIP_MEDIAINFO_SIA_INIT(sc, &mi[1], 21041P2, 10BASET_FD); - TULIP_MEDIAINFO_SIA_INIT(sc, &mi[0], 21041P2, AUI); - TULIP_MEDIAINFO_SIA_INIT(sc, &mi[1], 21041P2, BNC); - return; - } -#endif - TULIP_MEDIAINFO_SIA_INIT(sc, &mi[0], 21041, 10BASET); - TULIP_MEDIAINFO_SIA_INIT(sc, &mi[1], 21041, 10BASET_FD); - TULIP_MEDIAINFO_SIA_INIT(sc, &mi[2], 21041, AUI); - TULIP_MEDIAINFO_SIA_INIT(sc, &mi[3], 21041, BNC); -} - -static void -tulip_21041_media_probe( - tulip_softc_t * const sc) -{ - sc->tulip_ifp->if_baudrate = 10000000; - sc->tulip_cmdmode |= TULIP_CMD_CAPTREFFCT|TULIP_CMD_ENHCAPTEFFCT - |TULIP_CMD_THRSHLD160|TULIP_CMD_BACKOFFCTR; - sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL; - tulip_21041_mediainfo_init(sc); -} - -static void -tulip_21041_media_poll( - tulip_softc_t * const sc, - const tulip_mediapoll_event_t event) -{ - u_int32_t sia_status; - -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_events[event]++; -#endif - - if (event == TULIP_MEDIAPOLL_LINKFAIL) { - if (sc->tulip_probe_state != TULIP_PROBE_INACTIVE - || !TULIP_DO_AUTOSENSE(sc)) - return; - sc->tulip_media = TULIP_MEDIA_UNKNOWN; - tulip_reset(sc); /* start probe */ - return; - } - - /* - * If we've been been asked to start a poll or link change interrupt - * restart the probe (and reset the tulip to a known state). - */ - if (event == TULIP_MEDIAPOLL_START) { - sc->tulip_ifp->if_flags |= IFF_OACTIVE; - sc->tulip_cmdmode &= ~(TULIP_CMD_FULLDUPLEX|TULIP_CMD_RXRUN); -#ifdef notyet - if (sc->tulip_revinfo >= 0x20) { - sc->tulip_cmdmode |= TULIP_CMD_FULLDUPLEX; - sc->tulip_flags |= TULIP_DIDNWAY; - } -#endif - TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode); - sc->tulip_probe_state = TULIP_PROBE_MEDIATEST; - sc->tulip_probe_media = TULIP_MEDIA_10BASET; - sc->tulip_probe_timeout = TULIP_21041_PROBE_10BASET_TIMEOUT; - tulip_media_set(sc, TULIP_MEDIA_10BASET); - tulip_timeout(sc); - return; - } - - if (sc->tulip_probe_state == TULIP_PROBE_INACTIVE) - return; - - if (event == TULIP_MEDIAPOLL_TXPROBE_OK) { -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txprobes_ok[sc->tulip_probe_media]++; -#endif - tulip_linkup(sc, sc->tulip_probe_media); - return; - } - - sia_status = TULIP_CSR_READ(sc, csr_sia_status); - TULIP_CSR_WRITE(sc, csr_sia_status, sia_status); - if ((sia_status & TULIP_SIASTS_LINKFAIL) == 0) { - if (sc->tulip_revinfo >= 0x20) { - if (sia_status & (PHYSTS_10BASET_FD << (16 - 6))) - sc->tulip_probe_media = TULIP_MEDIA_10BASET_FD; - } - /* - * If the link has passed LinkPass, 10baseT is the - * proper media to use. - */ - tulip_linkup(sc, sc->tulip_probe_media); - return; - } - - /* - * wait for up to 2.4 seconds for the link to reach pass state. - * Only then start scanning the other media for activity. - * choose media with receive activity over those without. - */ - if (sc->tulip_probe_media == TULIP_MEDIA_10BASET) { - if (event != TULIP_MEDIAPOLL_TIMER) - return; - if (sc->tulip_probe_timeout > 0 - && (sia_status & TULIP_SIASTS_OTHERRXACTIVITY) == 0) { - tulip_timeout(sc); - return; - } - sc->tulip_probe_timeout = TULIP_21041_PROBE_AUIBNC_TIMEOUT; - sc->tulip_flags |= TULIP_WANTRXACT; - if (sia_status & TULIP_SIASTS_OTHERRXACTIVITY) { - sc->tulip_probe_media = TULIP_MEDIA_BNC; - } else { - sc->tulip_probe_media = TULIP_MEDIA_AUI; - } - tulip_media_set(sc, sc->tulip_probe_media); - tulip_timeout(sc); - return; - } - - /* - * If we failed, clear the txprobe active flag. - */ - if (event == TULIP_MEDIAPOLL_TXPROBE_FAILED) - sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE; - - - if (event == TULIP_MEDIAPOLL_TIMER) { - /* - * If we've received something, then that's our link! - */ - if (sc->tulip_flags & TULIP_RXACT) { - tulip_linkup(sc, sc->tulip_probe_media); - return; - } - /* - * if no txprobe active - */ - if ((sc->tulip_flags & TULIP_TXPROBE_ACTIVE) == 0 - && ((sc->tulip_flags & TULIP_WANTRXACT) == 0 - || (sia_status & TULIP_SIASTS_RXACTIVITY))) { - sc->tulip_probe_timeout = TULIP_21041_PROBE_AUIBNC_TIMEOUT; - tulip_txprobe(sc); - tulip_timeout(sc); - return; - } - /* - * Take 2 passes through before deciding to not - * wait for receive activity. Then take another - * two passes before spitting out a warning. - */ - if (sc->tulip_probe_timeout <= 0) { - if (sc->tulip_flags & TULIP_WANTRXACT) { - sc->tulip_flags &= ~TULIP_WANTRXACT; - sc->tulip_probe_timeout = TULIP_21041_PROBE_AUIBNC_TIMEOUT; - } else { - if_printf(sc->tulip_ifp, - "autosense failed: cable problem?\n"); - if ((sc->tulip_ifp->if_flags & IFF_UP) == 0) { - sc->tulip_ifp->if_flags &= ~IFF_RUNNING; - sc->tulip_probe_state = TULIP_PROBE_INACTIVE; - return; - } - } - } - } - - /* - * Since this media failed to probe, try the other one. - */ - sc->tulip_probe_timeout = TULIP_21041_PROBE_AUIBNC_TIMEOUT; - if (sc->tulip_probe_media == TULIP_MEDIA_AUI) { - sc->tulip_probe_media = TULIP_MEDIA_BNC; - } else { - sc->tulip_probe_media = TULIP_MEDIA_AUI; - } - tulip_media_set(sc, sc->tulip_probe_media); - sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE; - tulip_timeout(sc); -} - -static const tulip_boardsw_t tulip_21041_boardsw = { - TULIP_21041_GENERIC, - tulip_21041_media_probe, - tulip_media_select, - tulip_21041_media_poll -}; - -static const tulip_phy_attr_t tulip_mii_phy_attrlist[] = { - { 0x20005c00, 0, /* 08-00-17 */ - { - { 0x19, 0x0040, 0x0040 }, /* 10TX */ - { 0x19, 0x0040, 0x0000 }, /* 100TX */ - }, -#if defined(TULIP_DEBUG) - "NS DP83840", -#endif - }, - { 0x0281F400, 0, /* 00-A0-7D */ - { - { 0x12, 0x0010, 0x0000 }, /* 10T */ - { }, /* 100TX */ - { 0x12, 0x0010, 0x0010 }, /* 100T4 */ - { 0x12, 0x0008, 0x0008 }, /* FULL_DUPLEX */ - }, -#if defined(TULIP_DEBUG) - "Seeq 80C240" -#endif - }, -#if 0 - { 0x0015F420, 0, /* 00-A0-7D */ - { - { 0x12, 0x0010, 0x0000 }, /* 10T */ - { }, /* 100TX */ - { 0x12, 0x0010, 0x0010 }, /* 100T4 */ - { 0x12, 0x0008, 0x0008 }, /* FULL_DUPLEX */ - }, -#if defined(TULIP_DEBUG) - "Broadcom BCM5000" -#endif - }, -#endif - { 0x0281F400, 0, /* 00-A0-BE */ - { - { 0x11, 0x8000, 0x0000 }, /* 10T */ - { 0x11, 0x8000, 0x8000 }, /* 100TX */ - { }, /* 100T4 */ - { 0x11, 0x4000, 0x4000 }, /* FULL_DUPLEX */ - }, -#if defined(TULIP_DEBUG) - "ICS 1890" -#endif - }, - { 0 } -}; - -static tulip_media_t -tulip_mii_phy_readspecific( - tulip_softc_t * const sc) -{ - const tulip_phy_attr_t *attr; - u_int16_t data; - u_int32_t id; - unsigned idx = 0; - static const tulip_media_t table[] = { - TULIP_MEDIA_UNKNOWN, - TULIP_MEDIA_10BASET, - TULIP_MEDIA_100BASETX, - TULIP_MEDIA_100BASET4, - TULIP_MEDIA_UNKNOWN, - TULIP_MEDIA_10BASET_FD, - TULIP_MEDIA_100BASETX_FD, - TULIP_MEDIA_UNKNOWN - }; - - /* - * Don't read phy specific registers if link is not up. - */ - data = tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_STATUS); - if ((data & (PHYSTS_LINK_UP|PHYSTS_EXTENDED_REGS)) != (PHYSTS_LINK_UP|PHYSTS_EXTENDED_REGS)) - return TULIP_MEDIA_UNKNOWN; - - id = (tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_IDLOW) << 16) | - tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_IDHIGH); - for (attr = tulip_mii_phy_attrlist;; attr++) { - if (attr->attr_id == 0) - return TULIP_MEDIA_UNKNOWN; - if ((id & ~0x0F) == attr->attr_id) - break; - } - - if (attr->attr_modes[PHY_MODE_100TX].pm_regno) { - const tulip_phy_modedata_t * const pm = &attr->attr_modes[PHY_MODE_100TX]; - data = tulip_mii_readreg(sc, sc->tulip_phyaddr, pm->pm_regno); - if ((data & pm->pm_mask) == pm->pm_value) - idx = 2; - } - if (idx == 0 && attr->attr_modes[PHY_MODE_100T4].pm_regno) { - const tulip_phy_modedata_t * const pm = &attr->attr_modes[PHY_MODE_100T4]; - data = tulip_mii_readreg(sc, sc->tulip_phyaddr, pm->pm_regno); - if ((data & pm->pm_mask) == pm->pm_value) - idx = 3; - } - if (idx == 0 && attr->attr_modes[PHY_MODE_10T].pm_regno) { - const tulip_phy_modedata_t * const pm = &attr->attr_modes[PHY_MODE_10T]; - data = tulip_mii_readreg(sc, sc->tulip_phyaddr, pm->pm_regno); - if ((data & pm->pm_mask) == pm->pm_value) - idx = 1; - } - if (idx != 0 && attr->attr_modes[PHY_MODE_FULLDUPLEX].pm_regno) { - const tulip_phy_modedata_t * const pm = &attr->attr_modes[PHY_MODE_FULLDUPLEX]; - data = tulip_mii_readreg(sc, sc->tulip_phyaddr, pm->pm_regno); - idx += ((data & pm->pm_mask) == pm->pm_value ? 4 : 0); - } - return table[idx]; -} - -static unsigned -tulip_mii_get_phyaddr( - tulip_softc_t * const sc, - unsigned offset) -{ - unsigned phyaddr; - - for (phyaddr = 1; phyaddr < 32; phyaddr++) { - unsigned status = tulip_mii_readreg(sc, phyaddr, PHYREG_STATUS); - if (status == 0 || status == 0xFFFF || status < PHYSTS_10BASET) - continue; - if (offset == 0) - return phyaddr; - offset--; - } - if (offset == 0) { - unsigned status = tulip_mii_readreg(sc, 0, PHYREG_STATUS); - if (status == 0 || status == 0xFFFF || status < PHYSTS_10BASET) - return TULIP_MII_NOPHY; - return 0; - } - return TULIP_MII_NOPHY; -} - -static int -tulip_mii_map_abilities( - tulip_softc_t * const sc, - unsigned abilities) -{ - sc->tulip_abilities = abilities; - if (abilities & PHYSTS_100BASETX_FD) { - sc->tulip_probe_media = TULIP_MEDIA_100BASETX_FD; - } else if (abilities & PHYSTS_100BASET4) { - sc->tulip_probe_media = TULIP_MEDIA_100BASET4; - } else if (abilities & PHYSTS_100BASETX) { - sc->tulip_probe_media = TULIP_MEDIA_100BASETX; - } else if (abilities & PHYSTS_10BASET_FD) { - sc->tulip_probe_media = TULIP_MEDIA_10BASET_FD; - } else if (abilities & PHYSTS_10BASET) { - sc->tulip_probe_media = TULIP_MEDIA_10BASET; - } else { - sc->tulip_probe_state = TULIP_PROBE_MEDIATEST; - return 0; - } - sc->tulip_probe_state = TULIP_PROBE_INACTIVE; - return 1; -} - -static void -tulip_mii_autonegotiate( - tulip_softc_t * const sc, - const unsigned phyaddr) -{ - struct ifnet *ifp = sc->tulip_ifp; - - switch (sc->tulip_probe_state) { - case TULIP_PROBE_MEDIATEST: - case TULIP_PROBE_INACTIVE: { - sc->tulip_flags |= TULIP_DIDNWAY; - tulip_mii_writereg(sc, phyaddr, PHYREG_CONTROL, PHYCTL_RESET); - sc->tulip_probe_timeout = 3000; - sc->tulip_intrmask |= TULIP_STS_ABNRMLINTR|TULIP_STS_NORMALINTR; - sc->tulip_probe_state = TULIP_PROBE_PHYRESET; - } - /* FALLTHROUGH */ - case TULIP_PROBE_PHYRESET: { - u_int32_t status; - u_int32_t data = tulip_mii_readreg(sc, phyaddr, PHYREG_CONTROL); - if (data & PHYCTL_RESET) { - if (sc->tulip_probe_timeout > 0) { - tulip_timeout(sc); - return; - } - printf("%s(phy%d): error: reset of PHY never completed!\n", - ifp->if_xname, phyaddr); - sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE; - sc->tulip_probe_state = TULIP_PROBE_FAILED; - sc->tulip_ifp->if_flags &= ~(IFF_UP|IFF_RUNNING); - return; - } - status = tulip_mii_readreg(sc, phyaddr, PHYREG_STATUS); - if ((status & PHYSTS_CAN_AUTONEG) == 0) { -#if defined(TULIP_DEBUG) - loudprintf("%s(phy%d): autonegotiation disabled\n", - ifp->if_xname, phyaddr); -#endif - sc->tulip_flags &= ~TULIP_DIDNWAY; - sc->tulip_probe_state = TULIP_PROBE_MEDIATEST; - return; - } - if (tulip_mii_readreg(sc, phyaddr, PHYREG_AUTONEG_ADVERTISEMENT) != ((status >> 6) | 0x01)) - tulip_mii_writereg(sc, phyaddr, PHYREG_AUTONEG_ADVERTISEMENT, (status >> 6) | 0x01); - tulip_mii_writereg(sc, phyaddr, PHYREG_CONTROL, data|PHYCTL_AUTONEG_RESTART|PHYCTL_AUTONEG_ENABLE); - data = tulip_mii_readreg(sc, phyaddr, PHYREG_CONTROL); -#if defined(TULIP_DEBUG) - if ((data & PHYCTL_AUTONEG_ENABLE) == 0) - loudprintf("%s(phy%d): oops: enable autonegotiation failed: 0x%04x\n", - ifp->if_xname, phyaddr, data); - else - loudprintf("%s(phy%d): autonegotiation restarted: 0x%04x\n", - ifp->if_xname, phyaddr, data); - sc->tulip_dbg.dbg_nway_starts++; -#endif - sc->tulip_probe_state = TULIP_PROBE_PHYAUTONEG; - sc->tulip_probe_timeout = 3000; - } - /* FALLTHROUGH */ - case TULIP_PROBE_PHYAUTONEG: { - u_int32_t status = tulip_mii_readreg(sc, phyaddr, PHYREG_STATUS); - u_int32_t data; - if ((status & PHYSTS_AUTONEG_DONE) == 0) { - if (sc->tulip_probe_timeout > 0) { - tulip_timeout(sc); - return; - } -#if defined(TULIP_DEBUG) - loudprintf("%s(phy%d): autonegotiation timeout: sts=0x%04x, ctl=0x%04x\n", - ifp->if_xname, phyaddr, status, - tulip_mii_readreg(sc, phyaddr, PHYREG_CONTROL)); -#endif - sc->tulip_flags &= ~TULIP_DIDNWAY; - sc->tulip_probe_state = TULIP_PROBE_MEDIATEST; - return; - } - data = tulip_mii_readreg(sc, phyaddr, PHYREG_AUTONEG_ABILITIES); -#if defined(TULIP_DEBUG) - loudprintf("%s(phy%d): autonegotiation complete: 0x%04x\n", - ifp->if_xname, phyaddr, data); -#endif - data = (data << 6) & status; - if (!tulip_mii_map_abilities(sc, data)) - sc->tulip_flags &= ~TULIP_DIDNWAY; - return; - } - default: { -#if defined(DIAGNOSTIC) - panic("tulip_media_poll: botch at line %d\n", __LINE__); -#endif - break; - } - } -#if defined(TULIP_DEBUG) - loudprintf("%s(phy%d): autonegotiation failure: state = %d\n", - ifp->if_xname, phyaddr, sc->tulip_probe_state); - sc->tulip_dbg.dbg_nway_failures++; -#endif -} - -static void -tulip_2114x_media_preset( - tulip_softc_t * const sc) -{ - const tulip_media_info_t *mi = NULL; - tulip_media_t media = sc->tulip_media; - - if (sc->tulip_probe_state == TULIP_PROBE_INACTIVE) - media = sc->tulip_media; - else - media = sc->tulip_probe_media; - - sc->tulip_cmdmode &= ~TULIP_CMD_PORTSELECT; - sc->tulip_flags &= ~TULIP_SQETEST; - if (media != TULIP_MEDIA_UNKNOWN && media != TULIP_MEDIA_MAX) { -#if defined(TULIP_DEBUG) - if (media < TULIP_MEDIA_MAX && sc->tulip_mediums[media] != NULL) { -#endif - mi = sc->tulip_mediums[media]; - if (mi->mi_type == TULIP_MEDIAINFO_MII) { - sc->tulip_cmdmode |= TULIP_CMD_PORTSELECT; - } else if (mi->mi_type == TULIP_MEDIAINFO_GPR - || mi->mi_type == TULIP_MEDIAINFO_SYM) { - sc->tulip_cmdmode &= ~TULIP_GPR_CMDBITS; - sc->tulip_cmdmode |= mi->mi_cmdmode; - } else if (mi->mi_type == TULIP_MEDIAINFO_SIA) { - TULIP_CSR_WRITE(sc, csr_sia_connectivity, TULIP_SIACONN_RESET); - } -#if defined(TULIP_DEBUG) - } else { - if_printf(sc->tulip_ifp, "preset: bad media %d!\n", media); - } -#endif - } - switch (media) { - case TULIP_MEDIA_BNC: - case TULIP_MEDIA_AUI: - case TULIP_MEDIA_10BASET: { - sc->tulip_cmdmode &= ~TULIP_CMD_FULLDUPLEX; - sc->tulip_cmdmode |= TULIP_CMD_TXTHRSHLDCTL; - sc->tulip_ifp->if_baudrate = 10000000; - sc->tulip_flags |= TULIP_SQETEST; - break; - } - case TULIP_MEDIA_10BASET_FD: { - sc->tulip_cmdmode |= TULIP_CMD_FULLDUPLEX|TULIP_CMD_TXTHRSHLDCTL; - sc->tulip_ifp->if_baudrate = 10000000; - break; - } - case TULIP_MEDIA_100BASEFX: - case TULIP_MEDIA_100BASET4: - case TULIP_MEDIA_100BASETX: { - sc->tulip_cmdmode &= ~(TULIP_CMD_FULLDUPLEX|TULIP_CMD_TXTHRSHLDCTL); - sc->tulip_cmdmode |= TULIP_CMD_PORTSELECT; - sc->tulip_ifp->if_baudrate = 100000000; - break; - } - case TULIP_MEDIA_100BASEFX_FD: - case TULIP_MEDIA_100BASETX_FD: { - sc->tulip_cmdmode |= TULIP_CMD_FULLDUPLEX|TULIP_CMD_PORTSELECT; - sc->tulip_cmdmode &= ~TULIP_CMD_TXTHRSHLDCTL; - sc->tulip_ifp->if_baudrate = 100000000; - break; - } - default: { - break; - } - } - TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode); -} - -/* - ******************************************************************** - * Start of 21140/21140A support which does not use the MII interface - */ - -static void -tulip_null_media_poll( - tulip_softc_t * const sc, - tulip_mediapoll_event_t event) -{ -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_events[event]++; -#endif -#if defined(DIAGNOSTIC) - if_printf(sc->tulip_ifp, "botch(media_poll) at line %d\n", __LINE__); -#endif -} - -__inline static void -tulip_21140_mediainit( - tulip_softc_t * const sc, - tulip_media_info_t * const mip, - tulip_media_t const media, - unsigned gpdata, - unsigned cmdmode) -{ - sc->tulip_mediums[media] = mip; - mip->mi_type = TULIP_MEDIAINFO_GPR; - mip->mi_cmdmode = cmdmode; - mip->mi_gpdata = gpdata; -} - -static void -tulip_21140_evalboard_media_probe( - tulip_softc_t * const sc) -{ - tulip_media_info_t *mip = sc->tulip_mediainfo; - - sc->tulip_gpinit = TULIP_GP_EB_PINS; - sc->tulip_gpdata = TULIP_GP_EB_INIT; - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EB_PINS); - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EB_INIT); - TULIP_CSR_WRITE(sc, csr_command, - TULIP_CSR_READ(sc, csr_command) | TULIP_CMD_PORTSELECT | - TULIP_CMD_PCSFUNCTION | TULIP_CMD_SCRAMBLER | TULIP_CMD_MUSTBEONE); - TULIP_CSR_WRITE(sc, csr_command, - TULIP_CSR_READ(sc, csr_command) & ~TULIP_CMD_TXTHRSHLDCTL); - DELAY(1000000); - if ((TULIP_CSR_READ(sc, csr_gp) & TULIP_GP_EB_OK100) != 0) { - sc->tulip_media = TULIP_MEDIA_10BASET; - } else { - sc->tulip_media = TULIP_MEDIA_100BASETX; - } - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET, - TULIP_GP_EB_INIT, - TULIP_CMD_TXTHRSHLDCTL); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET_FD, - TULIP_GP_EB_INIT, - TULIP_CMD_TXTHRSHLDCTL|TULIP_CMD_FULLDUPLEX); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX, - TULIP_GP_EB_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD, - TULIP_GP_EB_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER|TULIP_CMD_FULLDUPLEX); -} - -static const tulip_boardsw_t tulip_21140_eb_boardsw = { - TULIP_21140_DEC_EB, - tulip_21140_evalboard_media_probe, - tulip_media_select, - tulip_null_media_poll, - tulip_2114x_media_preset, -}; - -static void -tulip_21140_accton_media_probe( - tulip_softc_t * const sc) -{ - tulip_media_info_t *mip = sc->tulip_mediainfo; - unsigned gpdata; - - sc->tulip_gpinit = TULIP_GP_EB_PINS; - sc->tulip_gpdata = TULIP_GP_EB_INIT; - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EB_PINS); - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EB_INIT); - TULIP_CSR_WRITE(sc, csr_command, - TULIP_CSR_READ(sc, csr_command) | TULIP_CMD_PORTSELECT | - TULIP_CMD_PCSFUNCTION | TULIP_CMD_SCRAMBLER | TULIP_CMD_MUSTBEONE); - TULIP_CSR_WRITE(sc, csr_command, - TULIP_CSR_READ(sc, csr_command) & ~TULIP_CMD_TXTHRSHLDCTL); - DELAY(1000000); - gpdata = TULIP_CSR_READ(sc, csr_gp); - if ((gpdata & TULIP_GP_EN1207_UTP_INIT) == 0) { - sc->tulip_media = TULIP_MEDIA_10BASET; - } else { - if ((gpdata & TULIP_GP_EN1207_BNC_INIT) == 0) { - sc->tulip_media = TULIP_MEDIA_BNC; - } else { - sc->tulip_media = TULIP_MEDIA_100BASETX; - } - } - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_BNC, - TULIP_GP_EN1207_BNC_INIT, - TULIP_CMD_TXTHRSHLDCTL); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET, - TULIP_GP_EN1207_UTP_INIT, - TULIP_CMD_TXTHRSHLDCTL); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET_FD, - TULIP_GP_EN1207_UTP_INIT, - TULIP_CMD_TXTHRSHLDCTL|TULIP_CMD_FULLDUPLEX); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX, - TULIP_GP_EN1207_100_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD, - TULIP_GP_EN1207_100_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER|TULIP_CMD_FULLDUPLEX); -} - -static const tulip_boardsw_t tulip_21140_accton_boardsw = { - TULIP_21140_EN1207, - tulip_21140_accton_media_probe, - tulip_media_select, - tulip_null_media_poll, - tulip_2114x_media_preset, -}; - -static void -tulip_21140_smc9332_media_probe( - tulip_softc_t * const sc) -{ - tulip_media_info_t *mip = sc->tulip_mediainfo; - int idx, cnt = 0; - - TULIP_CSR_WRITE(sc, csr_command, TULIP_CMD_PORTSELECT|TULIP_CMD_MUSTBEONE); - TULIP_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET); - DELAY(10); /* Wait 10 microseconds (actually 50 PCI cycles but at - 33MHz that comes to two microseconds but wait a - bit longer anyways) */ - TULIP_CSR_WRITE(sc, csr_command, TULIP_CMD_PORTSELECT | - TULIP_CMD_PCSFUNCTION | TULIP_CMD_SCRAMBLER | TULIP_CMD_MUSTBEONE); - sc->tulip_gpinit = TULIP_GP_SMC_9332_PINS; - sc->tulip_gpdata = TULIP_GP_SMC_9332_INIT; - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_SMC_9332_PINS|TULIP_GP_PINSET); - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_SMC_9332_INIT); - DELAY(200000); - for (idx = 1000; idx > 0; idx--) { - u_int32_t csr = TULIP_CSR_READ(sc, csr_gp); - if ((csr & (TULIP_GP_SMC_9332_OK10|TULIP_GP_SMC_9332_OK100)) == (TULIP_GP_SMC_9332_OK10|TULIP_GP_SMC_9332_OK100)) { - if (++cnt > 100) - break; - } else if ((csr & TULIP_GP_SMC_9332_OK10) == 0) { - break; - } else { - cnt = 0; - } - DELAY(1000); - } - sc->tulip_media = cnt > 100 ? TULIP_MEDIA_100BASETX : TULIP_MEDIA_10BASET; - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX, - TULIP_GP_SMC_9332_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD, - TULIP_GP_SMC_9332_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER|TULIP_CMD_FULLDUPLEX); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET, - TULIP_GP_SMC_9332_INIT, - TULIP_CMD_TXTHRSHLDCTL); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET_FD, - TULIP_GP_SMC_9332_INIT, - TULIP_CMD_TXTHRSHLDCTL|TULIP_CMD_FULLDUPLEX); -} - -static const tulip_boardsw_t tulip_21140_smc9332_boardsw = { - TULIP_21140_SMC_9332, - tulip_21140_smc9332_media_probe, - tulip_media_select, - tulip_null_media_poll, - tulip_2114x_media_preset, -}; - -static void -tulip_21140_cogent_em100_media_probe( - tulip_softc_t * const sc) -{ - tulip_media_info_t *mip = sc->tulip_mediainfo; - u_int32_t cmdmode = TULIP_CSR_READ(sc, csr_command); - - sc->tulip_gpinit = TULIP_GP_EM100_PINS; - sc->tulip_gpdata = TULIP_GP_EM100_INIT; - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EM100_PINS); - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EM100_INIT); - - cmdmode = TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION|TULIP_CMD_MUSTBEONE; - cmdmode &= ~(TULIP_CMD_TXTHRSHLDCTL|TULIP_CMD_SCRAMBLER); - if (sc->tulip_rombuf[32] == TULIP_COGENT_EM100FX_ID) { - TULIP_CSR_WRITE(sc, csr_command, cmdmode); - sc->tulip_media = TULIP_MEDIA_100BASEFX; - - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASEFX, - TULIP_GP_EM100_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASEFX_FD, - TULIP_GP_EM100_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_FULLDUPLEX); - } else { - TULIP_CSR_WRITE(sc, csr_command, cmdmode|TULIP_CMD_SCRAMBLER); - sc->tulip_media = TULIP_MEDIA_100BASETX; - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX, - TULIP_GP_EM100_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD, - TULIP_GP_EM100_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER|TULIP_CMD_FULLDUPLEX); - } -} - -static const tulip_boardsw_t tulip_21140_cogent_em100_boardsw = { - TULIP_21140_COGENT_EM100, - tulip_21140_cogent_em100_media_probe, - tulip_media_select, - tulip_null_media_poll, - tulip_2114x_media_preset -}; - -static void -tulip_21140_znyx_zx34x_media_probe( - tulip_softc_t * const sc) -{ - tulip_media_info_t *mip = sc->tulip_mediainfo; - int cnt10 = 0, cnt100 = 0, idx; - - sc->tulip_gpinit = TULIP_GP_ZX34X_PINS; - sc->tulip_gpdata = TULIP_GP_ZX34X_INIT; - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_ZX34X_PINS); - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_ZX34X_INIT); - TULIP_CSR_WRITE(sc, csr_command, - TULIP_CSR_READ(sc, csr_command) | TULIP_CMD_PORTSELECT | - TULIP_CMD_PCSFUNCTION | TULIP_CMD_SCRAMBLER | TULIP_CMD_MUSTBEONE); - TULIP_CSR_WRITE(sc, csr_command, - TULIP_CSR_READ(sc, csr_command) & ~TULIP_CMD_TXTHRSHLDCTL); - - DELAY(200000); - for (idx = 1000; idx > 0; idx--) { - u_int32_t csr = TULIP_CSR_READ(sc, csr_gp); - if ((csr & (TULIP_GP_ZX34X_LNKFAIL|TULIP_GP_ZX34X_SYMDET|TULIP_GP_ZX34X_SIGDET)) == (TULIP_GP_ZX34X_LNKFAIL|TULIP_GP_ZX34X_SYMDET|TULIP_GP_ZX34X_SIGDET)) { - if (++cnt100 > 100) - break; - } else if ((csr & TULIP_GP_ZX34X_LNKFAIL) == 0) { - if (++cnt10 > 100) - break; - } else { - cnt10 = 0; - cnt100 = 0; - } - DELAY(1000); - } - sc->tulip_media = cnt100 > 100 ? TULIP_MEDIA_100BASETX : TULIP_MEDIA_10BASET; - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET, - TULIP_GP_ZX34X_INIT, - TULIP_CMD_TXTHRSHLDCTL); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET_FD, - TULIP_GP_ZX34X_INIT, - TULIP_CMD_TXTHRSHLDCTL|TULIP_CMD_FULLDUPLEX); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX, - TULIP_GP_ZX34X_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER); - tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD, - TULIP_GP_ZX34X_INIT, - TULIP_CMD_PORTSELECT|TULIP_CMD_PCSFUNCTION - |TULIP_CMD_SCRAMBLER|TULIP_CMD_FULLDUPLEX); -} - -static const tulip_boardsw_t tulip_21140_znyx_zx34x_boardsw = { - TULIP_21140_ZNYX_ZX34X, - tulip_21140_znyx_zx34x_media_probe, - tulip_media_select, - tulip_null_media_poll, - tulip_2114x_media_preset, -}; - -static void -tulip_2114x_media_probe( - tulip_softc_t * const sc) -{ - sc->tulip_cmdmode |= TULIP_CMD_MUSTBEONE - |TULIP_CMD_BACKOFFCTR|TULIP_CMD_THRSHLD72; -} - -static const tulip_boardsw_t tulip_2114x_isv_boardsw = { - TULIP_21140_ISV, - tulip_2114x_media_probe, - tulip_media_select, - tulip_media_poll, - tulip_2114x_media_preset, -}; - -/* - * ******** END of chip-specific handlers. *********** - */ - -/* - * Code the read the SROM and MII bit streams (I2C) - */ -#define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0) - -static void -tulip_srom_idle( - tulip_softc_t * const sc) -{ - unsigned bit, csr; - - csr = SROMSEL ; EMIT; - csr = SROMSEL | SROMRD; EMIT; - csr ^= SROMCS; EMIT; - csr ^= SROMCLKON; EMIT; - - /* - * Write 25 cycles of 0 which will force the SROM to be idle. - */ - for (bit = 3 + SROM_BITWIDTH + 16; bit > 0; bit--) { - csr ^= SROMCLKOFF; EMIT; /* clock low; data not valid */ - csr ^= SROMCLKON; EMIT; /* clock high; data valid */ - } - csr ^= SROMCLKOFF; EMIT; - csr ^= SROMCS; EMIT; - csr = 0; EMIT; -} - - -static void -tulip_srom_read( - tulip_softc_t * const sc) -{ - unsigned idx; - const unsigned bitwidth = SROM_BITWIDTH; - const unsigned cmdmask = (SROMCMD_RD << bitwidth); - const unsigned msb = 1 << (bitwidth + 3 - 1); - unsigned lastidx = (1 << bitwidth) - 1; - - tulip_srom_idle(sc); - - for (idx = 0; idx <= lastidx; idx++) { - unsigned lastbit, data, bits, bit, csr; - csr = SROMSEL ; EMIT; - csr = SROMSEL | SROMRD; EMIT; - csr ^= SROMCSON; EMIT; - csr ^= SROMCLKON; EMIT; - - lastbit = 0; - for (bits = idx|cmdmask, bit = bitwidth + 3; bit > 0; bit--, bits <<= 1) { - const unsigned thisbit = bits & msb; - csr ^= SROMCLKOFF; EMIT; /* clock low; data not valid */ - if (thisbit != lastbit) { - csr ^= SROMDOUT; EMIT; /* clock low; invert data */ - } else { - EMIT; - } - csr ^= SROMCLKON; EMIT; /* clock high; data valid */ - lastbit = thisbit; - } - csr ^= SROMCLKOFF; EMIT; - - for (data = 0, bits = 0; bits < 16; bits++) { - data <<= 1; - csr ^= SROMCLKON; EMIT; /* clock high; data valid */ - data |= TULIP_CSR_READ(sc, csr_srom_mii) & SROMDIN ? 1 : 0; - csr ^= SROMCLKOFF; EMIT; /* clock low; data not valid */ - } - sc->tulip_rombuf[idx*2] = data & 0xFF; - sc->tulip_rombuf[idx*2+1] = data >> 8; - csr = SROMSEL | SROMRD; EMIT; - csr = 0; EMIT; - } - tulip_srom_idle(sc); -} - -#define MII_EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0) - -static void -tulip_mii_writebits( - tulip_softc_t * const sc, - unsigned data, - unsigned bits) -{ - unsigned msb = 1 << (bits - 1); - unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); - unsigned lastbit = (csr & MII_DOUT) ? msb : 0; - - csr |= MII_WR; MII_EMIT; /* clock low; assert write */ - - for (; bits > 0; bits--, data <<= 1) { - const unsigned thisbit = data & msb; - if (thisbit != lastbit) { - csr ^= MII_DOUT; MII_EMIT; /* clock low; invert data */ - } - csr ^= MII_CLKON; MII_EMIT; /* clock high; data valid */ - lastbit = thisbit; - csr ^= MII_CLKOFF; MII_EMIT; /* clock low; data not valid */ - } -} - -static void -tulip_mii_turnaround( - tulip_softc_t * const sc, - unsigned cmd) -{ - unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); - - if (cmd == MII_WRCMD) { - csr |= MII_DOUT; MII_EMIT; /* clock low; change data */ - csr ^= MII_CLKON; MII_EMIT; /* clock high; data valid */ - csr ^= MII_CLKOFF; MII_EMIT; /* clock low; data not valid */ - csr ^= MII_DOUT; MII_EMIT; /* clock low; change data */ - } else { - csr |= MII_RD; MII_EMIT; /* clock low; switch to read */ - } - csr ^= MII_CLKON; MII_EMIT; /* clock high; data valid */ - csr ^= MII_CLKOFF; MII_EMIT; /* clock low; data not valid */ -} - -static unsigned -tulip_mii_readbits( - tulip_softc_t * const sc) -{ - unsigned data; - unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); - int idx; - - for (idx = 0, data = 0; idx < 16; idx++) { - data <<= 1; /* this is NOOP on the first pass through */ - csr ^= MII_CLKON; MII_EMIT; /* clock high; data valid */ - if (TULIP_CSR_READ(sc, csr_srom_mii) & MII_DIN) - data |= 1; - csr ^= MII_CLKOFF; MII_EMIT; /* clock low; data not valid */ - } - csr ^= MII_RD; MII_EMIT; /* clock low; turn off read */ - - return data; -} - -static unsigned -tulip_mii_readreg( - tulip_softc_t * const sc, - unsigned devaddr, - unsigned regno) -{ - unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); - unsigned data; - - csr &= ~(MII_RD|MII_CLK); MII_EMIT; - tulip_mii_writebits(sc, MII_PREAMBLE, 32); - tulip_mii_writebits(sc, MII_RDCMD, 8); - tulip_mii_writebits(sc, devaddr, 5); - tulip_mii_writebits(sc, regno, 5); - tulip_mii_turnaround(sc, MII_RDCMD); - - data = tulip_mii_readbits(sc); -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_phyregs[regno][0] = data; - sc->tulip_dbg.dbg_phyregs[regno][1]++; -#endif - return data; -} - -static void -tulip_mii_writereg( - tulip_softc_t * const sc, - unsigned devaddr, - unsigned regno, - unsigned data) -{ - unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK); - csr &= ~(MII_RD|MII_CLK); MII_EMIT; - tulip_mii_writebits(sc, MII_PREAMBLE, 32); - tulip_mii_writebits(sc, MII_WRCMD, 8); - tulip_mii_writebits(sc, devaddr, 5); - tulip_mii_writebits(sc, regno, 5); - tulip_mii_turnaround(sc, MII_WRCMD); - tulip_mii_writebits(sc, data, 16); -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_phyregs[regno][2] = data; - sc->tulip_dbg.dbg_phyregs[regno][3]++; -#endif -} - -#define tulip_mchash(mca) (ether_crc32_le(mca, 6) & 0x1FF) -#define tulip_srom_crcok(databuf) ( \ - ((ether_crc32_le(databuf, 126) & 0xFFFFU) ^ 0xFFFFU) == \ - ((databuf)[126] | ((databuf)[127] << 8))) - -static void -tulip_identify_dec_nic( - tulip_softc_t * const sc) -{ - strcpy(sc->tulip_boardid, "DEC "); -#define D0 4 - if (sc->tulip_chipid <= TULIP_21040) - return; - if (bcmp(sc->tulip_rombuf + 29, "DE500", 5) == 0 - || bcmp(sc->tulip_rombuf + 29, "DE450", 5) == 0) { - bcopy(sc->tulip_rombuf + 29, &sc->tulip_boardid[D0], 8); - sc->tulip_boardid[D0+8] = ' '; - } -#undef D0 -} - -static void -tulip_identify_znyx_nic( - tulip_softc_t * const sc) -{ - unsigned id = 0; - strcpy(sc->tulip_boardid, "ZNYX ZX3XX "); - if (sc->tulip_chipid == TULIP_21140 || sc->tulip_chipid == TULIP_21140A) { - unsigned znyx_ptr; - sc->tulip_boardid[8] = '4'; - znyx_ptr = sc->tulip_rombuf[124] + 256 * sc->tulip_rombuf[125]; - if (znyx_ptr < 26 || znyx_ptr > 116) { - sc->tulip_boardsw = &tulip_21140_znyx_zx34x_boardsw; - return; - } - /* ZX344 = 0010 .. 0013FF - */ - if (sc->tulip_rombuf[znyx_ptr] == 0x4A - && sc->tulip_rombuf[znyx_ptr + 1] == 0x52 - && sc->tulip_rombuf[znyx_ptr + 2] == 0x01) { - id = sc->tulip_rombuf[znyx_ptr + 5] + 256 * sc->tulip_rombuf[znyx_ptr + 4]; - if ((id >> 8) == (TULIP_ZNYX_ID_ZX342 >> 8)) { - sc->tulip_boardid[9] = '2'; - if (id == TULIP_ZNYX_ID_ZX342B) { - sc->tulip_boardid[10] = 'B'; - sc->tulip_boardid[11] = ' '; - } - sc->tulip_boardsw = &tulip_21140_znyx_zx34x_boardsw; - } else if (id == TULIP_ZNYX_ID_ZX344) { - sc->tulip_boardid[10] = '4'; - sc->tulip_boardsw = &tulip_21140_znyx_zx34x_boardsw; - } else if (id == TULIP_ZNYX_ID_ZX345) { - sc->tulip_boardid[9] = (sc->tulip_rombuf[19] > 1) ? '8' : '5'; - } else if (id == TULIP_ZNYX_ID_ZX346) { - sc->tulip_boardid[9] = '6'; - } else if (id == TULIP_ZNYX_ID_ZX351) { - sc->tulip_boardid[8] = '5'; - sc->tulip_boardid[9] = '1'; - } - } - if (id == 0) { - /* - * Assume it's a ZX342... - */ - sc->tulip_boardsw = &tulip_21140_znyx_zx34x_boardsw; - } - return; - } - sc->tulip_boardid[8] = '1'; - if (sc->tulip_chipid == TULIP_21041) { - sc->tulip_boardid[10] = '1'; - return; - } - if (sc->tulip_rombuf[32] == 0x4A && sc->tulip_rombuf[33] == 0x52) { - id = sc->tulip_rombuf[37] + 256 * sc->tulip_rombuf[36]; - if (id == TULIP_ZNYX_ID_ZX312T) { - sc->tulip_boardid[9] = '2'; - sc->tulip_boardid[10] = 'T'; - sc->tulip_boardid[11] = ' '; - sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw; - } else if (id == TULIP_ZNYX_ID_ZX314_INTA) { - sc->tulip_boardid[9] = '4'; - sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw; - sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM; - } else if (id == TULIP_ZNYX_ID_ZX314) { - sc->tulip_boardid[9] = '4'; - sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw; - sc->tulip_features |= TULIP_HAVE_BASEROM; - } else if (id == TULIP_ZNYX_ID_ZX315_INTA) { - sc->tulip_boardid[9] = '5'; - sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM; - } else if (id == TULIP_ZNYX_ID_ZX315) { - sc->tulip_boardid[9] = '5'; - sc->tulip_features |= TULIP_HAVE_BASEROM; - } else { - id = 0; - } - } - if (id == 0) { - if ((sc->tulip_enaddr[3] & ~3) == 0xF0 && (sc->tulip_enaddr[5] & 2) == 0) { - sc->tulip_boardid[9] = '4'; - sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw; - sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM; - } else if ((sc->tulip_enaddr[3] & ~3) == 0xF4 && (sc->tulip_enaddr[5] & 1) == 0) { - sc->tulip_boardid[9] = '5'; - sc->tulip_boardsw = &tulip_21040_boardsw; - sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM; - } else if ((sc->tulip_enaddr[3] & ~3) == 0xEC) { - sc->tulip_boardid[9] = '2'; - sc->tulip_boardsw = &tulip_21040_boardsw; - } - } -} - -static void -tulip_identify_smc_nic( - tulip_softc_t * const sc) -{ - u_int32_t id1, id2, ei; - int auibnc = 0, utp = 0; - char *cp; - - strcpy(sc->tulip_boardid, "SMC "); - if (sc->tulip_chipid == TULIP_21041) - return; - if (sc->tulip_chipid != TULIP_21040) { - if (sc->tulip_boardsw != &tulip_2114x_isv_boardsw) { - strcpy(&sc->tulip_boardid[4], "9332DST "); - sc->tulip_boardsw = &tulip_21140_smc9332_boardsw; - } else if (sc->tulip_features & (TULIP_HAVE_BASEROM|TULIP_HAVE_SLAVEDROM)) { - strcpy(&sc->tulip_boardid[4], "9334BDT "); - } else { - strcpy(&sc->tulip_boardid[4], "9332BDT "); - } - return; - } - id1 = sc->tulip_rombuf[0x60] | (sc->tulip_rombuf[0x61] << 8); - id2 = sc->tulip_rombuf[0x62] | (sc->tulip_rombuf[0x63] << 8); - ei = sc->tulip_rombuf[0x66] | (sc->tulip_rombuf[0x67] << 8); - - strcpy(&sc->tulip_boardid[4], "8432"); - cp = &sc->tulip_boardid[8]; - if ((id1 & 1) == 0) - *cp++ = 'B', auibnc = 1; - if ((id1 & 0xFF) > 0x32) - *cp++ = 'T', utp = 1; - if ((id1 & 0x4000) == 0) - *cp++ = 'A', auibnc = 1; - if (id2 == 0x15) { - sc->tulip_boardid[7] = '4'; - *cp++ = '-'; - *cp++ = 'C'; - *cp++ = 'H'; - *cp++ = (ei ? '2' : '1'); - } - *cp++ = ' '; - *cp = '\0'; - if (utp && !auibnc) - sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw; - else if (!utp && auibnc) - sc->tulip_boardsw = &tulip_21040_auibnc_only_boardsw; -} - -static void -tulip_identify_cogent_nic( - tulip_softc_t * const sc) -{ - strcpy(sc->tulip_boardid, "Cogent "); - if (sc->tulip_chipid == TULIP_21140 || sc->tulip_chipid == TULIP_21140A) { - if (sc->tulip_rombuf[32] == TULIP_COGENT_EM100TX_ID) { - strcat(sc->tulip_boardid, "EM100TX "); - sc->tulip_boardsw = &tulip_21140_cogent_em100_boardsw; -#if defined(TULIP_COGENT_EM110TX_ID) - } else if (sc->tulip_rombuf[32] == TULIP_COGENT_EM110TX_ID) { - strcat(sc->tulip_boardid, "EM110TX "); - sc->tulip_boardsw = &tulip_21140_cogent_em100_boardsw; -#endif - } else if (sc->tulip_rombuf[32] == TULIP_COGENT_EM100FX_ID) { - strcat(sc->tulip_boardid, "EM100FX "); - sc->tulip_boardsw = &tulip_21140_cogent_em100_boardsw; - } - /* - * Magic number (0x24001109U) is the SubVendor (0x2400) and - * SubDevId (0x1109) for the ANA6944TX (EM440TX). - */ - if (*(u_int32_t *) sc->tulip_rombuf == 0x24001109U - && (sc->tulip_features & TULIP_HAVE_BASEROM)) { - /* - * Cogent (Adaptec) is still mapping all INTs to INTA of - * first 21140. Dumb! Dumb! - */ - strcat(sc->tulip_boardid, "EM440TX "); - sc->tulip_features |= TULIP_HAVE_SHAREDINTR; - } - } else if (sc->tulip_chipid == TULIP_21040) { - sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM; - } -} - -static void -tulip_identify_accton_nic( - tulip_softc_t * const sc) -{ - strcpy(sc->tulip_boardid, "ACCTON "); - switch (sc->tulip_chipid) { - case TULIP_21140A: - strcat(sc->tulip_boardid, "EN1207 "); - if (sc->tulip_boardsw != &tulip_2114x_isv_boardsw) - sc->tulip_boardsw = &tulip_21140_accton_boardsw; - break; - case TULIP_21140: - strcat(sc->tulip_boardid, "EN1207TX "); - if (sc->tulip_boardsw != &tulip_2114x_isv_boardsw) - sc->tulip_boardsw = &tulip_21140_eb_boardsw; - break; - case TULIP_21040: - strcat(sc->tulip_boardid, "EN1203 "); - sc->tulip_boardsw = &tulip_21040_boardsw; - break; - case TULIP_21041: - strcat(sc->tulip_boardid, "EN1203 "); - sc->tulip_boardsw = &tulip_21041_boardsw; - break; - default: - sc->tulip_boardsw = &tulip_2114x_isv_boardsw; - break; - } -} - -static void -tulip_identify_asante_nic( - tulip_softc_t * const sc) -{ - strcpy(sc->tulip_boardid, "Asante "); - if ((sc->tulip_chipid == TULIP_21140 || sc->tulip_chipid == TULIP_21140A) - && sc->tulip_boardsw != &tulip_2114x_isv_boardsw) { - tulip_media_info_t *mi = sc->tulip_mediainfo; - int idx; - /* - * The Asante Fast Ethernet doesn't always ship with a valid - * new format SROM. So if isn't in the new format, we cheat - * set it up as if we had. - */ - - sc->tulip_gpinit = TULIP_GP_ASANTE_PINS; - sc->tulip_gpdata = 0; - - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_ASANTE_PINS|TULIP_GP_PINSET); - TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_ASANTE_PHYRESET); - DELAY(100); - TULIP_CSR_WRITE(sc, csr_gp, 0); - - mi->mi_type = TULIP_MEDIAINFO_MII; - mi->mi_gpr_length = 0; - mi->mi_gpr_offset = 0; - mi->mi_reset_length = 0; - mi->mi_reset_offset = 0;; - - mi->mi_phyaddr = TULIP_MII_NOPHY; - for (idx = 20; idx > 0 && mi->mi_phyaddr == TULIP_MII_NOPHY; idx--) { - DELAY(10000); - mi->mi_phyaddr = tulip_mii_get_phyaddr(sc, 0); - } - if (mi->mi_phyaddr == TULIP_MII_NOPHY) { - if_printf(sc->tulip_ifp, "can't find phy 0\n"); - return; - } - - sc->tulip_features |= TULIP_HAVE_MII; - mi->mi_capabilities = PHYSTS_10BASET|PHYSTS_10BASET_FD|PHYSTS_100BASETX|PHYSTS_100BASETX_FD; - mi->mi_advertisement = PHYSTS_10BASET|PHYSTS_10BASET_FD|PHYSTS_100BASETX|PHYSTS_100BASETX_FD; - mi->mi_full_duplex = PHYSTS_10BASET_FD|PHYSTS_100BASETX_FD; - mi->mi_tx_threshold = PHYSTS_10BASET|PHYSTS_10BASET_FD; - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX_FD); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASET4); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET_FD); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET); - mi->mi_phyid = (tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDLOW) << 16) | - tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDHIGH); - - sc->tulip_boardsw = &tulip_2114x_isv_boardsw; - } -} - -static void -tulip_identify_compex_nic( - tulip_softc_t * const sc) -{ - strcpy(sc->tulip_boardid, "COMPEX "); - if (sc->tulip_chipid == TULIP_21140A) { - int root_unit; - tulip_softc_t *root_sc = NULL; - - strcat(sc->tulip_boardid, "400TX/PCI "); - /* - * All 4 chips on these boards share an interrupt. This code - * copied from tulip_read_macaddr. - */ - sc->tulip_features |= TULIP_HAVE_SHAREDINTR; - for (root_unit = sc->tulip_unit - 1; root_unit >= 0; root_unit--) { - root_sc = tulips[root_unit]; - if (root_sc == NULL - || !(root_sc->tulip_features & TULIP_HAVE_SLAVEDINTR)) - break; - root_sc = NULL; - } - if (root_sc != NULL - && root_sc->tulip_chipid == sc->tulip_chipid - && root_sc->tulip_pci_busno == sc->tulip_pci_busno) { - sc->tulip_features |= TULIP_HAVE_SLAVEDINTR; - sc->tulip_slaves = root_sc->tulip_slaves; - root_sc->tulip_slaves = sc; - } else if(sc->tulip_features & TULIP_HAVE_SLAVEDINTR) { - printf("\nCannot find master device for %s interrupts", - sc->tulip_ifp->if_xname); - } - } else { - strcat(sc->tulip_boardid, "unknown "); - } - /* sc->tulip_boardsw = &tulip_21140_eb_boardsw; */ - return; -} - -static int -tulip_srom_decode( - tulip_softc_t * const sc) -{ - unsigned idx1, idx2, idx3; - - const tulip_srom_header_t *shp = (const tulip_srom_header_t *) &sc->tulip_rombuf[0]; - const tulip_srom_adapter_info_t *saip = (const tulip_srom_adapter_info_t *) (shp + 1); - tulip_srom_media_t srom_media; - tulip_media_info_t *mi = sc->tulip_mediainfo; - const u_int8_t *dp; - u_int32_t leaf_offset, blocks, data; - - for (idx1 = 0; idx1 < shp->sh_adapter_count; idx1++, saip++) { - if (shp->sh_adapter_count == 1) - break; - if (saip->sai_device == sc->tulip_pci_devno) - break; - } - /* - * Didn't find the right media block for this card. - */ - if (idx1 == shp->sh_adapter_count) - return 0; - - /* - * Save the hardware address. - */ - bcopy(shp->sh_ieee802_address, sc->tulip_enaddr, 6); - /* - * If this is a multiple port card, add the adapter index to the last - * byte of the hardware address. (if it isn't multiport, adding 0 - * won't hurt. - */ - sc->tulip_enaddr[5] += idx1; - - leaf_offset = saip->sai_leaf_offset_lowbyte - + saip->sai_leaf_offset_highbyte * 256; - dp = sc->tulip_rombuf + leaf_offset; - - sc->tulip_conntype = (tulip_srom_connection_t) (dp[0] + dp[1] * 256); dp += 2; - - for (idx2 = 0;; idx2++) { - if (tulip_srom_conninfo[idx2].sc_type == sc->tulip_conntype - || tulip_srom_conninfo[idx2].sc_type == TULIP_SROM_CONNTYPE_NOT_USED) - break; - } - sc->tulip_connidx = idx2; - - if (sc->tulip_chipid == TULIP_21041) { - blocks = *dp++; - for (idx2 = 0; idx2 < blocks; idx2++) { - tulip_media_t media; - data = *dp++; - srom_media = (tulip_srom_media_t) (data & 0x3F); - for (idx3 = 0; tulip_srom_mediums[idx3].sm_type != TULIP_MEDIA_UNKNOWN; idx3++) { - if (tulip_srom_mediums[idx3].sm_srom_type == srom_media) - break; - } - media = tulip_srom_mediums[idx3].sm_type; - if (media != TULIP_MEDIA_UNKNOWN) { - if (data & TULIP_SROM_21041_EXTENDED) { - mi->mi_type = TULIP_MEDIAINFO_SIA; - sc->tulip_mediums[media] = mi; - mi->mi_sia_connectivity = dp[0] + dp[1] * 256; - mi->mi_sia_tx_rx = dp[2] + dp[3] * 256; - mi->mi_sia_general = dp[4] + dp[5] * 256; - mi++; - } else { - switch (media) { - case TULIP_MEDIA_BNC: { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, BNC); - mi++; - break; - } - case TULIP_MEDIA_AUI: { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, AUI); - mi++; - break; - } - case TULIP_MEDIA_10BASET: { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, 10BASET); - mi++; - break; - } - case TULIP_MEDIA_10BASET_FD: { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, 10BASET_FD); - mi++; - break; - } - default: { - break; - } - } - } - } - if (data & TULIP_SROM_21041_EXTENDED) - dp += 6; - } -#ifdef notdef - if (blocks == 0) { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, BNC); mi++; - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, AUI); mi++; - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, 10BASET); mi++; - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, 10BASET_FD); mi++; - } -#endif - } else { - unsigned length, type; - tulip_media_t gp_media = TULIP_MEDIA_UNKNOWN; - if (sc->tulip_features & TULIP_HAVE_GPR) - sc->tulip_gpinit = *dp++; - blocks = *dp++; - for (idx2 = 0; idx2 < blocks; idx2++) { - const u_int8_t *ep; - if ((*dp & 0x80) == 0) { - length = 4; - type = 0; - } else { - length = (*dp++ & 0x7f) - 1; - type = *dp++ & 0x3f; - } - ep = dp + length; - switch (type & 0x3f) { - case 0: { /* 21140[A] GPR block */ - tulip_media_t media; - srom_media = (tulip_srom_media_t)(dp[0] & 0x3f); - for (idx3 = 0; tulip_srom_mediums[idx3].sm_type != TULIP_MEDIA_UNKNOWN; idx3++) { - if (tulip_srom_mediums[idx3].sm_srom_type == srom_media) - break; - } - media = tulip_srom_mediums[idx3].sm_type; - if (media == TULIP_MEDIA_UNKNOWN) - break; - mi->mi_type = TULIP_MEDIAINFO_GPR; - sc->tulip_mediums[media] = mi; - mi->mi_gpdata = dp[1]; - if (media > gp_media && !TULIP_IS_MEDIA_FD(media)) { - sc->tulip_gpdata = mi->mi_gpdata; - gp_media = media; - } - data = dp[2] + dp[3] * 256; - mi->mi_cmdmode = TULIP_SROM_2114X_CMDBITS(data); - if (data & TULIP_SROM_2114X_NOINDICATOR) { - mi->mi_actmask = 0; - } else { -#if 0 - mi->mi_default = (data & TULIP_SROM_2114X_DEFAULT) != 0; -#endif - mi->mi_actmask = TULIP_SROM_2114X_BITPOS(data); - mi->mi_actdata = (data & TULIP_SROM_2114X_POLARITY) ? 0 : mi->mi_actmask; - } - mi++; - break; - } - case 1: { /* 21140[A] MII block */ - const unsigned phyno = *dp++; - mi->mi_type = TULIP_MEDIAINFO_MII; - mi->mi_gpr_length = *dp++; - mi->mi_gpr_offset = dp - sc->tulip_rombuf; - dp += mi->mi_gpr_length; - mi->mi_reset_length = *dp++; - mi->mi_reset_offset = dp - sc->tulip_rombuf; - dp += mi->mi_reset_length; - - /* - * Before we probe for a PHY, use the GPR information - * to select it. If we don't, it may be inaccessible. - */ - TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_gpinit|TULIP_GP_PINSET); - for (idx3 = 0; idx3 < mi->mi_reset_length; idx3++) { - DELAY(10); - TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_rombuf[mi->mi_reset_offset + idx3]); - } - sc->tulip_phyaddr = mi->mi_phyaddr; - for (idx3 = 0; idx3 < mi->mi_gpr_length; idx3++) { - DELAY(10); - TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_rombuf[mi->mi_gpr_offset + idx3]); - } - - /* - * At least write something! - */ - if (mi->mi_reset_length == 0 && mi->mi_gpr_length == 0) - TULIP_CSR_WRITE(sc, csr_gp, 0); - - mi->mi_phyaddr = TULIP_MII_NOPHY; - for (idx3 = 20; idx3 > 0 && mi->mi_phyaddr == TULIP_MII_NOPHY; idx3--) { - DELAY(10000); - mi->mi_phyaddr = tulip_mii_get_phyaddr(sc, phyno); - } - if (mi->mi_phyaddr == TULIP_MII_NOPHY) { -#if defined(TULIP_DEBUG) - if_printf(sc->tulip_ifp, "can't find phy %d\n", - phyno); -#endif - break; - } - sc->tulip_features |= TULIP_HAVE_MII; - mi->mi_capabilities = dp[0] + dp[1] * 256; dp += 2; - mi->mi_advertisement = dp[0] + dp[1] * 256; dp += 2; - mi->mi_full_duplex = dp[0] + dp[1] * 256; dp += 2; - mi->mi_tx_threshold = dp[0] + dp[1] * 256; dp += 2; - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX_FD); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASET4); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET_FD); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET); - mi->mi_phyid = (tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDLOW) << 16) | - tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDHIGH); - mi++; - break; - } - case 2: { /* 2114[23] SIA block */ - tulip_media_t media; - srom_media = (tulip_srom_media_t)(dp[0] & 0x3f); - for (idx3 = 0; tulip_srom_mediums[idx3].sm_type != TULIP_MEDIA_UNKNOWN; idx3++) { - if (tulip_srom_mediums[idx3].sm_srom_type == srom_media) - break; - } - media = tulip_srom_mediums[idx3].sm_type; - if (media == TULIP_MEDIA_UNKNOWN) - break; - mi->mi_type = TULIP_MEDIAINFO_SIA; - sc->tulip_mediums[media] = mi; - if (dp[0] & 0x40) { - mi->mi_sia_connectivity = dp[1] + dp[2] * 256; - mi->mi_sia_tx_rx = dp[3] + dp[4] * 256; - mi->mi_sia_general = dp[5] + dp[6] * 256; - dp += 6; - } else { - switch (media) { - case TULIP_MEDIA_BNC: { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21142, BNC); - break; - } - case TULIP_MEDIA_AUI: { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21142, AUI); - break; - } - case TULIP_MEDIA_10BASET: { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21142, 10BASET); - sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL; - break; - } - case TULIP_MEDIA_10BASET_FD: { - TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21142, 10BASET_FD); - sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL; - break; - } - default: { - goto bad_media; - } - } - } - mi->mi_sia_gp_control = (dp[1] + dp[2] * 256) << 16; - mi->mi_sia_gp_data = (dp[3] + dp[4] * 256) << 16; - mi++; - bad_media: - break; - } - case 3: { /* 2114[23] MII PHY block */ - const unsigned phyno = *dp++; - const u_int8_t *dp0; - mi->mi_type = TULIP_MEDIAINFO_MII; - mi->mi_gpr_length = *dp++; - mi->mi_gpr_offset = dp - sc->tulip_rombuf; - dp += 2 * mi->mi_gpr_length; - mi->mi_reset_length = *dp++; - mi->mi_reset_offset = dp - sc->tulip_rombuf; - dp += 2 * mi->mi_reset_length; - - dp0 = &sc->tulip_rombuf[mi->mi_reset_offset]; - for (idx3 = 0; idx3 < mi->mi_reset_length; idx3++, dp0 += 2) { - DELAY(10); - TULIP_CSR_WRITE(sc, csr_sia_general, (dp0[0] + 256 * dp0[1]) << 16); - } - sc->tulip_phyaddr = mi->mi_phyaddr; - dp0 = &sc->tulip_rombuf[mi->mi_gpr_offset]; - for (idx3 = 0; idx3 < mi->mi_gpr_length; idx3++, dp0 += 2) { - DELAY(10); - TULIP_CSR_WRITE(sc, csr_sia_general, (dp0[0] + 256 * dp0[1]) << 16); - } - - if (mi->mi_reset_length == 0 && mi->mi_gpr_length == 0) - TULIP_CSR_WRITE(sc, csr_sia_general, 0); - - mi->mi_phyaddr = TULIP_MII_NOPHY; - for (idx3 = 20; idx3 > 0 && mi->mi_phyaddr == TULIP_MII_NOPHY; idx3--) { - DELAY(10000); - mi->mi_phyaddr = tulip_mii_get_phyaddr(sc, phyno); - } - if (mi->mi_phyaddr == TULIP_MII_NOPHY) { -#if defined(TULIP_DEBUG) - if_printf(sc->tulip_ifp, "can't find phy %d\n", - phyno); -#endif - break; - } - sc->tulip_features |= TULIP_HAVE_MII; - mi->mi_capabilities = dp[0] + dp[1] * 256; dp += 2; - mi->mi_advertisement = dp[0] + dp[1] * 256; dp += 2; - mi->mi_full_duplex = dp[0] + dp[1] * 256; dp += 2; - mi->mi_tx_threshold = dp[0] + dp[1] * 256; dp += 2; - mi->mi_mii_interrupt = dp[0] + dp[1] * 256; dp += 2; - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX_FD); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASET4); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET_FD); - TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET); - mi->mi_phyid = (tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDLOW) << 16) | - tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDHIGH); - mi++; - break; - } - case 4: { /* 21143 SYM block */ - tulip_media_t media; - srom_media = (tulip_srom_media_t) dp[0]; - for (idx3 = 0; tulip_srom_mediums[idx3].sm_type != TULIP_MEDIA_UNKNOWN; idx3++) { - if (tulip_srom_mediums[idx3].sm_srom_type == srom_media) - break; - } - media = tulip_srom_mediums[idx3].sm_type; - if (media == TULIP_MEDIA_UNKNOWN) - break; - mi->mi_type = TULIP_MEDIAINFO_SYM; - sc->tulip_mediums[media] = mi; - mi->mi_gpcontrol = (dp[1] + dp[2] * 256) << 16; - mi->mi_gpdata = (dp[3] + dp[4] * 256) << 16; - data = dp[5] + dp[6] * 256; - mi->mi_cmdmode = TULIP_SROM_2114X_CMDBITS(data); - if (data & TULIP_SROM_2114X_NOINDICATOR) { - mi->mi_actmask = 0; - } else { - mi->mi_default = (data & TULIP_SROM_2114X_DEFAULT) != 0; - mi->mi_actmask = TULIP_SROM_2114X_BITPOS(data); - mi->mi_actdata = (data & TULIP_SROM_2114X_POLARITY) ? 0 : mi->mi_actmask; - } - if (TULIP_IS_MEDIA_TP(media)) - sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL; - mi++; - break; - } -#if 0 - case 5: { /* 21143 Reset block */ - mi->mi_type = TULIP_MEDIAINFO_RESET; - mi->mi_reset_length = *dp++; - mi->mi_reset_offset = dp - sc->tulip_rombuf; - dp += 2 * mi->mi_reset_length; - mi++; - break; - } -#endif - default: { - } - } - dp = ep; - } - } - return mi - sc->tulip_mediainfo; -} - -static const struct { - void (*vendor_identify_nic)(tulip_softc_t * const sc); - unsigned char vendor_oui[3]; -} tulip_vendors[] = { - { tulip_identify_dec_nic, { 0x08, 0x00, 0x2B } }, - { tulip_identify_dec_nic, { 0x00, 0x00, 0xF8 } }, - { tulip_identify_smc_nic, { 0x00, 0x00, 0xC0 } }, - { tulip_identify_smc_nic, { 0x00, 0xE0, 0x29 } }, - { tulip_identify_znyx_nic, { 0x00, 0xC0, 0x95 } }, - { tulip_identify_cogent_nic, { 0x00, 0x00, 0x92 } }, - { tulip_identify_asante_nic, { 0x00, 0x00, 0x94 } }, - { tulip_identify_cogent_nic, { 0x00, 0x00, 0xD1 } }, - { tulip_identify_accton_nic, { 0x00, 0x00, 0xE8 } }, - { tulip_identify_compex_nic, { 0x00, 0x80, 0x48 } }, - { NULL } -}; - -/* - * This deals with the vagaries of the address roms and the - * brain-deadness that various vendors commit in using them. - */ -static int -tulip_read_macaddr( - tulip_softc_t * const sc) -{ - unsigned cksum, rom_cksum, idx; - u_int32_t csr; - unsigned char tmpbuf[8]; - static const u_char testpat[] = { 0xFF, 0, 0x55, 0xAA, 0xFF, 0, 0x55, 0xAA }; - - sc->tulip_connidx = TULIP_SROM_LASTCONNIDX; - - if (sc->tulip_chipid == TULIP_21040) { - TULIP_CSR_WRITE(sc, csr_enetrom, 1); - for (idx = 0; idx < sizeof(sc->tulip_rombuf); idx++) { - int cnt = 0; - while (((csr = TULIP_CSR_READ(sc, csr_enetrom)) & 0x80000000L) && cnt < 10000) - cnt++; - sc->tulip_rombuf[idx] = csr & 0xFF; - } - sc->tulip_boardsw = &tulip_21040_boardsw; - } else { - if (sc->tulip_chipid == TULIP_21041) { - /* - * Thankfully all 21041's act the same. - */ - sc->tulip_boardsw = &tulip_21041_boardsw; - } else { - /* - * Assume all 21140 board are compatible with the - * DEC 10/100 evaluation board. Not really valid but - * it's the best we can do until every one switches to - * the new SROM format. - */ - - sc->tulip_boardsw = &tulip_21140_eb_boardsw; - } - tulip_srom_read(sc); - if (tulip_srom_crcok(sc->tulip_rombuf)) { - /* - * SROM CRC is valid therefore it must be in the - * new format. - */ - sc->tulip_features |= TULIP_HAVE_ISVSROM|TULIP_HAVE_OKSROM; - } else if (sc->tulip_rombuf[126] == 0xff && sc->tulip_rombuf[127] == 0xFF) { - /* - * No checksum is present. See if the SROM id checks out; - * the first 18 bytes should be 0 followed by a 1 followed - * by the number of adapters (which we don't deal with yet). - */ - for (idx = 0; idx < 18; idx++) { - if (sc->tulip_rombuf[idx] != 0) - break; - } - if (idx == 18 && sc->tulip_rombuf[18] == 1 && sc->tulip_rombuf[19] != 0) - sc->tulip_features |= TULIP_HAVE_ISVSROM; - } else if (sc->tulip_chipid >= TULIP_21142) { - sc->tulip_features |= TULIP_HAVE_ISVSROM; - sc->tulip_boardsw = &tulip_2114x_isv_boardsw; - } - if ((sc->tulip_features & TULIP_HAVE_ISVSROM) && tulip_srom_decode(sc)) { - if (sc->tulip_chipid != TULIP_21041) - sc->tulip_boardsw = &tulip_2114x_isv_boardsw; - - /* - * If the SROM specifies more than one adapter, tag this as a - * BASE rom. - */ - if (sc->tulip_rombuf[19] > 1) - sc->tulip_features |= TULIP_HAVE_BASEROM; - if (sc->tulip_boardsw == NULL) - return -6; - goto check_oui; - } - } - - - if (bcmp(&sc->tulip_rombuf[0], &sc->tulip_rombuf[16], 8) != 0) { - /* - * Some folks don't use the standard ethernet rom format - * but instead just put the address in the first 6 bytes - * of the rom and let the rest be all 0xffs. (Can we say - * ZNYX?) (well sometimes they put in a checksum so we'll - * start at 8). - */ - for (idx = 8; idx < 32; idx++) { - if (sc->tulip_rombuf[idx] != 0xFF) - return -4; - } - /* - * Make sure the address is not multicast or locally assigned - * that the OUI is not 00-00-00. - */ - if ((sc->tulip_rombuf[0] & 3) != 0) - return -4; - if (sc->tulip_rombuf[0] == 0 && sc->tulip_rombuf[1] == 0 - && sc->tulip_rombuf[2] == 0) - return -4; - bcopy(sc->tulip_rombuf, sc->tulip_enaddr, 6); - sc->tulip_features |= TULIP_HAVE_OKROM; - goto check_oui; - } else { - /* - * A number of makers of multiport boards (ZNYX and Cogent) - * only put on one address ROM on their 21040 boards. So - * if the ROM is all zeros (or all 0xFFs), look at the - * previous configured boards (as long as they are on the same - * PCI bus and the bus number is non-zero) until we find the - * master board with address ROM. We then use its address ROM - * as the base for this board. (we add our relative board - * to the last byte of its address). - */ - for (idx = 0; idx < sizeof(sc->tulip_rombuf); idx++) { - if (sc->tulip_rombuf[idx] != 0 && sc->tulip_rombuf[idx] != 0xFF) - break; - } - if (idx == sizeof(sc->tulip_rombuf)) { - int root_unit; - tulip_softc_t *root_sc = NULL; - for (root_unit = sc->tulip_unit - 1; root_unit >= 0; root_unit--) { - root_sc = tulips[root_unit]; - if (root_sc == NULL || (root_sc->tulip_features & (TULIP_HAVE_OKROM|TULIP_HAVE_SLAVEDROM)) == TULIP_HAVE_OKROM) - break; - root_sc = NULL; - } - if (root_sc != NULL && (root_sc->tulip_features & TULIP_HAVE_BASEROM) - && root_sc->tulip_chipid == sc->tulip_chipid - && root_sc->tulip_pci_busno == sc->tulip_pci_busno) { - sc->tulip_features |= TULIP_HAVE_SLAVEDROM; - sc->tulip_boardsw = root_sc->tulip_boardsw; - strcpy(sc->tulip_boardid, root_sc->tulip_boardid); - if (sc->tulip_boardsw->bd_type == TULIP_21140_ISV) { - bcopy(root_sc->tulip_rombuf, sc->tulip_rombuf, - sizeof(sc->tulip_rombuf)); - if (!tulip_srom_decode(sc)) - return -5; - } else { - bcopy(root_sc->tulip_enaddr, sc->tulip_enaddr, 6); - sc->tulip_enaddr[5] += sc->tulip_unit - root_sc->tulip_unit; - } - /* - * Now for a truly disgusting kludge: all 4 21040s on - * the ZX314 share the same INTA line so the mapping - * setup by the BIOS on the PCI bridge is worthless. - * Rather than reprogramming the value in the config - * register, we will handle this internally. - */ - if (root_sc->tulip_features & TULIP_HAVE_SHAREDINTR) { - sc->tulip_slaves = root_sc->tulip_slaves; - root_sc->tulip_slaves = sc; - sc->tulip_features |= TULIP_HAVE_SLAVEDINTR; - } - return 0; - } - } - } - - /* - * This is the standard DEC address ROM test. - */ - - if (bcmp(&sc->tulip_rombuf[24], testpat, 8) != 0) - return -3; - - tmpbuf[0] = sc->tulip_rombuf[15]; tmpbuf[1] = sc->tulip_rombuf[14]; - tmpbuf[2] = sc->tulip_rombuf[13]; tmpbuf[3] = sc->tulip_rombuf[12]; - tmpbuf[4] = sc->tulip_rombuf[11]; tmpbuf[5] = sc->tulip_rombuf[10]; - tmpbuf[6] = sc->tulip_rombuf[9]; tmpbuf[7] = sc->tulip_rombuf[8]; - if (bcmp(&sc->tulip_rombuf[0], tmpbuf, 8) != 0) - return -2; - - bcopy(sc->tulip_rombuf, sc->tulip_enaddr, 6); - - cksum = *(u_int16_t *) &sc->tulip_enaddr[0]; - cksum *= 2; - if (cksum > 65535) cksum -= 65535; - cksum += *(u_int16_t *) &sc->tulip_enaddr[2]; - if (cksum > 65535) cksum -= 65535; - cksum *= 2; - if (cksum > 65535) cksum -= 65535; - cksum += *(u_int16_t *) &sc->tulip_enaddr[4]; - if (cksum >= 65535) cksum -= 65535; - - rom_cksum = *(u_int16_t *) &sc->tulip_rombuf[6]; - - if (cksum != rom_cksum) - return -1; - - check_oui: - /* - * Check for various boards based on OUI. Did I say braindead? - */ - for (idx = 0; tulip_vendors[idx].vendor_identify_nic != NULL; idx++) { - if (bcmp(sc->tulip_enaddr, tulip_vendors[idx].vendor_oui, 3) == 0) { - (*tulip_vendors[idx].vendor_identify_nic)(sc); - break; - } - } - - sc->tulip_features |= TULIP_HAVE_OKROM; - return 0; -} - -static void -tulip_ifmedia_add( - tulip_softc_t * const sc) -{ - tulip_media_t media; - int medias = 0; - - for (media = TULIP_MEDIA_UNKNOWN; media < TULIP_MEDIA_MAX; media++) { - if (sc->tulip_mediums[media] != NULL) { - ifmedia_add(&sc->tulip_ifmedia, tulip_media_to_ifmedia[media], - 0, 0); - medias++; - } - } - if (medias == 0) { - sc->tulip_features |= TULIP_HAVE_NOMEDIA; - ifmedia_add(&sc->tulip_ifmedia, IFM_ETHER | IFM_NONE, 0, 0); - ifmedia_set(&sc->tulip_ifmedia, IFM_ETHER | IFM_NONE); - } else if (sc->tulip_media == TULIP_MEDIA_UNKNOWN) { - ifmedia_add(&sc->tulip_ifmedia, IFM_ETHER | IFM_AUTO, 0, 0); - ifmedia_set(&sc->tulip_ifmedia, IFM_ETHER | IFM_AUTO); - } else { - ifmedia_set(&sc->tulip_ifmedia, tulip_media_to_ifmedia[sc->tulip_media]); - sc->tulip_flags |= TULIP_PRINTMEDIA; - tulip_linkup(sc, sc->tulip_media); - } -} - -static int -tulip_ifmedia_change( - struct ifnet * const ifp) -{ - tulip_softc_t * const sc = (tulip_softc_t *)ifp->if_softc; - - sc->tulip_flags |= TULIP_NEEDRESET; - sc->tulip_probe_state = TULIP_PROBE_INACTIVE; - sc->tulip_media = TULIP_MEDIA_UNKNOWN; - if (IFM_SUBTYPE(sc->tulip_ifmedia.ifm_media) != IFM_AUTO) { - tulip_media_t media; - for (media = TULIP_MEDIA_UNKNOWN; media < TULIP_MEDIA_MAX; media++) { - if (sc->tulip_mediums[media] != NULL - && sc->tulip_ifmedia.ifm_media == tulip_media_to_ifmedia[media]) { - sc->tulip_flags |= TULIP_PRINTMEDIA; - sc->tulip_flags &= ~TULIP_DIDNWAY; - tulip_linkup(sc, media); - return 0; - } - } - } - sc->tulip_flags &= ~(TULIP_TXPROBE_ACTIVE|TULIP_WANTRXACT); - tulip_reset(sc); - tulip_init(sc); - return 0; -} - -/* - * Media status callback - */ -static void -tulip_ifmedia_status( - struct ifnet * const ifp, - struct ifmediareq *req) -{ - tulip_softc_t *sc = (tulip_softc_t *)ifp->if_softc; - - if (sc->tulip_media == TULIP_MEDIA_UNKNOWN) - return; - - req->ifm_status = IFM_AVALID; - if (sc->tulip_flags & TULIP_LINKUP) - req->ifm_status |= IFM_ACTIVE; - - req->ifm_active = tulip_media_to_ifmedia[sc->tulip_media]; -} - -static void -tulip_addr_filter( - tulip_softc_t * const sc) -{ - struct ifmultiaddr *ifma; - u_char *addrp; - int multicnt; - - sc->tulip_flags &= ~(TULIP_WANTHASHPERFECT|TULIP_WANTHASHONLY|TULIP_ALLMULTI); - sc->tulip_flags |= TULIP_WANTSETUP|TULIP_WANTTXSTART; - sc->tulip_cmdmode &= ~TULIP_CMD_RXRUN; - sc->tulip_intrmask &= ~TULIP_STS_RXSTOPPED; -#if defined(IFF_ALLMULTI) - if (sc->tulip_ifp->if_flags & IFF_ALLMULTI) - sc->tulip_flags |= TULIP_ALLMULTI ; -#endif - - multicnt = 0; - TAILQ_FOREACH(ifma, &sc->tulip_ifp->if_multiaddrs, ifma_link) { - - if (ifma->ifma_addr->sa_family == AF_LINK) - multicnt++; - } - - sc->tulip_ifp->if_start = tulip_ifstart; /* so the setup packet gets queued */ - if (multicnt > 14) { - u_int32_t *sp = sc->tulip_setupdata; - unsigned hash; - /* - * Some early passes of the 21140 have broken implementations of - * hash-perfect mode. When we get too many multicasts for perfect - * filtering with these chips, we need to switch into hash-only - * mode (this is better than all-multicast on network with lots - * of multicast traffic). - */ - if (sc->tulip_features & TULIP_HAVE_BROKEN_HASH) - sc->tulip_flags |= TULIP_WANTHASHONLY; - else - sc->tulip_flags |= TULIP_WANTHASHPERFECT; - /* - * If we have more than 14 multicasts, we have - * go into hash perfect mode (512 bit multicast - * hash and one perfect hardware). - */ - bzero(sc->tulip_setupdata, sizeof(sc->tulip_setupdata)); - - TAILQ_FOREACH(ifma, &sc->tulip_ifp->if_multiaddrs, ifma_link) { - - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - - hash = tulip_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); -#if BYTE_ORDER == BIG_ENDIAN - sp[hash >> 4] |= bswap32(1 << (hash & 0xF)); -#else - sp[hash >> 4] |= 1 << (hash & 0xF); -#endif - } - /* - * No reason to use a hash if we are going to be - * receiving every multicast. - */ - if ((sc->tulip_flags & TULIP_ALLMULTI) == 0) { - hash = tulip_mchash(sc->tulip_ifp->if_broadcastaddr); -#if BYTE_ORDER == BIG_ENDIAN - sp[hash >> 4] |= bswap32(1 << (hash & 0xF)); -#else - sp[hash >> 4] |= 1 << (hash & 0xF); -#endif - if (sc->tulip_flags & TULIP_WANTHASHONLY) { - hash = tulip_mchash(IFP2ENADDR(sc->tulip_ifp)); -#if BYTE_ORDER == BIG_ENDIAN - sp[hash >> 4] |= bswap32(1 << (hash & 0xF)); -#else - sp[hash >> 4] |= 1 << (hash & 0xF); -#endif - } else { -#if BYTE_ORDER == BIG_ENDIAN - sp[39] = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[0] << 16; - sp[40] = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[1] << 16; - sp[41] = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[2] << 16; -#else - sp[39] = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[0]; - sp[40] = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[1]; - sp[41] = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[2]; -#endif - } - } - } - if ((sc->tulip_flags & (TULIP_WANTHASHPERFECT|TULIP_WANTHASHONLY)) == 0) { - u_int32_t *sp = sc->tulip_setupdata; - int idx = 0; - if ((sc->tulip_flags & TULIP_ALLMULTI) == 0) { - /* - * Else can get perfect filtering for 16 addresses. - */ - TAILQ_FOREACH(ifma, &sc->tulip_ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - addrp = LLADDR((struct sockaddr_dl *)ifma->ifma_addr); -#if BYTE_ORDER == BIG_ENDIAN - *sp++ = ((u_int16_t *) addrp)[0] << 16; - *sp++ = ((u_int16_t *) addrp)[1] << 16; - *sp++ = ((u_int16_t *) addrp)[2] << 16; -#else - *sp++ = ((u_int16_t *) addrp)[0]; - *sp++ = ((u_int16_t *) addrp)[1]; - *sp++ = ((u_int16_t *) addrp)[2]; -#endif - idx++; - } - /* - * Add the broadcast address. - */ - idx++; -#if BYTE_ORDER == BIG_ENDIAN - *sp++ = 0xFFFF << 16; - *sp++ = 0xFFFF << 16; - *sp++ = 0xFFFF << 16; -#else - *sp++ = 0xFFFF; - *sp++ = 0xFFFF; - *sp++ = 0xFFFF; -#endif - } - /* - * Pad the rest with our hardware address - */ - for (; idx < 16; idx++) { -#if BYTE_ORDER == BIG_ENDIAN - *sp++ = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[0] << 16; - *sp++ = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[1] << 16; - *sp++ = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[2] << 16; -#else - *sp++ = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[0]; - *sp++ = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[1]; - *sp++ = ((u_int16_t *) IFP2ENADDR(sc->tulip_ifp))[2]; -#endif - } - } -#if defined(IFF_ALLMULTI) - if (sc->tulip_flags & TULIP_ALLMULTI) - sc->tulip_ifp->if_flags |= IFF_ALLMULTI; -#endif -} - -static void -tulip_reset( - tulip_softc_t * const sc) -{ - tulip_ringinfo_t *ri; - tulip_desc_t *di; - u_int32_t inreset = (sc->tulip_flags & TULIP_INRESET); - - /* - * Brilliant. Simply brilliant. When switching modes/speeds - * on a 2114*, you need to set the appriopriate MII/PCS/SCL/PS - * bits in CSR6 and then do a software reset to get the 21140 - * to properly reset its internal pathways to the right places. - * Grrrr. - */ - if ((sc->tulip_flags & TULIP_DEVICEPROBE) == 0 - && sc->tulip_boardsw->bd_media_preset != NULL) - (*sc->tulip_boardsw->bd_media_preset)(sc); - - TULIP_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET); - DELAY(10); /* Wait 10 microseconds (actually 50 PCI cycles but at - 33MHz that comes to two microseconds but wait a - bit longer anyways) */ - - if (!inreset) { - sc->tulip_flags |= TULIP_INRESET; - sc->tulip_flags &= ~(TULIP_NEEDRESET|TULIP_RXBUFSLOW); - sc->tulip_ifp->if_flags &= ~IFF_OACTIVE; - sc->tulip_ifp->if_start = tulip_ifstart; - } - -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) - TULIP_CSR_WRITE(sc, csr_txlist, sc->tulip_txdescmap->dm_segs[0].ds_addr); -#else - TULIP_CSR_WRITE(sc, csr_txlist, TULIP_KVATOPHYS(sc, &sc->tulip_txinfo.ri_first[0])); -#endif -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - TULIP_CSR_WRITE(sc, csr_rxlist, sc->tulip_rxdescmap->dm_segs[0].ds_addr); -#else - TULIP_CSR_WRITE(sc, csr_rxlist, TULIP_KVATOPHYS(sc, &sc->tulip_rxinfo.ri_first[0])); -#endif - TULIP_CSR_WRITE(sc, csr_busmode, - (1 << (3 /*pci_max_burst_len*/ + 8)) - |TULIP_BUSMODE_CACHE_ALIGN8 - |TULIP_BUSMODE_READMULTIPLE - |(BYTE_ORDER != LITTLE_ENDIAN ? - TULIP_BUSMODE_DESC_BIGENDIAN : 0)); - - sc->tulip_txtimer = 0; - sc->tulip_txq.ifq_maxlen = TULIP_TXDESCS; - /* - * Free all the mbufs that were on the transmit ring. - */ - for (;;) { -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) - bus_dmamap_t map; -#endif - struct mbuf *m; - _IF_DEQUEUE(&sc->tulip_txq, m); - if (m == NULL) - break; -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) - map = M_GETCTX(m, bus_dmamap_t); - bus_dmamap_unload(sc->tulip_dmatag, map); - sc->tulip_txmaps[sc->tulip_txmaps_free++] = map; -#endif - m_freem(m); - } - - ri = &sc->tulip_txinfo; - ri->ri_nextin = ri->ri_nextout = ri->ri_first; - ri->ri_free = ri->ri_max; - for (di = ri->ri_first; di < ri->ri_last; di++) - di->d_status = 0; -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) - bus_dmamap_sync(sc->tulip_dmatag, sc->tulip_txdescmap, - 0, sc->tulip_txdescmap->dm_mapsize, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); -#endif - - /* - * We need to collect all the mbufs were on the - * receive ring before we reinit it either to put - * them back on or to know if we have to allocate - * more. - */ - ri = &sc->tulip_rxinfo; - ri->ri_nextin = ri->ri_nextout = ri->ri_first; - ri->ri_free = ri->ri_max; - for (di = ri->ri_first; di < ri->ri_last; di++) { - di->d_status = 0; - di->d_length1 = 0; di->d_addr1 = 0; - di->d_length2 = 0; di->d_addr2 = 0; - } -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - bus_dmamap_sync(sc->tulip_dmatag, sc->tulip_rxdescmap, - 0, sc->tulip_rxdescmap->dm_mapsize, - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); -#endif - for (;;) { -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - bus_dmamap_t map; -#endif - struct mbuf *m; - _IF_DEQUEUE(&sc->tulip_rxq, m); - if (m == NULL) - break; -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - map = M_GETCTX(m, bus_dmamap_t); - bus_dmamap_unload(sc->tulip_dmatag, map); - sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map; -#endif - m_freem(m); - } - - /* - * If tulip_reset is being called recurisvely, exit quickly knowing - * that when the outer tulip_reset returns all the right stuff will - * have happened. - */ - if (inreset) - return; - - sc->tulip_intrmask |= TULIP_STS_NORMALINTR|TULIP_STS_RXINTR|TULIP_STS_TXINTR - |TULIP_STS_ABNRMLINTR|TULIP_STS_SYSERROR|TULIP_STS_TXSTOPPED - |TULIP_STS_TXUNDERFLOW|TULIP_STS_TXBABBLE - |TULIP_STS_RXSTOPPED; - - if ((sc->tulip_flags & TULIP_DEVICEPROBE) == 0) - (*sc->tulip_boardsw->bd_media_select)(sc); -#if defined(TULIP_DEBUG) - if ((sc->tulip_flags & TULIP_NEEDRESET) == TULIP_NEEDRESET) - if_printf(sc->tulip_ifp, - "tulip_reset: additional reset needed?!?\n"); -#endif - if (bootverbose) - tulip_media_print(sc); - if (sc->tulip_features & TULIP_HAVE_DUALSENSE) - TULIP_CSR_WRITE(sc, csr_sia_status, TULIP_CSR_READ(sc, csr_sia_status)); - - sc->tulip_flags &= ~(TULIP_DOINGSETUP|TULIP_WANTSETUP|TULIP_INRESET - |TULIP_RXACT); - tulip_addr_filter(sc); -} - - -static void -tulip_ifinit( - void * sc) -{ - tulip_init((tulip_softc_t *)sc); -} - -static void -tulip_init( - tulip_softc_t * const sc) -{ - if (sc->tulip_ifp->if_flags & IFF_UP) { - if ((sc->tulip_ifp->if_flags & IFF_RUNNING) == 0) { - /* initialize the media */ - tulip_reset(sc); - } - sc->tulip_ifp->if_flags |= IFF_RUNNING; - if (sc->tulip_ifp->if_flags & IFF_PROMISC) { - sc->tulip_flags |= TULIP_PROMISC; - sc->tulip_cmdmode |= TULIP_CMD_PROMISCUOUS; - sc->tulip_intrmask |= TULIP_STS_TXINTR; - } else { - sc->tulip_flags &= ~TULIP_PROMISC; - sc->tulip_cmdmode &= ~TULIP_CMD_PROMISCUOUS; - if (sc->tulip_flags & TULIP_ALLMULTI) { - sc->tulip_cmdmode |= TULIP_CMD_ALLMULTI; - } else { - sc->tulip_cmdmode &= ~TULIP_CMD_ALLMULTI; - } - } - sc->tulip_cmdmode |= TULIP_CMD_TXRUN; - if ((sc->tulip_flags & (TULIP_TXPROBE_ACTIVE|TULIP_WANTSETUP)) == 0) { - tulip_rx_intr(sc); - sc->tulip_cmdmode |= TULIP_CMD_RXRUN; - sc->tulip_intrmask |= TULIP_STS_RXSTOPPED; - } else { - sc->tulip_ifp->if_flags |= IFF_OACTIVE; - sc->tulip_cmdmode &= ~TULIP_CMD_RXRUN; - sc->tulip_intrmask &= ~TULIP_STS_RXSTOPPED; - } - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode); - if ((sc->tulip_flags & (TULIP_WANTSETUP|TULIP_TXPROBE_ACTIVE)) == TULIP_WANTSETUP) - tulip_txput_setup(sc); - } else { - sc->tulip_ifp->if_flags &= ~IFF_RUNNING; - tulip_reset(sc); - } -} - -static void -tulip_rx_intr( - tulip_softc_t * const sc) -{ - TULIP_PERFSTART(rxintr) - tulip_ringinfo_t * const ri = &sc->tulip_rxinfo; - struct ifnet * const ifp = sc->tulip_ifp; - int fillok = 1; -#if defined(TULIP_DEBUG) - int cnt = 0; -#endif - - for (;;) { - TULIP_PERFSTART(rxget) - tulip_desc_t *eop = ri->ri_nextin; - int total_len = 0, last_offset = 0; - struct mbuf *ms = NULL, *me = NULL; - int accept = 0; -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - bus_dmamap_t map; - int error; -#endif - - if (fillok && sc->tulip_rxq.ifq_len < TULIP_RXQ_TARGET) - goto queue_mbuf; - -#if defined(TULIP_DEBUG) - if (cnt == ri->ri_max) - break; -#endif - /* - * If the TULIP has no descriptors, there can't be any receive - * descriptors to process. - */ - if (eop == ri->ri_nextout) - break; - - /* - * 90% of the packets will fit in one descriptor. So we optimize - * for that case. - */ - TULIP_RXDESC_POSTSYNC(sc, eop, sizeof(*eop)); - if ((((volatile tulip_desc_t *) eop)->d_status & (TULIP_DSTS_OWNER|TULIP_DSTS_RxFIRSTDESC|TULIP_DSTS_RxLASTDESC)) == (TULIP_DSTS_RxFIRSTDESC|TULIP_DSTS_RxLASTDESC)) { - _IF_DEQUEUE(&sc->tulip_rxq, ms); - me = ms; - } else { - /* - * If still owned by the TULIP, don't touch it. - */ - if (((volatile tulip_desc_t *) eop)->d_status & TULIP_DSTS_OWNER) - break; - - /* - * It is possible (though improbable unless the BIG_PACKET support - * is enabled or MCLBYTES < 1518) for a received packet to cross - * more than one receive descriptor. - */ - while ((((volatile tulip_desc_t *) eop)->d_status & TULIP_DSTS_RxLASTDESC) == 0) { - if (++eop == ri->ri_last) - eop = ri->ri_first; - TULIP_RXDESC_POSTSYNC(sc, eop, sizeof(*eop)); - if (eop == ri->ri_nextout || ((((volatile tulip_desc_t *) eop)->d_status & TULIP_DSTS_OWNER))) { -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_rxintrs++; - sc->tulip_dbg.dbg_rxpktsperintr[cnt]++; -#endif - TULIP_PERFEND(rxget); - TULIP_PERFEND(rxintr); - return; - } - total_len++; - } - - /* - * Dequeue the first buffer for the start of the packet. Hopefully - * this will be the only one we need to dequeue. However, if the - * packet consumed multiple descriptors, then we need to dequeue - * those buffers and chain to the starting mbuf. All buffers but - * the last buffer have the same length so we can set that now. - * (we add to last_offset instead of multiplying since we normally - * won't go into the loop and thereby saving ourselves from - * doing a multiplication by 0 in the normal case). - */ - _IF_DEQUEUE(&sc->tulip_rxq, ms); - for (me = ms; total_len > 0; total_len--) { -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - map = M_GETCTX(me, bus_dmamap_t); - TULIP_RXMAP_POSTSYNC(sc, map); - bus_dmamap_unload(sc->tulip_dmatag, map); - sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map; -#if defined(DIAGNOSTIC) - M_SETCTX(me, NULL); -#endif -#endif /* TULIP_BUS_DMA */ - me->m_len = TULIP_RX_BUFLEN; - last_offset += TULIP_RX_BUFLEN; - _IF_DEQUEUE(&sc->tulip_rxq, me->m_next); - me = me->m_next; - } - } - - /* - * Now get the size of received packet (minus the CRC). - */ - total_len = ((eop->d_status >> 16) & 0x7FFF) - 4; - if ((sc->tulip_flags & TULIP_RXIGNORE) == 0 - && ((eop->d_status & TULIP_DSTS_ERRSUM) == 0 -#ifdef BIG_PACKET - || (total_len <= sc->tulip_ifp->if_mtu + sizeof(struct ether_header) && - (eop->d_status & (TULIP_DSTS_RxBADLENGTH|TULIP_DSTS_RxRUNT| - TULIP_DSTS_RxCOLLSEEN|TULIP_DSTS_RxBADCRC| - TULIP_DSTS_RxOVERFLOW)) == 0) -#endif - )) { - me->m_len = total_len - last_offset; - -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - map = M_GETCTX(me, bus_dmamap_t); - bus_dmamap_sync(sc->tulip_dmatag, map, 0, me->m_len, - BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(sc->tulip_dmatag, map); - sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map; -#if defined(DIAGNOSTIC) - M_SETCTX(me, NULL); -#endif -#endif /* TULIP_BUS_DMA */ - -#ifndef __FreeBSD__ - if (sc->tulip_ifp->if_bpf != NULL) { - if (me == ms) - bpf_tap(&sc->tulip_if, mtod(ms, caddr_t), total_len); - else - bpf_mtap(&sc->tulip_if, ms); - } -#endif - sc->tulip_flags |= TULIP_RXACT; - accept = 1; - } else { - ifp->if_ierrors++; - if (eop->d_status & (TULIP_DSTS_RxBADLENGTH|TULIP_DSTS_RxOVERFLOW|TULIP_DSTS_RxWATCHDOG)) { - sc->tulip_dot3stats.dot3StatsInternalMacReceiveErrors++; - } else { -#if defined(TULIP_VERBOSE) - const char *error = NULL; -#endif - if (eop->d_status & TULIP_DSTS_RxTOOLONG) { - sc->tulip_dot3stats.dot3StatsFrameTooLongs++; -#if defined(TULIP_VERBOSE) - error = "frame too long"; -#endif - } - if (eop->d_status & TULIP_DSTS_RxBADCRC) { - if (eop->d_status & TULIP_DSTS_RxDRBBLBIT) { - sc->tulip_dot3stats.dot3StatsAlignmentErrors++; -#if defined(TULIP_VERBOSE) - error = "alignment error"; -#endif - } else { - sc->tulip_dot3stats.dot3StatsFCSErrors++; -#if defined(TULIP_VERBOSE) - error = "bad crc"; -#endif - } - } -#if defined(TULIP_VERBOSE) - if (error != NULL && (sc->tulip_flags & TULIP_NOMESSAGES) == 0) { - if_printf(sc->tulip_ifp, "receive: %6D: %s\n", - mtod(ms, u_char *) + 6, ":", - error); - sc->tulip_flags |= TULIP_NOMESSAGES; - } -#endif - } - -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - map = M_GETCTX(me, bus_dmamap_t); - bus_dmamap_unload(sc->tulip_dmatag, map); - sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map; -#if defined(DIAGNOSTIC) - M_SETCTX(me, NULL); -#endif -#endif /* TULIP_BUS_DMA */ - } -#if defined(TULIP_DEBUG) - cnt++; -#endif - ifp->if_ipackets++; - if (++eop == ri->ri_last) - eop = ri->ri_first; - ri->ri_nextin = eop; - queue_mbuf: - /* - * Either we are priming the TULIP with mbufs (m == NULL) - * or we are about to accept an mbuf for the upper layers - * so we need to allocate an mbuf to replace it. If we - * can't replace it, send up it anyways. This may cause - * us to drop packets in the future but that's better than - * being caught in livelock. - * - * Note that if this packet crossed multiple descriptors - * we don't even try to reallocate all the mbufs here. - * Instead we rely on the test of the beginning of - * the loop to refill for the extra consumed mbufs. - */ - if (accept || ms == NULL) { - struct mbuf *m0; - MGETHDR(m0, M_DONTWAIT, MT_DATA); - if (m0 != NULL) { -#if defined(TULIP_COPY_RXDATA) - if (!accept || total_len >= (MHLEN - 2)) { -#endif - MCLGET(m0, M_DONTWAIT); - if ((m0->m_flags & M_EXT) == 0) { - m_freem(m0); - m0 = NULL; - } -#if defined(TULIP_COPY_RXDATA) - } -#endif - } - if (accept -#if defined(TULIP_COPY_RXDATA) - && m0 != NULL -#endif - ) { -#if !defined(TULIP_COPY_RXDATA) - ms->m_pkthdr.len = total_len; - ms->m_pkthdr.rcvif = ifp; - (*ifp->if_input)(ifp, ms); -#else -#ifdef BIG_PACKET -#error BIG_PACKET is incompatible with TULIP_COPY_RXDATA -#endif - m0->m_data += 2; /* align data after header */ - m_copydata(ms, 0, total_len, mtod(m0, caddr_t)); - m0->m_len = m0->m_pkthdr.len = total_len; - m0->m_pkthdr.rcvif = ifp; - (*ifp->if_input)(ifp, m0); - m0 = ms; -#endif /* ! TULIP_COPY_RXDATA */ - } - ms = m0; - } - if (ms == NULL) { - /* - * Couldn't allocate a new buffer. Don't bother - * trying to replenish the receive queue. - */ - fillok = 0; - sc->tulip_flags |= TULIP_RXBUFSLOW; -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_rxlowbufs++; -#endif - TULIP_PERFEND(rxget); - continue; - } - /* - * Now give the buffer(s) to the TULIP and save in our - * receive queue. - */ - do { - tulip_desc_t * const nextout = ri->ri_nextout; -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) - if (sc->tulip_rxmaps_free > 0) { - map = sc->tulip_rxmaps[--sc->tulip_rxmaps_free]; - } else { - m_freem(ms); - sc->tulip_flags |= TULIP_RXBUFSLOW; -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_rxlowbufs++; -#endif - break; - } - M_SETCTX(ms, map); - error = bus_dmamap_load(sc->tulip_dmatag, map, mtod(ms, void *), - TULIP_RX_BUFLEN, NULL, BUS_DMA_NOWAIT); - if (error) { - if_printf(sc->tulip_ifp, - "unable to load rx map, error = %d\n", error); - panic("tulip_rx_intr"); /* XXX */ - } - nextout->d_addr1 = map->dm_segs[0].ds_addr; - nextout->d_length1 = map->dm_segs[0].ds_len; - if (map->dm_nsegs == 2) { - nextout->d_addr2 = map->dm_segs[1].ds_addr; - nextout->d_length2 = map->dm_segs[1].ds_len; - } else { - nextout->d_addr2 = 0; - nextout->d_length2 = 0; - } - TULIP_RXDESC_POSTSYNC(sc, nextout, sizeof(*nextout)); -#else /* TULIP_BUS_DMA */ - nextout->d_addr1 = TULIP_KVATOPHYS(sc, mtod(ms, caddr_t)); - nextout->d_length1 = TULIP_RX_BUFLEN; -#endif /* TULIP_BUS_DMA */ - nextout->d_status = TULIP_DSTS_OWNER; - TULIP_RXDESC_POSTSYNC(sc, nextout, sizeof(u_int32_t)); - if (++ri->ri_nextout == ri->ri_last) - ri->ri_nextout = ri->ri_first; - me = ms->m_next; - ms->m_next = NULL; - _IF_ENQUEUE(&sc->tulip_rxq, ms); - } while ((ms = me) != NULL); - - if (sc->tulip_rxq.ifq_len >= TULIP_RXQ_TARGET) - sc->tulip_flags &= ~TULIP_RXBUFSLOW; - TULIP_PERFEND(rxget); - } - -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_rxintrs++; - sc->tulip_dbg.dbg_rxpktsperintr[cnt]++; -#endif - TULIP_PERFEND(rxintr); -} - -static int -tulip_tx_intr( - tulip_softc_t * const sc) -{ - TULIP_PERFSTART(txintr) - tulip_ringinfo_t * const ri = &sc->tulip_txinfo; - struct mbuf *m; - int xmits = 0; - int descs = 0; - - while (ri->ri_free < ri->ri_max) { - u_int32_t d_flag; - - TULIP_TXDESC_POSTSYNC(sc, ri->ri_nextin, sizeof(*ri->ri_nextin)); - if (((volatile tulip_desc_t *) ri->ri_nextin)->d_status & TULIP_DSTS_OWNER) - break; - - ri->ri_free++; - descs++; - d_flag = ri->ri_nextin->d_flag; - if (d_flag & TULIP_DFLAG_TxLASTSEG) { - if (d_flag & TULIP_DFLAG_TxSETUPPKT) { - /* - * We've just finished processing a setup packet. - * Mark that we finished it. If there's not - * another pending, startup the TULIP receiver. - * Make sure we ack the RXSTOPPED so we won't get - * an abormal interrupt indication. - */ - TULIP_TXMAP_POSTSYNC(sc, sc->tulip_setupmap); - sc->tulip_flags &= ~(TULIP_DOINGSETUP|TULIP_HASHONLY); - if (ri->ri_nextin->d_flag & TULIP_DFLAG_TxINVRSFILT) - sc->tulip_flags |= TULIP_HASHONLY; - if ((sc->tulip_flags & (TULIP_WANTSETUP|TULIP_TXPROBE_ACTIVE)) == 0) { - tulip_rx_intr(sc); - sc->tulip_cmdmode |= TULIP_CMD_RXRUN; - sc->tulip_intrmask |= TULIP_STS_RXSTOPPED; - TULIP_CSR_WRITE(sc, csr_status, TULIP_STS_RXSTOPPED); - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode); - } - } else { - const u_int32_t d_status = ri->ri_nextin->d_status; - _IF_DEQUEUE(&sc->tulip_txq, m); - if (m != NULL) { -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) - bus_dmamap_t map = M_GETCTX(m, bus_dmamap_t); - TULIP_TXMAP_POSTSYNC(sc, map); - sc->tulip_txmaps[sc->tulip_txmaps_free++] = map; -#endif /* TULIP_BUS_DMA */ - m_freem(m); -#if defined(TULIP_DEBUG) - } else { - if_printf(sc->tulip_ifp, - "tx_intr: failed to dequeue mbuf?!?\n"); -#endif - } - if (sc->tulip_flags & TULIP_TXPROBE_ACTIVE) { - tulip_mediapoll_event_t event = TULIP_MEDIAPOLL_TXPROBE_OK; - if (d_status & (TULIP_DSTS_TxNOCARR|TULIP_DSTS_TxEXCCOLL)) { -#if defined(TULIP_DEBUG) - if (d_status & TULIP_DSTS_TxNOCARR) - sc->tulip_dbg.dbg_txprobe_nocarr++; - if (d_status & TULIP_DSTS_TxEXCCOLL) - sc->tulip_dbg.dbg_txprobe_exccoll++; -#endif - event = TULIP_MEDIAPOLL_TXPROBE_FAILED; - } - (*sc->tulip_boardsw->bd_media_poll)(sc, event); - /* - * Escape from the loop before media poll has reset the TULIP! - */ - break; - } else { - xmits++; - if (d_status & TULIP_DSTS_ERRSUM) { - sc->tulip_ifp->if_oerrors++; - if (d_status & TULIP_DSTS_TxEXCCOLL) - sc->tulip_dot3stats.dot3StatsExcessiveCollisions++; - if (d_status & TULIP_DSTS_TxLATECOLL) - sc->tulip_dot3stats.dot3StatsLateCollisions++; - if (d_status & (TULIP_DSTS_TxNOCARR|TULIP_DSTS_TxCARRLOSS)) - sc->tulip_dot3stats.dot3StatsCarrierSenseErrors++; - if (d_status & (TULIP_DSTS_TxUNDERFLOW|TULIP_DSTS_TxBABBLE)) - sc->tulip_dot3stats.dot3StatsInternalMacTransmitErrors++; - if (d_status & TULIP_DSTS_TxUNDERFLOW) - sc->tulip_dot3stats.dot3StatsInternalTransmitUnderflows++; - if (d_status & TULIP_DSTS_TxBABBLE) - sc->tulip_dot3stats.dot3StatsInternalTransmitBabbles++; - } else { - u_int32_t collisions = - (d_status & TULIP_DSTS_TxCOLLMASK) - >> TULIP_DSTS_V_TxCOLLCNT; - sc->tulip_ifp->if_collisions += collisions; - if (collisions == 1) - sc->tulip_dot3stats.dot3StatsSingleCollisionFrames++; - else if (collisions > 1) - sc->tulip_dot3stats.dot3StatsMultipleCollisionFrames++; - else if (d_status & TULIP_DSTS_TxDEFERRED) - sc->tulip_dot3stats.dot3StatsDeferredTransmissions++; - /* - * SQE is only valid for 10baseT/BNC/AUI when not - * running in full-duplex. In order to speed up the - * test, the corresponding bit in tulip_flags needs to - * set as well to get us to count SQE Test Errors. - */ - if (d_status & TULIP_DSTS_TxNOHRTBT & sc->tulip_flags) - sc->tulip_dot3stats.dot3StatsSQETestErrors++; - } - } - } - } - - if (++ri->ri_nextin == ri->ri_last) - ri->ri_nextin = ri->ri_first; - - if ((sc->tulip_flags & TULIP_TXPROBE_ACTIVE) == 0) - sc->tulip_ifp->if_flags &= ~IFF_OACTIVE; - } - /* - * If nothing left to transmit, disable the timer. - * Else if progress, reset the timer back to 2 ticks. - */ - if (ri->ri_free == ri->ri_max || (sc->tulip_flags & TULIP_TXPROBE_ACTIVE)) - sc->tulip_txtimer = 0; - else if (xmits > 0) - sc->tulip_txtimer = TULIP_TXTIMER; - sc->tulip_ifp->if_opackets += xmits; - TULIP_PERFEND(txintr); - return descs; -} - -static void -tulip_print_abnormal_interrupt( - tulip_softc_t * const sc, - u_int32_t csr) -{ - const char * const *msgp = tulip_status_bits; - const char *sep; - u_int32_t mask; - const char thrsh[] = "72|128\0\0\0" "96|256\0\0\0" "128|512\0\0" "160|1024"; - - csr &= (1 << (sizeof(tulip_status_bits)/sizeof(tulip_status_bits[0]))) - 1; - if_printf(sc->tulip_ifp, "abnormal interrupt:"); - for (sep = " ", mask = 1; mask <= csr; mask <<= 1, msgp++) { - if ((csr & mask) && *msgp != NULL) { - printf("%s%s", sep, *msgp); - if (mask == TULIP_STS_TXUNDERFLOW && (sc->tulip_flags & TULIP_NEWTXTHRESH)) { - sc->tulip_flags &= ~TULIP_NEWTXTHRESH; - if (sc->tulip_cmdmode & TULIP_CMD_STOREFWD) { - printf(" (switching to store-and-forward mode)"); - } else { - printf(" (raising TX threshold to %s)", - &thrsh[9 * ((sc->tulip_cmdmode & TULIP_CMD_THRESHOLDCTL) >> 14)]); - } - } - sep = ", "; - } - } - printf("\n"); -} - -static void -tulip_intr_handler( - tulip_softc_t * const sc, - int *progress_p) -{ - TULIP_PERFSTART(intr) - u_int32_t csr; - - while ((csr = TULIP_CSR_READ(sc, csr_status)) & sc->tulip_intrmask) { - *progress_p = 1; - TULIP_CSR_WRITE(sc, csr_status, csr); - - if (csr & TULIP_STS_SYSERROR) { - sc->tulip_last_system_error = (csr & TULIP_STS_ERRORMASK) >> TULIP_STS_ERR_SHIFT; - if (sc->tulip_flags & TULIP_NOMESSAGES) { - sc->tulip_flags |= TULIP_SYSTEMERROR; - } else { - if_printf(sc->tulip_ifp, "system error: %s\n", - tulip_system_errors[sc->tulip_last_system_error]); - } - sc->tulip_flags |= TULIP_NEEDRESET; - sc->tulip_system_errors++; - break; - } - if (csr & (TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL) & sc->tulip_intrmask) { -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_link_intrs++; -#endif - if (sc->tulip_boardsw->bd_media_poll != NULL) { - (*sc->tulip_boardsw->bd_media_poll)(sc, csr & TULIP_STS_LINKFAIL - ? TULIP_MEDIAPOLL_LINKFAIL - : TULIP_MEDIAPOLL_LINKPASS); - csr &= ~TULIP_STS_ABNRMLINTR; - } - tulip_media_print(sc); - } - if (csr & (TULIP_STS_RXINTR|TULIP_STS_RXNOBUF)) { - u_int32_t misses = TULIP_CSR_READ(sc, csr_missed_frames); - if (csr & TULIP_STS_RXNOBUF) - sc->tulip_dot3stats.dot3StatsMissedFrames += misses & 0xFFFF; - /* - * Pass 2.[012] of the 21140A-A[CDE] may hang and/or corrupt data - * on receive overflows. - */ - if ((misses & 0x0FFE0000) && (sc->tulip_features & TULIP_HAVE_RXBADOVRFLW)) { - sc->tulip_dot3stats.dot3StatsInternalMacReceiveErrors++; - /* - * Stop the receiver process and spin until it's stopped. - * Tell rx_intr to drop the packets it dequeues. - */ - TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode & ~TULIP_CMD_RXRUN); - while ((TULIP_CSR_READ(sc, csr_status) & TULIP_STS_RXSTOPPED) == 0) - ; - TULIP_CSR_WRITE(sc, csr_status, TULIP_STS_RXSTOPPED); - sc->tulip_flags |= TULIP_RXIGNORE; - } - tulip_rx_intr(sc); - if (sc->tulip_flags & TULIP_RXIGNORE) { - /* - * Restart the receiver. - */ - sc->tulip_flags &= ~TULIP_RXIGNORE; - TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode); - } - } - if (csr & TULIP_STS_ABNRMLINTR) { - u_int32_t tmp = csr & sc->tulip_intrmask - & ~(TULIP_STS_NORMALINTR|TULIP_STS_ABNRMLINTR); - if (csr & TULIP_STS_TXUNDERFLOW) { - if ((sc->tulip_cmdmode & TULIP_CMD_THRESHOLDCTL) != TULIP_CMD_THRSHLD160) { - sc->tulip_cmdmode += TULIP_CMD_THRSHLD96; - sc->tulip_flags |= TULIP_NEWTXTHRESH; - } else if (sc->tulip_features & TULIP_HAVE_STOREFWD) { - sc->tulip_cmdmode |= TULIP_CMD_STOREFWD; - sc->tulip_flags |= TULIP_NEWTXTHRESH; - } - } - if (sc->tulip_flags & TULIP_NOMESSAGES) { - sc->tulip_statusbits |= tmp; - } else { - tulip_print_abnormal_interrupt(sc, tmp); - sc->tulip_flags |= TULIP_NOMESSAGES; - } - TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode); - } - if (sc->tulip_flags & (TULIP_WANTTXSTART|TULIP_TXPROBE_ACTIVE|TULIP_DOINGSETUP|TULIP_PROMISC)) { - tulip_tx_intr(sc); - if ((sc->tulip_flags & TULIP_TXPROBE_ACTIVE) == 0) - tulip_ifstart(sc->tulip_ifp); - } - } - if (sc->tulip_flags & TULIP_NEEDRESET) { - tulip_reset(sc); - tulip_init(sc); - } - TULIP_PERFEND(intr); -} - -#if defined(TULIP_USE_SOFTINTR) -/* - * This is an experimental idea to alleviate problems due to interrupt - * livelock. What is interrupt livelock? It's when you spend all your - * time servicing device interrupts and never drop below device ipl - * to do "useful" work. - * - * So what we do here is see if the device needs service and if so, - * disable interrupts (dismiss the interrupt), place it in a list of devices - * needing service, and issue a network software interrupt. - * - * When our network software interrupt routine gets called, we simply - * walk done the list of devices that we have created and deal with them - * at splnet/splsoftnet. - * - */ -static void -tulip_hardintr_handler( - tulip_softc_t * const sc, - int *progress_p) -{ - if (TULIP_CSR_READ(sc, csr_status) & (TULIP_STS_NORMALINTR|TULIP_STS_ABNRMLINTR) == 0) - return; - *progress_p = 1; - /* - * disable interrupts - */ - TULIP_CSR_WRITE(sc, csr_intr, 0); - /* - * mark it as needing a software interrupt - */ - tulip_softintr_mask |= (1U << sc->tulip_unit); -} - -static void -tulip_softintr( - void) -{ - u_int32_t softintr_mask, mask; - int progress = 0; - int unit; - int s; - - /* - * Copy mask to local copy and reset global one to 0. - */ - s = splimp(); - softintr_mask = tulip_softintr_mask; - tulip_softintr_mask = 0; - splx(s); - - /* - * Optimize for the single unit case. - */ - if (tulip_softintr_max_unit == 0) { - if (softintr_mask & 1) { - tulip_softc_t * const sc = tulips[0]; - /* - * Handle the "interrupt" and then reenable interrupts - */ - softintr_mask = 0; - tulip_intr_handler(sc, &progress); - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - } - return; - } - - /* - * Handle all "queued" interrupts in a round robin fashion. - * This is done so as not to favor a particular interface. - */ - unit = tulip_softintr_last_unit; - mask = (1U << unit); - while (softintr_mask != 0) { - if (tulip_softintr_max_unit == unit) { - unit = 0; mask = 1; - } else { - unit += 1; mask <<= 1; - } - if (softintr_mask & mask) { - tulip_softc_t * const sc = tulips[unit]; - /* - * Handle the "interrupt" and then reenable interrupts - */ - softintr_mask ^= mask; - tulip_intr_handler(sc, &progress); - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - } - } - - /* - * Save where we ending up. - */ - tulip_softintr_last_unit = unit; -} -#endif /* TULIP_USE_SOFTINTR */ - -static void -tulip_intr_shared( - void *arg) -{ - tulip_softc_t * sc = arg; - int progress = 0; - - for (; sc != NULL; sc = sc->tulip_slaves) { -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_intrs++; -#endif -#if defined(TULIP_USE_SOFTINTR) - tulip_hardintr_handler(sc, &progress); -#else - tulip_intr_handler(sc, &progress); -#endif - } -#if defined(TULIP_USE_SOFTINTR) - if (progress) - schednetisr(NETISR_DE); -#endif -} - -static void -tulip_intr_normal( - void *arg) -{ - tulip_softc_t * sc = (tulip_softc_t *) arg; - int progress = 0; - -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_intrs++; -#endif -#if defined(TULIP_USE_SOFTINTR) - tulip_hardintr_handler(sc, &progress); - if (progress) - schednetisr(NETISR_DE); -#else - tulip_intr_handler(sc, &progress); -#endif -} - -static struct mbuf * -tulip_mbuf_compress( - struct mbuf *m) -{ - struct mbuf *m0; -#if MCLBYTES >= ETHERMTU + 18 && !defined(BIG_PACKET) - MGETHDR(m0, M_DONTWAIT, MT_DATA); - if (m0 != NULL) { - if (m->m_pkthdr.len > MHLEN) { - MCLGET(m0, M_DONTWAIT); - if ((m0->m_flags & M_EXT) == 0) { - m_freem(m); - m_freem(m0); - return NULL; - } - } - m_copydata(m, 0, m->m_pkthdr.len, mtod(m0, caddr_t)); - m0->m_pkthdr.len = m0->m_len = m->m_pkthdr.len; - } -#else - int mlen = MHLEN; - int len = m->m_pkthdr.len; - struct mbuf **mp = &m0; - - while (len > 0) { - if (mlen == MHLEN) { - MGETHDR(*mp, M_DONTWAIT, MT_DATA); - } else { - MGET(*mp, M_DONTWAIT, MT_DATA); - } - if (*mp == NULL) { - m_freem(m0); - m0 = NULL; - break; - } - if (len > MLEN) { - MCLGET(*mp, M_DONTWAIT); - if (((*mp)->m_flags & M_EXT) == 0) { - m_freem(m0); - m0 = NULL; - break; - } - (*mp)->m_len = len <= MCLBYTES ? len : MCLBYTES; - } else { - (*mp)->m_len = len <= mlen ? len : mlen; - } - m_copydata(m, m->m_pkthdr.len - len, - (*mp)->m_len, mtod((*mp), caddr_t)); - len -= (*mp)->m_len; - mp = &(*mp)->m_next; - mlen = MLEN; - } -#endif - m_freem(m); - return m0; -} - -static struct mbuf * -tulip_txput( - tulip_softc_t * const sc, - struct mbuf *m) -{ - TULIP_PERFSTART(txput) - tulip_ringinfo_t * const ri = &sc->tulip_txinfo; - tulip_desc_t *eop, *nextout; - int segcnt, free; - u_int32_t d_status; -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) - bus_dmamap_t map; - int error; -#else - struct mbuf *m0; -#endif - -#if defined(TULIP_DEBUG) - if ((sc->tulip_cmdmode & TULIP_CMD_TXRUN) == 0) { - if_printf(sc->tulip_ifp, "txput%s: tx not running\n", - (sc->tulip_flags & TULIP_TXPROBE_ACTIVE) ? "(probe)" : ""); - sc->tulip_flags |= TULIP_WANTTXSTART; - sc->tulip_dbg.dbg_txput_finishes[0]++; - goto finish; - } -#endif - - /* - * Now we try to fill in our transmit descriptors. This is - * a bit reminiscent of going on the Ark two by two - * since each descriptor for the TULIP can describe - * two buffers. So we advance through packet filling - * each of the two entries at a time to to fill each - * descriptor. Clear the first and last segment bits - * in each descriptor (actually just clear everything - * but the end-of-ring or chain bits) to make sure - * we don't get messed up by previously sent packets. - * - * We may fail to put the entire packet on the ring if - * there is either not enough ring entries free or if the - * packet has more than MAX_TXSEG segments. In the former - * case we will just wait for the ring to empty. In the - * latter case we have to recopy. - */ -#if !defined(TULIP_BUS_DMA) || defined(TULIP_BUS_DMA_NOTX) - again: - m0 = m; -#endif - d_status = 0; - eop = nextout = ri->ri_nextout; - segcnt = 0; - free = ri->ri_free; - -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) - /* - * Reclaim some dma maps from if we are out. - */ - if (sc->tulip_txmaps_free == 0) { -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_no_txmaps++; -#endif - free += tulip_tx_intr(sc); - } - if (sc->tulip_txmaps_free > 0) { - map = sc->tulip_txmaps[sc->tulip_txmaps_free-1]; - } else { - sc->tulip_flags |= TULIP_WANTTXSTART; -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txput_finishes[1]++; -#endif - goto finish; - } - error = bus_dmamap_load_mbuf(sc->tulip_dmatag, map, m, BUS_DMA_NOWAIT); - if (error != 0) { - if (error == EFBIG) { - /* - * The packet exceeds the number of transmit buffer - * entries that we can use for one packet, so we have - * to recopy it into one mbuf and then try again. - */ - m = tulip_mbuf_compress(m); - if (m == NULL) { -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txput_finishes[2]++; -#endif - goto finish; - } - error = bus_dmamap_load_mbuf(sc->tulip_dmatag, map, m, BUS_DMA_NOWAIT); - } - if (error != 0) { - if_printf(sc->tulip_ifp, - "unable to load tx map, error = %d\n", error); -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txput_finishes[3]++; -#endif - goto finish; - } - } - if ((free -= (map->dm_nsegs + 1) / 2) <= 0 - /* - * See if there's any unclaimed space in the transmit ring. - */ - && (free += tulip_tx_intr(sc)) <= 0) { - /* - * There's no more room but since nothing - * has been committed at this point, just - * show output is active, put back the - * mbuf and return. - */ - sc->tulip_flags |= TULIP_WANTTXSTART; -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txput_finishes[4]++; -#endif - bus_dmamap_unload(sc->tulip_dmatag, map); - goto finish; - } - for (; map->dm_nsegs - segcnt > 1; segcnt += 2) { - eop = nextout; - eop->d_flag &= TULIP_DFLAG_ENDRING|TULIP_DFLAG_CHAIN; - eop->d_status = d_status; - eop->d_addr1 = map->dm_segs[segcnt].ds_addr; - eop->d_length1 = map->dm_segs[segcnt].ds_len; - eop->d_addr2 = map->dm_segs[segcnt+1].ds_addr; - eop->d_length2 = map->dm_segs[segcnt+1].ds_len; - d_status = TULIP_DSTS_OWNER; - if (++nextout == ri->ri_last) - nextout = ri->ri_first; - } - if (segcnt < map->dm_nsegs) { - eop = nextout; - eop->d_flag &= TULIP_DFLAG_ENDRING|TULIP_DFLAG_CHAIN; - eop->d_status = d_status; - eop->d_addr1 = map->dm_segs[segcnt].ds_addr; - eop->d_length1 = map->dm_segs[segcnt].ds_len; - eop->d_addr2 = 0; - eop->d_length2 = 0; - if (++nextout == ri->ri_last) - nextout = ri->ri_first; - } - TULIP_TXMAP_PRESYNC(sc, map); - M_SETCTX(m, map); - map = NULL; - --sc->tulip_txmaps_free; /* commit to using the dmamap */ - -#else /* !TULIP_BUS_DMA */ - - do { - int len = m0->m_len; - caddr_t addr = mtod(m0, caddr_t); - unsigned clsize = PAGE_SIZE - (((uintptr_t) addr) & (PAGE_SIZE-1)); - - while (len > 0) { - unsigned slen = min(len, clsize); -#ifdef BIG_PACKET - int partial = 0; - if (slen >= 2048) - slen = 2040, partial = 1; -#endif - segcnt++; - if (segcnt > TULIP_MAX_TXSEG) { - /* - * The packet exceeds the number of transmit buffer - * entries that we can use for one packet, so we have - * recopy it into one mbuf and then try again. - */ - m = tulip_mbuf_compress(m); - if (m == NULL) - goto finish; - goto again; - } - if (segcnt & 1) { - if (--free == 0) { - /* - * See if there's any unclaimed space in the - * transmit ring. - */ - if ((free += tulip_tx_intr(sc)) == 0) { - /* - * There's no more room but since nothing - * has been committed at this point, just - * show output is active, put back the - * mbuf and return. - */ - sc->tulip_flags |= TULIP_WANTTXSTART; -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txput_finishes[1]++; -#endif - goto finish; - } - } - eop = nextout; - if (++nextout == ri->ri_last) - nextout = ri->ri_first; - eop->d_flag &= TULIP_DFLAG_ENDRING|TULIP_DFLAG_CHAIN; - eop->d_status = d_status; - eop->d_addr1 = TULIP_KVATOPHYS(sc, addr); - eop->d_length1 = slen; - } else { - /* - * Fill in second half of descriptor - */ - eop->d_addr2 = TULIP_KVATOPHYS(sc, addr); - eop->d_length2 = slen; - } - d_status = TULIP_DSTS_OWNER; - len -= slen; - addr += slen; -#ifdef BIG_PACKET - if (partial) - continue; -#endif - clsize = PAGE_SIZE; - } - } while ((m0 = m0->m_next) != NULL); -#endif /* TULIP_BUS_DMA */ - - /* - * bounce a copy to the bpf listener, if any. - */ - BPF_MTAP(sc->tulip_ifp, m); - - /* - * The descriptors have been filled in. Now get ready - * to transmit. - */ - _IF_ENQUEUE(&sc->tulip_txq, m); - m = NULL; - - /* - * Make sure the next descriptor after this packet is owned - * by us since it may have been set up above if we ran out - * of room in the ring. - */ - nextout->d_status = 0; - TULIP_TXDESC_PRESYNC(sc, nextout, sizeof(u_int32_t)); - -#if !defined(TULIP_BUS_DMA) || defined(TULIP_BUS_DMA_NOTX) - /* - * If we only used the first segment of the last descriptor, - * make sure the second segment will not be used. - */ - if (segcnt & 1) { - eop->d_addr2 = 0; - eop->d_length2 = 0; - } -#endif /* TULIP_BUS_DMA */ - - /* - * Mark the last and first segments, indicate we want a transmit - * complete interrupt, and tell it to transmit! - */ - eop->d_flag |= TULIP_DFLAG_TxLASTSEG|TULIP_DFLAG_TxWANTINTR; - - /* - * Note that ri->ri_nextout is still the start of the packet - * and until we set the OWNER bit, we can still back out of - * everything we have done. - */ - ri->ri_nextout->d_flag |= TULIP_DFLAG_TxFIRSTSEG; -#if defined(TULIP_BUS_MAP) && !defined(TULIP_BUS_DMA_NOTX) - if (eop < ri->ri_nextout) { - TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout, - (caddr_t) ri->ri_last - (caddr_t) ri->ri_nextout); - TULIP_TXDESC_PRESYNC(sc, ri->ri_first, - (caddr_t) (eop + 1) - (caddr_t) ri->ri_first); - } else { - TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout, - (caddr_t) (eop + 1) - (caddr_t) ri->ri_nextout); - } -#endif - ri->ri_nextout->d_status = TULIP_DSTS_OWNER; - TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout, sizeof(u_int32_t)); - - /* - * This advances the ring for us. - */ - ri->ri_nextout = nextout; - ri->ri_free = free; - - TULIP_PERFEND(txput); - - if (sc->tulip_flags & TULIP_TXPROBE_ACTIVE) { - TULIP_CSR_WRITE(sc, csr_txpoll, 1); - sc->tulip_ifp->if_flags |= IFF_OACTIVE; - sc->tulip_ifp->if_start = tulip_ifstart; - TULIP_PERFEND(txput); - return NULL; - } - - /* - * switch back to the single queueing ifstart. - */ - sc->tulip_flags &= ~TULIP_WANTTXSTART; - if (sc->tulip_txtimer == 0) - sc->tulip_txtimer = TULIP_TXTIMER; -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txput_finishes[5]++; -#endif - - /* - * If we want a txstart, there must be not enough space in the - * transmit ring. So we want to enable transmit done interrupts - * so we can immediately reclaim some space. When the transmit - * interrupt is posted, the interrupt handler will call tx_intr - * to reclaim space and then txstart (since WANTTXSTART is set). - * txstart will move the packet into the transmit ring and clear - * WANTTXSTART thereby causing TXINTR to be cleared. - */ - finish: -#if defined(TULIP_DEBUG) - sc->tulip_dbg.dbg_txput_finishes[6]++; -#endif - if (sc->tulip_flags & (TULIP_WANTTXSTART|TULIP_DOINGSETUP)) { - sc->tulip_ifp->if_flags |= IFF_OACTIVE; - sc->tulip_ifp->if_start = tulip_ifstart; - if ((sc->tulip_intrmask & TULIP_STS_TXINTR) == 0) { - sc->tulip_intrmask |= TULIP_STS_TXINTR; - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - } - } else if ((sc->tulip_flags & TULIP_PROMISC) == 0) { - if (sc->tulip_intrmask & TULIP_STS_TXINTR) { - sc->tulip_intrmask &= ~TULIP_STS_TXINTR; - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - } - } - TULIP_CSR_WRITE(sc, csr_txpoll, 1); - TULIP_PERFEND(txput); - return m; -} - -static void -tulip_txput_setup( - tulip_softc_t * const sc) -{ - tulip_ringinfo_t * const ri = &sc->tulip_txinfo; - tulip_desc_t *nextout; - - /* - * We will transmit, at most, one setup packet per call to ifstart. - */ - -#if defined(TULIP_DEBUG) - if ((sc->tulip_cmdmode & TULIP_CMD_TXRUN) == 0) { - if_printf(sc->tulip_ifp, "txput_setup: tx not running\n"); - sc->tulip_flags |= TULIP_WANTTXSTART; - sc->tulip_ifp->if_start = tulip_ifstart; - return; - } -#endif - /* - * Try to reclaim some free descriptors.. - */ - if (ri->ri_free < 2) - tulip_tx_intr(sc); - if ((sc->tulip_flags & TULIP_DOINGSETUP) || ri->ri_free == 1) { - sc->tulip_flags |= TULIP_WANTTXSTART; - sc->tulip_ifp->if_start = tulip_ifstart; - return; - } - bcopy(sc->tulip_setupdata, sc->tulip_setupbuf, - sizeof(sc->tulip_setupbuf)); - /* - * Clear WANTSETUP and set DOINGSETUP. Set know that WANTSETUP is - * set and DOINGSETUP is clear doing an XOR of the two will DTRT. - */ - sc->tulip_flags ^= TULIP_WANTSETUP|TULIP_DOINGSETUP; - ri->ri_free--; - nextout = ri->ri_nextout; - nextout->d_flag &= TULIP_DFLAG_ENDRING|TULIP_DFLAG_CHAIN; - nextout->d_flag |= TULIP_DFLAG_TxFIRSTSEG|TULIP_DFLAG_TxLASTSEG - |TULIP_DFLAG_TxSETUPPKT|TULIP_DFLAG_TxWANTINTR; - if (sc->tulip_flags & TULIP_WANTHASHPERFECT) - nextout->d_flag |= TULIP_DFLAG_TxHASHFILT; - else if (sc->tulip_flags & TULIP_WANTHASHONLY) - nextout->d_flag |= TULIP_DFLAG_TxHASHFILT|TULIP_DFLAG_TxINVRSFILT; - - nextout->d_length2 = 0; - nextout->d_addr2 = 0; -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) - nextout->d_length1 = sc->tulip_setupmap->dm_segs[0].ds_len; - nextout->d_addr1 = sc->tulip_setupmap->dm_segs[0].ds_addr; - if (sc->tulip_setupmap->dm_nsegs == 2) { - nextout->d_length2 = sc->tulip_setupmap->dm_segs[1].ds_len; - nextout->d_addr2 = sc->tulip_setupmap->dm_segs[1].ds_addr; - } - TULIP_TXMAP_PRESYNC(sc, sc->tulip_setupmap); - TULIP_TXDESC_PRESYNC(sc, nextout, sizeof(*nextout)); -#else - nextout->d_length1 = sizeof(sc->tulip_setupbuf); - nextout->d_addr1 = TULIP_KVATOPHYS(sc, sc->tulip_setupbuf); -#endif - - /* - * Advance the ring for the next transmit packet. - */ - if (++ri->ri_nextout == ri->ri_last) - ri->ri_nextout = ri->ri_first; - - /* - * Make sure the next descriptor is owned by us since it - * may have been set up above if we ran out of room in the - * ring. - */ - ri->ri_nextout->d_status = 0; - TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout, sizeof(u_int32_t)); - nextout->d_status = TULIP_DSTS_OWNER; - /* - * Flush the ownwership of the current descriptor - */ - TULIP_TXDESC_PRESYNC(sc, nextout, sizeof(u_int32_t)); - TULIP_CSR_WRITE(sc, csr_txpoll, 1); - if ((sc->tulip_intrmask & TULIP_STS_TXINTR) == 0) { - sc->tulip_intrmask |= TULIP_STS_TXINTR; - TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask); - } -} - - -/* - * This routine is entered at splnet() (splsoftnet() on NetBSD) - * and thereby imposes no problems when TULIP_USE_SOFTINTR is - * defined or not. - */ -static int -tulip_ifioctl( - struct ifnet * ifp, - u_long cmd, - caddr_t data) -{ - TULIP_PERFSTART(ifioctl) - tulip_softc_t * const sc = (tulip_softc_t *)ifp->if_softc; - struct ifreq *ifr = (struct ifreq *) data; - int s; - int error = 0; - -#if defined(TULIP_USE_SOFTINTR) - s = splnet(); -#else - s = splimp(); -#endif - switch (cmd) { - case SIOCSIFFLAGS: { - tulip_addr_filter(sc); /* reinit multicast filter */ - tulip_init(sc); - break; - } - - case SIOCSIFMEDIA: - case SIOCGIFMEDIA: { - error = ifmedia_ioctl(ifp, ifr, &sc->tulip_ifmedia, cmd); - break; - } - - case SIOCADDMULTI: - case SIOCDELMULTI: { - /* - * Update multicast listeners - */ - tulip_addr_filter(sc); /* reset multicast filtering */ - tulip_init(sc); - error = 0; - break; - } - - case SIOCSIFMTU: - /* - * Set the interface MTU. - */ - if (ifr->ifr_mtu > ETHERMTU -#ifdef BIG_PACKET - && sc->tulip_chipid != TULIP_21140 - && sc->tulip_chipid != TULIP_21140A - && sc->tulip_chipid != TULIP_21041 -#endif - ) { - error = EINVAL; - break; - } - ifp->if_mtu = ifr->ifr_mtu; -#ifdef BIG_PACKET - tulip_reset(sc); - tulip_init(sc); -#endif - break; - -#ifdef SIOCGADDRROM - case SIOCGADDRROM: { - error = copyout(sc->tulip_rombuf, ifr->ifr_data, sizeof(sc->tulip_rombuf)); - break; - } -#endif -#ifdef SIOCGCHIPID - case SIOCGCHIPID: { - ifr->ifr_metric = (int) sc->tulip_chipid; - break; - } -#endif - default: { - error = ether_ioctl(ifp, cmd, data); - break; - } - } - - splx(s); - TULIP_PERFEND(ifioctl); - return error; -} - -/* - * These routines gets called at device spl (from ether_output). This might - * pose a problem for TULIP_USE_SOFTINTR if ether_output is called at - * device spl from another driver. - */ - -static void -tulip_ifstart( - struct ifnet * const ifp) -{ - TULIP_PERFSTART(ifstart) - tulip_softc_t * const sc = (tulip_softc_t *)ifp->if_softc; - - if (sc->tulip_ifp->if_flags & IFF_RUNNING) { - - if ((sc->tulip_flags & (TULIP_WANTSETUP|TULIP_TXPROBE_ACTIVE)) == TULIP_WANTSETUP) - tulip_txput_setup(sc); - - while (!IFQ_DRV_IS_EMPTY(&sc->tulip_ifp->if_snd)) { - struct mbuf *m; - IFQ_DRV_DEQUEUE(&sc->tulip_ifp->if_snd, m); - if(m == NULL) - break; - if ((m = tulip_txput(sc, m)) != NULL) { - IFQ_DRV_PREPEND(&sc->tulip_ifp->if_snd, m); - break; - } - } - } - - TULIP_PERFEND(ifstart); -} - -/* - * Even though this routine runs at device spl, it does not break - * our use of splnet (splsoftnet under NetBSD) for the majority - * of this driver (if TULIP_USE_SOFTINTR defined) since - * if_watcbog is called from if_watchdog which is called from - * splsoftclock which is below spl[soft]net. - */ -static void -tulip_ifwatchdog( - struct ifnet *ifp) -{ - TULIP_PERFSTART(ifwatchdog) - tulip_softc_t * const sc = (tulip_softc_t *)ifp->if_softc; - -#if defined(TULIP_DEBUG) - u_int32_t rxintrs = sc->tulip_dbg.dbg_rxintrs - sc->tulip_dbg.dbg_last_rxintrs; - if (rxintrs > sc->tulip_dbg.dbg_high_rxintrs_hz) - sc->tulip_dbg.dbg_high_rxintrs_hz = rxintrs; - sc->tulip_dbg.dbg_last_rxintrs = sc->tulip_dbg.dbg_rxintrs; -#endif /* TULIP_DEBUG */ - - sc->tulip_ifp->if_timer = 1; - /* - * These should be rare so do a bulk test up front so we can just skip - * them if needed. - */ - if (sc->tulip_flags & (TULIP_SYSTEMERROR|TULIP_RXBUFSLOW|TULIP_NOMESSAGES)) { - /* - * If the number of receive buffer is low, try to refill - */ - if (sc->tulip_flags & TULIP_RXBUFSLOW) - tulip_rx_intr(sc); - - if (sc->tulip_flags & TULIP_SYSTEMERROR) { - if_printf(sc->tulip_ifp, "%d system errors: last was %s\n", - sc->tulip_system_errors, - tulip_system_errors[sc->tulip_last_system_error]); - } - if (sc->tulip_statusbits) { - tulip_print_abnormal_interrupt(sc, sc->tulip_statusbits); - sc->tulip_statusbits = 0; - } - - sc->tulip_flags &= ~(TULIP_NOMESSAGES|TULIP_SYSTEMERROR); - } - - if (sc->tulip_txtimer) - tulip_tx_intr(sc); - if (sc->tulip_txtimer && --sc->tulip_txtimer == 0) { - if_printf(sc->tulip_ifp, "transmission timeout\n"); - if (TULIP_DO_AUTOSENSE(sc)) { - sc->tulip_media = TULIP_MEDIA_UNKNOWN; - sc->tulip_probe_state = TULIP_PROBE_INACTIVE; - sc->tulip_flags &= ~(TULIP_WANTRXACT|TULIP_LINKUP); - } - tulip_reset(sc); - tulip_init(sc); - } - - TULIP_PERFEND(ifwatchdog); - TULIP_PERFMERGE(sc, perf_intr_cycles); - TULIP_PERFMERGE(sc, perf_ifstart_cycles); - TULIP_PERFMERGE(sc, perf_ifioctl_cycles); - TULIP_PERFMERGE(sc, perf_ifwatchdog_cycles); - TULIP_PERFMERGE(sc, perf_timeout_cycles); - TULIP_PERFMERGE(sc, perf_ifstart_one_cycles); - TULIP_PERFMERGE(sc, perf_txput_cycles); - TULIP_PERFMERGE(sc, perf_txintr_cycles); - TULIP_PERFMERGE(sc, perf_rxintr_cycles); - TULIP_PERFMERGE(sc, perf_rxget_cycles); - TULIP_PERFMERGE(sc, perf_intr); - TULIP_PERFMERGE(sc, perf_ifstart); - TULIP_PERFMERGE(sc, perf_ifioctl); - TULIP_PERFMERGE(sc, perf_ifwatchdog); - TULIP_PERFMERGE(sc, perf_timeout); - TULIP_PERFMERGE(sc, perf_ifstart_one); - TULIP_PERFMERGE(sc, perf_txput); - TULIP_PERFMERGE(sc, perf_txintr); - TULIP_PERFMERGE(sc, perf_rxintr); - TULIP_PERFMERGE(sc, perf_rxget); -} - -/* - * All printf's are real as of now! - */ -#ifdef printf -#undef printf -#endif - -static void -tulip_attach( - tulip_softc_t * const sc) -{ - struct ifnet *ifp; - - ifp = sc->tulip_ifp = if_alloc(IFT_ETHER); - - /* XXX: driver name/unit should be set some other way */ - if_initname(ifp, "de", sc->tulip_unit); - ifp->if_softc = sc; - ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_MULTICAST|IFF_NEEDSGIANT; - ifp->if_ioctl = tulip_ifioctl; - ifp->if_start = tulip_ifstart; - ifp->if_watchdog = tulip_ifwatchdog; - ifp->if_timer = 1; - ifp->if_init = tulip_ifinit; - - if_printf(ifp, "%s%s pass %d.%d%s\n", - sc->tulip_boardid, - tulip_chipdescs[sc->tulip_chipid], - (sc->tulip_revinfo & 0xF0) >> 4, - sc->tulip_revinfo & 0x0F, - (sc->tulip_features & (TULIP_HAVE_ISVSROM|TULIP_HAVE_OKSROM)) - == TULIP_HAVE_ISVSROM ? " (invalid EESPROM checksum)" : ""); -#ifndef __FreeBSD__ - if_printf(ifp, "address %6D\n", sc->tulip_enaddr, ":"); -#endif - -#if defined(__alpha__) - /* - * In case the SRM console told us about a bogus media, - * we need to check to be safe. - */ - if (sc->tulip_mediums[sc->tulip_media] == NULL) - sc->tulip_media = TULIP_MEDIA_UNKNOWN; -#endif - - (*sc->tulip_boardsw->bd_media_probe)(sc); - ifmedia_init(&sc->tulip_ifmedia, 0, - tulip_ifmedia_change, - tulip_ifmedia_status); - sc->tulip_flags &= ~TULIP_DEVICEPROBE; - tulip_ifmedia_add(sc); - - tulip_reset(sc); - - ether_ifattach(sc->tulip_ifp, sc->tulip_enaddr); - IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); - ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; - IFQ_SET_READY(&ifp->if_snd); -} - -#if defined(TULIP_BUS_DMA) -#if !defined(TULIP_BUS_DMA_NOTX) || !defined(TULIP_BUS_DMA_NORX) -static int -tulip_busdma_allocmem( - tulip_softc_t * const sc, - size_t size, - bus_dmamap_t *map_p, - tulip_desc_t **desc_p) -{ - bus_dma_segment_t segs[1]; - int nsegs, error; - error = bus_dmamem_alloc(sc->tulip_dmatag, size, 1, PAGE_SIZE, - segs, sizeof(segs)/sizeof(segs[0]), - &nsegs, BUS_DMA_NOWAIT); - if (error == 0) { - void *desc; - error = bus_dmamem_map(sc->tulip_dmatag, segs, nsegs, size, - (void *) &desc, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); - if (error == 0) { - bus_dmamap_t map; - error = bus_dmamap_create(sc->tulip_dmatag, size, 1, size, 0, - BUS_DMA_NOWAIT, &map); - if (error == 0) { - error = bus_dmamap_load(sc->tulip_dmatag, map, desc, - size, NULL, BUS_DMA_NOWAIT); - if (error) - bus_dmamap_destroy(sc->tulip_dmatag, map); - else - *map_p = map; - } - if (error) - bus_dmamem_unmap(sc->tulip_dmatag, desc, size); - } - if (error) - bus_dmamem_free(sc->tulip_dmatag, segs, nsegs); - else - *desc_p = desc; - } - return error; -} -#endif - -static int -tulip_busdma_init( - tulip_softc_t * const sc) -{ - int error = 0; - -#if !defined(TULIP_BUS_DMA_NOTX) - /* - * Allocate dmamap for setup descriptor - */ - error = bus_dmamap_create(sc->tulip_dmatag, sizeof(sc->tulip_setupbuf), 2, - sizeof(sc->tulip_setupbuf), 0, BUS_DMA_NOWAIT, - &sc->tulip_setupmap); - if (error == 0) { - error = bus_dmamap_load(sc->tulip_dmatag, sc->tulip_setupmap, - sc->tulip_setupbuf, sizeof(sc->tulip_setupbuf), - NULL, BUS_DMA_NOWAIT); - if (error) - bus_dmamap_destroy(sc->tulip_dmatag, sc->tulip_setupmap); - } - /* - * Allocate space and dmamap for transmit ring - */ - if (error == 0) { - error = tulip_busdma_allocmem(sc, sizeof(tulip_desc_t) * TULIP_TXDESCS, - &sc->tulip_txdescmap, - &sc->tulip_txdescs); - } - - /* - * Allocate dmamaps for each transmit descriptors - */ - if (error == 0) { - while (error == 0 && sc->tulip_txmaps_free < TULIP_TXDESCS) { - bus_dmamap_t map; - if ((error = TULIP_TXMAP_CREATE(sc, &map)) == 0) - sc->tulip_txmaps[sc->tulip_txmaps_free++] = map; - } - if (error) { - while (sc->tulip_txmaps_free > 0) - bus_dmamap_destroy(sc->tulip_dmatag, - sc->tulip_txmaps[--sc->tulip_txmaps_free]); - } - } -#else - if (error == 0) { - sc->tulip_txdescs = (tulip_desc_t *) malloc(TULIP_TXDESCS * sizeof(tulip_desc_t), M_DEVBUF, M_NOWAIT); - if (sc->tulip_txdescs == NULL) - error = ENOMEM; - } -#endif -#if !defined(TULIP_BUS_DMA_NORX) - /* - * Allocate space and dmamap for receive ring - */ - if (error == 0) { - error = tulip_busdma_allocmem(sc, sizeof(tulip_desc_t) * TULIP_RXDESCS, - &sc->tulip_rxdescmap, - &sc->tulip_rxdescs); - } - - /* - * Allocate dmamaps for each receive descriptors - */ - if (error == 0) { - while (error == 0 && sc->tulip_rxmaps_free < TULIP_RXDESCS) { - bus_dmamap_t map; - if ((error = TULIP_RXMAP_CREATE(sc, &map)) == 0) - sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map; - } - if (error) { - while (sc->tulip_rxmaps_free > 0) - bus_dmamap_destroy(sc->tulip_dmatag, - sc->tulip_rxmaps[--sc->tulip_rxmaps_free]); - } - } -#else - if (error == 0) { - sc->tulip_rxdescs = (tulip_desc_t *) malloc(TULIP_RXDESCS * sizeof(tulip_desc_t), M_DEVBUF, M_NOWAIT); - if (sc->tulip_rxdescs == NULL) - error = ENOMEM; - } -#endif - return error; -} -#endif /* TULIP_BUS_DMA */ - -static void -tulip_initcsrs( - tulip_softc_t * const sc, - tulip_csrptr_t csr_base, - size_t csr_size) -{ - sc->tulip_csrs.csr_busmode = csr_base + 0 * csr_size; - sc->tulip_csrs.csr_txpoll = csr_base + 1 * csr_size; - sc->tulip_csrs.csr_rxpoll = csr_base + 2 * csr_size; - sc->tulip_csrs.csr_rxlist = csr_base + 3 * csr_size; - sc->tulip_csrs.csr_txlist = csr_base + 4 * csr_size; - sc->tulip_csrs.csr_status = csr_base + 5 * csr_size; - sc->tulip_csrs.csr_command = csr_base + 6 * csr_size; - sc->tulip_csrs.csr_intr = csr_base + 7 * csr_size; - sc->tulip_csrs.csr_missed_frames = csr_base + 8 * csr_size; - sc->tulip_csrs.csr_9 = csr_base + 9 * csr_size; - sc->tulip_csrs.csr_10 = csr_base + 10 * csr_size; - sc->tulip_csrs.csr_11 = csr_base + 11 * csr_size; - sc->tulip_csrs.csr_12 = csr_base + 12 * csr_size; - sc->tulip_csrs.csr_13 = csr_base + 13 * csr_size; - sc->tulip_csrs.csr_14 = csr_base + 14 * csr_size; - sc->tulip_csrs.csr_15 = csr_base + 15 * csr_size; -} - -static void -tulip_initring( - tulip_softc_t * const sc, - tulip_ringinfo_t * const ri, - tulip_desc_t *descs, - int ndescs) -{ - ri->ri_max = ndescs; - ri->ri_first = descs; - ri->ri_last = ri->ri_first + ri->ri_max; - bzero((caddr_t) ri->ri_first, sizeof(ri->ri_first[0]) * ri->ri_max); - ri->ri_last[-1].d_flag = TULIP_DFLAG_ENDRING; -} - -/* - * This is the PCI configuration support. - */ - -#define PCI_CBIO 0x10 /* Configuration Base IO Address */ -#define PCI_CBMA 0x14 /* Configuration Base Memory Address */ -#define PCI_CFDA 0x40 /* Configuration Driver Area */ - -static int -tulip_pci_probe(device_t dev) -{ - const char *name = NULL; - - if (pci_get_vendor(dev) != DEC_VENDORID) - return ENXIO; - - /* - * Some LanMedia WAN cards use the Tulip chip, but they have - * their own driver, and we should not recognize them - */ - if (pci_get_subvendor(dev) == 0x1376) - return ENXIO; - - switch (pci_get_device(dev)) { - case CHIPID_21040: - name = "Digital 21040 Ethernet"; - break; - case CHIPID_21041: - name = "Digital 21041 Ethernet"; - break; - case CHIPID_21140: - if (pci_get_revid(dev) >= 0x20) - name = "Digital 21140A Fast Ethernet"; - else - name = "Digital 21140 Fast Ethernet"; - break; - case CHIPID_21142: - if (pci_get_revid(dev) >= 0x20) - name = "Digital 21143 Fast Ethernet"; - else - name = "Digital 21142 Fast Ethernet"; - break; - } - if (name) { - device_set_desc(dev, name); - return BUS_PROBE_LOW_PRIORITY; - } - return ENXIO; -} - -static int -tulip_shutdown(device_t dev) -{ - tulip_softc_t * const sc = device_get_softc(dev); - TULIP_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET); - DELAY(10); /* Wait 10 microseconds (actually 50 PCI cycles but at - 33MHz that comes to two microseconds but wait a - bit longer anyways) */ - return 0; -} - -static int -tulip_pci_attach(device_t dev) -{ - tulip_softc_t *sc; -#if defined(__alpha__) - tulip_media_t media = TULIP_MEDIA_UNKNOWN; -#endif - int retval, idx; - u_int32_t revinfo, cfdainfo, cfcsinfo; - unsigned csroffset = TULIP_PCI_CSROFFSET; - unsigned csrsize = TULIP_PCI_CSRSIZE; - tulip_csrptr_t csr_base; - tulip_chipid_t chipid = TULIP_CHIPID_UNKNOWN; - struct resource *res; - int rid, unit; - - unit = device_get_unit(dev); - - if (unit >= TULIP_MAX_DEVICES) { - device_printf(dev, "not configured; limit of %d reached or exceeded\n", - TULIP_MAX_DEVICES); - return ENXIO; - } - - revinfo = pci_get_revid(dev); - cfdainfo = pci_read_config(dev, PCI_CFDA, 4); - cfcsinfo = pci_read_config(dev, PCIR_COMMAND, 4); - - /* turn busmaster on in case BIOS doesn't set it */ - if(!(cfcsinfo & PCIM_CMD_BUSMASTEREN)) { - cfcsinfo |= PCIM_CMD_BUSMASTEREN; - pci_write_config(dev, PCIR_COMMAND, cfcsinfo, 4); - } - - if (pci_get_vendor(dev) == DEC_VENDORID) { - if (pci_get_device(dev) == CHIPID_21040) - chipid = TULIP_21040; - else if (pci_get_device(dev) == CHIPID_21041) - chipid = TULIP_21041; - else if (pci_get_device(dev) == CHIPID_21140) - chipid = (revinfo >= 0x20) ? TULIP_21140A : TULIP_21140; - else if (pci_get_device(dev) == CHIPID_21142) - chipid = (revinfo >= 0x20) ? TULIP_21143 : TULIP_21142; - } - if (chipid == TULIP_CHIPID_UNKNOWN) - return ENXIO; - - if (chipid == TULIP_21040 && revinfo < 0x20) { - device_printf(dev, - "not configured; 21040 pass 2.0 required (%d.%d found)\n", - revinfo >> 4, revinfo & 0x0f); - return ENXIO; - } else if (chipid == TULIP_21140 && revinfo < 0x11) { - device_printf(dev, - "not configured; 21140 pass 1.1 required (%d.%d found)\n", - revinfo >> 4, revinfo & 0x0f); - return ENXIO; - } - - sc = device_get_softc(dev); - sc->tulip_pci_busno = pci_get_bus(dev); - sc->tulip_pci_devno = pci_get_slot(dev); - sc->tulip_chipid = chipid; - sc->tulip_flags |= TULIP_DEVICEPROBE; - if (chipid == TULIP_21140 || chipid == TULIP_21140A) - sc->tulip_features |= TULIP_HAVE_GPR|TULIP_HAVE_STOREFWD; - if (chipid == TULIP_21140A && revinfo <= 0x22) - sc->tulip_features |= TULIP_HAVE_RXBADOVRFLW; - if (chipid == TULIP_21140) - sc->tulip_features |= TULIP_HAVE_BROKEN_HASH; - if (chipid != TULIP_21040 && chipid != TULIP_21140) - sc->tulip_features |= TULIP_HAVE_POWERMGMT; - if (chipid == TULIP_21041 || chipid == TULIP_21142 || chipid == TULIP_21143) { - sc->tulip_features |= TULIP_HAVE_DUALSENSE; - if (chipid != TULIP_21041 || revinfo >= 0x20) - sc->tulip_features |= TULIP_HAVE_SIANWAY; - if (chipid != TULIP_21041) - sc->tulip_features |= TULIP_HAVE_SIAGP|TULIP_HAVE_RXBADOVRFLW|TULIP_HAVE_STOREFWD; - if (chipid != TULIP_21041 && revinfo >= 0x20) - sc->tulip_features |= TULIP_HAVE_SIA100; - } - - if (sc->tulip_features & TULIP_HAVE_POWERMGMT - && (cfdainfo & (TULIP_CFDA_SLEEP|TULIP_CFDA_SNOOZE))) { - cfdainfo &= ~(TULIP_CFDA_SLEEP|TULIP_CFDA_SNOOZE); - pci_write_config(dev, PCI_CFDA, cfdainfo, 4); - DELAY(11*1000); - } -#if defined(__alpha__) - /* - * The Alpha SRM console encodes a console set media in the driver - * part of the CFDA register. Note that the Multia presents a - * problem in that its BNC mode is really EXTSIA. So in that case - * force a probe. - */ - switch ((cfdainfo >> 8) & 0xff) { - case 1: media = chipid > TULIP_21040 ? TULIP_MEDIA_AUI : TULIP_MEDIA_AUIBNC; break; - case 2: media = chipid > TULIP_21040 ? TULIP_MEDIA_BNC : TULIP_MEDIA_UNKNOWN; break; - case 3: media = TULIP_MEDIA_10BASET; break; - case 4: media = TULIP_MEDIA_10BASET_FD; break; - case 5: media = TULIP_MEDIA_100BASETX; break; - case 6: media = TULIP_MEDIA_100BASETX_FD; break; - default: media = TULIP_MEDIA_UNKNOWN; break; - } -#endif - - sc->tulip_unit = unit; - sc->tulip_revinfo = revinfo; -#if defined(TULIP_IOMAPPED) - rid = PCI_CBIO; - res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE); -#else - rid = PCI_CBMA; - res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); -#endif - if (!res) - return ENXIO; - sc->tulip_csrs_bst = rman_get_bustag(res); - sc->tulip_csrs_bsh = rman_get_bushandle(res); - csr_base = 0; - - tulips[unit] = sc; - - tulip_initcsrs(sc, csr_base + csroffset, csrsize); - -#if defined(TULIP_BUS_DMA) - if ((retval = tulip_busdma_init(sc)) != 0) { - printf("error initing bus_dma: %d\n", retval); - return ENXIO; - } -#else - sc->tulip_rxdescs = (tulip_desc_t *) malloc(sizeof(tulip_desc_t) * TULIP_RXDESCS, M_DEVBUF, M_NOWAIT); - sc->tulip_txdescs = (tulip_desc_t *) malloc(sizeof(tulip_desc_t) * TULIP_TXDESCS, M_DEVBUF, M_NOWAIT); - if (sc->tulip_rxdescs == NULL || sc->tulip_txdescs == NULL) { - device_printf(dev, "malloc failed\n"); - if (sc->tulip_rxdescs) - free((caddr_t) sc->tulip_rxdescs, M_DEVBUF); - if (sc->tulip_txdescs) - free((caddr_t) sc->tulip_txdescs, M_DEVBUF); - return ENXIO; - } -#endif - - tulip_initring(sc, &sc->tulip_rxinfo, sc->tulip_rxdescs, TULIP_RXDESCS); - tulip_initring(sc, &sc->tulip_txinfo, sc->tulip_txdescs, TULIP_TXDESCS); - - /* - * Make sure there won't be any interrupts or such... - */ - TULIP_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET); - DELAY(100); /* Wait 10 microseconds (actually 50 PCI cycles but at - 33MHz that comes to two microseconds but wait a - bit longer anyways) */ - - if ((retval = tulip_read_macaddr(sc)) < 0) { - device_printf(dev, "can't read ENET ROM (why=%d) (", retval); - for (idx = 0; idx < 32; idx++) - printf("%02x", sc->tulip_rombuf[idx]); - printf("\n"); - device_printf(dev, "%s%s pass %d.%d\n", - sc->tulip_boardid, tulip_chipdescs[sc->tulip_chipid], - (sc->tulip_revinfo & 0xF0) >> 4, sc->tulip_revinfo & 0x0F); - device_printf(dev, "address unknown\n"); - } else { - int s; - void (*intr_rtn)(void *) = tulip_intr_normal; - - if (sc->tulip_features & TULIP_HAVE_SHAREDINTR) - intr_rtn = tulip_intr_shared; - - if ((sc->tulip_features & TULIP_HAVE_SLAVEDINTR) == 0) { - void *ih; - - rid = 0; - res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - if (res == 0 || bus_setup_intr(dev, res, INTR_TYPE_NET, - intr_rtn, sc, &ih)) { - device_printf(dev, "couldn't map interrupt\n"); - free((caddr_t) sc->tulip_rxdescs, M_DEVBUF); - free((caddr_t) sc->tulip_txdescs, M_DEVBUF); - return ENXIO; - } - } -#if defined(TULIP_USE_SOFTINTR) - if (sc->tulip_unit > tulip_softintr_max_unit) - tulip_softintr_max_unit = sc->tulip_unit; -#endif - - s = splimp(); -#if defined(__alpha__) - sc->tulip_media = media; -#endif - tulip_attach(sc); -#if defined(__alpha__) - if (sc->tulip_media != TULIP_MEDIA_UNKNOWN) - tulip_linkup(sc, media); -#endif - splx(s); - } - return 0; -} - -static device_method_t tulip_pci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, tulip_pci_probe), - DEVMETHOD(device_attach, tulip_pci_attach), - DEVMETHOD(device_shutdown, tulip_shutdown), - { 0, 0 } -}; -static driver_t tulip_pci_driver = { - "de", - tulip_pci_methods, - sizeof(tulip_softc_t), -}; -static devclass_t tulip_devclass; -DRIVER_MODULE(de, pci, tulip_pci_driver, tulip_devclass, 0, 0); diff --git a/sys/dev/de/if_devar.h b/sys/dev/de/if_devar.h deleted file mode 100644 index 54ed8d6..0000000 --- a/sys/dev/de/if_devar.h +++ /dev/null @@ -1,1009 +0,0 @@ -/* $NetBSD: if_devar.h,v 1.32 1999/04/01 14:55:25 tsubai Exp $ */ - -/* $FreeBSD$ */ - -/*- - * Copyright (c) 1994-1997 Matt Thomas (matt@3am-software.com) - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Id: if_devar.h,v 1.28 1997/07/03 16:55:07 thomas Exp - */ - -#ifndef _DEVAR_H -#define _DEVAR_H - -typedef bus_addr_t tulip_csrptr_t; - -#define TULIP_PCI_CSRSIZE 8 -#define TULIP_PCI_CSROFFSET 0 - -#define TULIP_CSR_READ(sc, csr) \ - bus_space_read_4((sc)->tulip_csrs_bst, \ - (sc)->tulip_csrs_bsh, \ - (sc)->tulip_csrs.csr) -#define TULIP_CSR_WRITE(sc, csr, val) \ - bus_space_write_4((sc)->tulip_csrs_bst, \ - (sc)->tulip_csrs_bsh, \ - (sc)->tulip_csrs.csr, val) - -#define TULIP_CSR_READBYTE(sc, csr) \ - bus_space_read_1((sc)->tulip_csrs_bst, \ - (sc)->tulip_csrs_bsh, \ - (sc)->tulip_csrs.csr) -#define TULIP_CSR_WRITEBYTE(sc, csr, val) \ - bus_space_write_1((sc)->tulip_csrs_bst, \ - (sc)->tulip_csrs_bsh, \ - (sc)->tulip_csrs.csr, val) - -/* - * This structure contains "pointers" for the registers on - * the various 21x4x chips. CSR0 through CSR8 are common - * to all chips. After that, it gets messy... - */ -typedef struct { - tulip_csrptr_t csr_busmode; /* CSR0 */ - tulip_csrptr_t csr_txpoll; /* CSR1 */ - tulip_csrptr_t csr_rxpoll; /* CSR2 */ - tulip_csrptr_t csr_rxlist; /* CSR3 */ - tulip_csrptr_t csr_txlist; /* CSR4 */ - tulip_csrptr_t csr_status; /* CSR5 */ - tulip_csrptr_t csr_command; /* CSR6 */ - tulip_csrptr_t csr_intr; /* CSR7 */ - tulip_csrptr_t csr_missed_frames; /* CSR8 */ - tulip_csrptr_t csr_9; /* CSR9 */ - tulip_csrptr_t csr_10; /* CSR10 */ - tulip_csrptr_t csr_11; /* CSR11 */ - tulip_csrptr_t csr_12; /* CSR12 */ - tulip_csrptr_t csr_13; /* CSR13 */ - tulip_csrptr_t csr_14; /* CSR14 */ - tulip_csrptr_t csr_15; /* CSR15 */ -} tulip_regfile_t; - -#define csr_enetrom csr_9 /* 21040 */ -#define csr_reserved csr_10 /* 21040 */ -#define csr_full_duplex csr_11 /* 21040 */ -#define csr_bootrom csr_10 /* 21041/21140A/?? */ -#define csr_gp csr_12 /* 21140* */ -#define csr_watchdog csr_15 /* 21140* */ -#define csr_gp_timer csr_11 /* 21041/21140* */ -#define csr_srom_mii csr_9 /* 21041/21140* */ -#define csr_sia_status csr_12 /* 2104x */ -#define csr_sia_connectivity csr_13 /* 2104x */ -#define csr_sia_tx_rx csr_14 /* 2104x */ -#define csr_sia_general csr_15 /* 2104x */ - -/* - * While 21x4x allows chaining of its descriptors, this driver - * doesn't take advantage of it. We keep the descriptors in a - * traditional FIFO ring. - */ -typedef struct { - tulip_desc_t *ri_first; /* first entry in ring */ - tulip_desc_t *ri_last; /* one after last entry */ - tulip_desc_t *ri_nextin; /* next to processed by host */ - tulip_desc_t *ri_nextout; /* next to processed by adapter */ - int ri_max; - int ri_free; -} tulip_ringinfo_t; - -/* - * The 21040 has a stupid restriction in that the receive - * buffers must be longword aligned. But since Ethernet - * headers are not a multiple of longwords in size this forces - * the data to non-longword aligned. Since IP requires the - * data to be longword aligned, we need to copy it after it has - * been DMA'ed in our memory. - * - * Since we have to copy it anyways, we might as well as allocate - * dedicated receive space for the input. This allows to use a - * small receive buffer size and more ring entries to be able to - * better keep with a flood of tiny Ethernet packets. - * - * The receive space MUST ALWAYS be a multiple of the page size. - * And the number of receive descriptors multiplied by the size - * of the receive buffers must equal the recevive space. This - * is so that we can manipulate the page tables so that even if a - * packet wraps around the end of the receive space, we can - * treat it as virtually contiguous. - * - * The above used to be true (the stupid restriction is still true) - * but we gone to directly DMA'ing into MBUFs (unless it's on an - * architecture which can't handle unaligned accesses) because with - * 100Mb/s cards the copying is just too much of a hit. - */ -#if !defined(__i386__) -#define TULIP_COPY_RXDATA 1 -#endif - -#define TULIP_DATA_PER_DESC 2032 -#define TULIP_TXTIMER 4 -#define TULIP_RXDESCS 48 -#define TULIP_TXDESCS 128 -#define TULIP_RXQ_TARGET 32 -#if TULIP_RXQ_TARGET >= TULIP_RXDESCS -#error TULIP_RXQ_TARGET must be less than TULIP_RXDESCS -#endif -#define TULIP_RX_BUFLEN ((MCLBYTES < 2048 ? MCLBYTES : 2048) - 16) - -/* - * Forward reference to make C happy. - */ -typedef struct tulip_softc tulip_softc_t; - -/* - * Enumeration of the various controllers supported. - */ -typedef enum { - TULIP_21040, - TULIP_21041, - TULIP_21140, - TULIP_21140A, - TULIP_21142, - TULIP_21143, - TULIP_CHIPID_UNKNOWN -} tulip_chipid_t; - -/* - * Various physical media types supported. - * BNCAUI is BNC or AUI since on the 21040 you can't really tell - * which is in use. - */ -typedef enum { - TULIP_MEDIA_UNKNOWN, - TULIP_MEDIA_10BASET, - TULIP_MEDIA_10BASET_FD, - TULIP_MEDIA_BNC, - TULIP_MEDIA_AUI, - TULIP_MEDIA_EXTSIA, - TULIP_MEDIA_AUIBNC, - TULIP_MEDIA_100BASETX, - TULIP_MEDIA_100BASETX_FD, - TULIP_MEDIA_100BASET4, - TULIP_MEDIA_100BASEFX, - TULIP_MEDIA_100BASEFX_FD, - TULIP_MEDIA_MAX -} tulip_media_t; - -#define TULIP_BIT(b) (1L << ((int)(b))) -#define TULIP_FDBIT(m) (1L << ((int)TULIP_MEDIA_ ## m ## _FD)) -#define TULIP_MBIT(m) (1L << ((int)TULIP_MEDIA_ ## m )) -#define TULIP_IS_MEDIA_FD(m) (TULIP_BIT(m) & \ - (TULIP_FDBIT(10BASET) | \ - TULIP_FDBIT(100BASETX) | \ - TULIP_FDBIT(100BASEFX))) -#define TULIP_CAN_MEDIA_FD(m) (TULIP_BIT(m) & \ - (TULIP_MBIT(10BASET) | \ - TULIP_MBIT(100BASETX) | \ - TULIP_MBIT(100BASEFX))) -#define TULIP_FD_MEDIA_OF(m) ((tulip_media_t)((m) + 1)) -#define TULIP_HD_MEDIA_OF(m) ((tulip_media_t)((m) - 1)) -#define TULIP_IS_MEDIA_100MB(m) ((m) >= TULIP_MEDIA_100BASETX) -#define TULIP_IS_MEDIA_TP(m) ((TULIP_BIT(m) & \ - (TULIP_MBIT(BNC) | \ - TULIP_MBIT(AUI) | \ - TULIP_MBIT(AUIBNC) | \ - TULIP_MBIT(EXTSIA))) == 0) - -#define TULIP_SROM_ATTR_MII 0x0100 -#define TULIP_SROM_ATTR_NWAY 0x0200 -#define TULIP_SROM_ATTR_AUTOSENSE 0x0400 -#define TULIP_SROM_ATTR_POWERUP 0x0800 -#define TULIP_SROM_ATTR_NOLINKPASS 0x1000 - -typedef struct { - enum { - TULIP_MEDIAINFO_NONE, - TULIP_MEDIAINFO_SIA, - TULIP_MEDIAINFO_GPR, - TULIP_MEDIAINFO_MII, - TULIP_MEDIAINFO_RESET, - TULIP_MEDIAINFO_SYM - } mi_type; - union { - struct { - u_int16_t sia_connectivity; - u_int16_t sia_tx_rx; - u_int16_t sia_general; - u_int32_t sia_gp_control; /* 21142/21143 */ - u_int32_t sia_gp_data; /* 21142/21143 */ - } un_sia; - struct { - u_int32_t gpr_cmdmode; - u_int32_t gpr_gpcontrol; /* 21142/21143 */ - u_int32_t gpr_gpdata; - u_int8_t gpr_actmask; - u_int8_t gpr_actdata; - u_int gpr_default:1; - } un_gpr; - struct { - u_int32_t mii_mediamask; - u_int16_t mii_capabilities; - u_int16_t mii_advertisement; - u_int16_t mii_full_duplex; - u_int16_t mii_tx_threshold; - u_int16_t mii_interrupt; /* 21142/21143 */ - u_int8_t mii_phyaddr; - u_int8_t mii_gpr_length; - u_int8_t mii_gpr_offset; - u_int8_t mii_reset_length; - u_int8_t mii_reset_offset; - u_int32_t mii_phyid; - } un_mii; - } mi_un; -} tulip_media_info_t; - -#define mi_sia_connectivity mi_un.un_sia.sia_connectivity -#define mi_sia_tx_rx mi_un.un_sia.sia_tx_rx -#define mi_sia_general mi_un.un_sia.sia_general -#define mi_sia_gp_control mi_un.un_sia.sia_gp_control -#define mi_sia_gp_data mi_un.un_sia.sia_gp_data - -#define mi_gpcontrol mi_un.un_gpr.gpr_gpcontrol -#define mi_gpdata mi_un.un_gpr.gpr_gpdata -#define mi_actmask mi_un.un_gpr.gpr_actmask -#define mi_actdata mi_un.un_gpr.gpr_actdata -#define mi_default mi_un.un_gpr.gpr_default -#define mi_cmdmode mi_un.un_gpr.gpr_cmdmode - -#define mi_phyaddr mi_un.un_mii.mii_phyaddr -#define mi_gpr_length mi_un.un_mii.mii_gpr_length -#define mi_gpr_offset mi_un.un_mii.mii_gpr_offset -#define mi_reset_length mi_un.un_mii.mii_reset_length -#define mi_reset_offset mi_un.un_mii.mii_reset_offset -#define mi_capabilities mi_un.un_mii.mii_capabilities -#define mi_advertisement mi_un.un_mii.mii_advertisement -#define mi_full_duplex mi_un.un_mii.mii_full_duplex -#define mi_tx_threshold mi_un.un_mii.mii_tx_threshold -#define mi_mediamask mi_un.un_mii.mii_mediamask -#define mi_mii_interrupt mi_un.un_mii.mii_interrupt -#define mi_phyid mi_un.un_mii.mii_phyid - -#define TULIP_MEDIAINFO_SIA_INIT(sc, mi, chipid, media) \ -do { \ - (mi)->mi_type = TULIP_MEDIAINFO_SIA; \ - sc->tulip_mediums[TULIP_MEDIA_ ## media] = (mi); \ - (mi)->mi_sia_connectivity = TULIP_ ## chipid ## _SIACONN_ ## media; \ - (mi)->mi_sia_tx_rx = TULIP_ ## chipid ## _SIATXRX_ ## media; \ - (mi)->mi_sia_general = TULIP_ ## chipid ## _SIAGEN_ ## media; \ -} while (0) - -#define TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, media) \ -do { \ - if ((sc)->tulip_mediums[TULIP_MEDIA_ ## media] == NULL \ - && ((mi)->mi_capabilities & PHYSTS_ ## media)) { \ - (sc)->tulip_mediums[TULIP_MEDIA_ ## media] = (mi); \ - (mi)->mi_mediamask |= TULIP_BIT(TULIP_MEDIA_ ## media); \ - } \ -} while (0) - -#define TULIP_MII_NOPHY 32 -/* - * Some boards need to treated specially. The following enumeration - * identifies the cards with quirks (or those we just want to single - * out for special merit or scorn). - */ -typedef enum { - TULIP_21040_GENERIC, /* Generic 21040 (works with most any board) */ - TULIP_21140_ISV, /* Digital Semicondutor 21140 ISV SROM Format */ - TULIP_21142_ISV, /* Digital Semicondutor 21142 ISV SROM Format */ - TULIP_21143_ISV, /* Digital Semicondutor 21143 ISV SROM Format */ - TULIP_21140_DEC_EB, /* Digital Semicondutor 21140 Eval. Board */ - TULIP_21140_MII, /* 21140[A] with MII */ - TULIP_21140_DEC_DE500, /* Digital DE500-?? 10/100 */ - TULIP_21140_SMC_9332, /* SMC 9332 */ - TULIP_21140_COGENT_EM100, /* Cogent EM100 100 only */ - TULIP_21140_ZNYX_ZX34X, /* ZNYX ZX342 10/100 */ - TULIP_21140_ASANTE, /* AsanteFast 10/100 */ - TULIP_21140_EN1207, /* Accton EN2107 10/100 BNC */ - TULIP_21041_GENERIC /* Generic 21041 card */ -} tulip_board_t; - -typedef enum { - TULIP_MEDIAPOLL_TIMER, /* 100ms timer fired */ - TULIP_MEDIAPOLL_FASTTIMER, /* <100ms timer fired */ - TULIP_MEDIAPOLL_LINKFAIL, /* called from interrupt routine */ - TULIP_MEDIAPOLL_LINKPASS, /* called from interrupt routine */ - TULIP_MEDIAPOLL_START, /* start a media probe (from reset) */ - TULIP_MEDIAPOLL_TXPROBE_OK, /* txprobe succeeded */ - TULIP_MEDIAPOLL_TXPROBE_FAILED, /* txprobe failed */ - TULIP_MEDIAPOLL_MAX -} tulip_mediapoll_event_t; - -typedef enum { - TULIP_LINK_DOWN, /* Link is down */ - TULIP_LINK_UP, /* link is ok */ - TULIP_LINK_UNKNOWN /* we can't tell either way */ -} tulip_link_status_t; - -/* - * This data structure is used to abstract out the quirks. - * media_probe = tries to determine the media type. - * media_select = enables the current media (or autosenses) - * media_poll = autosenses media - * media_preset = 21140, etal requires bit to set before the - * the software reset; hence pre-set. Should be - * pre-reset but that's ugly. - */ -typedef struct { - tulip_board_t bd_type; - void (*bd_media_probe)(tulip_softc_t * const sc); - void (*bd_media_select)(tulip_softc_t * const sc); - void (*bd_media_poll)(tulip_softc_t * const sc, - tulip_mediapoll_event_t event); - void (*bd_media_preset) (tulip_softc_t * const sc); -} tulip_boardsw_t; - -/* - * The next few declarations are for MII/PHY based boards. - * - * The first enumeration identifies a superset of various datums - * that can be obtained from various PHY chips. Not all PHYs will - * support all datums. - * The modedata structure indicates what register contains - * a datum, what mask is applied the register contents, and what the - * result should be. - * The attr structure records information about a supported PHY. - * The phy structure records information about a PHY instance. - */ -typedef enum { - PHY_MODE_10T, - PHY_MODE_100TX, - PHY_MODE_100T4, - PHY_MODE_FULLDUPLEX, - PHY_MODE_MAX -} tulip_phy_mode_t; - -typedef struct { - u_int16_t pm_regno; - u_int16_t pm_mask; - u_int16_t pm_value; -} tulip_phy_modedata_t; - -typedef struct { - u_int32_t attr_id; - u_int16_t attr_flags; - tulip_phy_modedata_t attr_modes[PHY_MODE_MAX]; -#ifdef TULIP_DEBUG - const char *attr_name; -#endif -} tulip_phy_attr_t; - -/* Definitions for tulip_phy_attr_t.attr_flags */ -#define PHY_NEED_HARD_RESET 0x0001 -#define PHY_DUAL_CYCLE_TA 0x0002 - -/* - * Various probe states used when trying to autosense the media. - */ -typedef enum { - TULIP_PROBE_INACTIVE, - TULIP_PROBE_PHYRESET, - TULIP_PROBE_PHYAUTONEG, - TULIP_PROBE_GPRTEST, - TULIP_PROBE_MEDIATEST, - TULIP_PROBE_FAILED -} tulip_probe_state_t; - -typedef struct { - /* - * Transmit Statistics - */ - u_int32_t dot3StatsSingleCollisionFrames; - u_int32_t dot3StatsMultipleCollisionFrames; - u_int32_t dot3StatsSQETestErrors; - u_int32_t dot3StatsDeferredTransmissions; - u_int32_t dot3StatsLateCollisions; - u_int32_t dot3StatsExcessiveCollisions; - u_int32_t dot3StatsCarrierSenseErrors; - u_int32_t dot3StatsInternalMacTransmitErrors; - /* not in rfc1650! */ - u_int32_t dot3StatsInternalTransmitUnderflows; - /* not in rfc1650! */ - u_int32_t dot3StatsInternalTransmitBabbles; - /* - * Receive Statistics - */ - u_int32_t dot3StatsMissedFrames; /* not in rfc1650! */ - u_int32_t dot3StatsAlignmentErrors; - u_int32_t dot3StatsFCSErrors; - u_int32_t dot3StatsFrameTooLongs; - u_int32_t dot3StatsInternalMacReceiveErrors; -} tulip_dot3_stats_t; - -/* - * Probe information. - */ -struct tulip_probe_info { - u_int8_t probe_count; /* count of probe operations */ - int32_t probe_timeout; /* time (ms) of probe timeout */ - tulip_probe_state_t probe_state; /* current media probe state */ - tulip_media_t probe_media; /* current media being probed */ - u_int32_t probe_mediamask; /* medias checked */ - u_int32_t probe_passes; /* times autosense failed */ - u_int32_t probe_txprobes; /* txprobes attempted */ -}; - -/* - * Debugging/Statistical information. - */ -struct tulip_dbg_info { - tulip_media_t dbg_last_media; - u_int32_t dbg_intrs; - u_int32_t dbg_media_probes; - u_int32_t dbg_txprobe_nocarr; - u_int32_t dbg_txprobe_exccoll; - u_int32_t dbg_link_downed; - u_int32_t dbg_link_suspected; - u_int32_t dbg_link_intrs; - u_int32_t dbg_link_pollintrs; - u_int32_t dbg_link_failures; - u_int32_t dbg_nway_starts; - u_int32_t dbg_nway_failures; - u_int16_t dbg_phyregs[32][4]; - u_int32_t dbg_rxlowbufs; - u_int32_t dbg_rxintrs; - u_int32_t dbg_last_rxintrs; - u_int32_t dbg_high_rxintrs_hz; - u_int32_t dbg_no_txmaps; - u_int32_t dbg_txput_finishes[8]; - u_int32_t dbg_txprobes_ok[TULIP_MEDIA_MAX]; - u_int32_t dbg_txprobes_failed[TULIP_MEDIA_MAX]; - u_int32_t dbg_events[TULIP_MEDIAPOLL_MAX]; - u_int32_t dbg_rxpktsperintr[TULIP_RXDESCS]; -}; - -/* - * Performance statistics. - */ -struct tulip_perfstat { - u_quad_t perf_intr_cycles; - u_quad_t perf_ifstart_cycles; - u_quad_t perf_ifstart_one_cycles; - u_quad_t perf_ifioctl_cycles; - u_quad_t perf_ifwatchdog_cycles; - u_quad_t perf_timeout_cycles; - u_quad_t perf_txput_cycles; - u_quad_t perf_txintr_cycles; - u_quad_t perf_rxintr_cycles; - u_quad_t perf_rxget_cycles; - unsigned int perf_intr; - unsigned int perf_ifstart; - unsigned int perf_ifstart_one; - unsigned int perf_ifioctl; - unsigned int perf_ifwatchdog; - unsigned int perf_timeout; - unsigned int perf_txput; - unsigned int perf_txintr; - unsigned int perf_rxintr; - unsigned int perf_rxget; -}; -#define TULIP_PERF_CURRENT 0 -#define TULIP_PERF_PREVIOUS 1 -#define TULIP_PERF_TOTAL 2 -#define TULIP_PERF_MAX 3 - -/* - * Per-driver-instance state. - */ -struct tulip_softc { - struct ifmedia tulip_ifmedia; - int tulip_unit; -#if defined(TULIP_BUS_DMA) - bus_dma_tag_t tulip_dmatag; -#if !defined(TULIP_BUS_DMA_NOTX) - bus_dmamap_t tulip_setupmap; - bus_dmamap_t tulip_txdescmap; - bus_dmamap_t tulip_txmaps[TULIP_TXDESCS]; - unsigned int tulip_txmaps_free; -#endif -#if !defined(TULIP_BUS_DMA_NORX) - bus_dmamap_t tulip_rxdescmap; - bus_dmamap_t tulip_rxmaps[TULIP_RXDESCS]; - unsigned int tulip_rxmaps_free; -#endif -#endif - struct ifnet *tulip_ifp; - u_char tulip_enaddr[6]; - bus_space_tag_t tulip_csrs_bst; - bus_space_handle_t tulip_csrs_bsh; - tulip_regfile_t tulip_csrs; - - u_int32_t tulip_flags; - u_int32_t tulip_features; - u_int32_t tulip_intrmask; - u_int32_t tulip_cmdmode; - u_int32_t tulip_last_system_error:3; - u_int32_t tulip_txtimer:2; /* transmission timer */ - u_int32_t tulip_system_errors; - u_int32_t tulip_statusbits; /* status bits from - * CSR5 that may need - * to be printed - */ - tulip_media_info_t *tulip_mediums[TULIP_MEDIA_MAX]; - tulip_media_t tulip_media; /* current media type */ - u_int32_t tulip_abilities; /* remote system's - * abilities (as - * defined in IEEE - * 802.3u) - */ - u_int8_t tulip_revinfo; /* chip revision */ - u_int8_t tulip_phyaddr; /* current phy */ - u_int8_t tulip_gpinit; /* active pins on - * 21140 - */ - u_int8_t tulip_gpdata; /* default gpdata for 21140 */ - struct tulip_probe_info tulip_probe; - tulip_chipid_t tulip_chipid; /* type of chip we are using */ - const tulip_boardsw_t *tulip_boardsw; /* board/chip characteristics */ - tulip_softc_t *tulip_slaves; /* slaved devices (ZX3xx) */ -#if defined(TULIP_DEBUG) - struct tulip_dbg_info tulip_dbg; -#endif -#if defined(TULIP_PERFSTATS) - struct tulip_perfstat tulip_perfstats[TULIP_PERF_MAX]; -#endif - struct ifqueue tulip_txq; - struct ifqueue tulip_rxq; - tulip_dot3_stats_t tulip_dot3stats; - tulip_ringinfo_t tulip_rxinfo; - tulip_ringinfo_t tulip_txinfo; - tulip_media_info_t tulip_mediainfo[10]; - /* - * The setup buffers for sending the setup frame to the chip. one is - * the one being sent while the other is the one being filled. - */ - u_int32_t tulip_setupbuf[192 / sizeof(u_int32_t)]; - u_int32_t tulip_setupdata[192 / sizeof(u_int32_t)]; - char tulip_boardid[24]; - u_int8_t tulip_rombuf[128]; /* must be aligned */ - - /* needed for multiport boards */ - u_int8_t tulip_pci_busno; - u_int8_t tulip_pci_devno; - - u_int8_t tulip_connidx; - tulip_srom_connection_t tulip_conntype; - tulip_desc_t *tulip_rxdescs; - tulip_desc_t *tulip_txdescs; -}; - -#define tulip_curperfstats tulip_perfstats[TULIP_PERF_CURRENT] -#define tulip_probe_count tulip_probe.probe_count -#define tulip_probe_timeout tulip_probe.probe_timeout -#define tulip_probe_state tulip_probe.probe_state -#define tulip_probe_media tulip_probe.probe_media -#define tulip_probe_mediamask tulip_probe.probe_mediamask -#define tulip_probe_passes tulip_probe.probe_passes - -/* Definitions for tulip_flags. */ -#define TULIP_WANTSETUP 0x00000001 -#define TULIP_WANTHASHPERFECT 0x00000002 -#define TULIP_WANTHASHONLY 0x00000004 -#define TULIP_DOINGSETUP 0x00000008 -#define TULIP_PRINTMEDIA 0x00000010 -#define TULIP_TXPROBE_ACTIVE 0x00000020 -#define TULIP_ALLMULTI 0x00000040 -#define TULIP_WANTRXACT 0x00000080 -#define TULIP_RXACT 0x00000100 -#define TULIP_INRESET 0x00000200 -#define TULIP_NEEDRESET 0x00000400 -#define TULIP_SQETEST 0x00000800 -#define TULIP_xxxxxx0 0x00001000 -#define TULIP_xxxxxx1 0x00002000 -#define TULIP_WANTTXSTART 0x00004000 -#define TULIP_NEWTXTHRESH 0x00008000 -#define TULIP_NOAUTOSENSE 0x00010000 -#define TULIP_PRINTLINKUP 0x00020000 -#define TULIP_LINKUP 0x00040000 -#define TULIP_RXBUFSLOW 0x00080000 -#define TULIP_NOMESSAGES 0x00100000 -#define TULIP_SYSTEMERROR 0x00200000 -#define TULIP_TIMEOUTPENDING 0x00400000 -#define TULIP_xxxxxx2 0x00800000 -#define TULIP_TRYNWAY 0x01000000 -#define TULIP_DIDNWAY 0x02000000 -#define TULIP_RXIGNORE 0x04000000 -#define TULIP_PROBE1STPASS 0x08000000 -#define TULIP_DEVICEPROBE 0x10000000 -#define TULIP_PROMISC 0x20000000 -#define TULIP_HASHONLY 0x40000000 -#define TULIP_xxxxxx3 0x80000000 - -/* Definitions for tulip_features. */ -#define TULIP_HAVE_GPR 0x00000001 /* have gp register (140[A]) */ -#define TULIP_HAVE_RXBADOVRFLW 0x00000002 /* RX corrupts on overflow */ -#define TULIP_HAVE_POWERMGMT 0x00000004 /* Snooze/sleep modes */ -#define TULIP_HAVE_MII 0x00000008 /* Some medium on MII */ -#define TULIP_HAVE_SIANWAY 0x00000010 /* SIA does NWAY */ -#define TULIP_HAVE_DUALSENSE 0x00000020 /* SIA senses both AUI & TP */ -#define TULIP_HAVE_SIAGP 0x00000040 /* SIA has a GP port */ -#define TULIP_HAVE_BROKEN_HASH 0x00000080 /* Broken Multicast Hash */ -#define TULIP_HAVE_ISVSROM 0x00000100 /* uses ISV SROM Format */ -#define TULIP_HAVE_BASEROM 0x00000200 /* Board ROM can be cloned */ -#define TULIP_HAVE_SLAVEDROM 0x00000400 /* Board ROM cloned */ -#define TULIP_HAVE_SLAVEDINTR 0x00000800 /* Board slaved interrupt */ -#define TULIP_HAVE_SHAREDINTR 0x00001000 /* Board shares interrupts */ -#define TULIP_HAVE_OKROM 0x00002000 /* ROM was recognized */ -#define TULIP_HAVE_NOMEDIA 0x00004000 /* did not detect any media */ -#define TULIP_HAVE_STOREFWD 0x00008000 /* have CMD_STOREFWD */ -#define TULIP_HAVE_SIA100 0x00010000 /* has LS100 in SIA status */ -#define TULIP_HAVE_OKSROM 0x00020000 /* SROM CRC is OK */ - -#define TULIP_DO_AUTOSENSE(sc) \ - (IFM_SUBTYPE((sc)->tulip_ifmedia.ifm_media) == IFM_AUTO) - -#if defined(TULIP_HDR_DATA) -static const char *const tulip_chipdescs[] = { - "21040 [10Mb/s]", - "21041 [10Mb/s]", - "21140 [10-100Mb/s]", - "21140A [10-100Mb/s]", - "21142 [10-100Mb/s]", - "21143 [10-100Mb/s]", -}; - -static const char *const tulip_mediums[] = { - "unknown", /* TULIP_MEDIA_UNKNOWN */ - "10baseT", /* TULIP_MEDIA_10BASET */ - "Full Duplex 10baseT", /* TULIP_MEDIA_10BASET_FD */ - "BNC", /* TULIP_MEDIA_BNC */ - "AUI", /* TULIP_MEDIA_AUI */ - "External SIA", /* TULIP_MEDIA_EXTSIA */ - "AUI/BNC", /* TULIP_MEDIA_AUIBNC */ - "100baseTX", /* TULIP_MEDIA_100BASET */ - "Full Duplex 100baseTX",/* TULIP_MEDIA_100BASET_FD */ - "100baseT4", /* TULIP_MEDIA_100BASET4 */ - "100baseFX", /* TULIP_MEDIA_100BASEFX */ - "Full Duplex 100baseFX",/* TULIP_MEDIA_100BASEFX_FD */ -}; - -static const int tulip_media_to_ifmedia[] = { - IFM_ETHER | IFM_NONE, /* TULIP_MEDIA_UNKNOWN */ - IFM_ETHER | IFM_10_T, /* TULIP_MEDIA_10BASET */ - IFM_ETHER | IFM_10_T | IFM_FDX, /* TULIP_MEDIA_10BASET_FD */ - IFM_ETHER | IFM_10_2, /* TULIP_MEDIA_BNC */ - IFM_ETHER | IFM_10_5, /* TULIP_MEDIA_AUI */ - IFM_ETHER | IFM_MANUAL, /* TULIP_MEDIA_EXTSIA */ - IFM_ETHER | IFM_10_5, /* TULIP_MEDIA_AUIBNC */ - IFM_ETHER | IFM_100_TX, /* TULIP_MEDIA_100BASET */ - IFM_ETHER | IFM_100_TX | IFM_FDX, /* TULIP_MEDIA_100BASET_FD */ - IFM_ETHER | IFM_100_T4, /* TULIP_MEDIA_100BASET4 */ - IFM_ETHER | IFM_100_FX, /* TULIP_MEDIA_100BASEFX */ - IFM_ETHER | IFM_100_FX | IFM_FDX, /* TULIP_MEDIA_100BASEFX_FD */ -}; - -static const char *const tulip_system_errors[] = { - "parity error", - "master abort", - "target abort", - "reserved #3", - "reserved #4", - "reserved #5", - "reserved #6", - "reserved #7", -}; - -static const char *const tulip_status_bits[] = { - NULL, - "transmit process stopped", - NULL, - "transmit jabber timeout", - - NULL, - "transmit underflow", - NULL, - "receive underflow", - - "receive process stopped", - "receive watchdog timeout", - NULL, - NULL, - - "link failure", - NULL, - NULL, -}; - -static const struct { - tulip_srom_connection_t sc_type; - tulip_media_t sc_media; - u_int32_t sc_attrs; -} tulip_srom_conninfo[] = { - { - TULIP_SROM_CONNTYPE_10BASET, TULIP_MEDIA_10BASET - }, - { - TULIP_SROM_CONNTYPE_BNC, TULIP_MEDIA_BNC - }, - { - TULIP_SROM_CONNTYPE_AUI, TULIP_MEDIA_AUI - }, - { - TULIP_SROM_CONNTYPE_100BASETX, TULIP_MEDIA_100BASETX - }, - { - TULIP_SROM_CONNTYPE_100BASET4, TULIP_MEDIA_100BASET4 - }, - { - TULIP_SROM_CONNTYPE_100BASEFX, TULIP_MEDIA_100BASEFX - }, - { - TULIP_SROM_CONNTYPE_MII_10BASET, TULIP_MEDIA_10BASET, - TULIP_SROM_ATTR_MII - }, - { - TULIP_SROM_CONNTYPE_MII_100BASETX, TULIP_MEDIA_100BASETX, - TULIP_SROM_ATTR_MII - }, - { - TULIP_SROM_CONNTYPE_MII_100BASET4, TULIP_MEDIA_100BASET4, - TULIP_SROM_ATTR_MII - }, - { - TULIP_SROM_CONNTYPE_MII_100BASEFX, TULIP_MEDIA_100BASEFX, - TULIP_SROM_ATTR_MII - }, - { - TULIP_SROM_CONNTYPE_10BASET_NWAY, TULIP_MEDIA_10BASET, - TULIP_SROM_ATTR_NWAY - }, - { - TULIP_SROM_CONNTYPE_10BASET_FD, TULIP_MEDIA_10BASET_FD - }, - { - TULIP_SROM_CONNTYPE_MII_10BASET_FD, TULIP_MEDIA_10BASET_FD, - TULIP_SROM_ATTR_MII - }, - { - TULIP_SROM_CONNTYPE_100BASETX_FD, TULIP_MEDIA_100BASETX_FD - }, - { - TULIP_SROM_CONNTYPE_MII_100BASETX_FD, TULIP_MEDIA_100BASETX_FD, - TULIP_SROM_ATTR_MII - }, - { - TULIP_SROM_CONNTYPE_10BASET_NOLINKPASS, TULIP_MEDIA_10BASET, - TULIP_SROM_ATTR_NOLINKPASS - }, - { - TULIP_SROM_CONNTYPE_AUTOSENSE, TULIP_MEDIA_UNKNOWN, - TULIP_SROM_ATTR_AUTOSENSE - }, - { - TULIP_SROM_CONNTYPE_AUTOSENSE_POWERUP, TULIP_MEDIA_UNKNOWN, - TULIP_SROM_ATTR_AUTOSENSE | TULIP_SROM_ATTR_POWERUP - }, - { - TULIP_SROM_CONNTYPE_AUTOSENSE_NWAY, TULIP_MEDIA_UNKNOWN, - TULIP_SROM_ATTR_AUTOSENSE | TULIP_SROM_ATTR_NWAY - }, - { - TULIP_SROM_CONNTYPE_NOT_USED, TULIP_MEDIA_UNKNOWN - } -}; -#define TULIP_SROM_LASTCONNIDX \ - (sizeof(tulip_srom_conninfo)/sizeof(tulip_srom_conninfo[0]) - 1) - -static const struct { - tulip_media_t sm_type; - tulip_srom_media_t sm_srom_type; -} tulip_srom_mediums[] = { - { - TULIP_MEDIA_100BASEFX_FD, TULIP_SROM_MEDIA_100BASEFX_FD - }, - { - TULIP_MEDIA_100BASEFX, TULIP_SROM_MEDIA_100BASEFX - }, - { - TULIP_MEDIA_100BASET4, TULIP_SROM_MEDIA_100BASET4 - }, - { - TULIP_MEDIA_100BASETX_FD, TULIP_SROM_MEDIA_100BASETX_FD - }, - { - TULIP_MEDIA_100BASETX, TULIP_SROM_MEDIA_100BASETX - }, - { - TULIP_MEDIA_10BASET_FD, TULIP_SROM_MEDIA_10BASET_FD - }, - { - TULIP_MEDIA_AUI, TULIP_SROM_MEDIA_AUI - }, - { - TULIP_MEDIA_BNC, TULIP_SROM_MEDIA_BNC - }, - { - TULIP_MEDIA_10BASET, TULIP_SROM_MEDIA_10BASET - }, - { - TULIP_MEDIA_UNKNOWN - } -}; - -#endif /* TULIP_HDR_DATA */ - -/* - * This driver supports a maximum of 32 tulip boards. - * This should be enough for the forseeable future. - */ -#define TULIP_MAX_DEVICES 32 - -#if defined(TULIP_USE_SOFTINTR) && defined(TULIP_HDR_DATA) -static u_int32_t tulip_softintr_mask; -static int tulip_softintr_last_unit; -static int tulip_softintr_max_unit; -static void tulip_softintr(void); -#endif - -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NORX) -#define TULIP_RXDESC_PRESYNC(sc, di, s) \ - bus_dmamap_sync((sc)->tulip_dmatag, (sc)->tulip_rxdescmap, \ - (caddr_t) di - (caddr_t) (sc)->tulip_rxdescs, \ - (s), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE) -#define TULIP_RXDESC_POSTSYNC(sc, di, s) \ - bus_dmamap_sync((sc)->tulip_dmatag, (sc)->tulip_rxdescmap, \ - (caddr_t) di - (caddr_t) (sc)->tulip_rxdescs, \ - (s), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE) -#define TULIP_RXMAP_PRESYNC(sc, map) \ - bus_dmamap_sync((sc)->tulip_dmatag, (map), 0, (map)->dm_mapsize, \ - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE) -#define TULIP_RXMAP_POSTSYNC(sc, map) \ - bus_dmamap_sync((sc)->tulip_dmatag, (map), 0, (map)->dm_mapsize, \ - BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE) -#define TULIP_RXMAP_CREATE(sc, mapp) \ - bus_dmamap_create((sc)->tulip_dmatag, TULIP_RX_BUFLEN, 2, \ - TULIP_DATA_PER_DESC, 0, \ - BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, (mapp)) -#else -#ifdef __alpha__ -#define TULIP_RXDESC_PRESYNC(sc, di, s) alpha_mb() -#define TULIP_RXDESC_POSTSYNC(sc, di, s) alpha_mb() -#define TULIP_RXMAP_PRESYNC(sc, map) alpha_mb() -#define TULIP_RXMAP_POSTSYNC(sc, map) alpha_mb() -#else -#define TULIP_RXDESC_PRESYNC(sc, di, s) do { } while (0) -#define TULIP_RXDESC_POSTSYNC(sc, di, s) do { } while (0) -#define TULIP_RXMAP_PRESYNC(sc, map) do { } while (0) -#define TULIP_RXMAP_POSTSYNC(sc, map) do { } while (0) -#endif -#define TULIP_RXMAP_CREATE(sc, mapp) do { } while (0) -#endif - -#if defined(TULIP_BUS_DMA) && !defined(TULIP_BUS_DMA_NOTX) -#define TULIP_TXDESC_PRESYNC(sc, di, s) \ - bus_dmamap_sync((sc)->tulip_dmatag, (sc)->tulip_txdescmap, \ - (caddr_t) di - (caddr_t) (sc)->tulip_txdescs, \ - (s), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE) -#define TULIP_TXDESC_POSTSYNC(sc, di, s) \ - bus_dmamap_sync((sc)->tulip_dmatag, (sc)->tulip_txdescmap, \ - (caddr_t) di - (caddr_t) (sc)->tulip_txdescs, \ - (s), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE) -#define TULIP_TXMAP_PRESYNC(sc, map) \ - bus_dmamap_sync((sc)->tulip_dmatag, (map), 0, (map)->dm_mapsize, \ - BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE) -#define TULIP_TXMAP_POSTSYNC(sc, map) \ - bus_dmamap_sync((sc)->tulip_dmatag, (map), 0, (map)->dm_mapsize, \ - BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE) -#define TULIP_TXMAP_CREATE(sc, mapp) \ - bus_dmamap_create((sc)->tulip_dmatag, TULIP_DATA_PER_DESC, \ - TULIP_MAX_TXSEG, TULIP_DATA_PER_DESC, \ - 0, BUS_DMA_NOWAIT, (mapp)) -#else -#ifdef __alpha__ -#define TULIP_TXDESC_PRESYNC(sc, di, s) alpha_mb() -#define TULIP_TXDESC_POSTSYNC(sc, di, s) alpha_mb() -#define TULIP_TXMAP_PRESYNC(sc, map) alpha_mb() -#define TULIP_TXMAP_POSTSYNC(sc, map) alpha_mb() -#else -#define TULIP_TXDESC_PRESYNC(sc, di, s) do { } while (0) -#define TULIP_TXDESC_POSTSYNC(sc, di, s) do { } while (0) -#define TULIP_TXMAP_PRESYNC(sc, map) do { } while (0) -#define TULIP_TXMAP_POSTSYNC(sc, map) do { } while (0) -#endif -#define TULIP_TXMAP_CREATE(sc, mapp) do { } while (0) -#endif - -#ifdef notyet -#define SIOCGADDRROM _IOW('i', 240, struct ifreq) /* get 128 bytes of ROM */ -#define SIOCGCHIPID _IOWR('i', 241, struct ifreq) /* get chipid */ -#endif - -#if defined(TULIP_HDR_DATA) -static tulip_softc_t *tulips[TULIP_MAX_DEVICES]; -#endif - -#if defined(TULIP_USE_SOFTINTR) -NETISR_SET(NETISR_DE, tulip_softintr); -#endif - -#define loudprintf if (bootverbose) printf - -#if !defined(TULIP_KVATOPHYS) && (!defined(TULIP_BUS_DMA) || defined(TULIP_BUS_DMA_NORX) || defined(TULIP_BUS_DMA_NOTX)) -#if defined(__alpha__) -/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ -#define vtobus(va) alpha_XXX_dmamap((vm_offset_t)va) -#else -#define vtobus(va) vtophys(va) -#endif -#define TULIP_KVATOPHYS(sc, va) vtobus(va) -#endif - -#if defined(TULIP_PERFSTATS) -#define TULIP_PERFMERGE(sc, member) \ - do { (sc)->tulip_perfstats[TULIP_PERF_TOTAL].member \ - += (sc)->tulip_perfstats[TULIP_PERF_CURRENT].member; \ - (sc)->tulip_perfstats[TULIP_PERF_PREVIOUS].member \ - = (sc)->tulip_perfstats[TULIP_PERF_CURRENT].member; \ - (sc)->tulip_perfstats[TULIP_PERF_CURRENT].member = 0; } while (0) -#define TULIP_PERFSTART(name) const tulip_cycle_t perfstart_ ## name = TULIP_PERFREAD(); -#define TULIP_PERFEND(name) do { \ - (sc)->tulip_curperfstats.perf_ ## name ## _cycles += TULIP_PERFDIFF(perfstart_ ## name, TULIP_PERFREAD()); \ - (sc)->tulip_curperfstats.perf_ ## name ++; \ - } while (0) - -#if defined(__i386__) -typedef u_quad_t tulip_cycle_t; - -static __inline tulip_cycle_t -TULIP_PERFREAD(void) -{ - tulip_cycle_t x; - __asm__ volatile (".byte 0x0f, 0x31":"=A" (x)); - - return (x); -} - -#define TULIP_PERFDIFF(s, f) ((f) - (s)) -#elif defined(__alpha__) -typedef unsigned long tulip_cycle_t; - -static __inline tulip_cycle_t -TULIP_PERFREAD(void) -{ - tulip_cycle_t x; - __asm__ volatile ("rpcc %0":"=r" (x)); - - return (x); -} - -#define TULIP_PERFDIFF(s, f) ((unsigned int) ((f) - (s))) -#endif -#else -#define TULIP_PERFSTART(name) -#define TULIP_PERFEND(name) do { } while (0) -#define TULIP_PERFMERGE(s,n) do { } while (0) -#endif /* TULIP_PERFSTATS */ - -#define TULIP_CRC32_POLY 0xEDB88320UL /* CRC-32 Poly -- Little - * Endian */ -#define TULIP_MAX_TXSEG 30 - -#define TULIP_ADDREQUAL(a1, a2) \ - (((u_int16_t *)a1)[0] == ((u_int16_t *)a2)[0] \ - && ((u_int16_t *)a1)[1] == ((u_int16_t *)a2)[1] \ - && ((u_int16_t *)a1)[2] == ((u_int16_t *)a2)[2]) -#define TULIP_ADDRBRDCST(a1) \ - (((u_int16_t *)a1)[0] == 0xFFFFU \ - && ((u_int16_t *)a1)[1] == 0xFFFFU \ - && ((u_int16_t *)a1)[2] == 0xFFFFU) - -#endif /* _DEVAR_H */ diff --git a/sys/dev/fb/creatorreg.h b/sys/dev/fb/creatorreg.h deleted file mode 100644 index 87fe980..0000000 --- a/sys/dev/fb/creatorreg.h +++ /dev/null @@ -1,246 +0,0 @@ -/*- - * Copyright (C) 2000 David S. Miller (davem@redhat.com) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * DAVID MILLER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * from: XFree86: ffb_dac.h,v 1.1 2000/05/23 04:47:44 dawes Exp - */ -/*- - * Copyright (c) 2003 Jake Burkholder. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _DEV_FB_CREATOR_H_ -#define _DEV_FB_CREATOR_H_ - -#define FFB_NREG 24 - -#define FFB_DAC 1 -#define FFB_DAC_TYPE 0x0 -#define FFB_DAC_VALUE 0x4 -#define FFB_DAC_TYPE2 0x8 -#define FFB_DAC_VALUE2 0xc - -/* FFB_DAC_TYPE configuration and palette register addresses */ -#define FFB_DAC_CFG_UCTRL 0x1001 /* User Control */ -#define FFB_DAC_CFG_TGEN 0x6000 /* Timing Generator Control */ -#define FFB_DAC_CFG_DID 0x8000 /* Device Identification */ - -/* FFB_DAC_CFG_UCTRL register */ -#define FFB_DAC_UCTRL_IPDISAB 0x0001 /* Input Pullup Resistor Dis. */ -#define FFB_DAC_UCTRL_ABLANK 0x0002 /* Asynchronous Blank */ -#define FFB_DAC_UCTRL_DBENAB 0x0004 /* Double-Buffer Enable */ -#define FFB_DAC_UCTRL_OVENAB 0x0008 /* Overlay Enable */ -#define FFB_DAC_UCTRL_WMODE 0x0030 /* Window Mode */ -#define FFB_DAC_UCTRL_WM_COMB 0x0000 /* Window Mode Combined */ -#define FFB_DAC_UCTRL_WM_S4 0x0010 /* Window Mode Separate 4 */ -#define FFB_DAC_UCTRL_WM_S8 0x0020 /* Window Mode Separate 8 */ -#define FFB_DAC_UCTRL_WM_RESV 0x0030 /* Window Mode Reserved */ -#define FFB_DAC_UCTRL_MANREV 0x0f00 /* Manufacturing Revision */ - -/* FFB_DAC_CFG_TGEN register */ -#define FFB_DAC_CFG_TGEN_VIDE 0x01 /* Video Enable */ -#define FFB_DAC_CFG_TGEN_TGE 0x02 /* Timing Generator Enable */ -#define FFB_DAC_CFG_TGEN_HSD 0x04 /* HSYNC* Disable */ -#define FFB_DAC_CFG_TGEN_VSD 0x08 /* VSYNC* Disable */ -#define FFB_DAC_CFG_TGEN_EQD 0x10 /* Equalization Disable */ -#define FFB_DAC_CFG_TGEN_MM 0x20 /* 0 = Slave, 1 = Master */ -#define FFB_DAC_CFG_TGEN_IM 0x40 /* 1 = Interlaced Mode */ - -/* FFB_DAC_CFG_DID register */ -#define FFB_DAC_CFG_DID_ONE 0x00000001 /* Always Set */ -#define FFB_DAC_CFG_DID_MANUF 0x00000ffe /* DAC Manufacturer ID */ -#define FFB_DAC_CFG_DID_PNUM 0x0ffff000 /* DAC Part Number */ -#define FFB_DAC_CFG_DID_REV 0xf0000000 /* DAC Revision */ - -/* FFB_DAC_TYPE2 cursor register addresses */ -#define FFB_DAC_CUR_BITMAP_P0 0x0 /* Plane 0 Cursor Bitmap */ -#define FFB_DAC_CUR_BITMAP_P1 0x80 /* Plane 1 Cursor Bitmap */ -#define FFB_DAC_CUR_CTRL 0x100 /* Cursor Control */ -#define FFB_DAC_CUR_COLOR0 0x101 /* Cursor Color 0 */ -#define FFB_DAC_CUR_COLOR1 0x102 /* Cursor Color 1 (bg) */ -#define FFB_DAC_CUR_COLOR2 0x103 /* Cursor Color 2 (fg) */ -#define FFB_DAC_CUR_POS 0x104 /* Active Cursor Position */ - -/* FFB_DAC_CUR_CTRL register (might be inverted on PAC1 DACs) */ -#define FFB_DAC_CUR_CTRL_P0 0x1 /* Plane0 Display Disable */ -#define FFB_DAC_CUR_CTRL_P1 0x2 /* Plane1 Display Disable */ - -#define FFB_FBC 2 -#define FFB_FBC_BY 0x60 -#define FFB_FBC_BX 0x64 -#define FFB_FBC_DY 0x68 -#define FFB_FBC_DX 0x6c -#define FFB_FBC_BH 0x70 -#define FFB_FBC_BW 0x74 -#define FFB_FBC_PPC 0x200 /* Pixel Processor Control */ -#define FFB_FBC_FG 0x208 /* Foreground */ -#define FFB_FBC_BG 0x20c /* Background */ -#define FFB_FBC_FBC 0x254 /* Frame Buffer Control */ -#define FFB_FBC_ROP 0x258 /* Raster Operation */ -#define FFB_FBC_PMASK 0x290 /* Pixel Mask */ -#define FFB_FBC_DRAWOP 0x300 /* Draw Operation */ -#define FFB_FBC_FONTXY 0x314 /* Font X/Y */ -#define FFB_FBC_FONTW 0x318 /* Font Width */ -#define FFB_FBC_FONTINC 0x31c /* Font Increment */ -#define FFB_FBC_FONT 0x320 /* Font Data */ -#define FFB_FBC_UCSR 0x900 /* User Control & Status */ - -#define FBC_PPC_VCE_DIS 0x00001000 -#define FBC_PPC_APE_DIS 0x00000800 -#define FBC_PPC_TBE_OPAQUE 0x00000200 -#define FBC_PPC_CS_CONST 0x00000003 - -#define FFB_FBC_WB_A 0x20000000 -#define FFB_FBC_RB_A 0x00004000 -#define FFB_FBC_SB_BOTH 0x00003000 -#define FFB_FBC_XE_OFF 0x00000040 -#define FFB_FBC_RGBE_MASK 0x0000003f - -#define FBC_ROP_NEW 0x83 - -#define FBC_DRAWOP_RECTANGLE 0x08 - -#define FBC_UCSR_FIFO_OVFL 0x80000000 -#define FBC_UCSR_READ_ERR 0x40000000 -#define FBC_UCSR_RP_BUSY 0x02000000 -#define FBC_UCSR_FB_BUSY 0x01000000 -#define FBC_UCSR_FIFO_MASK 0x00000fff - -#define FFB_VIRT_SFB8R 0x00000000 -#define FFB_VIRT_SFB8G 0x00400000 -#define FFB_VIRT_SFB8B 0x00800000 -#define FFB_VIRT_SFB8X 0x00c00000 -#define FFB_VIRT_SFB32 0x01000000 -#define FFB_VIRT_SFB64 0x02000000 -#define FFB_VIRT_FBC 0x04000000 -#define FFB_VIRT_FBC_BM 0x04002000 -#define FFB_VIRT_DFB8R 0x04004000 -#define FFB_VIRT_DFB8G 0x04404000 -#define FFB_VIRT_DFB8B 0x04804000 -#define FFB_VIRT_DFB8X 0x04c04000 -#define FFB_VIRT_DFB24 0x05004000 -#define FFB_VIRT_DFB32 0x06004000 -#define FFB_VIRT_DFB422A 0x07004000 -#define FFB_VIRT_DFB422AD 0x07804000 -#define FFB_VIRT_DFB24B 0x08004000 -#define FFB_VIRT_DFB422B 0x09004000 -#define FFB_VIRT_DFB422BD 0x09804000 -#define FFB_VIRT_SFB16Z 0x0a004000 -#define FFB_VIRT_SFB8Z 0x0a404000 -#define FFB_VIRT_SFB422 0x0ac04000 -#define FFB_VIRT_SFB422D 0x0b404000 -#define FFB_VIRT_FBC_KREG 0x0bc04000 -#define FFB_VIRT_DAC 0x0bc06000 -#define FFB_VIRT_PROM 0x0bc08000 -#define FFB_VIRT_EXP 0x0bc18000 - -#define FFB_PHYS_SFB8R 0x04000000 -#define FFB_PHYS_SFB8G 0x04400000 -#define FFB_PHYS_SFB8B 0x04800000 -#define FFB_PHYS_SFB8X 0x04c00000 -#define FFB_PHYS_SFB32 0x05000000 -#define FFB_PHYS_SFB64 0x06000000 -#define FFB_PHYS_FBC 0x00600000 -#define FFB_PHYS_FBC_BM 0x00600000 -#define FFB_PHYS_DFB8R 0x01000000 -#define FFB_PHYS_DFB8G 0x01400000 -#define FFB_PHYS_DFB8B 0x01800000 -#define FFB_PHYS_DFB8X 0x01c00000 -#define FFB_PHYS_DFB24 0x02000000 -#define FFB_PHYS_DFB32 0x03000000 -#define FFB_PHYS_DFB422A 0x09000000 -#define FFB_PHYS_DFB422AD 0x09800000 -#define FFB_PHYS_DFB24B 0x0a000000 -#define FFB_PHYS_DFB422B 0x0b000000 -#define FFB_PHYS_DFB422BD 0x0b800000 -#define FFB_PHYS_SFB16Z 0x0c800000 -#define FFB_PHYS_SFB8Z 0x0c000000 -#define FFB_PHYS_SFB422 0x0d000000 -#define FFB_PHYS_SFB422D 0x0d800000 -#define FFB_PHYS_FBC_KREG 0x00610000 -#define FFB_PHYS_DAC 0x00400000 -#define FFB_PHYS_PROM 0x00000000 -#define FFB_PHYS_EXP 0x00200000 - -#define FFB_READ(sc, reg, off) \ - bus_space_read_4((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off)) -#define FFB_WRITE(sc, reg, off, val) \ - bus_space_write_4((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off), (val)) - -#define CREATOR_DRIVER_NAME "creator" - -struct creator_softc { - video_adapter_t sc_va; /* XXX must be first */ - - phandle_t sc_node; - - struct cdev *sc_si; - - int sc_rid[FFB_NREG]; - struct resource *sc_reg[FFB_NREG]; - bus_space_tag_t sc_bt[FFB_NREG]; - bus_space_handle_t sc_bh[FFB_NREG]; - - int sc_height; - int sc_width; - - int sc_xmargin; - int sc_ymargin; - - u_char *sc_font; - - int sc_bg_cache; - int sc_fg_cache; - int sc_fifo_cache; - int sc_fontinc_cache; - int sc_fontw_cache; - int sc_pmask_cache; - - int sc_flags; -#define CREATOR_AFB (1 << 0) -#define CREATOR_CONSOLE (1 << 1) -#define CREATOR_CUREN (1 << 2) -#define CREATOR_CURINV (1 << 3) -#define CREATOR_PAC1 (1 << 4) -}; - -#endif /* !_DEV_FB_CREATOR_H_ */ diff --git a/sys/dev/fb/gallant12x22.c b/sys/dev/fb/gallant12x22.c deleted file mode 100644 index a089f6a..0000000 --- a/sys/dev/fb/gallant12x22.c +++ /dev/null @@ -1,6185 +0,0 @@ -/* $OpenBSD: gallant12x22.h,v 1.2 2002/05/09 08:59:03 maja Exp $ */ -/* $NetBSD: gallant12x22.h,v 1.2 1999/05/18 21:51:58 ad Exp $ */ - -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to the Computer Systems - * Engineering Group at Lawrence Berkeley Laboratory and to the University - * of California at Berkeley by Jef Poskanzer. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Derived from: @(#)gallant19.h 8.1 (Berkeley) 6/11/93 - * - * $FreeBSD$ - */ - -static u_char gallant12x22_data[] = { - /* 0 0x00 '^@' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 1 0x01 '^A' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 2 0x02 '^B' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 3 0x03 '^C' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 4 0x04 '^D' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 5 0x05 '^E' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 6 0x06 '^F' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 7 0x07 '^G' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 8 0x08 '^H' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 9 0x09 '^I' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 10 0x0a '^J' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 11 0x0b '^K' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 12 0x0c '^L' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 13 0x0d '^M' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 14 0x0e '^N' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 15 0x0f '^O' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 16 0x10 '^P' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 17 0x11 '^Q' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 18 0x12 '^R' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 19 0x13 '^S' */ - 0x00, 0x00, /* ............ */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 20 0x14 '^T' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1f, 0xf0, /* ...********* */ - 0x3c, 0xc0, /* ..****..**.. */ - 0x7c, 0xc0, /* .*****..**.. */ - 0x7c, 0xc0, /* .*****..**.. */ - 0x7c, 0xc0, /* .*****..**.. */ - 0x3c, 0xc0, /* ..****..**.. */ - 0x1c, 0xc0, /* ...***..**.. */ - 0x0c, 0xc0, /* ....**..**.. */ - 0x0c, 0xc0, /* ....**..**.. */ - 0x0c, 0xc0, /* ....**..**.. */ - 0x0c, 0xc0, /* ....**..**.. */ - 0x0c, 0xc0, /* ....**..**.. */ - 0x0c, 0xc0, /* ....**..**.. */ - 0x1c, 0xe0, /* ...***..***. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 21 0x15 '^U' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1f, 0x00, /* ...*****.... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x1f, 0x00, /* ...*****.... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x1f, 0x00, /* ...*****.... */ - 0x01, 0x80, /* .......**... */ - 0x01, 0x80, /* .......**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 22 0x16 '^V' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 23 0x17 '^W' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 24 0x18 '^X' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 25 0x19 '^Y' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 26 0x1a '^Z' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 27 0x1b '^[' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 28 0x1c '^\' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 29 0x1d '^]' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 30 0x1e '^^' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 31 0x1f '^_' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 32 0x20 ' ' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 33 0x21 '!' */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 34 0x22 '"' */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 35 0x23 '#' */ - 0x00, 0x00, /* ............ */ - 0x03, 0x30, /* ......**..** */ - 0x03, 0x30, /* ......**..** */ - 0x03, 0x30, /* ......**..** */ - 0x06, 0x60, /* .....**..**. */ - 0x1f, 0xf0, /* ...********* */ - 0x1f, 0xf0, /* ...********* */ - 0x0c, 0xc0, /* ....**..**.. */ - 0x0c, 0xc0, /* ....**..**.. */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x7f, 0xc0, /* .*********.. */ - 0x7f, 0xc0, /* .*********.. */ - 0x33, 0x00, /* ..**..**.... */ - 0x66, 0x00, /* .**..**..... */ - 0x66, 0x00, /* .**..**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 36 0x24 '$' */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x3f, 0xc0, /* ..********.. */ - 0x66, 0xe0, /* .**..**.***. */ - 0x66, 0x60, /* .**..**..**. */ - 0x66, 0x00, /* .**..**..... */ - 0x3e, 0x00, /* ..*****..... */ - 0x1f, 0x80, /* ...******... */ - 0x07, 0xc0, /* .....*****.. */ - 0x06, 0x60, /* .....**..**. */ - 0x06, 0x60, /* .....**..**. */ - 0x66, 0x60, /* .**..**..**. */ - 0x7f, 0xc0, /* .*********.. */ - 0x3f, 0x80, /* ..*******... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 37 0x25 '%' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x38, 0xc0, /* ..***...**.. */ - 0x4c, 0xc0, /* .*..**..**.. */ - 0x45, 0x80, /* .*...*.**... */ - 0x65, 0x80, /* .**..*.**... */ - 0x3b, 0x00, /* ..***.**.... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x0d, 0xc0, /* ....**.***.. */ - 0x1a, 0x60, /* ...**.*..**. */ - 0x1a, 0x20, /* ...**.*...*. */ - 0x33, 0x20, /* ..**..**..*. */ - 0x31, 0xc0, /* ..**...***.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 38 0x26 '&' */ - 0x00, 0x00, /* ............ */ - 0x07, 0x00, /* .....***.... */ - 0x0f, 0x80, /* ....*****... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x18, 0xc0, /* ...**...**.. */ - 0x18, 0xc0, /* ...**...**.. */ - 0x0f, 0x80, /* ....*****... */ - 0x1e, 0x00, /* ...****..... */ - 0x3e, 0x00, /* ..*****..... */ - 0x77, 0x00, /* .***.***.... */ - 0x63, 0x60, /* .**...**.**. */ - 0x61, 0xe0, /* .**....****. */ - 0x61, 0xc0, /* .**....***.. */ - 0x61, 0x80, /* .**....**... */ - 0x3f, 0xe0, /* ..*********. */ - 0x1e, 0x60, /* ...****..**. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 39 0x27 ''' */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x1e, 0x00, /* ...****..... */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x00, /* ...**....... */ - 0x10, 0x00, /* ...*........ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 40 0x28 '(' */ - 0x00, 0x00, /* ............ */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x01, 0x80, /* .......**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 41 0x29 ')' */ - 0x00, 0x00, /* ............ */ - 0x18, 0x00, /* ...**....... */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x00, /* ...**....... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 42 0x2a '*' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x06, 0x00, /* .....**..... */ - 0x66, 0x60, /* .**..**..**. */ - 0x76, 0xe0, /* .***.**.***. */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x76, 0xe0, /* .***.**.***. */ - 0x66, 0x60, /* .**..**..**. */ - 0x06, 0x00, /* .....**..... */ - 0x0f, 0x00, /* ....****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 43 0x2b '+' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x7f, 0xe0, /* .**********. */ - 0x7f, 0xe0, /* .**********. */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 44 0x2c ',' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x1e, 0x00, /* ...****..... */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x00, /* ...**....... */ - 0x10, 0x00, /* ...*........ */ - 0x00, 0x00, /* ............ */ - - /* 45 0x2d '-' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x7f, 0xe0, /* .**********. */ - 0x7f, 0xe0, /* .**********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 46 0x2e '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x1e, 0x00, /* ...****..... */ - 0x1e, 0x00, /* ...****..... */ - 0x0c, 0x00, /* ....**...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 47 0x2f '/' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x60, /* .........**. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x01, 0x80, /* .......**... */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x00, /* ...**....... */ - 0x18, 0x00, /* ...**....... */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x60, 0x00, /* .**......... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 48 0x30 '0' */ - 0x00, 0x00, /* ............ */ - 0x07, 0x00, /* .....***.... */ - 0x0f, 0x80, /* ....*****... */ - 0x11, 0x80, /* ...*...**... */ - 0x10, 0xc0, /* ...*....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0x80, /* ..**....*... */ - 0x18, 0x80, /* ...**...*... */ - 0x1f, 0x00, /* ...*****.... */ - 0x0e, 0x00, /* ....***..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 49 0x31 '1' */ - 0x00, 0x00, /* ............ */ - 0x02, 0x00, /* ......*..... */ - 0x06, 0x00, /* .....**..... */ - 0x0e, 0x00, /* ....***..... */ - 0x1e, 0x00, /* ...****..... */ - 0x36, 0x00, /* ..**.**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 50 0x32 '2' */ - 0x00, 0x00, /* ............ */ - 0x1f, 0x00, /* ...*****.... */ - 0x3f, 0x80, /* ..*******... */ - 0x61, 0xc0, /* .**....***.. */ - 0x40, 0xc0, /* .*......**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x00, /* ...**....... */ - 0x30, 0x20, /* ..**......*. */ - 0x7f, 0xe0, /* .**********. */ - 0x7f, 0xe0, /* .**********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 51 0x33 '3' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x1f, 0xc0, /* ...*******.. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x40, 0x60, /* .*.......**. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0xe0, /* ........***. */ - 0x07, 0xc0, /* .....*****.. */ - 0x0f, 0xc0, /* ....******.. */ - 0x00, 0xe0, /* ........***. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x60, /* .........**. */ - 0x40, 0x60, /* .*.......**. */ - 0x60, 0x40, /* .**......*.. */ - 0x3f, 0x80, /* ..*******... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 52 0x34 '4' */ - 0x00, 0x00, /* ............ */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x80, /* ......***... */ - 0x03, 0x80, /* ......***... */ - 0x05, 0x80, /* .....*.**... */ - 0x05, 0x80, /* .....*.**... */ - 0x09, 0x80, /* ....*..**... */ - 0x09, 0x80, /* ....*..**... */ - 0x11, 0x80, /* ...*...**... */ - 0x11, 0x80, /* ...*...**... */ - 0x21, 0x80, /* ..*....**... */ - 0x3f, 0xe0, /* ..*********. */ - 0x7f, 0xe0, /* .**********. */ - 0x01, 0x80, /* .......**... */ - 0x01, 0x80, /* .......**... */ - 0x01, 0x80, /* .......**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 53 0x35 '5' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0xc0, /* ....******.. */ - 0x0f, 0xc0, /* ....******.. */ - 0x10, 0x00, /* ...*........ */ - 0x10, 0x00, /* ...*........ */ - 0x20, 0x00, /* ..*......... */ - 0x3f, 0x80, /* ..*******... */ - 0x31, 0xc0, /* ..**...***.. */ - 0x00, 0xe0, /* ........***. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x60, /* .........**. */ - 0x40, 0x60, /* .*.......**. */ - 0x60, 0x60, /* .**......**. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 54 0x36 '6' */ - 0x00, 0x00, /* ............ */ - 0x07, 0x00, /* .....***.... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x00, /* ...**....... */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x60, 0x00, /* .**......... */ - 0x67, 0x80, /* .**..****... */ - 0x6f, 0xc0, /* .**.******.. */ - 0x70, 0xe0, /* .***....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0x40, /* .***.....*.. */ - 0x3f, 0x80, /* ..*******... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 55 0x37 '7' */ - 0x00, 0x00, /* ............ */ - 0x1f, 0xe0, /* ...********. */ - 0x3f, 0xe0, /* ..*********. */ - 0x60, 0x40, /* .**......*.. */ - 0x00, 0x40, /* .........*.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0x80, /* ........*... */ - 0x00, 0x80, /* ........*... */ - 0x01, 0x80, /* .......**... */ - 0x01, 0x00, /* .......*.... */ - 0x01, 0x00, /* .......*.... */ - 0x03, 0x00, /* ......**.... */ - 0x02, 0x00, /* ......*..... */ - 0x02, 0x00, /* ......*..... */ - 0x06, 0x00, /* .....**..... */ - 0x04, 0x00, /* .....*...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 56 0x38 '8' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x11, 0x80, /* ...*...**... */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x18, 0x80, /* ...**...*... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x06, 0x00, /* .....**..... */ - 0x0b, 0x00, /* ....*.**.... */ - 0x11, 0x80, /* ...*...**... */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x18, 0x80, /* ...**...*... */ - 0x0f, 0x00, /* ....****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 57 0x39 '9' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0xe0, /* .***....***. */ - 0x3f, 0x60, /* ..******.**. */ - 0x1e, 0x60, /* ...****..**. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x01, 0x80, /* .......**... */ - 0x07, 0x00, /* .....***.... */ - 0x3c, 0x00, /* ..****...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 58 0x3a ':' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x1e, 0x00, /* ...****..... */ - 0x1e, 0x00, /* ...****..... */ - 0x0c, 0x00, /* ....**...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x1e, 0x00, /* ...****..... */ - 0x1e, 0x00, /* ...****..... */ - 0x0c, 0x00, /* ....**...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 59 0x3b ';' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x1e, 0x00, /* ...****..... */ - 0x1e, 0x00, /* ...****..... */ - 0x0c, 0x00, /* ....**...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x1e, 0x00, /* ...****..... */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x00, /* ...**....... */ - 0x10, 0x00, /* ...*........ */ - 0x00, 0x00, /* ............ */ - - /* 60 0x3c '<' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x60, /* .........**. */ - 0x01, 0xc0, /* .......***.. */ - 0x07, 0x00, /* .....***.... */ - 0x1c, 0x00, /* ...***...... */ - 0x70, 0x00, /* .***........ */ - 0x70, 0x00, /* .***........ */ - 0x1c, 0x00, /* ...***...... */ - 0x07, 0x00, /* .....***.... */ - 0x01, 0xc0, /* .......***.. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 61 0x3d '=' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x7f, 0xe0, /* .**********. */ - 0x7f, 0xe0, /* .**********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x7f, 0xe0, /* .**********. */ - 0x7f, 0xe0, /* .**********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 62 0x3e '>' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x60, 0x00, /* .**......... */ - 0x38, 0x00, /* ..***....... */ - 0x0e, 0x00, /* ....***..... */ - 0x03, 0x80, /* ......***... */ - 0x00, 0xe0, /* ........***. */ - 0x00, 0xe0, /* ........***. */ - 0x03, 0x80, /* ......***... */ - 0x0e, 0x00, /* ....***..... */ - 0x38, 0x00, /* ..***....... */ - 0x60, 0x00, /* .**......... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 63 0x3f '?' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x1f, 0x80, /* ...******... */ - 0x39, 0xc0, /* ..***..***.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 64 0x40 '@' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x3f, 0xc0, /* ..********.. */ - 0x30, 0x60, /* ..**.....**. */ - 0x60, 0x60, /* .**......**. */ - 0x67, 0x20, /* .**..***..*. */ - 0x6f, 0xa0, /* .**.*****.*. */ - 0x6c, 0xa0, /* .**.**..*.*. */ - 0x6c, 0xa0, /* .**.**..*.*. */ - 0x67, 0xe0, /* .**..******. */ - 0x60, 0x00, /* .**......... */ - 0x30, 0x00, /* ..**........ */ - 0x3f, 0xe0, /* ..*********. */ - 0x0f, 0xe0, /* ....*******. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 65 0x41 'A' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 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0x70, 0xe0, /* .***....***. */ - 0x59, 0x60, /* .*.**..*.**. */ - 0x59, 0x60, /* .*.**..*.**. */ - 0x59, 0x60, /* .*.**..*.**. */ - 0x4d, 0x60, /* .*..**.*.**. */ - 0x4e, 0x60, /* .*..***..**. */ - 0x4e, 0x60, /* .*..***..**. */ - 0x44, 0x60, /* .*...*...**. */ - 0x44, 0x60, /* .*...*...**. */ - 0xe4, 0xf0, /* ***..*..**** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 78 0x4e 'N' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xc0, 0x70, /* **.......*** */ - 0x60, 0x20, /* .**.......*. */ - 0x70, 0x20, /* .***......*. */ - 0x78, 0x20, /* .****.....*. */ - 0x58, 0x20, /* .*.**.....*. */ - 0x4c, 0x20, /* .*..**....*. */ - 0x46, 0x20, /* .*...**...*. */ - 0x47, 0x20, /* .*...***..*. */ - 0x43, 0x20, /* .*....**..*. */ - 0x41, 0xa0, /* .*.....**.*. */ - 0x40, 0xe0, /* .*......***. */ - 0x40, 0xe0, /* .*......***. */ - 0x40, 0x60, /* .*.......**. */ - 0xe0, 0x30, /* ***.......** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 79 0x4f 'O' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x20, 0x60, /* ..*......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x20, 0x40, /* ..*......*.. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x18, 0x80, /* ...**...*... */ - 0x0f, 0x00, /* ....****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 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0xf0, 0x70, /* ****.....*** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 83 0x53 'S' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1f, 0xe0, /* ...********. */ - 0x30, 0x60, /* ..**.....**. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x70, 0x00, /* .***........ */ - 0x3c, 0x00, /* ..****...... */ - 0x1e, 0x00, /* ...****..... */ - 0x07, 0x80, /* .....****... */ - 0x01, 0xc0, /* .......***.. */ - 0x00, 0xe0, /* ........***. */ - 0x40, 0x60, /* .*.......**. */ - 0x40, 0x60, /* .*.......**. */ - 0x60, 0xc0, /* .**.....**.. */ - 0x7f, 0x80, /* .********... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 84 0x54 'T' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x7f, 0xe0, /* .**********. */ - 0x46, 0x20, /* .*...**...*. */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 85 0x55 'U' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xf0, 0x70, /* ****.....*** */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x70, 0x40, /* .***.....*.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 86 0x56 'V' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xe0, 0xe0, /* ***.....***. */ - 0x60, 0x40, /* .**......*.. */ - 0x30, 0x80, /* ..**....*... */ - 0x30, 0x80, /* ..**....*... */ - 0x30, 0x80, /* ..**....*... */ - 0x19, 0x00, /* ...**..*.... */ - 0x19, 0x00, /* ...**..*.... */ - 0x19, 0x00, /* ...**..*.... */ - 0x0a, 0x00, /* ....*.*..... */ - 0x0e, 0x00, /* ....***..... */ - 0x0e, 0x00, /* ....***..... */ - 0x04, 0x00, /* .....*...... */ - 0x04, 0x00, /* .....*...... */ - 0x04, 0x00, /* .....*...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 87 0x57 'W' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xfe, 0xf0, /* *******.**** */ - 0x66, 0x20, /* .**..**...*. */ - 0x66, 0x20, /* .**..**...*. */ - 0x66, 0x20, /* .**..**...*. */ - 0x76, 0x20, /* .***.**...*. */ - 0x77, 0x40, /* .***.***.*.. */ - 0x33, 0x40, /* ..**..**.*.. */ - 0x37, 0x40, /* ..**.***.*.. */ - 0x3b, 0xc0, /* ..***.****.. */ - 0x3b, 0x80, /* ..***.***... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 88 0x58 'X' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xf0, 0x70, /* ****.....*** */ - 0x60, 0x20, /* .**.......*. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x38, 0x80, /* ..***...*... */ - 0x18, 0x80, /* ...**...*... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0b, 0x00, /* ....*.**.... */ - 0x11, 0x80, /* ...*...**... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x40, 0x60, /* .*.......**. */ - 0xe0, 0xf0, /* ***.....**** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 89 0x59 'Y' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xf0, 0x70, /* ****.....*** */ - 0x60, 0x20, /* .**.......*. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x18, 0x80, /* ...**...*... */ - 0x18, 0x80, /* ...**...*... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0f, 0x00, /* ....****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 90 0x5a 'Z' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xe0, /* ..*********. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x01, 0x80, /* .......**... */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x00, /* ...**....... */ - 0x18, 0x20, /* ...**.....*. */ - 0x3f, 0xe0, /* ..*********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 91 0x5b '[' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x0f, 0x80, /* ....*****... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0f, 0x80, /* ....*****... */ - 0x0f, 0x80, /* ....*****... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 92 0x5c '\' */ - 0x00, 0x00, /* ............ */ - 0x60, 0x00, /* .**......... */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x18, 0x00, /* ...**....... */ - 0x18, 0x00, /* ...**....... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x01, 0x80, /* .......**... */ - 0x01, 0x80, /* .......**... */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 93 0x5d ']' */ - 0x00, 0x00, /* ............ */ - 0x1f, 0x00, /* ...*****.... */ - 0x1f, 0x00, /* ...*****.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x03, 0x00, /* ......**.... */ - 0x1f, 0x00, /* ...*****.... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 94 0x5e '^' */ - 0x00, 0x00, /* ............ */ - 0x04, 0x00, /* .....*...... */ - 0x0e, 0x00, /* ....***..... */ - 0x1b, 0x00, /* ...**.**.... */ - 0x31, 0x80, /* ..**...**... */ - 0x60, 0xc0, /* .**.....**.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 95 0x5f '_' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 96 0x60 '`' */ - 0x00, 0x00, /* ............ */ - 0x01, 0x00, /* .......*.... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x07, 0x80, /* .....****... */ - 0x07, 0x80, /* .....****... */ - 0x03, 0x00, /* ......**.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 97 0x61 'a' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x10, 0xc0, /* ...*....**.. */ - 0x03, 0xc0, /* ......****.. */ - 0x1c, 0xc0, /* ...***..**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0xe0, /* ...****.***. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 98 0x62 'b' */ - 0x00, 0x00, /* ............ */ - 0x20, 0x00, /* ..*......... */ - 0x60, 0x00, /* .**......... */ - 0xe0, 0x00, /* ***......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x67, 0x80, /* .**..****... */ - 0x6f, 0xc0, /* .**.******.. */ - 0x70, 0xe0, /* .***....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0x60, /* .***.....**. */ - 0x78, 0xc0, /* .****...**.. */ - 0x4f, 0x80, /* .*..*****... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 99 0x63 'c' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1f, 0x80, /* ...******... */ - 0x31, 0xc0, /* ..**...***.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x70, 0x40, /* .***.....*.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 100 0x64 'd' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x60, /* .........**. */ - 0x00, 0xe0, /* ........***. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x60, /* .........**. */ - 0x0f, 0x60, /* ....****.**. */ - 0x31, 0xe0, /* ..**...****. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0xe0, /* .***....***. */ - 0x39, 0x60, /* ..***..*.**. */ - 0x1e, 0x70, /* ...****..*** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 101 0x65 'e' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x30, 0xc0, /* ..**....**.. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x7f, 0xe0, /* .**********. */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x30, 0x00, /* ..**........ */ - 0x18, 0x60, /* ...**....**. */ - 0x0f, 0x80, /* ....*****... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 102 0x66 'f' */ - 0x00, 0x00, /* ............ */ - 0x03, 0x80, /* ......***... */ - 0x04, 0xc0, /* .....*..**.. */ - 0x04, 0xc0, /* .....*..**.. */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x3f, 0x80, /* ..*******... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x1e, 0x00, /* ...****..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 103 0x67 'g' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1f, 0x20, /* ...*****..*. */ - 0x31, 0xe0, /* ..**...****. */ - 0x60, 0xc0, /* .**.....**.. */ - 0x60, 0xc0, /* .**.....**.. */ - 0x60, 0xc0, /* .**.....**.. */ - 0x31, 0x80, /* ..**...**... */ - 0x3f, 0x00, /* ..******.... */ - 0x60, 0x00, /* .**......... */ - 0x7f, 0xc0, /* .*********.. */ - 0x3f, 0xe0, /* ..*********. */ - 0x20, 0x60, /* ..*......**. */ - 0x40, 0x20, /* .*........*. */ - 0x40, 0x20, /* .*........*. */ - 0x7f, 0xc0, /* .*********.. */ - 0x3f, 0x80, /* ..*******... */ - 0x00, 0x00, /* ............ */ - - /* 104 0x68 'h' */ - 0x00, 0x00, /* ............ */ - 0x10, 0x00, /* ...*........ */ - 0x30, 0x00, /* ..**........ */ - 0x70, 0x00, /* .***........ */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x37, 0x80, /* ..**.****... */ - 0x39, 0xc0, /* ..***..***.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x79, 0xe0, /* .****..****. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 105 0x69 'i' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 106 0x6a 'j' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x03, 0xc0, /* ......****.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x00, 0xc0, /* ........**.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x38, 0x80, /* ..***...*... */ - 0x1f, 0x00, /* ...*****.... */ - 0x0e, 0x00, /* ....***..... */ - 0x00, 0x00, /* ............ */ - - /* 107 0x6b 'k' */ - 0x00, 0x00, /* ............ */ - 0x60, 0x00, /* .**......... */ - 0xe0, 0x00, /* ***......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x61, 0xc0, /* .**....***.. */ - 0x63, 0x00, /* .**...**.... */ - 0x66, 0x00, /* .**..**..... */ - 0x7c, 0x00, /* .*****...... */ - 0x78, 0x00, /* .****....... */ - 0x7c, 0x00, /* .*****...... */ - 0x6e, 0x00, /* .**.***..... */ - 0x67, 0x00, /* .**..***.... */ - 0x63, 0x80, /* .**...***... */ - 0xf1, 0xe0, /* ****...****. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 108 0x6c 'l' */ - 0x00, 0x00, /* ............ */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 109 0x6d 'm' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xdd, 0xc0, /* **.***.***.. */ - 0x6e, 0xe0, /* .**.***.***. */ - 0x66, 0x60, /* .**..**..**. */ - 0x66, 0x60, /* .**..**..**. */ - 0x66, 0x60, /* .**..**..**. */ - 0x66, 0x60, /* .**..**..**. */ - 0x66, 0x60, /* .**..**..**. */ - 0x66, 0x60, /* .**..**..**. */ - 0x66, 0x60, /* .**..**..**. */ - 0xef, 0x70, /* ***.****.*** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 110 0x6e 'n' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x27, 0x80, /* ..*..****... */ - 0x79, 0xc0, /* .****..***.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x79, 0xe0, /* .****..****. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 111 0x6f 'o' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0x40, /* .***.....*.. */ - 0x38, 0x80, /* ..***...*... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 112 0x70 'p' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xef, 0x80, /* ***.*****... */ - 0x71, 0xc0, /* .***...***.. */ - 0x60, 0xe0, /* .**.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x40, /* .**......*.. */ - 0x70, 0x80, /* .***....*... */ - 0x7f, 0x00, /* .*******.... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0xf0, 0x00, /* ****........ */ - 0x00, 0x00, /* ............ */ - - /* 113 0x71 'q' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x20, /* ....****..*. */ - 0x11, 0xe0, /* ...*...****. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0x60, /* .***.....**. */ - 0x38, 0xe0, /* ..***...***. */ - 0x1f, 0xe0, /* ...********. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0x60, /* .........**. */ - 0x00, 0xf0, /* ........**** */ - 0x00, 0x00, /* ............ */ - - /* 114 0x72 'r' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x73, 0x80, /* .***..***... */ - 0x34, 0xc0, /* ..**.*..**.. */ - 0x38, 0xc0, /* ..***...**.. */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x78, 0x00, /* .****....... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 115 0x73 's' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1f, 0xc0, /* ...*******.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x38, 0x00, /* ..***....... */ - 0x1e, 0x00, /* ...****..... */ - 0x07, 0x80, /* .....****... */ - 0x01, 0xc0, /* .......***.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x3f, 0x80, /* ..*******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 116 0x74 't' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x04, 0x00, /* .....*...... */ - 0x04, 0x00, /* .....*...... */ - 0x0c, 0x00, /* ....**...... */ - 0x7f, 0xc0, /* .*********.. */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x00, /* ....**...... */ - 0x0c, 0x20, /* ....**....*. */ - 0x0e, 0x40, /* ....***..*.. */ - 0x07, 0x80, /* .....****... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 117 0x75 'u' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x79, 0xe0, /* .****..****. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0x60, /* ...****..**. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 118 0x76 'v' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xf0, 0x70, /* ****.....*** */ - 0x60, 0x20, /* .**.......*. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x18, 0x80, /* ...**...*... */ - 0x18, 0x80, /* ...**...*... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 119 0x77 'w' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xff, 0x70, /* ********.*** */ - 0x66, 0x20, /* .**..**...*. */ - 0x66, 0x20, /* .**..**...*. */ - 0x66, 0x20, /* .**..**...*. */ - 0x37, 0x40, /* ..**.***.*.. */ - 0x3b, 0x40, /* ..***.**.*.. */ - 0x3b, 0x40, /* ..***.**.*.. */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 120 0x78 'x' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xf8, 0xf0, /* *****...**** */ - 0x70, 0x40, /* .***.....*.. */ - 0x38, 0x80, /* ..***...*... */ - 0x1d, 0x00, /* ...***.*.... */ - 0x0e, 0x00, /* ....***..... */ - 0x07, 0x00, /* .....***.... */ - 0x0b, 0x80, /* ....*.***... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xe0, /* ..*.....***. */ - 0xf1, 0xf0, /* ****...***** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 121 0x79 'y' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xf0, 0xf0, /* ****....**** */ - 0x60, 0x20, /* .**.......*. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x18, 0x80, /* ...**...*... */ - 0x18, 0x80, /* ...**...*... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x04, 0x00, /* .....*...... */ - 0x0c, 0x00, /* ....**...... */ - 0x08, 0x00, /* ....*....... */ - 0x78, 0x00, /* .****....... */ - 0x70, 0x00, /* .***........ */ - 0x00, 0x00, /* ............ */ - - /* 122 0x7a 'z' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x7f, 0xe0, /* .**********. */ - 0x60, 0xe0, /* .**.....***. */ - 0x41, 0xc0, /* .*.....***.. */ - 0x03, 0x80, /* ......***... */ - 0x07, 0x00, /* .....***.... */ - 0x0e, 0x00, /* ....***..... */ - 0x1c, 0x00, /* ...***...... */ - 0x38, 0x20, /* ..***.....*. */ - 0x70, 0x60, /* .***.....**. */ - 0x7f, 0xe0, /* .**********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 123 0x7b '{' */ - 0x00, 0x00, /* ............ */ - 0x03, 0x80, /* ......***... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x38, 0x00, /* ..***....... */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x80, /* ......***... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 124 0x7c '|' */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - - /* 125 0x7d '}' */ - 0x00, 0x00, /* ............ */ - 0x1c, 0x00, /* ...***...... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x01, 0xc0, /* .......***.. */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1c, 0x00, /* ...***...... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 126 0x7e '~' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1c, 0x20, /* ...***....*. */ - 0x3e, 0x60, /* ..*****..**. */ - 0x67, 0xc0, /* .**..*****.. */ - 0x43, 0x80, /* .*....***... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 127 0x7f '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 128 0x80 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0xc0, /* ....******.. */ - 0x10, 0x60, /* ...*.....**. */ - 0x20, 0x20, /* ..*.......*. */ - 0x20, 0x00, /* ..*......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x20, 0x00, /* ..*......... */ - 0x30, 0x20, /* ..**......*. */ - 0x18, 0x40, /* ...**....*.. */ - 0x0f, 0x80, /* ....*****... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x01, 0x80, /* .......**... */ - 0x0f, 0x00, /* ....****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 129 0x81 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x79, 0xe0, /* .****..****. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0x60, /* ...****..**. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 130 0x82 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x30, 0xc0, /* ..**....**.. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x7f, 0xe0, /* .**********. */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x30, 0x00, /* ..**........ */ - 0x18, 0x60, /* ...**....**. */ - 0x0f, 0x80, /* ....*****... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 131 0x83 '.' */ - 0x00, 0x00, /* ............ */ - 0x02, 0x00, /* ......*..... */ - 0x07, 0x00, /* .....***.... */ - 0x0d, 0x80, /* ....**.**... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x10, 0xc0, /* ...*....**.. */ - 0x03, 0xc0, /* ......****.. */ - 0x1c, 0xc0, /* ...***..**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0xe0, /* ...****.***. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 132 0x84 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x10, 0xc0, /* ...*....**.. */ - 0x03, 0xc0, /* ......****.. */ - 0x1c, 0xc0, /* ...***..**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0xe0, /* ...****.***. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 133 0x85 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x10, 0xc0, /* ...*....**.. */ - 0x03, 0xc0, /* ......****.. */ - 0x1c, 0xc0, /* ...***..**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0xe0, /* ...****.***. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 134 0x86 '.' */ - 0x00, 0x00, /* ............ */ - 0x07, 0x00, /* .....***.... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x07, 0x00, /* .....***.... */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x10, 0xc0, /* ...*....**.. */ - 0x03, 0xc0, /* ......****.. */ - 0x1c, 0xc0, /* ...***..**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0xe0, /* ...****.***. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 135 0x87 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1f, 0x80, /* ...******... */ - 0x31, 0xc0, /* ..**...***.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x70, 0x40, /* .***.....*.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x1f, 0x80, /* ...******... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x01, 0x80, /* .......**... */ - 0x0f, 0x00, /* ....****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 136 0x88 '.' */ - 0x00, 0x00, /* ............ */ - 0x02, 0x00, /* ......*..... */ - 0x07, 0x00, /* .....***.... */ - 0x0d, 0x80, /* ....**.**... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x30, 0xc0, /* ..**....**.. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x7f, 0xe0, /* .**********. */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x30, 0x00, /* ..**........ */ - 0x18, 0x60, /* ...**....**. */ - 0x0f, 0x80, /* ....*****... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 137 0x89 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x30, 0xc0, /* ..**....**.. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x7f, 0xe0, /* .**********. */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x30, 0x00, /* ..**........ */ - 0x18, 0x60, /* ...**....**. */ - 0x0f, 0x80, /* ....*****... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 138 0x8a '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x30, 0xc0, /* ..**....**.. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x7f, 0xe0, /* .**********. */ - 0x60, 0x00, /* .**......... */ - 0x60, 0x00, /* .**......... */ - 0x30, 0x00, /* ..**........ */ - 0x18, 0x60, /* ...**....**. */ - 0x0f, 0x80, /* ....*****... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 139 0x8b '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 140 0x8c '.' */ - 0x00, 0x00, /* ............ */ - 0x04, 0x00, /* .....*...... */ - 0x0e, 0x00, /* ....***..... */ - 0x1b, 0x00, /* ...**.**.... */ - 0x31, 0x80, /* ..**...**... */ - 0x00, 0x00, /* ............ */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 141 0x8d '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x18, 0x00, /* ...**....... */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 142 0x8e '.' */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x04, 0x00, /* .....*...... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0b, 0x00, /* ....*.**.... */ - 0x0b, 0x00, /* ....*.**.... */ - 0x19, 0x80, /* ...**..**... */ - 0x11, 0x80, /* ...*...**... */ - 0x3f, 0xc0, /* ..********.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x60, 0x60, /* .**......**. */ - 0x40, 0x60, /* .*.......**. */ - 0xe0, 0xf0, /* ***.....**** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 143 0x8f '.' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x19, 0x80, /* ...**..**... */ - 0x0f, 0x00, /* ....****.... */ - 0x04, 0x00, /* .....*...... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x0b, 0x00, /* ....*.**.... */ - 0x0b, 0x00, /* ....*.**.... */ - 0x19, 0x80, /* ...**..**... */ - 0x11, 0x80, /* ...*...**... */ - 0x3f, 0xc0, /* ..********.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x60, 0x60, /* .**......**. */ - 0x40, 0x60, /* .*.......**. */ - 0xe0, 0xf0, /* ***.....**** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 144 0x90 '.' */ - 0x00, 0x00, /* ............ */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x08, 0x00, /* ....*....... */ - 0x7f, 0xe0, /* .**********. */ - 0x30, 0x20, /* ..**......*. */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x80, /* ..**....*... */ - 0x3f, 0x80, /* ..*******... */ - 0x30, 0x80, /* ..**....*... */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x20, /* ..**......*. */ - 0x30, 0x20, /* ..**......*. */ - 0x7f, 0xe0, /* .**********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 145 0x91 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3d, 0xe0, /* ..****.****. */ - 0x66, 0x30, /* .**..**...** */ - 0x46, 0x30, /* .*...**...** */ - 0x06, 0x30, /* .....**...** */ - 0x3f, 0xf0, /* ..********** */ - 0x66, 0x00, /* .**..**..... */ - 0xc6, 0x00, /* **...**..... */ - 0xc6, 0x00, /* **...**..... */ - 0xe7, 0x30, /* ***..***..** */ - 0x7d, 0xe0, /* .*****.****. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 146 0x92 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x03, 0xf0, /* ......****** */ - 0x07, 0x10, /* .....***...* */ - 0x07, 0x10, /* .....***...* */ - 0x0b, 0x00, /* ....*.**.... */ - 0x0b, 0x00, /* ....*.**.... */ - 0x0b, 0x20, /* ....*.**..*. */ - 0x13, 0xe0, /* ...*..*****. */ - 0x13, 0x20, /* ...*..**..*. */ - 0x3f, 0x00, /* ..******.... */ - 0x23, 0x00, /* ..*...**.... */ - 0x23, 0x00, /* ..*...**.... */ - 0x43, 0x10, /* .*....**...* */ - 0x43, 0x10, /* .*....**...* */ - 0xe7, 0xf0, /* ***..******* */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 147 0x93 '.' */ - 0x00, 0x00, /* ............ */ - 0x02, 0x00, /* ......*..... */ - 0x07, 0x00, /* .....***.... */ - 0x0d, 0x80, /* ....**.**... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0x40, /* .***.....*.. */ - 0x38, 0x80, /* ..***...*... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 148 0x94 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0x40, /* .***.....*.. */ - 0x38, 0x80, /* ..***...*... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 149 0x95 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x03, 0x00, /* ......**.... */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0x40, /* .***.....*.. */ - 0x38, 0x80, /* ..***...*... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 150 0x96 '.' */ - 0x00, 0x00, /* ............ */ - 0x02, 0x00, /* ......*..... */ - 0x07, 0x00, /* .....***.... */ - 0x0d, 0x80, /* ....**.**... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x00, 0x00, /* ............ */ - 0x79, 0xe0, /* .****..****. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0x60, /* ...****..**. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 151 0x97 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x18, 0x00, /* ...**....... */ - 0x0c, 0x00, /* ....**...... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x79, 0xe0, /* .****..****. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0x60, /* ...****..**. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 152 0x98 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xf0, 0xf0, /* ****....**** */ - 0x60, 0x20, /* .**.......*. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x18, 0x80, /* ...**...*... */ - 0x18, 0x80, /* ...**...*... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x0d, 0x00, /* ....**.*.... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x04, 0x00, /* .....*...... */ - 0x0c, 0x00, /* ....**...... */ - 0x08, 0x00, /* ....*....... */ - 0x78, 0x00, /* .****....... */ - 0x70, 0x00, /* .***........ */ - 0x00, 0x00, /* ............ */ - - /* 153 0x99 '.' */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xc0, /* ..*.....**.. */ - 0x20, 0x60, /* ..*......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x20, 0x40, /* ..*......*.. */ - 0x30, 0x40, /* ..**.....*.. */ - 0x18, 0x80, /* ...**...*... */ - 0x0f, 0x00, /* ....****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 154 0x9a '.' */ - 0x00, 0x00, /* ............ */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0xe0, 0x30, /* ***.......** */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x60, 0x20, /* .**.......*. */ - 0x70, 0x40, /* .***.....*.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 155 0x9b '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x36, 0xc0, /* ..**.**.**.. */ - 0x26, 0xc0, /* ..*..**.**.. */ - 0x66, 0x00, /* .**..**..... */ - 0x66, 0x00, /* .**..**..... */ - 0x66, 0x00, /* .**..**..... */ - 0x66, 0x00, /* .**..**..... */ - 0x76, 0x40, /* .***.**..*.. */ - 0x36, 0xc0, /* ..**.**.**.. */ - 0x1f, 0x80, /* ...******... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 156 0x9c '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x1c, 0xc0, /* ...***..**.. */ - 0x18, 0xc0, /* ...**...**.. */ - 0x18, 0x00, /* ...**....... */ - 0x18, 0x00, /* ...**....... */ - 0x18, 0x00, /* ...**....... */ - 0x7e, 0x00, /* .******..... */ - 0x7e, 0x00, /* .******..... */ - 0x18, 0x00, /* ...**....... */ - 0x18, 0x00, /* ...**....... */ - 0x18, 0x00, /* ...**....... */ - 0x18, 0x00, /* ...**....... */ - 0x3e, 0x20, /* ..*****...*. */ - 0x7f, 0xe0, /* .**********. */ - 0x61, 0xc0, /* .**....***.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 157 0x9d '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x0f, 0x00, /* ....****.... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 158 0x9e '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 159 0x9f '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 160 0xa0 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x18, 0xc0, /* ...**...**.. */ - 0x10, 0xc0, /* ...*....**.. */ - 0x03, 0xc0, /* ......****.. */ - 0x1c, 0xc0, /* ...***..**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0xe0, /* ...****.***. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 161 0xa1 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x1e, 0x00, /* ...****..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x1f, 0x80, /* ...******... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 162 0xa2 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x80, /* ....*****... */ - 0x11, 0xc0, /* ...*...***.. */ - 0x20, 0xe0, /* ..*.....***. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x60, 0x60, /* .**......**. */ - 0x70, 0x40, /* .***.....*.. */ - 0x38, 0x80, /* ..***...*... */ - 0x1f, 0x00, /* ...*****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 163 0xa3 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x01, 0x80, /* .......**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x79, 0xe0, /* .****..****. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x1e, 0x60, /* ...****..**. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 164 0xa4 '.' */ - 0x00, 0x00, /* ............ */ - 0x1c, 0x40, /* ...***...*.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x23, 0x80, /* ..*...***... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x27, 0x80, /* ..*..****... */ - 0x79, 0xc0, /* .****..***.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x79, 0xe0, /* .****..****. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 165 0xa5 '.' */ - 0x00, 0x00, /* ............ */ - 0x1c, 0x40, /* ...***...*.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x23, 0x80, /* ..*...***... */ - 0xc0, 0x70, /* **.......*** */ - 0x60, 0x20, /* .**.......*. */ - 0x70, 0x20, /* .***......*. */ - 0x78, 0x20, /* .****.....*. */ - 0x5c, 0x20, /* .*.***....*. */ - 0x4e, 0x20, /* .*..***...*. */ - 0x47, 0x20, /* .*...***..*. */ - 0x43, 0xa0, /* .*....***.*. */ - 0x41, 0xe0, /* .*.....****. */ - 0x40, 0xe0, /* .*......***. */ - 0x40, 0x60, /* .*.......**. */ - 0xe0, 0x30, /* ***.......** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 166 0xa6 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x1f, 0x00, /* ...*****.... */ - 0x31, 0x80, /* ..**...**... */ - 0x01, 0x80, /* .......**... */ - 0x07, 0x80, /* .....****... */ - 0x19, 0x80, /* ...**..**... */ - 0x31, 0x80, /* ..**...**... */ - 0x31, 0x80, /* ..**...**... */ - 0x33, 0x80, /* ..**..***... */ - 0x1d, 0xc0, /* ...***.***.. */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 167 0xa7 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x07, 0x00, /* .....***.... */ - 0x19, 0x80, /* ...**..**... */ - 0x10, 0xc0, /* ...*....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0x80, /* ..**....*... */ - 0x19, 0x80, /* ...**..**... */ - 0x0e, 0x00, /* ....***..... */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 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0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 209 0xd1 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x00, 0x00, /* ............ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - - /* 210 0xd2 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - - /* 211 0xd3 '.' */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0f, 0xf0, /* ....******** */ - 0x0f, 0xf0, /* ....******** */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 212 0xd4 '.' */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x07, 0xf0, /* .....******* */ - 0x07, 0xf0, /* .....******* */ - 0x06, 0x00, /* .....**..... */ - 0x07, 0xf0, /* .....******* */ - 0x07, 0xf0, /* .....******* */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 213 0xd5 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x07, 0xf0, /* .....******* */ - 0x07, 0xf0, /* .....******* */ - 0x06, 0x00, /* .....**..... */ - 0x07, 0xf0, /* .....******* */ - 0x07, 0xf0, /* .....******* */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - - /* 214 0xd6 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x0f, 0xf0, /* ....******** */ - 0x0f, 0xf0, /* ....******** */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - - /* 215 0xd7 '.' */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - 0x0d, 0x80, /* ....**.**... */ - - /* 216 0xd8 '.' */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x06, 0x00, /* .....**..... */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - - /* 217 0xd9 '.' */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0xfe, 0x00, /* *******..... */ - 0xfe, 0x00, /* *******..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 218 0xda '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x07, 0xf0, /* .....******* */ - 0x07, 0xf0, /* .....******* */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - - /* 219 0xdb '.' */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - - /* 220 0xdc '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - - /* 221 0xdd '.' */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - 0xfc, 0x00, /* ******...... */ - - /* 222 0xde '.' */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - 0x03, 0xf0, /* ......****** */ - - /* 223 0xdf '.' */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0xff, 0xf0, /* ************ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 224 0xe0 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 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0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x31, 0x80, /* ..**...**... */ - 0x77, 0x00, /* .***.***.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 226 0xe2 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 227 0xe3 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 228 0xe4 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 229 0xe5 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 230 0xe6 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x30, 0xc0, /* ..**....**.. */ - 0x39, 0xc0, /* ..***..***.. */ - 0x36, 0xe0, /* ..**.**.***. */ - 0x30, 0x00, /* ..**........ */ - 0x30, 0x00, /* ..**........ */ - 0x60, 0x00, /* .**......... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 231 0xe7 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 232 0xe8 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 233 0xe9 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 234 0xea '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 235 0xeb '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 236 0xec '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 237 0xed '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 238 0xee '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 239 0xef '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 240 0xf0 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 241 0xf1 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x7f, 0xe0, /* .**********. */ - 0x7f, 0xe0, /* .**********. */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x7f, 0xe0, /* .**********. */ - 0x7f, 0xe0, /* .**********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 242 0xf2 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 243 0xf3 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 244 0xf4 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 245 0xf5 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 246 0xf6 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x7f, 0xe0, /* .**********. */ - 0x7f, 0xe0, /* .**********. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 247 0xf7 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 248 0xf8 '.' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x19, 0x80, /* ...**..**... */ - 0x0f, 0x00, /* ....****.... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 249 0xf9 '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 250 0xfa '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x06, 0x00, /* .....**..... */ - 0x0f, 0x00, /* ....****.... */ - 0x0f, 0x00, /* ....****.... */ - 0x06, 0x00, /* .....**..... */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 251 0xfb '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 252 0xfc '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 253 0xfd '.' */ - 0x00, 0x00, /* ............ */ - 0x0f, 0x00, /* ....****.... */ - 0x1f, 0x80, /* ...******... */ - 0x31, 0x80, /* ..**...**... */ - 0x21, 0x80, /* ..*....**... */ - 0x03, 0x00, /* ......**.... */ - 0x06, 0x00, /* .....**..... */ - 0x0c, 0x00, /* ....**...... */ - 0x18, 0x40, /* ...**....*.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 254 0xfe '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x3f, 0xc0, /* ..********.. */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - - /* 255 0xff '.' */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ - 0x00, 0x00, /* ............ */ -}; diff --git a/sys/dev/sf/if_sf.c b/sys/dev/sf/if_sf.c deleted file mode 100644 index a64379f..0000000 --- a/sys/dev/sf/if_sf.c +++ /dev/null @@ -1,1568 +0,0 @@ -/*- - * Copyright (c) 1997, 1998, 1999 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Adaptec AIC-6915 "Starfire" PCI fast ethernet driver for FreeBSD. - * Programming manual is available from: - * http://download.adaptec.com/pdfs/user_guides/aic6915_pg.pdf. - * - * Written by Bill Paul <wpaul@ctr.columbia.edu> - * Department of Electical Engineering - * Columbia University, New York City - */ -/* - * The Adaptec AIC-6915 "Starfire" is a 64-bit 10/100 PCI ethernet - * controller designed with flexibility and reducing CPU load in mind. - * The Starfire offers high and low priority buffer queues, a - * producer/consumer index mechanism and several different buffer - * queue and completion queue descriptor types. Any one of a number - * of different driver designs can be used, depending on system and - * OS requirements. This driver makes use of type0 transmit frame - * descriptors (since BSD fragments packets across an mbuf chain) - * and two RX buffer queues prioritized on size (one queue for small - * frames that will fit into a single mbuf, another with full size - * mbuf clusters for everything else). The producer/consumer indexes - * and completion queues are also used. - * - * One downside to the Starfire has to do with alignment: buffer - * queues must be aligned on 256-byte boundaries, and receive buffers - * must be aligned on longword boundaries. The receive buffer alignment - * causes problems on the Alpha platform, where the packet payload - * should be longword aligned. There is no simple way around this. - * - * For receive filtering, the Starfire offers 16 perfect filter slots - * and a 512-bit hash table. - * - * The Starfire has no internal transceiver, relying instead on an - * external MII-based transceiver. Accessing registers on external - * PHYs is done through a special register map rather than with the - * usual bitbang MDIO method. - * - * Acesssing the registers on the Starfire is a little tricky. The - * Starfire has a 512K internal register space. When programmed for - * PCI memory mapped mode, the entire register space can be accessed - * directly. However in I/O space mode, only 256 bytes are directly - * mapped into PCI I/O space. The other registers can be accessed - * indirectly using the SF_INDIRECTIO_ADDR and SF_INDIRECTIO_DATA - * registers inside the 256-byte I/O window. - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/sockio.h> -#include <sys/mbuf.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/socket.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/ethernet.h> -#include <net/if_dl.h> -#include <net/if_media.h> -#include <net/if_types.h> - -#include <net/bpf.h> - -#include <vm/vm.h> /* for vtophys */ -#include <vm/pmap.h> /* for vtophys */ -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/bus.h> -#include <sys/rman.h> - -#include <dev/mii/mii.h> -#include <dev/mii/miivar.h> - -/* "controller miibus0" required. See GENERIC if you get errors here. */ -#include "miibus_if.h" - -#include <dev/pci/pcireg.h> -#include <dev/pci/pcivar.h> - -#define SF_USEIOSPACE - -#include <pci/if_sfreg.h> - -MODULE_DEPEND(sf, pci, 1, 1, 1); -MODULE_DEPEND(sf, ether, 1, 1, 1); -MODULE_DEPEND(sf, miibus, 1, 1, 1); - -static struct sf_type sf_devs[] = { - { AD_VENDORID, AD_DEVICEID_STARFIRE, - "Adaptec AIC-6915 10/100BaseTX" }, - { 0, 0, NULL } -}; - -static int sf_probe(device_t); -static int sf_attach(device_t); -static int sf_detach(device_t); -static void sf_intr(void *); -static void sf_stats_update(void *); -static void sf_rxeof(struct sf_softc *); -static void sf_txeof(struct sf_softc *); -static int sf_encap(struct sf_softc *, struct sf_tx_bufdesc_type0 *, - struct mbuf *); -static void sf_start(struct ifnet *); -static int sf_ioctl(struct ifnet *, u_long, caddr_t); -static void sf_init(void *); -static void sf_stop(struct sf_softc *); -static void sf_watchdog(struct ifnet *); -static void sf_shutdown(device_t); -static int sf_ifmedia_upd(struct ifnet *); -static void sf_ifmedia_sts(struct ifnet *, struct ifmediareq *); -static void sf_reset(struct sf_softc *); -static int sf_init_rx_ring(struct sf_softc *); -static void sf_init_tx_ring(struct sf_softc *); -static int sf_newbuf(struct sf_softc *, struct sf_rx_bufdesc_type0 *, - struct mbuf *); -static void sf_setmulti(struct sf_softc *); -static int sf_setperf(struct sf_softc *, int, caddr_t); -static int sf_sethash(struct sf_softc *, caddr_t, int); -#ifdef notdef -static int sf_setvlan(struct sf_softc *, int, u_int32_t); -#endif - -static u_int8_t sf_read_eeprom(struct sf_softc *, int); - -static int sf_miibus_readreg(device_t, int, int); -static int sf_miibus_writereg(device_t, int, int, int); -static void sf_miibus_statchg(device_t); -#ifdef DEVICE_POLLING -static void sf_poll(struct ifnet *ifp, enum poll_cmd cmd, - int count); -static void sf_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, - int count); -#endif /* DEVICE_POLLING */ - -static u_int32_t csr_read_4(struct sf_softc *, int); -static void csr_write_4(struct sf_softc *, int, u_int32_t); -static void sf_txthresh_adjust(struct sf_softc *); - -#ifdef SF_USEIOSPACE -#define SF_RES SYS_RES_IOPORT -#define SF_RID SF_PCI_LOIO -#else -#define SF_RES SYS_RES_MEMORY -#define SF_RID SF_PCI_LOMEM -#endif - -static device_method_t sf_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, sf_probe), - DEVMETHOD(device_attach, sf_attach), - DEVMETHOD(device_detach, sf_detach), - DEVMETHOD(device_shutdown, sf_shutdown), - - /* bus interface */ - DEVMETHOD(bus_print_child, bus_generic_print_child), - DEVMETHOD(bus_driver_added, bus_generic_driver_added), - - /* MII interface */ - DEVMETHOD(miibus_readreg, sf_miibus_readreg), - DEVMETHOD(miibus_writereg, sf_miibus_writereg), - DEVMETHOD(miibus_statchg, sf_miibus_statchg), - - { 0, 0 } -}; - -static driver_t sf_driver = { - "sf", - sf_methods, - sizeof(struct sf_softc), -}; - -static devclass_t sf_devclass; - -DRIVER_MODULE(sf, pci, sf_driver, sf_devclass, 0, 0); -DRIVER_MODULE(miibus, sf, miibus_driver, miibus_devclass, 0, 0); - -#define SF_SETBIT(sc, reg, x) \ - csr_write_4(sc, reg, csr_read_4(sc, reg) | (x)) - -#define SF_CLRBIT(sc, reg, x) \ - csr_write_4(sc, reg, csr_read_4(sc, reg) & ~(x)) - -static u_int32_t -csr_read_4(sc, reg) - struct sf_softc *sc; - int reg; -{ - u_int32_t val; - -#ifdef SF_USEIOSPACE - CSR_WRITE_4(sc, SF_INDIRECTIO_ADDR, reg + SF_RMAP_INTREG_BASE); - val = CSR_READ_4(sc, SF_INDIRECTIO_DATA); -#else - val = CSR_READ_4(sc, (reg + SF_RMAP_INTREG_BASE)); -#endif - - return(val); -} - -static u_int8_t -sf_read_eeprom(sc, reg) - struct sf_softc *sc; - int reg; -{ - u_int8_t val; - - val = (csr_read_4(sc, SF_EEADDR_BASE + - (reg & 0xFFFFFFFC)) >> (8 * (reg & 3))) & 0xFF; - - return(val); -} - -static void -csr_write_4(sc, reg, val) - struct sf_softc *sc; - int reg; - u_int32_t val; -{ -#ifdef SF_USEIOSPACE - CSR_WRITE_4(sc, SF_INDIRECTIO_ADDR, reg + SF_RMAP_INTREG_BASE); - CSR_WRITE_4(sc, SF_INDIRECTIO_DATA, val); -#else - CSR_WRITE_4(sc, (reg + SF_RMAP_INTREG_BASE), val); -#endif -} - -/* - * Copy the address 'mac' into the perfect RX filter entry at - * offset 'idx.' The perfect filter only has 16 entries so do - * some sanity tests. - */ -static int -sf_setperf(sc, idx, mac) - struct sf_softc *sc; - int idx; - caddr_t mac; -{ - u_int16_t *p; - - if (idx < 0 || idx > SF_RXFILT_PERFECT_CNT) - return(EINVAL); - - if (mac == NULL) - return(EINVAL); - - p = (u_int16_t *)mac; - - csr_write_4(sc, SF_RXFILT_PERFECT_BASE + - (idx * SF_RXFILT_PERFECT_SKIP), htons(p[2])); - csr_write_4(sc, SF_RXFILT_PERFECT_BASE + - (idx * SF_RXFILT_PERFECT_SKIP) + 4, htons(p[1])); - csr_write_4(sc, SF_RXFILT_PERFECT_BASE + - (idx * SF_RXFILT_PERFECT_SKIP) + 8, htons(p[0])); - - return(0); -} - -/* - * Set the bit in the 512-bit hash table that corresponds to the - * specified mac address 'mac.' If 'prio' is nonzero, update the - * priority hash table instead of the filter hash table. - */ -static int -sf_sethash(sc, mac, prio) - struct sf_softc *sc; - caddr_t mac; - int prio; -{ - u_int32_t h; - - if (mac == NULL) - return(EINVAL); - - h = ether_crc32_be(mac, ETHER_ADDR_LEN) >> 23; - - if (prio) { - SF_SETBIT(sc, SF_RXFILT_HASH_BASE + SF_RXFILT_HASH_PRIOOFF + - (SF_RXFILT_HASH_SKIP * (h >> 4)), (1 << (h & 0xF))); - } else { - SF_SETBIT(sc, SF_RXFILT_HASH_BASE + SF_RXFILT_HASH_ADDROFF + - (SF_RXFILT_HASH_SKIP * (h >> 4)), (1 << (h & 0xF))); - } - - return(0); -} - -#ifdef notdef -/* - * Set a VLAN tag in the receive filter. - */ -static int -sf_setvlan(sc, idx, vlan) - struct sf_softc *sc; - int idx; - u_int32_t vlan; -{ - if (idx < 0 || idx >> SF_RXFILT_HASH_CNT) - return(EINVAL); - - csr_write_4(sc, SF_RXFILT_HASH_BASE + - (idx * SF_RXFILT_HASH_SKIP) + SF_RXFILT_HASH_VLANOFF, vlan); - - return(0); -} -#endif - -static int -sf_miibus_readreg(dev, phy, reg) - device_t dev; - int phy, reg; -{ - struct sf_softc *sc; - int i; - u_int32_t val = 0; - - sc = device_get_softc(dev); - - for (i = 0; i < SF_TIMEOUT; i++) { - val = csr_read_4(sc, SF_PHY_REG(phy, reg)); - if (val & SF_MII_DATAVALID) - break; - } - - if (i == SF_TIMEOUT) - return(0); - - if ((val & 0x0000FFFF) == 0xFFFF) - return(0); - - return(val & 0x0000FFFF); -} - -static int -sf_miibus_writereg(dev, phy, reg, val) - device_t dev; - int phy, reg, val; -{ - struct sf_softc *sc; - int i; - int busy; - - sc = device_get_softc(dev); - - csr_write_4(sc, SF_PHY_REG(phy, reg), val); - - for (i = 0; i < SF_TIMEOUT; i++) { - busy = csr_read_4(sc, SF_PHY_REG(phy, reg)); - if (!(busy & SF_MII_BUSY)) - break; - } - - return(0); -} - -static void -sf_miibus_statchg(dev) - device_t dev; -{ - struct sf_softc *sc; - struct mii_data *mii; - - sc = device_get_softc(dev); - mii = device_get_softc(sc->sf_miibus); - - if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) { - SF_SETBIT(sc, SF_MACCFG_1, SF_MACCFG1_FULLDUPLEX); - csr_write_4(sc, SF_BKTOBKIPG, SF_IPGT_FDX); - } else { - SF_CLRBIT(sc, SF_MACCFG_1, SF_MACCFG1_FULLDUPLEX); - csr_write_4(sc, SF_BKTOBKIPG, SF_IPGT_HDX); - } -} - -static void -sf_setmulti(sc) - struct sf_softc *sc; -{ - struct ifnet *ifp; - int i; - struct ifmultiaddr *ifma; - u_int8_t dummy[] = { 0, 0, 0, 0, 0, 0 }; - - ifp = sc->sf_ifp; - - /* First zot all the existing filters. */ - for (i = 1; i < SF_RXFILT_PERFECT_CNT; i++) - sf_setperf(sc, i, (char *)&dummy); - for (i = SF_RXFILT_HASH_BASE; - i < (SF_RXFILT_HASH_MAX + 1); i += 4) - csr_write_4(sc, i, 0); - SF_CLRBIT(sc, SF_RXFILT, SF_RXFILT_ALLMULTI); - - /* Now program new ones. */ - if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { - SF_SETBIT(sc, SF_RXFILT, SF_RXFILT_ALLMULTI); - } else { - i = 1; - TAILQ_FOREACH_REVERSE(ifma, &ifp->if_multiaddrs, ifmultihead, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - /* - * Program the first 15 multicast groups - * into the perfect filter. For all others, - * use the hash table. - */ - if (i < SF_RXFILT_PERFECT_CNT) { - sf_setperf(sc, i, - LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); - i++; - continue; - } - - sf_sethash(sc, - LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 0); - } - } -} - -/* - * Set media options. - */ -static int -sf_ifmedia_upd(ifp) - struct ifnet *ifp; -{ - struct sf_softc *sc; - struct mii_data *mii; - - sc = ifp->if_softc; - mii = device_get_softc(sc->sf_miibus); - sc->sf_link = 0; - if (mii->mii_instance) { - struct mii_softc *miisc; - LIST_FOREACH(miisc, &mii->mii_phys, mii_list) - mii_phy_reset(miisc); - } - mii_mediachg(mii); - - return(0); -} - -/* - * Report current media status. - */ -static void -sf_ifmedia_sts(ifp, ifmr) - struct ifnet *ifp; - struct ifmediareq *ifmr; -{ - struct sf_softc *sc; - struct mii_data *mii; - - sc = ifp->if_softc; - mii = device_get_softc(sc->sf_miibus); - - mii_pollstat(mii); - ifmr->ifm_active = mii->mii_media_active; - ifmr->ifm_status = mii->mii_media_status; -} - -static int -sf_ioctl(ifp, command, data) - struct ifnet *ifp; - u_long command; - caddr_t data; -{ - struct sf_softc *sc = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *) data; - struct mii_data *mii; - int error = 0; - - SF_LOCK(sc); - - switch(command) { - case SIOCSIFFLAGS: - if (ifp->if_flags & IFF_UP) { - if (ifp->if_flags & IFF_RUNNING && - ifp->if_flags & IFF_PROMISC && - !(sc->sf_if_flags & IFF_PROMISC)) { - SF_SETBIT(sc, SF_RXFILT, SF_RXFILT_PROMISC); - } else if (ifp->if_flags & IFF_RUNNING && - !(ifp->if_flags & IFF_PROMISC) && - sc->sf_if_flags & IFF_PROMISC) { - SF_CLRBIT(sc, SF_RXFILT, SF_RXFILT_PROMISC); - } else if (!(ifp->if_flags & IFF_RUNNING)) - sf_init(sc); - } else { - if (ifp->if_flags & IFF_RUNNING) - sf_stop(sc); - } - sc->sf_if_flags = ifp->if_flags; - error = 0; - break; - case SIOCADDMULTI: - case SIOCDELMULTI: - sf_setmulti(sc); - error = 0; - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: - mii = device_get_softc(sc->sf_miibus); - error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); - break; - case SIOCSIFCAP: - ifp->if_capenable &= ~IFCAP_POLLING; - ifp->if_capenable |= ifr->ifr_reqcap & IFCAP_POLLING; - break; - default: - error = ether_ioctl(ifp, command, data); - break; - } - - SF_UNLOCK(sc); - - return(error); -} - -static void -sf_reset(sc) - struct sf_softc *sc; -{ - register int i; - - csr_write_4(sc, SF_GEN_ETH_CTL, 0); - SF_SETBIT(sc, SF_MACCFG_1, SF_MACCFG1_SOFTRESET); - DELAY(1000); - SF_CLRBIT(sc, SF_MACCFG_1, SF_MACCFG1_SOFTRESET); - - SF_SETBIT(sc, SF_PCI_DEVCFG, SF_PCIDEVCFG_RESET); - - for (i = 0; i < SF_TIMEOUT; i++) { - DELAY(10); - if (!(csr_read_4(sc, SF_PCI_DEVCFG) & SF_PCIDEVCFG_RESET)) - break; - } - - if (i == SF_TIMEOUT) - printf("sf%d: reset never completed!\n", sc->sf_unit); - - /* Wait a little while for the chip to get its brains in order. */ - DELAY(1000); -} - -/* - * Probe for an Adaptec AIC-6915 chip. Check the PCI vendor and device - * IDs against our list and return a device name if we find a match. - * We also check the subsystem ID so that we can identify exactly which - * NIC has been found, if possible. - */ -static int -sf_probe(dev) - device_t dev; -{ - struct sf_type *t; - - t = sf_devs; - - while(t->sf_name != NULL) { - if ((pci_get_vendor(dev) == t->sf_vid) && - (pci_get_device(dev) == t->sf_did)) { - switch((pci_read_config(dev, - SF_PCI_SUBVEN_ID, 4) >> 16) & 0xFFFF) { - case AD_SUBSYSID_62011_REV0: - case AD_SUBSYSID_62011_REV1: - device_set_desc(dev, - "Adaptec ANA-62011 10/100BaseTX"); - return (BUS_PROBE_DEFAULT); - case AD_SUBSYSID_62022: - device_set_desc(dev, - "Adaptec ANA-62022 10/100BaseTX"); - return (BUS_PROBE_DEFAULT); - case AD_SUBSYSID_62044_REV0: - case AD_SUBSYSID_62044_REV1: - device_set_desc(dev, - "Adaptec ANA-62044 10/100BaseTX"); - return (BUS_PROBE_DEFAULT); - case AD_SUBSYSID_62020: - device_set_desc(dev, - "Adaptec ANA-62020 10/100BaseFX"); - return (BUS_PROBE_DEFAULT); - case AD_SUBSYSID_69011: - device_set_desc(dev, - "Adaptec ANA-69011 10/100BaseTX"); - return (BUS_PROBE_DEFAULT); - default: - device_set_desc(dev, t->sf_name); - return (BUS_PROBE_DEFAULT); - break; - } - } - t++; - } - - return(ENXIO); -} - -/* - * Attach the interface. Allocate softc structures, do ifmedia - * setup and ethernet/BPF attach. - */ -static int -sf_attach(dev) - device_t dev; -{ - int i; - struct sf_softc *sc; - struct ifnet *ifp; - int unit, rid, error = 0; - u_char eaddr[6]; - - sc = device_get_softc(dev); - unit = device_get_unit(dev); - - mtx_init(&sc->sf_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, - MTX_DEF | MTX_RECURSE); - /* - * Map control/status registers. - */ - pci_enable_busmaster(dev); - - rid = SF_RID; - sc->sf_res = bus_alloc_resource_any(dev, SF_RES, &rid, RF_ACTIVE); - - if (sc->sf_res == NULL) { - printf ("sf%d: couldn't map ports\n", unit); - error = ENXIO; - goto fail; - } - - sc->sf_btag = rman_get_bustag(sc->sf_res); - sc->sf_bhandle = rman_get_bushandle(sc->sf_res); - - /* Allocate interrupt */ - rid = 0; - sc->sf_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->sf_irq == NULL) { - printf("sf%d: couldn't map interrupt\n", unit); - error = ENXIO; - goto fail; - } - - callout_handle_init(&sc->sf_stat_ch); - /* Reset the adapter. */ - sf_reset(sc); - - /* - * Get station address from the EEPROM. - */ - for (i = 0; i < ETHER_ADDR_LEN; i++) - eaddr[i] = - sf_read_eeprom(sc, SF_EE_NODEADDR + ETHER_ADDR_LEN - i); - - sc->sf_unit = unit; - - /* Allocate the descriptor queues. */ - sc->sf_ldata = contigmalloc(sizeof(struct sf_list_data), M_DEVBUF, - M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); - - if (sc->sf_ldata == NULL) { - printf("sf%d: no memory for list buffers!\n", unit); - error = ENXIO; - goto fail; - } - - bzero(sc->sf_ldata, sizeof(struct sf_list_data)); - - ifp = sc->sf_ifp = if_alloc(IFT_ETHER); - if (ifp == NULL) { - printf("sf%d: can not if_alloc()\n", sc->sf_unit); - error = ENOSPC; - goto fail; - } - - /* Do MII setup. */ - if (mii_phy_probe(dev, &sc->sf_miibus, - sf_ifmedia_upd, sf_ifmedia_sts)) { - printf("sf%d: MII without any phy!\n", sc->sf_unit); - error = ENXIO; - goto fail; - } - - ifp->if_softc = sc; - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - ifp->if_mtu = ETHERMTU; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | - IFF_NEEDSGIANT; - ifp->if_ioctl = sf_ioctl; - ifp->if_start = sf_start; - ifp->if_watchdog = sf_watchdog; - ifp->if_init = sf_init; - ifp->if_baudrate = 10000000; - IFQ_SET_MAXLEN(&ifp->if_snd, SF_TX_DLIST_CNT - 1); - ifp->if_snd.ifq_drv_maxlen = SF_TX_DLIST_CNT - 1; - IFQ_SET_READY(&ifp->if_snd); -#ifdef DEVICE_POLLING - ifp->if_capabilities |= IFCAP_POLLING; -#endif /* DEVICE_POLLING */ - ifp->if_capenable = ifp->if_capabilities; - - /* - * Call MI attach routine. - */ - ether_ifattach(ifp, eaddr); - - /* Hook interrupt last to avoid having to lock softc */ - error = bus_setup_intr(dev, sc->sf_irq, INTR_TYPE_NET, - sf_intr, sc, &sc->sf_intrhand); - - if (error) { - printf("sf%d: couldn't set up irq\n", unit); - ether_ifdetach(ifp); - if_free(ifp); - goto fail; - } - -fail: - if (error) - sf_detach(dev); - - return(error); -} - -/* - * Shutdown hardware and free up resources. This can be called any - * time after the mutex has been initialized. It is called in both - * the error case in attach and the normal detach case so it needs - * to be careful about only freeing resources that have actually been - * allocated. - */ -static int -sf_detach(dev) - device_t dev; -{ - struct sf_softc *sc; - struct ifnet *ifp; - - sc = device_get_softc(dev); - KASSERT(mtx_initialized(&sc->sf_mtx), ("sf mutex not initialized")); - SF_LOCK(sc); - ifp = sc->sf_ifp; - - /* These should only be active if attach succeeded */ - if (device_is_attached(dev)) { - sf_stop(sc); - ether_ifdetach(ifp); - if_free(ifp); - } - if (sc->sf_miibus) - device_delete_child(dev, sc->sf_miibus); - bus_generic_detach(dev); - - if (sc->sf_intrhand) - bus_teardown_intr(dev, sc->sf_irq, sc->sf_intrhand); - if (sc->sf_irq) - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sf_irq); - if (sc->sf_res) - bus_release_resource(dev, SF_RES, SF_RID, sc->sf_res); - - if (sc->sf_ldata) - contigfree(sc->sf_ldata, sizeof(struct sf_list_data), M_DEVBUF); - - SF_UNLOCK(sc); - mtx_destroy(&sc->sf_mtx); - - return(0); -} - -static int -sf_init_rx_ring(sc) - struct sf_softc *sc; -{ - struct sf_list_data *ld; - int i; - - ld = sc->sf_ldata; - - bzero((char *)ld->sf_rx_dlist_big, - sizeof(struct sf_rx_bufdesc_type0) * SF_RX_DLIST_CNT); - bzero((char *)ld->sf_rx_clist, - sizeof(struct sf_rx_cmpdesc_type3) * SF_RX_CLIST_CNT); - - for (i = 0; i < SF_RX_DLIST_CNT; i++) { - if (sf_newbuf(sc, &ld->sf_rx_dlist_big[i], NULL) == ENOBUFS) - return(ENOBUFS); - } - - return(0); -} - -static void -sf_init_tx_ring(sc) - struct sf_softc *sc; -{ - struct sf_list_data *ld; - int i; - - ld = sc->sf_ldata; - - bzero((char *)ld->sf_tx_dlist, - sizeof(struct sf_tx_bufdesc_type0) * SF_TX_DLIST_CNT); - bzero((char *)ld->sf_tx_clist, - sizeof(struct sf_tx_cmpdesc_type0) * SF_TX_CLIST_CNT); - - for (i = 0; i < SF_TX_DLIST_CNT; i++) - ld->sf_tx_dlist[i].sf_id = SF_TX_BUFDESC_ID; - for (i = 0; i < SF_TX_CLIST_CNT; i++) - ld->sf_tx_clist[i].sf_type = SF_TXCMPTYPE_TX; - - ld->sf_tx_dlist[SF_TX_DLIST_CNT - 1].sf_end = 1; - sc->sf_tx_cnt = 0; -} - -static int -sf_newbuf(sc, c, m) - struct sf_softc *sc; - struct sf_rx_bufdesc_type0 *c; - struct mbuf *m; -{ - struct mbuf *m_new = NULL; - - if (m == NULL) { - MGETHDR(m_new, M_DONTWAIT, MT_DATA); - if (m_new == NULL) - return(ENOBUFS); - - MCLGET(m_new, M_DONTWAIT); - if (!(m_new->m_flags & M_EXT)) { - m_freem(m_new); - return(ENOBUFS); - } - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - } else { - m_new = m; - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - m_new->m_data = m_new->m_ext.ext_buf; - } - - m_adj(m_new, sizeof(u_int64_t)); - - c->sf_mbuf = m_new; - c->sf_addrlo = SF_RX_HOSTADDR(vtophys(mtod(m_new, caddr_t))); - c->sf_valid = 1; - - return(0); -} - -/* - * The starfire is programmed to use 'normal' mode for packet reception, - * which means we use the consumer/producer model for both the buffer - * descriptor queue and the completion descriptor queue. The only problem - * with this is that it involves a lot of register accesses: we have to - * read the RX completion consumer and producer indexes and the RX buffer - * producer index, plus the RX completion consumer and RX buffer producer - * indexes have to be updated. It would have been easier if Adaptec had - * put each index in a separate register, especially given that the damn - * NIC has a 512K register space. - * - * In spite of all the lovely features that Adaptec crammed into the 6915, - * it is marred by one truly stupid design flaw, which is that receive - * buffer addresses must be aligned on a longword boundary. This forces - * the packet payload to be unaligned, which is suboptimal on the x86 and - * completely unuseable on the Alpha. Our only recourse is to copy received - * packets into properly aligned buffers before handing them off. - */ - -static void -sf_rxeof(sc) - struct sf_softc *sc; -{ - struct mbuf *m; - struct ifnet *ifp; - struct sf_rx_bufdesc_type0 *desc; - struct sf_rx_cmpdesc_type3 *cur_rx; - u_int32_t rxcons, rxprod; - int cmpprodidx, cmpconsidx, bufprodidx; - - SF_LOCK_ASSERT(sc); - - ifp = sc->sf_ifp; - - rxcons = csr_read_4(sc, SF_CQ_CONSIDX); - rxprod = csr_read_4(sc, SF_RXDQ_PTR_Q1); - cmpprodidx = SF_IDX_LO(csr_read_4(sc, SF_CQ_PRODIDX)); - cmpconsidx = SF_IDX_LO(rxcons); - bufprodidx = SF_IDX_LO(rxprod); - - while (cmpconsidx != cmpprodidx) { - struct mbuf *m0; - -#ifdef DEVICE_POLLING - if (ifp->if_flags & IFF_POLLING) { - if (sc->rxcycles <= 0) - break; - sc->rxcycles--; - } -#endif /* DEVICE_POLLING */ - - cur_rx = &sc->sf_ldata->sf_rx_clist[cmpconsidx]; - desc = &sc->sf_ldata->sf_rx_dlist_big[cur_rx->sf_endidx]; - m = desc->sf_mbuf; - SF_INC(cmpconsidx, SF_RX_CLIST_CNT); - SF_INC(bufprodidx, SF_RX_DLIST_CNT); - - if (!(cur_rx->sf_status1 & SF_RXSTAT1_OK)) { - ifp->if_ierrors++; - sf_newbuf(sc, desc, m); - continue; - } - - m0 = m_devget(mtod(m, char *), cur_rx->sf_len, ETHER_ALIGN, - ifp, NULL); - sf_newbuf(sc, desc, m); - if (m0 == NULL) { - ifp->if_ierrors++; - continue; - } - m = m0; - - ifp->if_ipackets++; - SF_UNLOCK(sc); - (*ifp->if_input)(ifp, m); - SF_LOCK(sc); - } - - csr_write_4(sc, SF_CQ_CONSIDX, - (rxcons & ~SF_CQ_CONSIDX_RXQ1) | cmpconsidx); - csr_write_4(sc, SF_RXDQ_PTR_Q1, - (rxprod & ~SF_RXDQ_PRODIDX) | bufprodidx); -} - -/* - * Read the transmit status from the completion queue and release - * mbufs. Note that the buffer descriptor index in the completion - * descriptor is an offset from the start of the transmit buffer - * descriptor list in bytes. This is important because the manual - * gives the impression that it should match the producer/consumer - * index, which is the offset in 8 byte blocks. - */ -static void -sf_txeof(sc) - struct sf_softc *sc; -{ - int txcons, cmpprodidx, cmpconsidx; - struct sf_tx_cmpdesc_type1 *cur_cmp; - struct sf_tx_bufdesc_type0 *cur_tx; - struct ifnet *ifp; - - ifp = sc->sf_ifp; - - txcons = csr_read_4(sc, SF_CQ_CONSIDX); - cmpprodidx = SF_IDX_HI(csr_read_4(sc, SF_CQ_PRODIDX)); - cmpconsidx = SF_IDX_HI(txcons); - - while (cmpconsidx != cmpprodidx) { - cur_cmp = &sc->sf_ldata->sf_tx_clist[cmpconsidx]; - cur_tx = &sc->sf_ldata->sf_tx_dlist[cur_cmp->sf_index >> 7]; - - if (cur_cmp->sf_txstat & SF_TXSTAT_TX_OK) - ifp->if_opackets++; - else { - if (cur_cmp->sf_txstat & SF_TXSTAT_TX_UNDERRUN) - sf_txthresh_adjust(sc); - ifp->if_oerrors++; - } - - sc->sf_tx_cnt--; - if (cur_tx->sf_mbuf != NULL) { - m_freem(cur_tx->sf_mbuf); - cur_tx->sf_mbuf = NULL; - } else - break; - SF_INC(cmpconsidx, SF_TX_CLIST_CNT); - } - - ifp->if_timer = 0; - ifp->if_flags &= ~IFF_OACTIVE; - - csr_write_4(sc, SF_CQ_CONSIDX, - (txcons & ~SF_CQ_CONSIDX_TXQ) | - ((cmpconsidx << 16) & 0xFFFF0000)); -} - -static void -sf_txthresh_adjust(sc) - struct sf_softc *sc; -{ - u_int32_t txfctl; - u_int8_t txthresh; - - txfctl = csr_read_4(sc, SF_TX_FRAMCTL); - txthresh = txfctl & SF_TXFRMCTL_TXTHRESH; - if (txthresh < 0xFF) { - txthresh++; - txfctl &= ~SF_TXFRMCTL_TXTHRESH; - txfctl |= txthresh; -#ifdef DIAGNOSTIC - printf("sf%d: tx underrun, increasing " - "tx threshold to %d bytes\n", - sc->sf_unit, txthresh * 4); -#endif - csr_write_4(sc, SF_TX_FRAMCTL, txfctl); - } -} - -#ifdef DEVICE_POLLING -static void -sf_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) -{ - struct sf_softc *sc = ifp->if_softc; - - SF_LOCK(sc); - sf_poll_locked(ifp, cmd, count); - SF_UNLOCK(sc); -} - -static void -sf_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count) -{ - struct sf_softc *sc = ifp->if_softc; - - SF_LOCK_ASSERT(sc); - - if (!(ifp->if_capenable & IFCAP_POLLING)) { - ether_poll_deregister(ifp); - cmd = POLL_DEREGISTER; - } - - if (cmd == POLL_DEREGISTER) { - /* Final call, enable interrupts. */ - csr_write_4(sc, SF_IMR, SF_INTRS); - return; - } - - sc->rxcycles = count; - sf_rxeof(sc); - sf_txeof(sc); - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - sf_start(ifp); - - if (cmd == POLL_AND_CHECK_STATUS) { - u_int32_t status; - - status = csr_read_4(sc, SF_ISR); - if (status) - csr_write_4(sc, SF_ISR, status); - - if (status & SF_ISR_TX_LOFIFO) - sf_txthresh_adjust(sc); - - if (status & SF_ISR_ABNORMALINTR) { - if (status & SF_ISR_STATSOFLOW) { - untimeout(sf_stats_update, sc, - sc->sf_stat_ch); - sf_stats_update(sc); - } else - sf_init(sc); - } - } -} -#endif /* DEVICE_POLLING */ - -static void -sf_intr(arg) - void *arg; -{ - struct sf_softc *sc; - struct ifnet *ifp; - u_int32_t status; - - sc = arg; - SF_LOCK(sc); - - ifp = sc->sf_ifp; - -#ifdef DEVICE_POLLING - if (ifp->if_flags & IFF_POLLING) - goto done_locked; - - if ((ifp->if_capenable & IFCAP_POLLING) && - ether_poll_register(sf_poll, ifp)) { - /* OK, disable interrupts. */ - csr_write_4(sc, SF_IMR, 0x00000000); - sf_poll_locked(ifp, 0, 1); - goto done_locked; - } -#endif /* DEVICE_POLLING */ - - if (!(csr_read_4(sc, SF_ISR_SHADOW) & SF_ISR_PCIINT_ASSERTED)) { - SF_UNLOCK(sc); - return; - } - - /* Disable interrupts. */ - csr_write_4(sc, SF_IMR, 0x00000000); - - for (;;) { - status = csr_read_4(sc, SF_ISR); - if (status) - csr_write_4(sc, SF_ISR, status); - - if (!(status & SF_INTRS)) - break; - - if (status & SF_ISR_RXDQ1_DMADONE) - sf_rxeof(sc); - - if (status & SF_ISR_TX_TXDONE || - status & SF_ISR_TX_DMADONE || - status & SF_ISR_TX_QUEUEDONE) - sf_txeof(sc); - - if (status & SF_ISR_TX_LOFIFO) - sf_txthresh_adjust(sc); - - if (status & SF_ISR_ABNORMALINTR) { - if (status & SF_ISR_STATSOFLOW) { - untimeout(sf_stats_update, sc, - sc->sf_stat_ch); - sf_stats_update(sc); - } else - sf_init(sc); - } - } - - /* Re-enable interrupts. */ - csr_write_4(sc, SF_IMR, SF_INTRS); - - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - sf_start(ifp); - -#ifdef DEVICE_POLLING -done_locked: -#endif /* DEVICE_POLLING */ - SF_UNLOCK(sc); -} - -static void -sf_init(xsc) - void *xsc; -{ - struct sf_softc *sc; - struct ifnet *ifp; - struct mii_data *mii; - int i; - - sc = xsc; - SF_LOCK(sc); - ifp = sc->sf_ifp; - mii = device_get_softc(sc->sf_miibus); - - sf_stop(sc); - sf_reset(sc); - - /* Init all the receive filter registers */ - for (i = SF_RXFILT_PERFECT_BASE; - i < (SF_RXFILT_HASH_MAX + 1); i += 4) - csr_write_4(sc, i, 0); - - /* Empty stats counter registers. */ - for (i = 0; i < sizeof(struct sf_stats)/sizeof(u_int32_t); i++) - csr_write_4(sc, SF_STATS_BASE + - (i + sizeof(u_int32_t)), 0); - - /* Init our MAC address */ - csr_write_4(sc, SF_PAR0, *(u_int32_t *)(&IFP2ENADDR(sc->sf_ifp)[0])); - csr_write_4(sc, SF_PAR1, *(u_int32_t *)(&IFP2ENADDR(sc->sf_ifp)[4])); - sf_setperf(sc, 0, (caddr_t)&IFP2ENADDR(sc->sf_ifp)); - - if (sf_init_rx_ring(sc) == ENOBUFS) { - printf("sf%d: initialization failed: no " - "memory for rx buffers\n", sc->sf_unit); - SF_UNLOCK(sc); - return; - } - - sf_init_tx_ring(sc); - - csr_write_4(sc, SF_RXFILT, SF_PERFMODE_NORMAL|SF_HASHMODE_WITHVLAN); - - /* If we want promiscuous mode, set the allframes bit. */ - if (ifp->if_flags & IFF_PROMISC) { - SF_SETBIT(sc, SF_RXFILT, SF_RXFILT_PROMISC); - } else { - SF_CLRBIT(sc, SF_RXFILT, SF_RXFILT_PROMISC); - } - - if (ifp->if_flags & IFF_BROADCAST) { - SF_SETBIT(sc, SF_RXFILT, SF_RXFILT_BROAD); - } else { - SF_CLRBIT(sc, SF_RXFILT, SF_RXFILT_BROAD); - } - - /* - * Load the multicast filter. - */ - sf_setmulti(sc); - - /* Init the completion queue indexes */ - csr_write_4(sc, SF_CQ_CONSIDX, 0); - csr_write_4(sc, SF_CQ_PRODIDX, 0); - - /* Init the RX completion queue */ - csr_write_4(sc, SF_RXCQ_CTL_1, - vtophys(sc->sf_ldata->sf_rx_clist) & SF_RXCQ_ADDR); - SF_SETBIT(sc, SF_RXCQ_CTL_1, SF_RXCQTYPE_3); - - /* Init RX DMA control. */ - SF_SETBIT(sc, SF_RXDMA_CTL, SF_RXDMA_REPORTBADPKTS); - - /* Init the RX buffer descriptor queue. */ - csr_write_4(sc, SF_RXDQ_ADDR_Q1, - vtophys(sc->sf_ldata->sf_rx_dlist_big)); - csr_write_4(sc, SF_RXDQ_CTL_1, (MCLBYTES << 16) | SF_DESCSPACE_16BYTES); - csr_write_4(sc, SF_RXDQ_PTR_Q1, SF_RX_DLIST_CNT - 1); - - /* Init the TX completion queue */ - csr_write_4(sc, SF_TXCQ_CTL, - vtophys(sc->sf_ldata->sf_tx_clist) & SF_RXCQ_ADDR); - - /* Init the TX buffer descriptor queue. */ - csr_write_4(sc, SF_TXDQ_ADDR_HIPRIO, - vtophys(sc->sf_ldata->sf_tx_dlist)); - SF_SETBIT(sc, SF_TX_FRAMCTL, SF_TXFRMCTL_CPLAFTERTX); - csr_write_4(sc, SF_TXDQ_CTL, - SF_TXBUFDESC_TYPE0|SF_TXMINSPACE_128BYTES|SF_TXSKIPLEN_8BYTES); - SF_SETBIT(sc, SF_TXDQ_CTL, SF_TXDQCTL_NODMACMP); - - /* Enable autopadding of short TX frames. */ - SF_SETBIT(sc, SF_MACCFG_1, SF_MACCFG1_AUTOPAD); - -#ifdef DEVICE_POLLING - /* Disable interrupts if we are polling. */ - if (ifp->if_flags & IFF_POLLING) - csr_write_4(sc, SF_IMR, 0x00000000); - else -#endif /* DEVICE_POLLING */ - - /* Enable interrupts. */ - csr_write_4(sc, SF_IMR, SF_INTRS); - SF_SETBIT(sc, SF_PCI_DEVCFG, SF_PCIDEVCFG_INTR_ENB); - - /* Enable the RX and TX engines. */ - SF_SETBIT(sc, SF_GEN_ETH_CTL, SF_ETHCTL_RX_ENB|SF_ETHCTL_RXDMA_ENB); - SF_SETBIT(sc, SF_GEN_ETH_CTL, SF_ETHCTL_TX_ENB|SF_ETHCTL_TXDMA_ENB); - - /*mii_mediachg(mii);*/ - sf_ifmedia_upd(ifp); - - ifp->if_flags |= IFF_RUNNING; - ifp->if_flags &= ~IFF_OACTIVE; - - sc->sf_stat_ch = timeout(sf_stats_update, sc, hz); - - SF_UNLOCK(sc); -} - -static int -sf_encap(sc, c, m_head) - struct sf_softc *sc; - struct sf_tx_bufdesc_type0 *c; - struct mbuf *m_head; -{ - int frag = 0; - struct sf_frag *f = NULL; - struct mbuf *m; - - m = m_head; - - for (m = m_head, frag = 0; m != NULL; m = m->m_next) { - if (m->m_len != 0) { - if (frag == SF_MAXFRAGS) - break; - f = &c->sf_frags[frag]; - if (frag == 0) - f->sf_pktlen = m_head->m_pkthdr.len; - f->sf_fraglen = m->m_len; - f->sf_addr = vtophys(mtod(m, vm_offset_t)); - frag++; - } - } - - if (m != NULL) { - struct mbuf *m_new = NULL; - - MGETHDR(m_new, M_DONTWAIT, MT_DATA); - if (m_new == NULL) { - printf("sf%d: no memory for tx list\n", sc->sf_unit); - return(1); - } - - if (m_head->m_pkthdr.len > MHLEN) { - MCLGET(m_new, M_DONTWAIT); - if (!(m_new->m_flags & M_EXT)) { - m_freem(m_new); - printf("sf%d: no memory for tx list\n", - sc->sf_unit); - return(1); - } - } - m_copydata(m_head, 0, m_head->m_pkthdr.len, - mtod(m_new, caddr_t)); - m_new->m_pkthdr.len = m_new->m_len = m_head->m_pkthdr.len; - m_freem(m_head); - m_head = m_new; - f = &c->sf_frags[0]; - f->sf_fraglen = f->sf_pktlen = m_head->m_pkthdr.len; - f->sf_addr = vtophys(mtod(m_head, caddr_t)); - frag = 1; - } - - c->sf_mbuf = m_head; - c->sf_id = SF_TX_BUFDESC_ID; - c->sf_fragcnt = frag; - c->sf_intr = 1; - c->sf_caltcp = 0; - c->sf_crcen = 1; - - return(0); -} - -static void -sf_start(ifp) - struct ifnet *ifp; -{ - struct sf_softc *sc; - struct sf_tx_bufdesc_type0 *cur_tx = NULL; - struct mbuf *m_head = NULL; - int i, txprod; - - sc = ifp->if_softc; - SF_LOCK(sc); - - if (!sc->sf_link && ifp->if_snd.ifq_len < 10) { - SF_UNLOCK(sc); - return; - } - - if (ifp->if_flags & IFF_OACTIVE) { - SF_UNLOCK(sc); - return; - } - - txprod = csr_read_4(sc, SF_TXDQ_PRODIDX); - i = SF_IDX_HI(txprod) >> 4; - - if (sc->sf_ldata->sf_tx_dlist[i].sf_mbuf != NULL) { - printf("sf%d: TX ring full, resetting\n", sc->sf_unit); - sf_init(sc); - txprod = csr_read_4(sc, SF_TXDQ_PRODIDX); - i = SF_IDX_HI(txprod) >> 4; - } - - while(sc->sf_ldata->sf_tx_dlist[i].sf_mbuf == NULL) { - if (sc->sf_tx_cnt >= (SF_TX_DLIST_CNT - 5)) { - ifp->if_flags |= IFF_OACTIVE; - cur_tx = NULL; - break; - } - IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); - if (m_head == NULL) - break; - - cur_tx = &sc->sf_ldata->sf_tx_dlist[i]; - if (sf_encap(sc, cur_tx, m_head)) { - IFQ_DRV_PREPEND(&ifp->if_snd, m_head); - ifp->if_flags |= IFF_OACTIVE; - cur_tx = NULL; - break; - } - - /* - * If there's a BPF listener, bounce a copy of this frame - * to him. - */ - BPF_MTAP(ifp, m_head); - - SF_INC(i, SF_TX_DLIST_CNT); - sc->sf_tx_cnt++; - /* - * Don't get the TX DMA queue get too full. - */ - if (sc->sf_tx_cnt > 64) - break; - } - - if (cur_tx == NULL) { - SF_UNLOCK(sc); - return; - } - - /* Transmit */ - csr_write_4(sc, SF_TXDQ_PRODIDX, - (txprod & ~SF_TXDQ_PRODIDX_HIPRIO) | - ((i << 20) & 0xFFFF0000)); - - ifp->if_timer = 5; - - SF_UNLOCK(sc); -} - -static void -sf_stop(sc) - struct sf_softc *sc; -{ - int i; - struct ifnet *ifp; - - SF_LOCK(sc); - - ifp = sc->sf_ifp; - - untimeout(sf_stats_update, sc, sc->sf_stat_ch); - -#ifdef DEVICE_POLLING - ether_poll_deregister(ifp); -#endif /* DEVICE_POLLING */ - - csr_write_4(sc, SF_GEN_ETH_CTL, 0); - csr_write_4(sc, SF_CQ_CONSIDX, 0); - csr_write_4(sc, SF_CQ_PRODIDX, 0); - csr_write_4(sc, SF_RXDQ_ADDR_Q1, 0); - csr_write_4(sc, SF_RXDQ_CTL_1, 0); - csr_write_4(sc, SF_RXDQ_PTR_Q1, 0); - csr_write_4(sc, SF_TXCQ_CTL, 0); - csr_write_4(sc, SF_TXDQ_ADDR_HIPRIO, 0); - csr_write_4(sc, SF_TXDQ_CTL, 0); - sf_reset(sc); - - sc->sf_link = 0; - - for (i = 0; i < SF_RX_DLIST_CNT; i++) { - if (sc->sf_ldata->sf_rx_dlist_big[i].sf_mbuf != NULL) { - m_freem(sc->sf_ldata->sf_rx_dlist_big[i].sf_mbuf); - sc->sf_ldata->sf_rx_dlist_big[i].sf_mbuf = NULL; - } - } - - for (i = 0; i < SF_TX_DLIST_CNT; i++) { - if (sc->sf_ldata->sf_tx_dlist[i].sf_mbuf != NULL) { - m_freem(sc->sf_ldata->sf_tx_dlist[i].sf_mbuf); - sc->sf_ldata->sf_tx_dlist[i].sf_mbuf = NULL; - } - } - - ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); - SF_UNLOCK(sc); -} - -/* - * Note: it is important that this function not be interrupted. We - * use a two-stage register access scheme: if we are interrupted in - * between setting the indirect address register and reading from the - * indirect data register, the contents of the address register could - * be changed out from under us. - */ -static void -sf_stats_update(xsc) - void *xsc; -{ - struct sf_softc *sc; - struct ifnet *ifp; - struct mii_data *mii; - struct sf_stats stats; - u_int32_t *ptr; - int i; - - sc = xsc; - SF_LOCK(sc); - ifp = sc->sf_ifp; - mii = device_get_softc(sc->sf_miibus); - - ptr = (u_int32_t *)&stats; - for (i = 0; i < sizeof(stats)/sizeof(u_int32_t); i++) - ptr[i] = csr_read_4(sc, SF_STATS_BASE + - (i + sizeof(u_int32_t))); - - for (i = 0; i < sizeof(stats)/sizeof(u_int32_t); i++) - csr_write_4(sc, SF_STATS_BASE + - (i + sizeof(u_int32_t)), 0); - - ifp->if_collisions += stats.sf_tx_single_colls + - stats.sf_tx_multi_colls + stats.sf_tx_excess_colls; - - mii_tick(mii); - - if (!sc->sf_link && mii->mii_media_status & IFM_ACTIVE && - IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { - sc->sf_link++; - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - sf_start(ifp); - } - - sc->sf_stat_ch = timeout(sf_stats_update, sc, hz); - - SF_UNLOCK(sc); -} - -static void -sf_watchdog(ifp) - struct ifnet *ifp; -{ - struct sf_softc *sc; - - sc = ifp->if_softc; - - SF_LOCK(sc); - - ifp->if_oerrors++; - printf("sf%d: watchdog timeout\n", sc->sf_unit); - - sf_stop(sc); - sf_reset(sc); - sf_init(sc); - - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - sf_start(ifp); - - SF_UNLOCK(sc); -} - -static void -sf_shutdown(dev) - device_t dev; -{ - struct sf_softc *sc; - - sc = device_get_softc(dev); - - sf_stop(sc); -} diff --git a/sys/dev/sf/if_sfreg.h b/sys/dev/sf/if_sfreg.h deleted file mode 100644 index bbd704c..0000000 --- a/sys/dev/sf/if_sfreg.h +++ /dev/null @@ -1,1064 +0,0 @@ -/*- - * Copyright (c) 1997, 1998, 1999 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Registers for the Adaptec AIC-6915 Starfire. The Starfire has a 512K - * register space. These registers can be accessed in the following way: - * - PCI config registers are always accessible through PCI config space - * - Full 512K space mapped into memory using PCI memory mapped access - * - 256-byte I/O space mapped through PCI I/O access - * - Full 512K space mapped through indirect I/O using PCI I/O access - * It's possible to use either memory mapped mode or I/O mode to access - * the registers, but memory mapped is usually the easiest. All registers - * are 32 bits wide and must be accessed using 32-bit operations. - */ - -/* - * Adaptec PCI vendor ID. - */ -#define AD_VENDORID 0x9004 - -/* - * AIC-6915 PCI device ID. - */ -#define AD_DEVICEID_STARFIRE 0x6915 - -/* - * AIC-6915 subsystem IDs. Adaptec uses the subsystem ID to identify - * the exact kind of NIC on which the ASIC is mounted. Currently there - * are six different variations. Note: the Adaptec manual lists code 0x28 - * for two different NICs: the 62044 and the 69011/TX. This is a typo: - * the code for the 62044 is really 0x18. - * - * Note that there also appears to be an 0x19 code for a newer rev - * 62044 card. - */ -#define AD_SUBSYSID_62011_REV0 0x0008 /* single port 10/100baseTX 64-bit */ -#define AD_SUBSYSID_62011_REV1 0x0009 /* single port 10/100baseTX 64-bit */ -#define AD_SUBSYSID_62022 0x0010 /* dual port 10/100baseTX 64-bit */ -#define AD_SUBSYSID_62044_REV0 0x0018 /* quad port 10/100baseTX 64-bit */ -#define AD_SUBSYSID_62044_REV1 0x0019 /* quad port 10/100baseTX 64-bit */ -#define AD_SUBSYSID_62020 0x0020 /* single port 10/100baseFX 64-bit */ -#define AD_SUBSYSID_69011 0x0028 /* single port 10/100baseTX 32-bit */ - -/* - * Starfire internal register space map. The entire register space - * is available using PCI memory mapped mode. The SF_RMAP_INTREG - * space is available using PCI I/O mode. The entire space can be - * accessed using indirect I/O using the indirect I/O addr and - * indirect I/O data registers located within the SF_RMAP_INTREG space. - */ -#define SF_RMAP_ROMADDR_BASE 0x00000 /* Expansion ROM space */ -#define SF_RMAP_ROMADDR_MAX 0x3FFFF - -#define SF_RMAP_EXGPIO_BASE 0x40000 /* External general purpose regs */ -#define SF_RMAP_EXGPIO_MAX 0x3FFFF - -#define SF_RMAP_INTREG_BASE 0x50000 /* Internal functional registers */ -#define SF_RMAP_INTREG_MAX 0x500FF -#define SF_RMAP_GENREG_BASE 0x50100 /* General purpose registers */ -#define SF_RMAP_GENREG_MAX 0x5FFFF - -#define SF_RMAP_FIFO_BASE 0x60000 -#define SF_RMAP_FIFO_MAX 0x6FFFF - -#define SF_RMAP_STS_BASE 0x70000 -#define SF_RMAP_STS_MAX 0x70083 - -#define SF_RMAP_RSVD_BASE 0x70084 -#define SF_RMAP_RSVD_MAX 0x7FFFF - -/* - * PCI config header registers, 0x0000 to 0x003F - */ -#define SF_PCI_VENDOR_ID 0x0000 -#define SF_PCI_DEVICE_ID 0x0002 -#define SF_PCI_COMMAND 0x0004 -#define SF_PCI_STATUS 0x0006 -#define SF_PCI_REVID 0x0008 -#define SF_PCI_CLASSCODE 0x0009 -#define SF_PCI_CACHELEN 0x000C -#define SF_PCI_LATENCY_TIMER 0x000D -#define SF_PCI_HEADER_TYPE 0x000E -#define SF_PCI_LOMEM 0x0010 -#define SF_PCI_LOIO 0x0014 -#define SF_PCI_SUBVEN_ID 0x002C -#define SF_PCI_SYBSYS_ID 0x002E -#define SF_PCI_BIOSROM 0x0030 -#define SF_PCI_INTLINE 0x003C -#define SF_PCI_INTPIN 0x003D -#define SF_PCI_MINGNT 0x003E -#define SF_PCI_MINLAT 0x003F - -/* - * PCI registers, 0x0040 to 0x006F - */ -#define SF_PCI_DEVCFG 0x0040 -#define SF_BACCTL 0x0044 -#define SF_PCI_MON1 0x0048 -#define SF_PCI_MON2 0x004C -#define SF_PCI_CAPID 0x0050 /* 8 bits */ -#define SF_PCI_NEXTPTR 0x0051 /* 8 bits */ -#define SF_PCI_PWRMGMTCAP 0x0052 /* 16 bits */ -#define SF_PCI_PWRMGMTCTRL 0x0054 /* 16 bits */ -#define SF_PCI_PME_EVENT 0x0058 -#define SF_PCI_EECTL 0x0060 -#define SF_PCI_COMPLIANCE 0x0064 -#define SF_INDIRECTIO_ADDR 0x0068 -#define SF_INDIRECTIO_DATA 0x006C - -#define SF_PCIDEVCFG_RESET 0x00000001 -#define SF_PCIDEVCFG_FORCE64 0x00000002 -#define SF_PCIDEVCFG_SYSTEM64 0x00000004 -#define SF_PCIDEVCFG_RSVD0 0x00000008 -#define SF_PCIDEVCFG_INCR_INB 0x00000010 -#define SF_PCIDEVCFG_ABTONPERR 0x00000020 -#define SF_PCIDEVCFG_STPONPERR 0x00000040 -#define SF_PCIDEVCFG_MR_ENB 0x00000080 -#define SF_PCIDEVCFG_FIFOTHR 0x00000F00 -#define SF_PCIDEVCFG_STPONCA 0x00001000 -#define SF_PCIDEVCFG_PCIMEN 0x00002000 /* enable PCI bus master */ -#define SF_PCIDEVCFG_LATSTP 0x00004000 -#define SF_PCIDEVCFG_BYTE_ENB 0x00008000 -#define SF_PCIDEVCFG_EECSWIDTH 0x00070000 -#define SF_PCIDEVCFG_STPMWCA 0x00080000 -#define SF_PCIDEVCFG_REGCSWIDTH 0x00700000 -#define SF_PCIDEVCFG_INTR_ENB 0x00800000 -#define SF_PCIDEVCFG_DPR_ENB 0x01000000 -#define SF_PCIDEVCFG_RSVD1 0x02000000 -#define SF_PCIDEVCFG_RSVD2 0x04000000 -#define SF_PCIDEVCFG_STA_ENB 0x08000000 -#define SF_PCIDEVCFG_RTA_ENB 0x10000000 -#define SF_PCIDEVCFG_RMA_ENB 0x20000000 -#define SF_PCIDEVCFG_SSE_ENB 0x40000000 -#define SF_PCIDEVCFG_DPE_ENB 0x80000000 - -#define SF_BACCTL_BACDMA_ENB 0x00000001 -#define SF_BACCTL_PREFER_RXDMA 0x00000002 -#define SF_BACCTL_PREFER_TXDMA 0x00000004 -#define SF_BACCTL_SINGLE_DMA 0x00000008 -#define SF_BACCTL_SWAPMODE_DATA 0x00000030 -#define SF_BACCTL_SWAPMODE_DESC 0x000000C0 - -#define SF_SWAPMODE_LE 0x00000000 -#define SF_SWAPMODE_BE 0x00000010 - -#define SF_PSTATE_MASK 0x0003 -#define SF_PSTATE_D0 0x0000 -#define SF_PSTATE_D1 0x0001 -#define SF_PSTATE_D2 0x0002 -#define SF_PSTATE_D3 0x0003 -#define SF_PME_EN 0x0010 -#define SF_PME_STATUS 0x8000 - - -/* - * Ethernet registers 0x0070 to 0x00FF - */ -#define SF_GEN_ETH_CTL 0x0070 -#define SF_TIMER_CTL 0x0074 -#define SF_CURTIME 0x0078 -#define SF_ISR 0x0080 -#define SF_ISR_SHADOW 0x0084 -#define SF_IMR 0x0088 -#define SF_GPIO 0x008C -#define SF_TXDQ_CTL 0x0090 -#define SF_TXDQ_ADDR_HIPRIO 0x0094 -#define SF_TXDQ_ADDR_LOPRIO 0x0098 -#define SF_TXDQ_ADDR_HIADDR 0x009C -#define SF_TXDQ_PRODIDX 0x00A0 -#define SF_TXDQ_CONSIDX 0x00A4 -#define SF_TXDMA_STS1 0x00A8 -#define SF_TXDMA_STS2 0x00AC -#define SF_TX_FRAMCTL 0x00B0 -#define SF_TXCQ_ADDR_HI 0x00B4 -#define SF_TXCQ_CTL 0x00B8 -#define SF_RXCQ_CTL_1 0x00BC -#define SF_RXCQ_CTL_2 0x00C0 -#define SF_CQ_CONSIDX 0x00C4 -#define SF_CQ_PRODIDX 0x00C8 -#define SF_CQ_RXQ2 0x00CC -#define SF_RXDMA_CTL 0x00D0 -#define SF_RXDQ_CTL_1 0x00D4 -#define SF_RXDQ_CTL_2 0x00D8 -#define SF_RXDQ_ADDR_HIADDR 0x00DC -#define SF_RXDQ_ADDR_Q1 0x00E0 -#define SF_RXDQ_ADDR_Q2 0x00E4 -#define SF_RXDQ_PTR_Q1 0x00E8 -#define SF_RXDQ_PTR_Q2 0x00EC -#define SF_RXDMA_STS 0x00F0 -#define SF_RXFILT 0x00F4 -#define SF_RX_FRAMETEST_OUT 0x00F8 - -/* Ethernet control register */ -#define SF_ETHCTL_RX_ENB 0x00000001 -#define SF_ETHCTL_TX_ENB 0x00000002 -#define SF_ETHCTL_RXDMA_ENB 0x00000004 -#define SF_ETHCTL_TXDMA_ENB 0x00000008 -#define SF_ETHCTL_RXGFP_ENB 0x00000010 -#define SF_ETHCTL_TXGFP_ENB 0x00000020 -#define SF_ETHCTL_SOFTINTR 0x00000800 - -/* Timer control register */ -#define SF_TIMER_IMASK_INTERVAL 0x0000001F -#define SF_TIMER_IMASK_MODE 0x00000060 -#define SF_TIMER_SMALLFRAME_BYP 0x00000100 -#define SF_TIMER_SMALLRX_FRAME 0x00000600 -#define SF_TIMER_TIMES_TEN 0x00000800 -#define SF_TIMER_RXHIPRIO_BYP 0x00001000 -#define SF_TIMER_TX_DMADONE_DLY 0x00002000 -#define SF_TIMER_TX_QDONE_DLY 0x00004000 -#define SF_TIMER_TX_FRDONE_DLY 0x00008000 -#define SF_TIMER_GENTIMER 0x00FF0000 -#define SF_TIMER_ONESHOT 0x01000000 -#define SF_TIMER_GENTIMER_RES 0x02000000 -#define SF_TIMER_TIMEST_RES 0x04000000 -#define SF_TIMER_RXQ2DONE_DLY 0x10000000 -#define SF_TIMER_EARLYRX2_DLY 0x20000000 -#define SF_TIMER_RXQ1DONE_DLY 0x40000000 -#define SF_TIMER_EARLYRX1_DLY 0x80000000 - -/* Interrupt status register */ -#define SF_ISR_PCIINT_ASSERTED 0x00000001 -#define SF_ISR_GFP_TX 0x00000002 -#define SF_ISR_GFP_RX 0x00000004 -#define SF_ISR_TX_BADID_HIPRIO 0x00000008 -#define SF_ISR_TX_BADID_LOPRIO 0x00000010 -#define SF_ISR_NO_TX_CSUM 0x00000020 -#define SF_ISR_RXDQ2_NOBUFS 0x00000040 -#define SF_ISR_RXGFP_NORESP 0x00000080 -#define SF_ISR_RXDQ1_DMADONE 0x00000100 -#define SF_ISR_RXDQ2_DMADONE 0x00000200 -#define SF_ISR_RXDQ1_EARLY 0x00000400 -#define SF_ISR_RXDQ2_EARLY 0x00000800 -#define SF_ISR_TX_QUEUEDONE 0x00001000 -#define SF_ISR_TX_DMADONE 0x00002000 -#define SF_ISR_TX_TXDONE 0x00004000 -#define SF_ISR_NORMALINTR 0x00008000 -#define SF_ISR_RXDQ1_NOBUFS 0x00010000 -#define SF_ISR_RXCQ2_NOBUFS 0x00020000 -#define SF_ISR_TX_LOFIFO 0x00040000 -#define SF_ISR_DMAERR 0x00080000 -#define SF_ISR_PCIINT 0x00100000 -#define SF_ISR_TXCQ_NOBUFS 0x00200000 -#define SF_ISR_RXCQ1_NOBUFS 0x00400000 -#define SF_ISR_SOFTINTR 0x00800000 -#define SF_ISR_GENTIMER 0x01000000 -#define SF_ISR_ABNORMALINTR 0x02000000 -#define SF_ISR_RSVD0 0x04000000 -#define SF_ISR_STATSOFLOW 0x08000000 -#define SF_ISR_GPIO 0xF0000000 - -/* - * Shadow interrupt status register. Unlike the normal IRQ register, - * reading bits here does not automatically cause them to reset. - */ -#define SF_SISR_PCIINT_ASSERTED 0x00000001 -#define SF_SISR_GFP_TX 0x00000002 -#define SF_SISR_GFP_RX 0x00000004 -#define SF_SISR_TX_BADID_HIPRIO 0x00000008 -#define SF_SISR_TX_BADID_LOPRIO 0x00000010 -#define SF_SISR_NO_TX_CSUM 0x00000020 -#define SF_SISR_RXDQ2_NOBUFS 0x00000040 -#define SF_SISR_RXGFP_NORESP 0x00000080 -#define SF_SISR_RXDQ1_DMADONE 0x00000100 -#define SF_SISR_RXDQ2_DMADONE 0x00000200 -#define SF_SISR_RXDQ1_EARLY 0x00000400 -#define SF_SISR_RXDQ2_EARLY 0x00000800 -#define SF_SISR_TX_QUEUEDONE 0x00001000 -#define SF_SISR_TX_DMADONE 0x00002000 -#define SF_SISR_TX_TXDONE 0x00004000 -#define SF_SISR_NORMALINTR 0x00008000 -#define SF_SISR_RXDQ1_NOBUFS 0x00010000 -#define SF_SISR_RXCQ2_NOBUFS 0x00020000 -#define SF_SISR_TX_LOFIFO 0x00040000 -#define SF_SISR_DMAERR 0x00080000 -#define SF_SISR_PCIINT 0x00100000 -#define SF_SISR_TXCQ_NOBUFS 0x00200000 -#define SF_SISR_RXCQ1_NOBUFS 0x00400000 -#define SF_SISR_SOFTINTR 0x00800000 -#define SF_SISR_GENTIMER 0x01000000 -#define SF_SISR_ABNORMALINTR 0x02000000 -#define SF_SISR_RSVD0 0x04000000 -#define SF_SISR_STATSOFLOW 0x08000000 -#define SF_SISR_GPIO 0xF0000000 - -/* Interrupt mask register */ -#define SF_IMR_PCIINT_ASSERTED 0x00000001 -#define SF_IMR_GFP_TX 0x00000002 -#define SF_IMR_GFP_RX 0x00000004 -#define SF_IMR_TX_BADID_HIPRIO 0x00000008 -#define SF_IMR_TX_BADID_LOPRIO 0x00000010 -#define SF_IMR_NO_TX_CSUM 0x00000020 -#define SF_IMR_RXDQ2_NOBUFS 0x00000040 -#define SF_IMR_RXGFP_NORESP 0x00000080 -#define SF_IMR_RXDQ1_DMADONE 0x00000100 -#define SF_IMR_RXDQ2_DMADONE 0x00000200 -#define SF_IMR_RXDQ1_EARLY 0x00000400 -#define SF_IMR_RXDQ2_EARLY 0x00000800 -#define SF_IMR_TX_QUEUEDONE 0x00001000 -#define SF_IMR_TX_DMADONE 0x00002000 -#define SF_IMR_TX_TXDONE 0x00004000 -#define SF_IMR_NORMALINTR 0x00008000 -#define SF_IMR_RXDQ1_NOBUFS 0x00010000 -#define SF_IMR_RXCQ2_NOBUFS 0x00020000 -#define SF_IMR_TX_LOFIFO 0x00040000 -#define SF_IMR_DMAERR 0x00080000 -#define SF_IMR_PCIINT 0x00100000 -#define SF_IMR_TXCQ_NOBUFS 0x00200000 -#define SF_IMR_RXCQ1_NOBUFS 0x00400000 -#define SF_IMR_SOFTINTR 0x00800000 -#define SF_IMR_GENTIMER 0x01000000 -#define SF_IMR_ABNORMALINTR 0x02000000 -#define SF_IMR_RSVD0 0x04000000 -#define SF_IMR_STATSOFLOW 0x08000000 -#define SF_IMR_GPIO 0xF0000000 - -#define SF_INTRS \ - (SF_IMR_RXDQ2_NOBUFS|SF_IMR_RXDQ1_DMADONE|SF_IMR_RXDQ2_DMADONE| \ - SF_IMR_TX_TXDONE|SF_IMR_RXDQ1_NOBUFS|SF_IMR_RXDQ2_DMADONE| \ - SF_IMR_NORMALINTR|SF_IMR_ABNORMALINTR|SF_IMR_TXCQ_NOBUFS| \ - SF_IMR_RXCQ1_NOBUFS|SF_IMR_RXCQ2_NOBUFS|SF_IMR_STATSOFLOW| \ - SF_IMR_TX_LOFIFO) - -/* TX descriptor queue control registers */ -#define SF_TXDQCTL_DESCTYPE 0x00000007 -#define SF_TXDQCTL_NODMACMP 0x00000008 -#define SF_TXDQCTL_MINSPACE 0x00000070 -#define SF_TXDQCTL_64BITADDR 0x00000080 -#define SF_TXDQCTL_BURSTLEN 0x00003F00 -#define SF_TXDQCTL_SKIPLEN 0x001F0000 -#define SF_TXDQCTL_HIPRIOTHRESH 0xFF000000 - -#define SF_TXBUFDESC_TYPE0 0x00000000 -#define SF_TXBUFDESC_TYPE1 0x00000001 -#define SF_TXBUFDESC_TYPE2 0x00000002 -#define SF_TXBUFDESC_TYPE3 0x00000003 -#define SF_TXBUFDESC_TYPE4 0x00000004 - -#define SF_TXMINSPACE_UNLIMIT 0x00000000 -#define SF_TXMINSPACE_32BYTES 0x00000010 -#define SF_TXMINSPACE_64BYTES 0x00000020 -#define SF_TXMINSPACE_128BYTES 0x00000030 -#define SF_TXMINSPACE_256BYTES 0x00000040 - -#define SF_TXSKIPLEN_0BYTES 0x00000000 -#define SF_TXSKIPLEN_8BYTES 0x00010000 -#define SF_TXSKIPLEN_16BYTES 0x00020000 -#define SF_TXSKIPLEN_24BYTES 0x00030000 -#define SF_TXSKIPLEN_32BYTES 0x00040000 - -/* TX frame control register */ -#define SF_TXFRMCTL_TXTHRESH 0x000000FF -#define SF_TXFRMCTL_CPLAFTERTX 0x00000100 -#define SF_TXFRMCRL_DEBUG 0x0000FE00 -#define SF_TXFRMCTL_STATUS 0x01FF0000 -#define SF_TXFRMCTL_MAC_TXIF 0xFE000000 - -/* TX completion queue control register */ -#define SF_TXCQ_THRESH 0x0000000F -#define SF_TXCQ_COMMON 0x00000010 -#define SF_TXCQ_SIZE 0x00000020 -#define SF_TXCQ_WRITEENB 0x00000040 -#define SF_TXCQ_USE_64BIT 0x00000080 -#define SF_TXCQ_ADDR 0xFFFFFF00 - -/* RX completion queue control register */ -#define SF_RXCQ_THRESH 0x0000000F -#define SF_RXCQ_TYPE 0x00000030 -#define SF_RXCQ_WRITEENB 0x00000040 -#define SF_RXCQ_USE_64BIT 0x00000080 -#define SF_RXCQ_ADDR 0xFFFFFF00 - -#define SF_RXCQTYPE_0 0x00000000 -#define SF_RXCQTYPE_1 0x00000010 -#define SF_RXCQTYPE_2 0x00000020 -#define SF_RXCQTYPE_3 0x00000030 - -/* TX descriptor queue producer index register */ -#define SF_TXDQ_PRODIDX_LOPRIO 0x000007FF -#define SF_TXDQ_PRODIDX_HIPRIO 0x07FF0000 - -/* TX descriptor queue consumer index register */ -#define SF_TXDQ_CONSIDX_LOPRIO 0x000007FF -#define SF_TXDQ_CONSIDX_HIPRIO 0x07FF0000 - -/* Completion queue consumer index register */ -#define SF_CQ_CONSIDX_RXQ1 0x000003FF -#define SF_CQ_CONSIDX_RXTHRMODE 0x00008000 -#define SF_CQ_CONSIDX_TXQ 0x03FF0000 -#define SF_CQ_CONSIDX_TXTHRMODE 0x80000000 - -/* Completion queue producer index register */ -#define SF_CQ_PRODIDX_RXQ1 0x000003FF -#define SF_CQ_PRODIDX_TXQ 0x03FF0000 - -/* RX completion queue 2 consumer/producer index register */ -#define SF_CQ_RXQ2_CONSIDX 0x000003FF -#define SF_CQ_RXQ2_RXTHRMODE 0x00008000 -#define SF_CQ_RXQ2_PRODIDX 0x03FF0000 - -#define SF_CQ_RXTHRMODE_INT_ON 0x00008000 -#define SF_CQ_RXTHRMODE_INT_OFF 0x00000000 -#define SF_CQ_TXTHRMODE_INT_ON 0x80000000 -#define SF_CQ_TXTHRMODE_INT_OFF 0x00000000 - -#define SF_IDX_LO(x) ((x) & 0x000007FF) -#define SF_IDX_HI(x) (((x) >> 16) & 0x000007FF) - -/* RX DMA control register */ -#define SF_RXDMA_BURSTSIZE 0x0000007F -#define SF_RXDMA_FPTESTMODE 0x00000080 -#define SF_RXDMA_HIPRIOTHRESH 0x00000F00 -#define SF_RXDMA_RXEARLYTHRESH 0x0001F000 -#define SF_RXDMA_DMACRC 0x00040000 -#define SF_RXDMA_USEBKUPQUEUE 0x00080000 -#define SF_RXDMA_QUEUEMODE 0x00700000 -#define SF_RXDMA_RXCQ2_ON 0x00800000 -#define SF_RXDMA_CSUMMODE 0x03000000 -#define SF_RXDMA_DMAPAUSEPKTS 0x04000000 -#define SF_RXDMA_DMACTLPKTS 0x08000000 -#define SF_RXDMA_DMACRXERRPKTS 0x10000000 -#define SF_RXDMA_DMABADPKTS 0x20000000 -#define SF_RXDMA_DMARUNTS 0x40000000 -#define SF_RXDMA_REPORTBADPKTS 0x80000000 - -#define SF_RXDQMODE_Q1ONLY 0x00100000 -#define SF_RXDQMODE_Q2_ON_FP 0x00200000 -#define SF_RXDQMODE_Q2_ON_SHORT 0x00300000 -#define SF_RXDQMODE_Q2_ON_PRIO 0x00400000 -#define SF_RXDQMODE_SPLITHDR 0x00500000 - -#define SF_RXCSUMMODE_IGNORE 0x00000000 -#define SF_RXCSUMMODE_REJECT_BAD_TCP 0x01000000 -#define SF_RXCSUMMODE_REJECT_BAD_TCPUDP 0x02000000 -#define SF_RXCSUMMODE_RSVD 0x03000000 - -/* RX descriptor queue control registers */ -#define SF_RXDQCTL_MINDESCTHR 0x0000007F -#define SF_RXDQCTL_Q1_WE 0x00000080 -#define SF_RXDQCTL_DESCSPACE 0x00000700 -#define SF_RXDQCTL_64BITDADDR 0x00000800 -#define SF_RXDQCTL_64BITBADDR 0x00001000 -#define SF_RXDQCTL_VARIABLE 0x00002000 -#define SF_RXDQCTL_ENTRIES 0x00004000 -#define SF_RXDQCTL_PREFETCH 0x00008000 -#define SF_RXDQCTL_BUFLEN 0xFFFF0000 - -#define SF_DESCSPACE_4BYTES 0x00000000 -#define SF_DESCSPACE_8BYTES 0x00000100 -#define SF_DESCSPACE_16BYTES 0x00000200 -#define SF_DESCSPACE_32BYTES 0x00000300 -#define SF_DESCSPACE_64BYTES 0x00000400 -#define SF_DESCSPACE_128_BYTES 0x00000500 - -/* RX buffer consumer/producer index registers */ -#define SF_RXDQ_PRODIDX 0x000007FF -#define SF_RXDQ_CONSIDX 0x07FF0000 - -/* RX filter control register */ -#define SF_RXFILT_PROMISC 0x00000001 -#define SF_RXFILT_ALLMULTI 0x00000002 -#define SF_RXFILT_BROAD 0x00000004 -#define SF_RXFILT_HASHPRIO 0x00000008 -#define SF_RXFILT_HASHMODE 0x00000030 -#define SF_RXFILT_PERFMODE 0x000000C0 -#define SF_RXFILT_VLANMODE 0x00000300 -#define SF_RXFILT_WAKEMODE 0x00000C00 -#define SF_RXFILT_MULTI_NOBROAD 0x00001000 -#define SF_RXFILT_MIN_VLANPRIO 0x0000E000 -#define SF_RXFILT_PEFECTPRIO 0xFFFF0000 - -/* Hash filtering mode */ -#define SF_HASHMODE_OFF 0x00000000 -#define SF_HASHMODE_WITHVLAN 0x00000010 -#define SF_HASHMODE_ANYVLAN 0x00000020 -#define SF_HASHMODE_ANY 0x00000030 - -/* Perfect filtering mode */ -#define SF_PERFMODE_OFF 0x00000000 -#define SF_PERFMODE_NORMAL 0x00000040 -#define SF_PERFMODE_INVERSE 0x00000080 -#define SF_PERFMODE_VLAN 0x000000C0 - -/* VLAN mode */ -#define SF_VLANMODE_OFF 0x00000000 -#define SF_VLANMODE_NOSTRIP 0x00000100 -#define SF_VLANMODE_STRIP 0x00000200 -#define SF_VLANMODE_RSVD 0x00000300 - -/* Wakeup mode */ -#define SF_WAKEMODE_OFF 0x00000000 -#define SF_WAKEMODE_FILTER 0x00000400 -#define SF_WAKEMODE_FP 0x00000800 -#define SF_WAKEMODE_HIPRIO 0x00000C00 - -/* - * Extra PCI registers 0x0100 to 0x0FFF - */ -#define SF_PCI_TARGSTAT 0x0100 -#define SF_PCI_MASTSTAT1 0x0104 -#define SF_PCI_MASTSTAT2 0x0108 -#define SF_PCI_DMAHOSTADDR_LO 0x010C -#define SF_BAC_DMADIAG0 0x0110 -#define SF_BAC_DMADIAG1 0x0114 -#define SF_BAC_DMADIAG2 0x0118 -#define SF_BAC_DMADIAG3 0x011C -#define SF_PAR0 0x0120 -#define SF_PAR1 0x0124 -#define SF_PCICB_FUNCEVENT 0x0130 -#define SF_PCICB_FUNCEVENT_MASK 0x0134 -#define SF_PCICB_FUNCSTATE 0x0138 -#define SF_PCICB_FUNCFORCE 0x013C - -/* - * Serial EEPROM registers 0x1000 to 0x1FFF - * Presumeably the EEPROM is mapped into this 8K window. - */ -#define SF_EEADDR_BASE 0x1000 -#define SF_EEADDR_MAX 0x1FFF - -#define SF_EE_NODEADDR 14 - -/* - * MII registers registers 0x2000 to 0x3FFF - * There are 32 sets of 32 registers, one set for each possible - * PHY address. Each 32 bit register is split into a 16-bit data - * port and a couple of status bits. - */ - -#define SF_MIIADDR_BASE 0x2000 -#define SF_MIIADDR_MAX 0x3FFF -#define SF_MII_BLOCKS 32 - -#define SF_MII_DATAVALID 0x80000000 -#define SF_MII_BUSY 0x40000000 -#define SF_MII_DATAPORT 0x0000FFFF - -#define SF_PHY_REG(phy, reg) \ - (SF_MIIADDR_BASE + (phy * SF_MII_BLOCKS * sizeof(u_int32_t)) + \ - (reg * sizeof(u_int32_t))) - -/* - * Ethernet extra registers 0x4000 to 0x4FFF - */ -#define SF_TESTMODE 0x4000 -#define SF_RX_FRAMEPROC_CTL 0x4004 -#define SF_TX_FRAMEPROC_CTL 0x4008 - -/* - * MAC registers 0x5000 to 0x5FFF - */ -#define SF_MACCFG_1 0x5000 -#define SF_MACCFG_2 0x5004 -#define SF_BKTOBKIPG 0x5008 -#define SF_NONBKTOBKIPG 0x500C -#define SF_COLRETRY 0x5010 -#define SF_MAXLEN 0x5014 -#define SF_TXNIBBLECNT 0x5018 -#define SF_TXBYTECNT 0x501C -#define SF_RETXCNT 0x5020 -#define SF_RANDNUM 0x5024 -#define SF_RANDNUM_MASK 0x5028 -#define SF_TOTALTXCNT 0x5034 -#define SF_RXBYTECNT 0x5040 -#define SF_TXPAUSETIMER 0x5060 -#define SF_VLANTYPE 0x5064 -#define SF_MIISTATUS 0x5070 - -#define SF_MACCFG1_HUGEFRAMES 0x00000001 -#define SF_MACCFG1_FULLDUPLEX 0x00000002 -#define SF_MACCFG1_AUTOPAD 0x00000004 -#define SF_MACCFG1_HDJAM 0x00000008 -#define SF_MACCFG1_DELAYCRC 0x00000010 -#define SF_MACCFG1_NOBACKOFF 0x00000020 -#define SF_MACCFG1_LENGTHCHECK 0x00000040 -#define SF_MACCFG1_PUREPREAMBLE 0x00000080 -#define SF_MACCFG1_PASSALLRX 0x00000100 -#define SF_MACCFG1_PREAM_DETCNT 0x00000200 -#define SF_MACCFG1_RX_FLOWENB 0x00000400 -#define SF_MACCFG1_TX_FLOWENB 0x00000800 -#define SF_MACCFG1_TESTMODE 0x00003000 -#define SF_MACCFG1_MIILOOPBK 0x00004000 -#define SF_MACCFG1_SOFTRESET 0x00008000 - -/* - * There are the recommended IPG nibble counter settings - * specified in the Adaptec manual for full duplex and - * half duplex operation. - */ -#define SF_IPGT_FDX 0x15 -#define SF_IPGT_HDX 0x11 - -/* - * RX filter registers 0x6000 to 0x6FFF - */ -#define SF_RXFILT_PERFECT_BASE 0x6000 -#define SF_RXFILT_PERFECT_MAX 0x60FF -#define SF_RXFILT_PERFECT_SKIP 0x0010 -#define SF_RXFILT_PERFECT_CNT 0x0010 - -#define SF_RXFILT_HASH_BASE 0x6100 -#define SF_RXFILT_HASH_MAX 0x62FF -#define SF_RXFILT_HASH_SKIP 0x0010 -#define SF_RXFILT_HASH_CNT 0x001F -#define SF_RXFILT_HASH_ADDROFF 0x0000 -#define SF_RXFILT_HASH_PRIOOFF 0x0004 -#define SF_RXFILT_HASH_VLANOFF 0x0008 - -/* - * Statistics registers 0x7000 to 0x7FFF - */ -#define SF_STATS_BASE 0x7000 -#define SF_STATS_END 0x7FFF - -/* - * TX frame processor instruction space 0x8000 to 0x9FFF - */ - -/* - * RX frame processor instruction space 0xA000 to 0xBFFF - */ - -/* - * Ethernet FIFO access space 0xC000 to 0xDFFF - */ - -/* - * Reserved 0xE000 to 0xFFFF - */ - -/* - * Descriptor data structures. - */ - - -/* Receive descriptor formats. */ -#define SF_RX_MINSPACING 8 -#define SF_RX_DLIST_CNT 256 -#define SF_RX_CLIST_CNT 1024 -#define SF_RX_HOSTADDR(x) (((x) >> 2) & 0x3FFFFFFF) - -/* - * RX buffer descriptor type 0, 32-bit addressing. Note that we - * program the RX buffer queue control register(s) to allow a - * descriptor spacing of 16 bytes, which leaves room after each - * descriptor to store a pointer to the mbuf for each buffer. - */ -struct sf_rx_bufdesc_type0 { - u_int32_t sf_valid:1, - sf_end:1, - sf_addrlo:30; - u_int32_t sf_pad0; -#ifdef __i386__ - u_int32_t sf_pad1; -#endif - struct mbuf *sf_mbuf; -}; - -/* - * RX buffer descriptor type 0, 64-bit addressing. - */ -struct sf_rx_bufdesc_type1 { - u_int32_t sf_valid:1, - sf_end:1, - sf_addrlo:30; - u_int32_t sf_addrhi; -#ifdef __i386__ - u_int32_t sf_pad; -#endif - struct mbuf *sf_mbuf; -}; - -/* - * RX completion descriptor, type 0 (short). - */ -struct sf_rx_cmpdesc_type0 { - u_int32_t sf_len:16, - sf_endidx:11, - sf_status1:3, - sf_id:2; -}; - -/* - * RX completion descriptor, type 1 (basic). Includes vlan ID - * if this is a vlan-addressed packet, plus extended status. - */ -struct sf_rx_cmpdesc_type1 { - u_int32_t sf_len:16, - sf_endidx:11, - sf_status1:3, - sf_id:2; - u_int16_t sf_status2; - u_int16_t sf_vlanid; -}; - -/* - * RX completion descriptor, type 2 (checksum). Includes partial TCP/IP - * checksum instead of vlan tag, plus extended status. - */ -struct sf_rx_cmpdesc_type2 { - u_int32_t sf_len:16, - sf_endidx:11, - sf_status1:3, - sf_id:2; - u_int16_t sf_status2; - u_int16_t sf_cksum; -}; - -/* - * RX completion descriptor type 3 (full). Includes timestamp, partial - * TCP/IP checksum, vlan tag plus priority, two extended status fields. - */ -struct sf_rx_cmpdesc_type3 { - u_int32_t sf_len:16, - sf_endidx:11, - sf_status1:3, - sf_id:2; - u_int32_t sf_startidx:10, - sf_status3:6, - sf_status2:16; - u_int16_t sf_cksum; - u_int16_t sf_vlanid_prio; - u_int32_t sf_timestamp; -}; - -#define SF_RXSTAT1_QUEUE 0x1 -#define SF_RXSTAT1_FIFOFULL 0x2 -#define SF_RXSTAT1_OK 0x4 - - /* 0=unknown,5=unsupported */ -#define SF_RXSTAT2_FRAMETYPE 0x0007 /* 1=IPv4,2=IPv2,3=IPX,4=ICMP */ -#define SF_RXSTAT2_UDP 0x0008 -#define SF_RXSTAT2_TCP 0x0010 -#define SF_RXSTAT2_FRAG 0x0020 -#define SF_RXSTAT2_PCSUM_OK 0x0040 /* partial checksum ok */ -#define SF_RXSTAT2_CSUM_BAD 0x0080 /* TCP/IP checksum bad */ -#define SF_RXSTAT2_CSUM_OK 0x0100 /* TCP/IP checksum ok */ -#define SF_RXSTAT2_VLAN 0x0200 -#define SF_RXSTAT2_BADRXCODE 0x0400 -#define SF_RXSTAT2_DRIBBLE 0x0800 -#define SF_RXSTAT2_ISL_CRCERR 0x1000 -#define SF_RXSTAT2_CRCERR 0x2000 -#define SF_RXSTAT2_HASH 0x4000 -#define SF_RXSTAT2_PERFECT 0x8000 - -#define SF_RXSTAT3_TRAILER 0x01 -#define SF_RXSTAT3_HEADER 0x02 -#define SF_RXSTAT3_CONTROL 0x04 -#define SF_RXSTAT3_PAUSE 0x08 -#define SF_RXSTAT3_ISL 0x10 - -/* - * Transmit descriptor formats. - * Each transmit descriptor type allows for a skip field at the - * start of each structure. The size of the skip field can vary, - * however we always set it for 8 bytes, which is enough to hold - * a pointer (32 bits on x86, 64-bits on alpha) that we can use - * to hold the address of the head of the mbuf chain for the - * frame or fragment associated with the descriptor. This saves - * us from having to create a separate pointer array to hold - * the mbuf addresses. - */ -#define SF_TX_BUFDESC_ID 0xB -#define SF_MAXFRAGS 14 -#define SF_TX_MINSPACING 128 -#define SF_TX_DLIST_CNT 128 -#define SF_TX_DLIST_SIZE 16384 -#define SF_TX_SKIPLEN 1 -#define SF_TX_CLIST_CNT 1024 - -struct sf_frag { - u_int32_t sf_addr; - u_int16_t sf_fraglen; - u_int16_t sf_pktlen; -}; - -struct sf_frag_msdos { - u_int16_t sf_pktlen; - u_int16_t sf_fraglen; - u_int32_t sf_addr; -}; - -/* - * TX frame descriptor type 0, 32-bit addressing. One descriptor can - * be used to map multiple packet fragments. We use this format since - * BSD networking fragments packet data across mbuf chains. Note that - * the number of fragments can be variable depending on how the descriptor - * spacing is specified in the TX descriptor queue control register. - * We always use a spacing of 128 bytes, and a skipfield length of 8 - * bytes: this means 16 bytes for the descriptor, including the skipfield, - * with 121 bytes left for fragment maps. Each fragment requires 8 bytes, - * which allows for 14 fragments per descriptor. The total size of the - * transmit buffer queue is limited to 16384 bytes, so with a spacing of - * 128 bytes per descriptor, we have room for 128 descriptors in the queue. - */ -struct sf_tx_bufdesc_type0 { -#ifdef __i386__ - u_int32_t sf_pad; -#endif - struct mbuf *sf_mbuf; - u_int32_t sf_rsvd0:24, - sf_crcen:1, - sf_caltcp:1, - sf_end:1, - sf_intr:1, - sf_id:4; - u_int8_t sf_fragcnt; - u_int8_t sf_rsvd2; - u_int16_t sf_rsvd1; - struct sf_frag sf_frags[14]; -}; - -/* - * TX buffer descriptor type 1, 32-bit addressing. Each descriptor - * maps a single fragment. - */ -struct sf_tx_bufdesc_type1 { -#ifdef __i386__ - u_int32_t sf_pad; -#endif - struct mbuf *sf_mbuf; - u_int32_t sf_fraglen:16, - sf_fragcnt:8, - sf_crcen:1, - sf_caltcp:1, - sf_end:1, - sf_intr:1, - sf_id:4; - u_int32_t sf_addr; -}; - -/* - * TX buffer descriptor type 2, 64-bit addressing. Each descriptor - * maps a single fragment. - */ -struct sf_tx_bufdesc_type2 { -#ifdef __i386__ - u_int32_t sf_pad; -#endif - struct mbuf *sf_mbuf; - u_int32_t sf_fraglen:16, - sf_fragcnt:8, - sf_crcen:1, - sf_caltcp:1, - sf_end:1, - sf_intr:1, - sf_id:4; - u_int32_t sf_addrlo; - u_int32_t sf_addrhi; -}; - -/* TX buffer descriptor type 3 is not defined. */ - -/* - * TX frame descriptor type 4, 32-bit addressing. This is a special - * case of the type 0 descriptor, identical except that the fragment - * address and length fields are ordered differently. This is done - * to optimize copies in MS-DOS and OS/2 drivers. - */ -struct sf_tx_bufdesc_type4 { -#ifdef __i386__ - u_int32_t sf_pad; -#endif - struct mbuf *sf_mbuf; - u_int32_t sf_rsvd0:24, - sf_crcen:1, - sf_caltcp:1, - sf_end:1, - sf_intr:1, - sf_id:4; - u_int8_t sf_fragcnt; - u_int8_t sf_rsvd2; - u_int16_t sf_rsvd1; - struct sf_frag_msdos sf_frags[14]; -}; - -/* - * Transmit completion queue descriptor formats. - */ - -/* - * Transmit DMA completion descriptor, type 0. - */ -#define SF_TXCMPTYPE_DMA 0x4 -struct sf_tx_cmpdesc_type0 { - u_int32_t sf_index:15, - sf_priority:1, - sf_timestamp:13, - sf_type:3; -}; - -/* - * Transmit completion descriptor, type 1. - */ -#define SF_TXCMPTYPE_TX 0x5 -struct sf_tx_cmpdesc_type1 { - u_int32_t sf_index:15, - sf_priority:1, - sf_txstat:13, - sf_type:3; -}; - -#define SF_TXSTAT_CRCERR 0x0001 -#define SF_TXSTAT_LENCHECKERR 0x0002 -#define SF_TXSTAT_LENRANGEERR 0x0004 -#define SF_TXSTAT_TX_OK 0x0008 -#define SF_TXSTAT_TX_DEFERED 0x0010 -#define SF_TXSTAT_EXCESS_DEFER 0x0020 -#define SF_TXSTAT_EXCESS_COLL 0x0040 -#define SF_TXSTAT_LATE_COLL 0x0080 -#define SF_TXSTAT_TOOBIG 0x0100 -#define SF_TXSTAT_TX_UNDERRUN 0x0200 -#define SF_TXSTAT_CTLFRAME_OK 0x0400 -#define SF_TXSTAT_PAUSEFRAME_OK 0x0800 -#define SF_TXSTAT_PAUSED 0x1000 - -/* Statistics counters. */ -struct sf_stats { - u_int32_t sf_tx_frames; - u_int32_t sf_tx_single_colls; - u_int32_t sf_tx_multi_colls; - u_int32_t sf_tx_crcerrs; - u_int32_t sf_tx_bytes; - u_int32_t sf_tx_defered; - u_int32_t sf_tx_late_colls; - u_int32_t sf_tx_pause_frames; - u_int32_t sf_tx_control_frames; - u_int32_t sf_tx_excess_colls; - u_int32_t sf_tx_excess_defer; - u_int32_t sf_tx_mcast_frames; - u_int32_t sf_tx_bcast_frames; - u_int32_t sf_tx_frames_lost; - u_int32_t sf_rx_rx_frames; - u_int32_t sf_rx_crcerrs; - u_int32_t sf_rx_alignerrs; - u_int32_t sf_rx_bytes; - u_int32_t sf_rx_control_frames; - u_int32_t sf_rx_unsup_control_frames; - u_int32_t sf_rx_giants; - u_int32_t sf_rx_runts; - u_int32_t sf_rx_jabbererrs; - u_int32_t sf_rx_pkts_64; - u_int32_t sf_rx_pkts_65_127; - u_int32_t sf_rx_pkts_128_255; - u_int32_t sf_rx_pkts_256_511; - u_int32_t sf_rx_pkts_512_1023; - u_int32_t sf_rx_pkts_1024_1518; - u_int32_t sf_rx_frames_lost; - u_int16_t sf_tx_underruns; - u_int16_t sf_pad; -}; - -/* - * register space access macros - */ -#define CSR_WRITE_4(sc, reg, val) \ - bus_space_write_4(sc->sf_btag, sc->sf_bhandle, reg, val) - -#define CSR_READ_4(sc, reg) \ - bus_space_read_4(sc->sf_btag, sc->sf_bhandle, reg) - -#define CSR_READ_1(sc, reg) \ - bus_space_read_1(sc->sf_btag, sc->sf_bhandle, reg) - - -struct sf_type { - u_int16_t sf_vid; - u_int16_t sf_did; - char *sf_name; -}; - -#define SF_INC(x, y) (x) = (x + 1) % y - -#define ETHER_ALIGN 2 - -/* - * Note: alignment is important here: each list must be aligned to - * a 256-byte boundary. It turns out that each ring is some multiple - * of 4K in length, so we can stack them all on top of each other - * and just worry about aligning the whole mess. There's one transmit - * buffer ring and two receive buffer rings: one RX ring is for small - * packets and the other is for large packets. Each buffer ring also - * has a companion completion queue. - */ -struct sf_list_data { - struct sf_tx_bufdesc_type0 sf_tx_dlist[SF_TX_DLIST_CNT]; - struct sf_tx_cmpdesc_type1 sf_tx_clist[SF_TX_CLIST_CNT]; - struct sf_rx_bufdesc_type0 sf_rx_dlist_big[SF_RX_DLIST_CNT]; -#ifdef notdef - /* - * Unfortunately, because the Starfire doesn't allow arbitrary - * byte alignment, we have to copy packets in the RX handler in - * order to align the payload correctly. This means that we - * don't gain anything by having separate large and small descriptor - * lists, so for now we don't bother with the small one. - */ - struct sf_rx_bufdesc_type0 sf_rx_dlist_small[SF_RX_DLIST_CNT]; -#endif - struct sf_rx_cmpdesc_type3 sf_rx_clist[SF_RX_CLIST_CNT]; -}; - -struct sf_softc { - struct ifnet *sf_ifp; /* interface info */ - bus_space_handle_t sf_bhandle; /* bus space handle */ - bus_space_tag_t sf_btag; /* bus space tag */ - void *sf_intrhand; /* interrupt handler cookie */ - struct resource *sf_irq; /* irq resource descriptor */ - struct resource *sf_res; /* mem/ioport resource */ - struct sf_type *sf_info; /* Starfire adapter info */ - device_t sf_miibus; - u_int8_t sf_unit; /* interface number */ - struct sf_list_data *sf_ldata; - int sf_tx_cnt; - u_int8_t sf_link; - int sf_if_flags; - struct callout_handle sf_stat_ch; - struct mtx sf_mtx; -#ifdef DEVICE_POLLING - int rxcycles; -#endif /* DEVICE_POLLING */ -}; - - -#define SF_LOCK(_sc) mtx_lock(&(_sc)->sf_mtx) -#define SF_UNLOCK(_sc) mtx_unlock(&(_sc)->sf_mtx) -#define SF_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sf_mtx, MA_OWNED) - -#define SF_TIMEOUT 1000 - -#ifdef __alpha__ -#undef vtophys -#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) -#endif diff --git a/sys/dev/sk/if_sk.c b/sys/dev/sk/if_sk.c deleted file mode 100644 index bcc4b03..0000000 --- a/sys/dev/sk/if_sk.c +++ /dev/null @@ -1,3002 +0,0 @@ -/* $OpenBSD: if_sk.c,v 2.33 2003/08/12 05:23:06 nate Exp $ */ - -/*- - * Copyright (c) 1997, 1998, 1999, 2000 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (c) 2003 Nathan L. Binkert <binkertn@umich.edu> - * - * Permission to use, copy, modify, and distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * SysKonnect SK-NET gigabit ethernet driver for FreeBSD. Supports - * the SK-984x series adapters, both single port and dual port. - * References: - * The XaQti XMAC II datasheet, - * http://www.freebsd.org/~wpaul/SysKonnect/xmacii_datasheet_rev_c_9-29.pdf - * The SysKonnect GEnesis manual, http://www.syskonnect.com - * - * Note: XaQti has been aquired by Vitesse, and Vitesse does not have the - * XMAC II datasheet online. I have put my copy at people.freebsd.org as a - * convenience to others until Vitesse corrects this problem: - * - * http://people.freebsd.org/~wpaul/SysKonnect/xmacii_datasheet_rev_c_9-29.pdf - * - * Written by Bill Paul <wpaul@ee.columbia.edu> - * Department of Electrical Engineering - * Columbia University, New York City - */ -/* - * The SysKonnect gigabit ethernet adapters consist of two main - * components: the SysKonnect GEnesis controller chip and the XaQti Corp. - * XMAC II gigabit ethernet MAC. The XMAC provides all of the MAC - * components and a PHY while the GEnesis controller provides a PCI - * interface with DMA support. Each card may have between 512K and - * 2MB of SRAM on board depending on the configuration. - * - * The SysKonnect GEnesis controller can have either one or two XMAC - * chips connected to it, allowing single or dual port NIC configurations. - * SysKonnect has the distinction of being the only vendor on the market - * with a dual port gigabit ethernet NIC. The GEnesis provides dual FIFOs, - * dual DMA queues, packet/MAC/transmit arbiters and direct access to the - * XMAC registers. This driver takes advantage of these features to allow - * both XMACs to operate as independent interfaces. - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/sockio.h> -#include <sys/mbuf.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/socket.h> -#include <sys/queue.h> -#include <sys/sysctl.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/ethernet.h> -#include <net/if_dl.h> -#include <net/if_media.h> -#include <net/if_types.h> - -#include <net/bpf.h> - -#include <vm/vm.h> /* for vtophys */ -#include <vm/pmap.h> /* for vtophys */ -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/bus.h> -#include <sys/rman.h> - -#include <dev/mii/mii.h> -#include <dev/mii/miivar.h> -#include <dev/mii/brgphyreg.h> - -#include <dev/pci/pcireg.h> -#include <dev/pci/pcivar.h> - -#if 0 -#define SK_USEIOSPACE -#endif - -#include <pci/if_skreg.h> -#include <pci/xmaciireg.h> -#include <pci/yukonreg.h> - -MODULE_DEPEND(sk, pci, 1, 1, 1); -MODULE_DEPEND(sk, ether, 1, 1, 1); -MODULE_DEPEND(sk, miibus, 1, 1, 1); - -/* "controller miibus0" required. See GENERIC if you get errors here. */ -#include "miibus_if.h" - -#ifndef lint -static const char rcsid[] = - "$FreeBSD$"; -#endif - -static struct sk_type sk_devs[] = { - { - VENDORID_SK, - DEVICEID_SK_V1, - "SysKonnect Gigabit Ethernet (V1.0)" - }, - { - VENDORID_SK, - DEVICEID_SK_V2, - "SysKonnect Gigabit Ethernet (V2.0)" - }, - { - VENDORID_MARVELL, - DEVICEID_SK_V2, - "Marvell Gigabit Ethernet" - }, - { - VENDORID_MARVELL, - DEVICEID_BELKIN_5005, - "Belkin F5D5005 Gigabit Ethernet" - }, - { - VENDORID_3COM, - DEVICEID_3COM_3C940, - "3Com 3C940 Gigabit Ethernet" - }, - { - VENDORID_LINKSYS, - DEVICEID_LINKSYS_EG1032, - "Linksys EG1032 Gigabit Ethernet" - }, - { - VENDORID_DLINK, - DEVICEID_DLINK_DGE530T, - "D-Link DGE-530T Gigabit Ethernet" - }, - { 0, 0, NULL } -}; - -static int skc_probe(device_t); -static int skc_attach(device_t); -static int skc_detach(device_t); -static void skc_shutdown(device_t); -static int sk_detach(device_t); -static int sk_probe(device_t); -static int sk_attach(device_t); -static void sk_tick(void *); -static void sk_intr(void *); -static void sk_intr_xmac(struct sk_if_softc *); -static void sk_intr_bcom(struct sk_if_softc *); -static void sk_intr_yukon(struct sk_if_softc *); -static void sk_rxeof(struct sk_if_softc *); -static void sk_txeof(struct sk_if_softc *); -static int sk_encap(struct sk_if_softc *, struct mbuf *, - u_int32_t *); -static void sk_start(struct ifnet *); -static int sk_ioctl(struct ifnet *, u_long, caddr_t); -static void sk_init(void *); -static void sk_init_xmac(struct sk_if_softc *); -static void sk_init_yukon(struct sk_if_softc *); -static void sk_stop(struct sk_if_softc *); -static void sk_watchdog(struct ifnet *); -static int sk_ifmedia_upd(struct ifnet *); -static void sk_ifmedia_sts(struct ifnet *, struct ifmediareq *); -static void sk_reset(struct sk_softc *); -static int sk_newbuf(struct sk_if_softc *, - struct sk_chain *, struct mbuf *); -static int sk_alloc_jumbo_mem(struct sk_if_softc *); -static void sk_free_jumbo_mem(struct sk_if_softc *); -static void *sk_jalloc(struct sk_if_softc *); -static void sk_jfree(void *, void *); -static int sk_init_rx_ring(struct sk_if_softc *); -static void sk_init_tx_ring(struct sk_if_softc *); -static u_int32_t sk_win_read_4(struct sk_softc *, int); -static u_int16_t sk_win_read_2(struct sk_softc *, int); -static u_int8_t sk_win_read_1(struct sk_softc *, int); -static void sk_win_write_4(struct sk_softc *, int, u_int32_t); -static void sk_win_write_2(struct sk_softc *, int, u_int32_t); -static void sk_win_write_1(struct sk_softc *, int, u_int32_t); -static u_int8_t sk_vpd_readbyte(struct sk_softc *, int); -static void sk_vpd_read_res(struct sk_softc *, struct vpd_res *, int); -static void sk_vpd_read(struct sk_softc *); - -static int sk_miibus_readreg(device_t, int, int); -static int sk_miibus_writereg(device_t, int, int, int); -static void sk_miibus_statchg(device_t); - -static int sk_xmac_miibus_readreg(struct sk_if_softc *, int, int); -static int sk_xmac_miibus_writereg(struct sk_if_softc *, int, int, - int); -static void sk_xmac_miibus_statchg(struct sk_if_softc *); - -static int sk_marv_miibus_readreg(struct sk_if_softc *, int, int); -static int sk_marv_miibus_writereg(struct sk_if_softc *, int, int, - int); -static void sk_marv_miibus_statchg(struct sk_if_softc *); - -static uint32_t sk_xmchash(const uint8_t *); -static uint32_t sk_gmchash(const uint8_t *); -static void sk_setfilt(struct sk_if_softc *, caddr_t, int); -static void sk_setmulti(struct sk_if_softc *); -static void sk_setpromisc(struct sk_if_softc *); - -static int sysctl_int_range(SYSCTL_HANDLER_ARGS, int low, int high); -static int sysctl_hw_sk_int_mod(SYSCTL_HANDLER_ARGS); - -#ifdef SK_USEIOSPACE -#define SK_RES SYS_RES_IOPORT -#define SK_RID SK_PCI_LOIO -#else -#define SK_RES SYS_RES_MEMORY -#define SK_RID SK_PCI_LOMEM -#endif - -/* - * Note that we have newbus methods for both the GEnesis controller - * itself and the XMAC(s). The XMACs are children of the GEnesis, and - * the miibus code is a child of the XMACs. We need to do it this way - * so that the miibus drivers can access the PHY registers on the - * right PHY. It's not quite what I had in mind, but it's the only - * design that achieves the desired effect. - */ -static device_method_t skc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, skc_probe), - DEVMETHOD(device_attach, skc_attach), - DEVMETHOD(device_detach, skc_detach), - DEVMETHOD(device_shutdown, skc_shutdown), - - /* bus interface */ - DEVMETHOD(bus_print_child, bus_generic_print_child), - DEVMETHOD(bus_driver_added, bus_generic_driver_added), - - { 0, 0 } -}; - -static driver_t skc_driver = { - "skc", - skc_methods, - sizeof(struct sk_softc) -}; - -static devclass_t skc_devclass; - -static device_method_t sk_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, sk_probe), - DEVMETHOD(device_attach, sk_attach), - DEVMETHOD(device_detach, sk_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - /* bus interface */ - DEVMETHOD(bus_print_child, bus_generic_print_child), - DEVMETHOD(bus_driver_added, bus_generic_driver_added), - - /* MII interface */ - DEVMETHOD(miibus_readreg, sk_miibus_readreg), - DEVMETHOD(miibus_writereg, sk_miibus_writereg), - DEVMETHOD(miibus_statchg, sk_miibus_statchg), - - { 0, 0 } -}; - -static driver_t sk_driver = { - "sk", - sk_methods, - sizeof(struct sk_if_softc) -}; - -static devclass_t sk_devclass; - -DRIVER_MODULE(sk, pci, skc_driver, skc_devclass, 0, 0); -DRIVER_MODULE(sk, skc, sk_driver, sk_devclass, 0, 0); -DRIVER_MODULE(miibus, sk, miibus_driver, miibus_devclass, 0, 0); - -#define SK_SETBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | x) - -#define SK_CLRBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~x) - -#define SK_WIN_SETBIT_4(sc, reg, x) \ - sk_win_write_4(sc, reg, sk_win_read_4(sc, reg) | x) - -#define SK_WIN_CLRBIT_4(sc, reg, x) \ - sk_win_write_4(sc, reg, sk_win_read_4(sc, reg) & ~x) - -#define SK_WIN_SETBIT_2(sc, reg, x) \ - sk_win_write_2(sc, reg, sk_win_read_2(sc, reg) | x) - -#define SK_WIN_CLRBIT_2(sc, reg, x) \ - sk_win_write_2(sc, reg, sk_win_read_2(sc, reg) & ~x) - -static u_int32_t -sk_win_read_4(sc, reg) - struct sk_softc *sc; - int reg; -{ -#ifdef SK_USEIOSPACE - CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg)); - return(CSR_READ_4(sc, SK_WIN_BASE + SK_REG(reg))); -#else - return(CSR_READ_4(sc, reg)); -#endif -} - -static u_int16_t -sk_win_read_2(sc, reg) - struct sk_softc *sc; - int reg; -{ -#ifdef SK_USEIOSPACE - CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg)); - return(CSR_READ_2(sc, SK_WIN_BASE + SK_REG(reg))); -#else - return(CSR_READ_2(sc, reg)); -#endif -} - -static u_int8_t -sk_win_read_1(sc, reg) - struct sk_softc *sc; - int reg; -{ -#ifdef SK_USEIOSPACE - CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg)); - return(CSR_READ_1(sc, SK_WIN_BASE + SK_REG(reg))); -#else - return(CSR_READ_1(sc, reg)); -#endif -} - -static void -sk_win_write_4(sc, reg, val) - struct sk_softc *sc; - int reg; - u_int32_t val; -{ -#ifdef SK_USEIOSPACE - CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg)); - CSR_WRITE_4(sc, SK_WIN_BASE + SK_REG(reg), val); -#else - CSR_WRITE_4(sc, reg, val); -#endif - return; -} - -static void -sk_win_write_2(sc, reg, val) - struct sk_softc *sc; - int reg; - u_int32_t val; -{ -#ifdef SK_USEIOSPACE - CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg)); - CSR_WRITE_2(sc, SK_WIN_BASE + SK_REG(reg), val); -#else - CSR_WRITE_2(sc, reg, val); -#endif - return; -} - -static void -sk_win_write_1(sc, reg, val) - struct sk_softc *sc; - int reg; - u_int32_t val; -{ -#ifdef SK_USEIOSPACE - CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg)); - CSR_WRITE_1(sc, SK_WIN_BASE + SK_REG(reg), val); -#else - CSR_WRITE_1(sc, reg, val); -#endif - return; -} - -/* - * The VPD EEPROM contains Vital Product Data, as suggested in - * the PCI 2.1 specification. The VPD data is separared into areas - * denoted by resource IDs. The SysKonnect VPD contains an ID string - * resource (the name of the adapter), a read-only area resource - * containing various key/data fields and a read/write area which - * can be used to store asset management information or log messages. - * We read the ID string and read-only into buffers attached to - * the controller softc structure for later use. At the moment, - * we only use the ID string during skc_attach(). - */ -static u_int8_t -sk_vpd_readbyte(sc, addr) - struct sk_softc *sc; - int addr; -{ - int i; - - sk_win_write_2(sc, SK_PCI_REG(SK_PCI_VPD_ADDR), addr); - for (i = 0; i < SK_TIMEOUT; i++) { - DELAY(1); - if (sk_win_read_2(sc, - SK_PCI_REG(SK_PCI_VPD_ADDR)) & SK_VPD_FLAG) - break; - } - - if (i == SK_TIMEOUT) - return(0); - - return(sk_win_read_1(sc, SK_PCI_REG(SK_PCI_VPD_DATA))); -} - -static void -sk_vpd_read_res(sc, res, addr) - struct sk_softc *sc; - struct vpd_res *res; - int addr; -{ - int i; - u_int8_t *ptr; - - ptr = (u_int8_t *)res; - for (i = 0; i < sizeof(struct vpd_res); i++) - ptr[i] = sk_vpd_readbyte(sc, i + addr); - - return; -} - -static void -sk_vpd_read(sc) - struct sk_softc *sc; -{ - int pos = 0, i; - struct vpd_res res; - - if (sc->sk_vpd_prodname != NULL) - free(sc->sk_vpd_prodname, M_DEVBUF); - if (sc->sk_vpd_readonly != NULL) - free(sc->sk_vpd_readonly, M_DEVBUF); - sc->sk_vpd_prodname = NULL; - sc->sk_vpd_readonly = NULL; - sc->sk_vpd_readonly_len = 0; - - sk_vpd_read_res(sc, &res, pos); - - /* - * Bail out quietly if the eeprom appears to be missing or empty. - */ - if (res.vr_id == 0xff && res.vr_len == 0xff && res.vr_pad == 0xff) - return; - - if (res.vr_id != VPD_RES_ID) { - printf("skc%d: bad VPD resource id: expected %x got %x\n", - sc->sk_unit, VPD_RES_ID, res.vr_id); - return; - } - - pos += sizeof(res); - sc->sk_vpd_prodname = malloc(res.vr_len + 1, M_DEVBUF, M_NOWAIT); - if (sc->sk_vpd_prodname != NULL) { - for (i = 0; i < res.vr_len; i++) - sc->sk_vpd_prodname[i] = sk_vpd_readbyte(sc, i + pos); - sc->sk_vpd_prodname[i] = '\0'; - } - pos += res.vr_len; - - sk_vpd_read_res(sc, &res, pos); - - if (res.vr_id != VPD_RES_READ) { - printf("skc%d: bad VPD resource id: expected %x got %x\n", - sc->sk_unit, VPD_RES_READ, res.vr_id); - return; - } - - pos += sizeof(res); - sc->sk_vpd_readonly = malloc(res.vr_len, M_DEVBUF, M_NOWAIT); - for (i = 0; i < res.vr_len; i++) - sc->sk_vpd_readonly[i] = sk_vpd_readbyte(sc, i + pos); - sc->sk_vpd_readonly_len = res.vr_len; - - return; -} - -static int -sk_miibus_readreg(dev, phy, reg) - device_t dev; - int phy, reg; -{ - struct sk_if_softc *sc_if; - - sc_if = device_get_softc(dev); - - switch(sc_if->sk_softc->sk_type) { - case SK_GENESIS: - return(sk_xmac_miibus_readreg(sc_if, phy, reg)); - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - return(sk_marv_miibus_readreg(sc_if, phy, reg)); - } - - return(0); -} - -static int -sk_miibus_writereg(dev, phy, reg, val) - device_t dev; - int phy, reg, val; -{ - struct sk_if_softc *sc_if; - - sc_if = device_get_softc(dev); - - switch(sc_if->sk_softc->sk_type) { - case SK_GENESIS: - return(sk_xmac_miibus_writereg(sc_if, phy, reg, val)); - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - return(sk_marv_miibus_writereg(sc_if, phy, reg, val)); - } - - return(0); -} - -static void -sk_miibus_statchg(dev) - device_t dev; -{ - struct sk_if_softc *sc_if; - - sc_if = device_get_softc(dev); - - switch(sc_if->sk_softc->sk_type) { - case SK_GENESIS: - sk_xmac_miibus_statchg(sc_if); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - sk_marv_miibus_statchg(sc_if); - break; - } - - return; -} - -static int -sk_xmac_miibus_readreg(sc_if, phy, reg) - struct sk_if_softc *sc_if; - int phy, reg; -{ - int i; - - if (sc_if->sk_phytype == SK_PHYTYPE_XMAC && phy != 0) - return(0); - - SK_IF_LOCK(sc_if); - SK_XM_WRITE_2(sc_if, XM_PHY_ADDR, reg|(phy << 8)); - SK_XM_READ_2(sc_if, XM_PHY_DATA); - if (sc_if->sk_phytype != SK_PHYTYPE_XMAC) { - for (i = 0; i < SK_TIMEOUT; i++) { - DELAY(1); - if (SK_XM_READ_2(sc_if, XM_MMUCMD) & - XM_MMUCMD_PHYDATARDY) - break; - } - - if (i == SK_TIMEOUT) { - printf("sk%d: phy failed to come ready\n", - sc_if->sk_unit); - SK_IF_UNLOCK(sc_if); - return(0); - } - } - DELAY(1); - i = SK_XM_READ_2(sc_if, XM_PHY_DATA); - SK_IF_UNLOCK(sc_if); - return(i); -} - -static int -sk_xmac_miibus_writereg(sc_if, phy, reg, val) - struct sk_if_softc *sc_if; - int phy, reg, val; -{ - int i; - - SK_IF_LOCK(sc_if); - SK_XM_WRITE_2(sc_if, XM_PHY_ADDR, reg|(phy << 8)); - for (i = 0; i < SK_TIMEOUT; i++) { - if (!(SK_XM_READ_2(sc_if, XM_MMUCMD) & XM_MMUCMD_PHYBUSY)) - break; - } - - if (i == SK_TIMEOUT) { - printf("sk%d: phy failed to come ready\n", sc_if->sk_unit); - SK_IF_UNLOCK(sc_if); - return(ETIMEDOUT); - } - - SK_XM_WRITE_2(sc_if, XM_PHY_DATA, val); - for (i = 0; i < SK_TIMEOUT; i++) { - DELAY(1); - if (!(SK_XM_READ_2(sc_if, XM_MMUCMD) & XM_MMUCMD_PHYBUSY)) - break; - } - SK_IF_UNLOCK(sc_if); - if (i == SK_TIMEOUT) - printf("sk%d: phy write timed out\n", sc_if->sk_unit); - - return(0); -} - -static void -sk_xmac_miibus_statchg(sc_if) - struct sk_if_softc *sc_if; -{ - struct mii_data *mii; - - mii = device_get_softc(sc_if->sk_miibus); - - SK_IF_LOCK(sc_if); - /* - * If this is a GMII PHY, manually set the XMAC's - * duplex mode accordingly. - */ - if (sc_if->sk_phytype != SK_PHYTYPE_XMAC) { - if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) { - SK_XM_SETBIT_2(sc_if, XM_MMUCMD, XM_MMUCMD_GMIIFDX); - } else { - SK_XM_CLRBIT_2(sc_if, XM_MMUCMD, XM_MMUCMD_GMIIFDX); - } - } - SK_IF_UNLOCK(sc_if); - - return; -} - -static int -sk_marv_miibus_readreg(sc_if, phy, reg) - struct sk_if_softc *sc_if; - int phy, reg; -{ - u_int16_t val; - int i; - - if (phy != 0 || - (sc_if->sk_phytype != SK_PHYTYPE_MARV_COPPER && - sc_if->sk_phytype != SK_PHYTYPE_MARV_FIBER)) { - return(0); - } - - SK_IF_LOCK(sc_if); - SK_YU_WRITE_2(sc_if, YUKON_SMICR, YU_SMICR_PHYAD(phy) | - YU_SMICR_REGAD(reg) | YU_SMICR_OP_READ); - - for (i = 0; i < SK_TIMEOUT; i++) { - DELAY(1); - val = SK_YU_READ_2(sc_if, YUKON_SMICR); - if (val & YU_SMICR_READ_VALID) - break; - } - - if (i == SK_TIMEOUT) { - printf("sk%d: phy failed to come ready\n", - sc_if->sk_unit); - SK_IF_UNLOCK(sc_if); - return(0); - } - - val = SK_YU_READ_2(sc_if, YUKON_SMIDR); - SK_IF_UNLOCK(sc_if); - - return(val); -} - -static int -sk_marv_miibus_writereg(sc_if, phy, reg, val) - struct sk_if_softc *sc_if; - int phy, reg, val; -{ - int i; - - SK_IF_LOCK(sc_if); - SK_YU_WRITE_2(sc_if, YUKON_SMIDR, val); - SK_YU_WRITE_2(sc_if, YUKON_SMICR, YU_SMICR_PHYAD(phy) | - YU_SMICR_REGAD(reg) | YU_SMICR_OP_WRITE); - - for (i = 0; i < SK_TIMEOUT; i++) { - DELAY(1); - if (SK_YU_READ_2(sc_if, YUKON_SMICR) & YU_SMICR_BUSY) - break; - } - SK_IF_UNLOCK(sc_if); - - return(0); -} - -static void -sk_marv_miibus_statchg(sc_if) - struct sk_if_softc *sc_if; -{ - return; -} - -#define HASH_BITS 6 - -static u_int32_t -sk_xmchash(addr) - const uint8_t *addr; -{ - uint32_t crc; - - /* Compute CRC for the address value. */ - crc = ether_crc32_le(addr, ETHER_ADDR_LEN); - - return (~crc & ((1 << HASH_BITS) - 1)); -} - -/* gmchash is just a big endian crc */ -static u_int32_t -sk_gmchash(addr) - const uint8_t *addr; -{ - uint32_t crc; - - /* Compute CRC for the address value. */ - crc = ether_crc32_be(addr, ETHER_ADDR_LEN); - - return (crc & ((1 << HASH_BITS) - 1)); -} - -static void -sk_setfilt(sc_if, addr, slot) - struct sk_if_softc *sc_if; - caddr_t addr; - int slot; -{ - int base; - - base = XM_RXFILT_ENTRY(slot); - - SK_XM_WRITE_2(sc_if, base, *(u_int16_t *)(&addr[0])); - SK_XM_WRITE_2(sc_if, base + 2, *(u_int16_t *)(&addr[2])); - SK_XM_WRITE_2(sc_if, base + 4, *(u_int16_t *)(&addr[4])); - - return; -} - -static void -sk_setmulti(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_softc *sc = sc_if->sk_softc; - struct ifnet *ifp = sc_if->sk_ifp; - u_int32_t hashes[2] = { 0, 0 }; - int h = 0, i; - struct ifmultiaddr *ifma; - u_int8_t dummy[] = { 0, 0, 0, 0, 0 ,0 }; - - - /* First, zot all the existing filters. */ - switch(sc->sk_type) { - case SK_GENESIS: - for (i = 1; i < XM_RXFILT_MAX; i++) - sk_setfilt(sc_if, (caddr_t)&dummy, i); - - SK_XM_WRITE_4(sc_if, XM_MAR0, 0); - SK_XM_WRITE_4(sc_if, XM_MAR2, 0); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - SK_YU_WRITE_2(sc_if, YUKON_MCAH1, 0); - SK_YU_WRITE_2(sc_if, YUKON_MCAH2, 0); - SK_YU_WRITE_2(sc_if, YUKON_MCAH3, 0); - SK_YU_WRITE_2(sc_if, YUKON_MCAH4, 0); - break; - } - - /* Now program new ones. */ - if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { - hashes[0] = 0xFFFFFFFF; - hashes[1] = 0xFFFFFFFF; - } else { - i = 1; - TAILQ_FOREACH_REVERSE(ifma, &ifp->if_multiaddrs, ifmultihead, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - /* - * Program the first XM_RXFILT_MAX multicast groups - * into the perfect filter. For all others, - * use the hash table. - */ - if (sc->sk_type == SK_GENESIS && i < XM_RXFILT_MAX) { - sk_setfilt(sc_if, - LLADDR((struct sockaddr_dl *)ifma->ifma_addr), i); - i++; - continue; - } - - switch(sc->sk_type) { - case SK_GENESIS: - h = sk_xmchash( - LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - h = sk_gmchash( - LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); - break; - } - if (h < 32) - hashes[0] |= (1 << h); - else - hashes[1] |= (1 << (h - 32)); - } - } - - switch(sc->sk_type) { - case SK_GENESIS: - SK_XM_SETBIT_4(sc_if, XM_MODE, XM_MODE_RX_USE_HASH| - XM_MODE_RX_USE_PERFECT); - SK_XM_WRITE_4(sc_if, XM_MAR0, hashes[0]); - SK_XM_WRITE_4(sc_if, XM_MAR2, hashes[1]); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - SK_YU_WRITE_2(sc_if, YUKON_MCAH1, hashes[0] & 0xffff); - SK_YU_WRITE_2(sc_if, YUKON_MCAH2, (hashes[0] >> 16) & 0xffff); - SK_YU_WRITE_2(sc_if, YUKON_MCAH3, hashes[1] & 0xffff); - SK_YU_WRITE_2(sc_if, YUKON_MCAH4, (hashes[1] >> 16) & 0xffff); - break; - } - - return; -} - -static void -sk_setpromisc(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_softc *sc = sc_if->sk_softc; - struct ifnet *ifp = sc_if->sk_ifp; - - switch(sc->sk_type) { - case SK_GENESIS: - if (ifp->if_flags & IFF_PROMISC) { - SK_XM_SETBIT_4(sc_if, XM_MODE, XM_MODE_RX_PROMISC); - } else { - SK_XM_CLRBIT_4(sc_if, XM_MODE, XM_MODE_RX_PROMISC); - } - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - if (ifp->if_flags & IFF_PROMISC) { - SK_YU_CLRBIT_2(sc_if, YUKON_RCR, - YU_RCR_UFLEN | YU_RCR_MUFLEN); - } else { - SK_YU_SETBIT_2(sc_if, YUKON_RCR, - YU_RCR_UFLEN | YU_RCR_MUFLEN); - } - break; - } - - return; -} - -static int -sk_init_rx_ring(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_chain_data *cd = &sc_if->sk_cdata; - struct sk_ring_data *rd = sc_if->sk_rdata; - int i; - - bzero((char *)rd->sk_rx_ring, - sizeof(struct sk_rx_desc) * SK_RX_RING_CNT); - - for (i = 0; i < SK_RX_RING_CNT; i++) { - cd->sk_rx_chain[i].sk_desc = &rd->sk_rx_ring[i]; - if (sk_newbuf(sc_if, &cd->sk_rx_chain[i], NULL) == ENOBUFS) - return(ENOBUFS); - if (i == (SK_RX_RING_CNT - 1)) { - cd->sk_rx_chain[i].sk_next = - &cd->sk_rx_chain[0]; - rd->sk_rx_ring[i].sk_next = - vtophys(&rd->sk_rx_ring[0]); - } else { - cd->sk_rx_chain[i].sk_next = - &cd->sk_rx_chain[i + 1]; - rd->sk_rx_ring[i].sk_next = - vtophys(&rd->sk_rx_ring[i + 1]); - } - } - - sc_if->sk_cdata.sk_rx_prod = 0; - sc_if->sk_cdata.sk_rx_cons = 0; - - return(0); -} - -static void -sk_init_tx_ring(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_chain_data *cd = &sc_if->sk_cdata; - struct sk_ring_data *rd = sc_if->sk_rdata; - int i; - - bzero((char *)sc_if->sk_rdata->sk_tx_ring, - sizeof(struct sk_tx_desc) * SK_TX_RING_CNT); - - for (i = 0; i < SK_TX_RING_CNT; i++) { - cd->sk_tx_chain[i].sk_desc = &rd->sk_tx_ring[i]; - if (i == (SK_TX_RING_CNT - 1)) { - cd->sk_tx_chain[i].sk_next = - &cd->sk_tx_chain[0]; - rd->sk_tx_ring[i].sk_next = - vtophys(&rd->sk_tx_ring[0]); - } else { - cd->sk_tx_chain[i].sk_next = - &cd->sk_tx_chain[i + 1]; - rd->sk_tx_ring[i].sk_next = - vtophys(&rd->sk_tx_ring[i + 1]); - } - } - - sc_if->sk_cdata.sk_tx_prod = 0; - sc_if->sk_cdata.sk_tx_cons = 0; - sc_if->sk_cdata.sk_tx_cnt = 0; - - return; -} - -static int -sk_newbuf(sc_if, c, m) - struct sk_if_softc *sc_if; - struct sk_chain *c; - struct mbuf *m; -{ - struct mbuf *m_new = NULL; - struct sk_rx_desc *r; - - if (m == NULL) { - caddr_t *buf = NULL; - - MGETHDR(m_new, M_DONTWAIT, MT_DATA); - if (m_new == NULL) - return(ENOBUFS); - - /* Allocate the jumbo buffer */ - buf = sk_jalloc(sc_if); - if (buf == NULL) { - m_freem(m_new); -#ifdef SK_VERBOSE - printf("sk%d: jumbo allocation failed " - "-- packet dropped!\n", sc_if->sk_unit); -#endif - return(ENOBUFS); - } - - /* Attach the buffer to the mbuf */ - MEXTADD(m_new, buf, SK_JLEN, sk_jfree, - (struct sk_if_softc *)sc_if, 0, EXT_NET_DRV); - m_new->m_data = (void *)buf; - m_new->m_pkthdr.len = m_new->m_len = SK_JLEN; - } else { - /* - * We're re-using a previously allocated mbuf; - * be sure to re-init pointers and lengths to - * default values. - */ - m_new = m; - m_new->m_len = m_new->m_pkthdr.len = SK_JLEN; - m_new->m_data = m_new->m_ext.ext_buf; - } - - /* - * Adjust alignment so packet payload begins on a - * longword boundary. Mandatory for Alpha, useful on - * x86 too. - */ - m_adj(m_new, ETHER_ALIGN); - - r = c->sk_desc; - c->sk_mbuf = m_new; - r->sk_data_lo = vtophys(mtod(m_new, caddr_t)); - r->sk_ctl = m_new->m_len | SK_RXSTAT; - - return(0); -} - -/* - * Allocate jumbo buffer storage. The SysKonnect adapters support - * "jumbograms" (9K frames), although SysKonnect doesn't currently - * use them in their drivers. In order for us to use them, we need - * large 9K receive buffers, however standard mbuf clusters are only - * 2048 bytes in size. Consequently, we need to allocate and manage - * our own jumbo buffer pool. Fortunately, this does not require an - * excessive amount of additional code. - */ -static int -sk_alloc_jumbo_mem(sc_if) - struct sk_if_softc *sc_if; -{ - caddr_t ptr; - register int i; - struct sk_jpool_entry *entry; - - /* Grab a big chunk o' storage. */ - sc_if->sk_cdata.sk_jumbo_buf = contigmalloc(SK_JMEM, M_DEVBUF, - M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); - - if (sc_if->sk_cdata.sk_jumbo_buf == NULL) { - printf("sk%d: no memory for jumbo buffers!\n", sc_if->sk_unit); - return(ENOBUFS); - } - - mtx_init(&sc_if->sk_jlist_mtx, "sk_jlist_mtx", NULL, MTX_DEF); - - SLIST_INIT(&sc_if->sk_jfree_listhead); - SLIST_INIT(&sc_if->sk_jinuse_listhead); - - /* - * Now divide it up into 9K pieces and save the addresses - * in an array. - */ - ptr = sc_if->sk_cdata.sk_jumbo_buf; - for (i = 0; i < SK_JSLOTS; i++) { - sc_if->sk_cdata.sk_jslots[i] = ptr; - ptr += SK_JLEN; - entry = malloc(sizeof(struct sk_jpool_entry), - M_DEVBUF, M_NOWAIT); - if (entry == NULL) { - sk_free_jumbo_mem(sc_if); - sc_if->sk_cdata.sk_jumbo_buf = NULL; - printf("sk%d: no memory for jumbo " - "buffer queue!\n", sc_if->sk_unit); - return(ENOBUFS); - } - entry->slot = i; - SLIST_INSERT_HEAD(&sc_if->sk_jfree_listhead, - entry, jpool_entries); - } - - return(0); -} - -static void -sk_free_jumbo_mem(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_jpool_entry *entry; - - SK_JLIST_LOCK(sc_if); - - /* We cannot release external mbuf storage while in use. */ - if (!SLIST_EMPTY(&sc_if->sk_jinuse_listhead)) { - printf("sk%d: will leak jumbo buffer memory!\n", sc_if->sk_unit); - SK_JLIST_UNLOCK(sc_if); - return; - } - - while (!SLIST_EMPTY(&sc_if->sk_jfree_listhead)) { - entry = SLIST_FIRST(&sc_if->sk_jfree_listhead); - SLIST_REMOVE_HEAD(&sc_if->sk_jfree_listhead, jpool_entries); - free(entry, M_DEVBUF); - } - - SK_JLIST_UNLOCK(sc_if); - - mtx_destroy(&sc_if->sk_jlist_mtx); - - contigfree(sc_if->sk_cdata.sk_jumbo_buf, SK_JMEM, M_DEVBUF); - - return; -} - -/* - * Allocate a jumbo buffer. - */ -static void * -sk_jalloc(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_jpool_entry *entry; - - SK_JLIST_LOCK(sc_if); - - entry = SLIST_FIRST(&sc_if->sk_jfree_listhead); - - if (entry == NULL) { -#ifdef SK_VERBOSE - printf("sk%d: no free jumbo buffers\n", sc_if->sk_unit); -#endif - SK_JLIST_UNLOCK(sc_if); - return(NULL); - } - - SLIST_REMOVE_HEAD(&sc_if->sk_jfree_listhead, jpool_entries); - SLIST_INSERT_HEAD(&sc_if->sk_jinuse_listhead, entry, jpool_entries); - - SK_JLIST_UNLOCK(sc_if); - - return(sc_if->sk_cdata.sk_jslots[entry->slot]); -} - -/* - * Release a jumbo buffer. - */ -static void -sk_jfree(buf, args) - void *buf; - void *args; -{ - struct sk_if_softc *sc_if; - int i; - struct sk_jpool_entry *entry; - - /* Extract the softc struct pointer. */ - sc_if = (struct sk_if_softc *)args; - if (sc_if == NULL) - panic("sk_jfree: didn't get softc pointer!"); - - SK_JLIST_LOCK(sc_if); - - /* calculate the slot this buffer belongs to */ - i = ((vm_offset_t)buf - - (vm_offset_t)sc_if->sk_cdata.sk_jumbo_buf) / SK_JLEN; - - if ((i < 0) || (i >= SK_JSLOTS)) - panic("sk_jfree: asked to free buffer that we don't manage!"); - - entry = SLIST_FIRST(&sc_if->sk_jinuse_listhead); - if (entry == NULL) - panic("sk_jfree: buffer not in use!"); - entry->slot = i; - SLIST_REMOVE_HEAD(&sc_if->sk_jinuse_listhead, jpool_entries); - SLIST_INSERT_HEAD(&sc_if->sk_jfree_listhead, entry, jpool_entries); - if (SLIST_EMPTY(&sc_if->sk_jinuse_listhead)) - wakeup(sc_if); - - SK_JLIST_UNLOCK(sc_if); - return; -} - -/* - * Set media options. - */ -static int -sk_ifmedia_upd(ifp) - struct ifnet *ifp; -{ - struct sk_if_softc *sc_if = ifp->if_softc; - struct mii_data *mii; - - mii = device_get_softc(sc_if->sk_miibus); - sk_init(sc_if); - mii_mediachg(mii); - - return(0); -} - -/* - * Report current media status. - */ -static void -sk_ifmedia_sts(ifp, ifmr) - struct ifnet *ifp; - struct ifmediareq *ifmr; -{ - struct sk_if_softc *sc_if; - struct mii_data *mii; - - sc_if = ifp->if_softc; - mii = device_get_softc(sc_if->sk_miibus); - - mii_pollstat(mii); - ifmr->ifm_active = mii->mii_media_active; - ifmr->ifm_status = mii->mii_media_status; - - return; -} - -static int -sk_ioctl(ifp, command, data) - struct ifnet *ifp; - u_long command; - caddr_t data; -{ - struct sk_if_softc *sc_if = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *) data; - int error = 0; - struct mii_data *mii; - - switch(command) { - case SIOCSIFMTU: - if (ifr->ifr_mtu > SK_JUMBO_MTU) - error = EINVAL; - else { - ifp->if_mtu = ifr->ifr_mtu; - ifp->if_flags &= ~IFF_RUNNING; - sk_init(sc_if); - } - break; - case SIOCSIFFLAGS: - SK_IF_LOCK(sc_if); - if (ifp->if_flags & IFF_UP) { - if (ifp->if_flags & IFF_RUNNING) { - if ((ifp->if_flags ^ sc_if->sk_if_flags) - & IFF_PROMISC) { - sk_setpromisc(sc_if); - sk_setmulti(sc_if); - } - } else - sk_init(sc_if); - } else { - if (ifp->if_flags & IFF_RUNNING) - sk_stop(sc_if); - } - sc_if->sk_if_flags = ifp->if_flags; - SK_IF_UNLOCK(sc_if); - error = 0; - break; - case SIOCADDMULTI: - case SIOCDELMULTI: - if (ifp->if_flags & IFF_RUNNING) { - SK_IF_LOCK(sc_if); - sk_setmulti(sc_if); - SK_IF_UNLOCK(sc_if); - error = 0; - } - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: - mii = device_get_softc(sc_if->sk_miibus); - error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); - break; - default: - error = ether_ioctl(ifp, command, data); - break; - } - - return(error); -} - -/* - * Probe for a SysKonnect GEnesis chip. Check the PCI vendor and device - * IDs against our list and return a device name if we find a match. - */ -static int -skc_probe(dev) - device_t dev; -{ - struct sk_softc *sc; - struct sk_type *t = sk_devs; - - sc = device_get_softc(dev); - - while(t->sk_name != NULL) { - if ((pci_get_vendor(dev) == t->sk_vid) && - (pci_get_device(dev) == t->sk_did)) { - device_set_desc(dev, t->sk_name); - return (BUS_PROBE_DEFAULT); - } - t++; - } - - return(ENXIO); -} - -/* - * Force the GEnesis into reset, then bring it out of reset. - */ -static void -sk_reset(sc) - struct sk_softc *sc; -{ - CSR_WRITE_2(sc, SK_CSR, SK_CSR_SW_RESET); - CSR_WRITE_2(sc, SK_CSR, SK_CSR_MASTER_RESET); - if (SK_YUKON_FAMILY(sc->sk_type)) - CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_SET); - - DELAY(1000); - CSR_WRITE_2(sc, SK_CSR, SK_CSR_SW_UNRESET); - DELAY(2); - CSR_WRITE_2(sc, SK_CSR, SK_CSR_MASTER_UNRESET); - if (SK_YUKON_FAMILY(sc->sk_type)) - CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_CLEAR); - - if (sc->sk_type == SK_GENESIS) { - /* Configure packet arbiter */ - sk_win_write_2(sc, SK_PKTARB_CTL, SK_PKTARBCTL_UNRESET); - sk_win_write_2(sc, SK_RXPA1_TINIT, SK_PKTARB_TIMEOUT); - sk_win_write_2(sc, SK_TXPA1_TINIT, SK_PKTARB_TIMEOUT); - sk_win_write_2(sc, SK_RXPA2_TINIT, SK_PKTARB_TIMEOUT); - sk_win_write_2(sc, SK_TXPA2_TINIT, SK_PKTARB_TIMEOUT); - } - - /* Enable RAM interface */ - sk_win_write_4(sc, SK_RAMCTL, SK_RAMCTL_UNRESET); - - /* - * Configure interrupt moderation. The moderation timer - * defers interrupts specified in the interrupt moderation - * timer mask based on the timeout specified in the interrupt - * moderation timer init register. Each bit in the timer - * register represents 18.825ns, so to specify a timeout in - * microseconds, we have to multiply by 54. - */ - printf("skc%d: interrupt moderation is %d us\n", - sc->sk_unit, sc->sk_int_mod); - sk_win_write_4(sc, SK_IMTIMERINIT, SK_IM_USECS(sc->sk_int_mod)); - sk_win_write_4(sc, SK_IMMR, SK_ISR_TX1_S_EOF|SK_ISR_TX2_S_EOF| - SK_ISR_RX1_EOF|SK_ISR_RX2_EOF); - sk_win_write_1(sc, SK_IMTIMERCTL, SK_IMCTL_START); - - return; -} - -static int -sk_probe(dev) - device_t dev; -{ - struct sk_softc *sc; - - sc = device_get_softc(device_get_parent(dev)); - - /* - * Not much to do here. We always know there will be - * at least one XMAC present, and if there are two, - * skc_attach() will create a second device instance - * for us. - */ - switch (sc->sk_type) { - case SK_GENESIS: - device_set_desc(dev, "XaQti Corp. XMAC II"); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - device_set_desc(dev, "Marvell Semiconductor, Inc. Yukon"); - break; - } - - return (BUS_PROBE_DEFAULT); -} - -/* - * Each XMAC chip is attached as a separate logical IP interface. - * Single port cards will have only one logical interface of course. - */ -static int -sk_attach(dev) - device_t dev; -{ - struct sk_softc *sc; - struct sk_if_softc *sc_if; - struct ifnet *ifp; - int i, port, error; - u_char eaddr[6]; - - if (dev == NULL) - return(EINVAL); - - error = 0; - sc_if = device_get_softc(dev); - sc = device_get_softc(device_get_parent(dev)); - port = *(int *)device_get_ivars(dev); - - sc_if->sk_dev = dev; - sc_if->sk_unit = device_get_unit(dev); - sc_if->sk_port = port; - sc_if->sk_softc = sc; - sc->sk_if[port] = sc_if; - if (port == SK_PORT_A) - sc_if->sk_tx_bmu = SK_BMU_TXS_CSR0; - if (port == SK_PORT_B) - sc_if->sk_tx_bmu = SK_BMU_TXS_CSR1; - - /* Allocate the descriptor queues. */ - sc_if->sk_rdata = contigmalloc(sizeof(struct sk_ring_data), M_DEVBUF, - M_NOWAIT, M_ZERO, 0xffffffff, PAGE_SIZE, 0); - - if (sc_if->sk_rdata == NULL) { - printf("sk%d: no memory for list buffers!\n", sc_if->sk_unit); - error = ENOMEM; - goto fail; - } - - /* Try to allocate memory for jumbo buffers. */ - if (sk_alloc_jumbo_mem(sc_if)) { - printf("sk%d: jumbo buffer allocation failed\n", - sc_if->sk_unit); - error = ENOMEM; - goto fail; - } - - ifp = sc_if->sk_ifp = if_alloc(IFT_ETHER); - if (ifp == NULL) { - printf("sk%d: can not if_alloc()\n", sc_if->sk_unit); - error = ENOSPC; - goto fail; - } - ifp->if_softc = sc_if; - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - ifp->if_mtu = ETHERMTU; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - ifp->if_ioctl = sk_ioctl; - ifp->if_start = sk_start; - ifp->if_watchdog = sk_watchdog; - ifp->if_init = sk_init; - ifp->if_baudrate = 1000000000; - IFQ_SET_MAXLEN(&ifp->if_snd, SK_TX_RING_CNT - 1); - ifp->if_snd.ifq_drv_maxlen = SK_TX_RING_CNT - 1; - IFQ_SET_READY(&ifp->if_snd); - - callout_handle_init(&sc_if->sk_tick_ch); - - /* - * Get station address for this interface. Note that - * dual port cards actually come with three station - * addresses: one for each port, plus an extra. The - * extra one is used by the SysKonnect driver software - * as a 'virtual' station address for when both ports - * are operating in failover mode. Currently we don't - * use this extra address. - */ - SK_LOCK(sc); - for (i = 0; i < ETHER_ADDR_LEN; i++) - eaddr[i] = - sk_win_read_1(sc, SK_MAC0_0 + (port * 8) + i); - - /* - * Set up RAM buffer addresses. The NIC will have a certain - * amount of SRAM on it, somewhere between 512K and 2MB. We - * need to divide this up a) between the transmitter and - * receiver and b) between the two XMACs, if this is a - * dual port NIC. Our algotithm is to divide up the memory - * evenly so that everyone gets a fair share. - */ - if (sk_win_read_1(sc, SK_CONFIG) & SK_CONFIG_SINGLEMAC) { - u_int32_t chunk, val; - - chunk = sc->sk_ramsize / 2; - val = sc->sk_rboff / sizeof(u_int64_t); - sc_if->sk_rx_ramstart = val; - val += (chunk / sizeof(u_int64_t)); - sc_if->sk_rx_ramend = val - 1; - sc_if->sk_tx_ramstart = val; - val += (chunk / sizeof(u_int64_t)); - sc_if->sk_tx_ramend = val - 1; - } else { - u_int32_t chunk, val; - - chunk = sc->sk_ramsize / 4; - val = (sc->sk_rboff + (chunk * 2 * sc_if->sk_port)) / - sizeof(u_int64_t); - sc_if->sk_rx_ramstart = val; - val += (chunk / sizeof(u_int64_t)); - sc_if->sk_rx_ramend = val - 1; - sc_if->sk_tx_ramstart = val; - val += (chunk / sizeof(u_int64_t)); - sc_if->sk_tx_ramend = val - 1; - } - - /* Read and save PHY type and set PHY address */ - sc_if->sk_phytype = sk_win_read_1(sc, SK_EPROM1) & 0xF; - switch(sc_if->sk_phytype) { - case SK_PHYTYPE_XMAC: - sc_if->sk_phyaddr = SK_PHYADDR_XMAC; - break; - case SK_PHYTYPE_BCOM: - sc_if->sk_phyaddr = SK_PHYADDR_BCOM; - break; - case SK_PHYTYPE_MARV_COPPER: - sc_if->sk_phyaddr = SK_PHYADDR_MARV; - break; - default: - printf("skc%d: unsupported PHY type: %d\n", - sc->sk_unit, sc_if->sk_phytype); - error = ENODEV; - SK_UNLOCK(sc); - if_free(ifp); - goto fail; - } - - - /* - * Call MI attach routine. Can't hold locks when calling into ether_*. - */ - SK_UNLOCK(sc); - ether_ifattach(ifp, eaddr); - SK_LOCK(sc); - - /* - * Do miibus setup. - */ - switch (sc->sk_type) { - case SK_GENESIS: - sk_init_xmac(sc_if); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - sk_init_yukon(sc_if); - break; - } - - SK_UNLOCK(sc); - if (mii_phy_probe(dev, &sc_if->sk_miibus, - sk_ifmedia_upd, sk_ifmedia_sts)) { - printf("skc%d: no PHY found!\n", sc_if->sk_unit); - ether_ifdetach(ifp); - if_free(ifp); - error = ENXIO; - goto fail; - } - -fail: - if (error) { - /* Access should be ok even though lock has been dropped */ - sc->sk_if[port] = NULL; - sk_detach(dev); - } - - return(error); -} - -/* - * Attach the interface. Allocate softc structures, do ifmedia - * setup and ethernet/BPF attach. - */ -static int -skc_attach(dev) - device_t dev; -{ - struct sk_softc *sc; - int unit, error = 0, rid, *port; - uint8_t skrs; - char *pname, *revstr; - - sc = device_get_softc(dev); - unit = device_get_unit(dev); - - mtx_init(&sc->sk_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, - MTX_DEF | MTX_RECURSE); - /* - * Map control/status registers. - */ - pci_enable_busmaster(dev); - - rid = SK_RID; - sc->sk_res = bus_alloc_resource_any(dev, SK_RES, &rid, RF_ACTIVE); - - if (sc->sk_res == NULL) { - printf("sk%d: couldn't map ports/memory\n", unit); - error = ENXIO; - goto fail; - } - - sc->sk_btag = rman_get_bustag(sc->sk_res); - sc->sk_bhandle = rman_get_bushandle(sc->sk_res); - - sc->sk_type = sk_win_read_1(sc, SK_CHIPVER); - sc->sk_rev = (sk_win_read_1(sc, SK_CONFIG) >> 4) & 0xf; - - /* Bail out if chip is not recognized. */ - if (sc->sk_type != SK_GENESIS && !SK_YUKON_FAMILY(sc->sk_type)) { - printf("skc%d: unknown device: chipver=%02x, rev=%x\n", - unit, sc->sk_type, sc->sk_rev); - error = ENXIO; - goto fail; - } - - /* Allocate interrupt */ - rid = 0; - sc->sk_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->sk_irq == NULL) { - printf("skc%d: couldn't map interrupt\n", unit); - error = ENXIO; - goto fail; - } - - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "int_mod", CTLTYPE_INT|CTLFLAG_RW, - &sc->sk_int_mod, 0, sysctl_hw_sk_int_mod, "I", - "SK interrupt moderation"); - - /* Pull in device tunables. */ - sc->sk_int_mod = SK_IM_DEFAULT; - error = resource_int_value(device_get_name(dev), unit, - "int_mod", &sc->sk_int_mod); - if (error == 0) { - if (sc->sk_int_mod < SK_IM_MIN || - sc->sk_int_mod > SK_IM_MAX) { - printf("skc%d: int_mod value out of range; " - "using default: %d\n", unit, SK_IM_DEFAULT); - sc->sk_int_mod = SK_IM_DEFAULT; - } - } - - /* Reset the adapter. */ - sk_reset(sc); - - sc->sk_unit = unit; - - /* Read and save vital product data from EEPROM. */ - sk_vpd_read(sc); - - skrs = sk_win_read_1(sc, SK_EPROM0); - if (sc->sk_type == SK_GENESIS) { - /* Read and save RAM size and RAMbuffer offset */ - switch(skrs) { - case SK_RAMSIZE_512K_64: - sc->sk_ramsize = 0x80000; - sc->sk_rboff = SK_RBOFF_0; - break; - case SK_RAMSIZE_1024K_64: - sc->sk_ramsize = 0x100000; - sc->sk_rboff = SK_RBOFF_80000; - break; - case SK_RAMSIZE_1024K_128: - sc->sk_ramsize = 0x100000; - sc->sk_rboff = SK_RBOFF_0; - break; - case SK_RAMSIZE_2048K_128: - sc->sk_ramsize = 0x200000; - sc->sk_rboff = SK_RBOFF_0; - break; - default: - printf("skc%d: unknown ram size: %d\n", - sc->sk_unit, sk_win_read_1(sc, SK_EPROM0)); - error = ENXIO; - goto fail; - } - } else { /* SK_YUKON_FAMILY */ - if (skrs == 0x00) - sc->sk_ramsize = 0x20000; - else - sc->sk_ramsize = skrs * (1<<12); - sc->sk_rboff = SK_RBOFF_0; - } - - /* Read and save physical media type */ - switch(sk_win_read_1(sc, SK_PMDTYPE)) { - case SK_PMD_1000BASESX: - sc->sk_pmd = IFM_1000_SX; - break; - case SK_PMD_1000BASELX: - sc->sk_pmd = IFM_1000_LX; - break; - case SK_PMD_1000BASECX: - sc->sk_pmd = IFM_1000_CX; - break; - case SK_PMD_1000BASETX: - sc->sk_pmd = IFM_1000_T; - break; - default: - printf("skc%d: unknown media type: 0x%x\n", - sc->sk_unit, sk_win_read_1(sc, SK_PMDTYPE)); - error = ENXIO; - goto fail; - } - - /* Determine whether to name it with VPD PN or just make it up. - * Marvell Yukon VPD PN seems to freqently be bogus. */ - switch (pci_get_device(dev)) { - case DEVICEID_SK_V1: - case DEVICEID_BELKIN_5005: - case DEVICEID_3COM_3C940: - case DEVICEID_LINKSYS_EG1032: - case DEVICEID_DLINK_DGE530T: - /* Stay with VPD PN. */ - pname = sc->sk_vpd_prodname; - break; - case DEVICEID_SK_V2: - /* YUKON VPD PN might bear no resemblance to reality. */ - switch (sc->sk_type) { - case SK_GENESIS: - /* Stay with VPD PN. */ - pname = sc->sk_vpd_prodname; - break; - case SK_YUKON: - pname = "Marvell Yukon Gigabit Ethernet"; - break; - case SK_YUKON_LITE: - pname = "Marvell Yukon Lite Gigabit Ethernet"; - break; - case SK_YUKON_LP: - pname = "Marvell Yukon LP Gigabit Ethernet"; - break; - default: - pname = "Marvell Yukon (Unknown) Gigabit Ethernet"; - break; - } - - /* Yukon Lite Rev. A0 needs special test. */ - if (sc->sk_type == SK_YUKON || sc->sk_type == SK_YUKON_LP) { - u_int32_t far; - u_int8_t testbyte; - - /* Save flash address register before testing. */ - far = sk_win_read_4(sc, SK_EP_ADDR); - - sk_win_write_1(sc, SK_EP_ADDR+0x03, 0xff); - testbyte = sk_win_read_1(sc, SK_EP_ADDR+0x03); - - if (testbyte != 0x00) { - /* Yukon Lite Rev. A0 detected. */ - sc->sk_type = SK_YUKON_LITE; - sc->sk_rev = SK_YUKON_LITE_REV_A0; - /* Restore flash address register. */ - sk_win_write_4(sc, SK_EP_ADDR, far); - } - } - break; - default: - device_printf(dev, "unknown device: vendor=%04x, device=%04x, " - "chipver=%02x, rev=%x\n", - pci_get_vendor(dev), pci_get_device(dev), - sc->sk_type, sc->sk_rev); - error = ENXIO; - goto fail; - } - - if (sc->sk_type == SK_YUKON_LITE) { - switch (sc->sk_rev) { - case SK_YUKON_LITE_REV_A0: - revstr = "A0"; - break; - case SK_YUKON_LITE_REV_A1: - revstr = "A1"; - break; - case SK_YUKON_LITE_REV_A3: - revstr = "A3"; - break; - default: - revstr = ""; - break; - } - } else { - revstr = ""; - } - - /* Announce the product name and more VPD data if there. */ - device_printf(dev, "%s rev. %s(0x%x)\n", - pname != NULL ? pname : "<unknown>", revstr, sc->sk_rev); - - if (bootverbose) { - if (sc->sk_vpd_readonly != NULL && - sc->sk_vpd_readonly_len != 0) { - char buf[256]; - char *dp = sc->sk_vpd_readonly; - uint16_t l, len = sc->sk_vpd_readonly_len; - - while (len >= 3) { - if ((*dp == 'P' && *(dp+1) == 'N') || - (*dp == 'E' && *(dp+1) == 'C') || - (*dp == 'M' && *(dp+1) == 'N') || - (*dp == 'S' && *(dp+1) == 'N')) { - l = 0; - while (l < *(dp+2)) { - buf[l] = *(dp+3+l); - ++l; - } - buf[l] = '\0'; - device_printf(dev, "%c%c: %s\n", - *dp, *(dp+1), buf); - len -= (3 + l); - dp += (3 + l); - } else { - len -= (3 + *(dp+2)); - dp += (3 + *(dp+2)); - } - } - } - device_printf(dev, "chip ver = 0x%02x\n", sc->sk_type); - device_printf(dev, "chip rev = 0x%02x\n", sc->sk_rev); - device_printf(dev, "SK_EPROM0 = 0x%02x\n", skrs); - device_printf(dev, "SRAM size = 0x%06x\n", sc->sk_ramsize); - } - - sc->sk_devs[SK_PORT_A] = device_add_child(dev, "sk", -1); - if (sc->sk_devs[SK_PORT_A] == NULL) { - device_printf(dev, "failed to add child for PORT_A\n"); - error = ENXIO; - goto fail; - } - port = malloc(sizeof(int), M_DEVBUF, M_NOWAIT); - if (port == NULL) { - device_printf(dev, "failed to allocate memory for " - "ivars of PORT_A\n"); - error = ENXIO; - goto fail; - } - *port = SK_PORT_A; - device_set_ivars(sc->sk_devs[SK_PORT_A], port); - - if (!(sk_win_read_1(sc, SK_CONFIG) & SK_CONFIG_SINGLEMAC)) { - sc->sk_devs[SK_PORT_B] = device_add_child(dev, "sk", -1); - if (sc->sk_devs[SK_PORT_B] == NULL) { - device_printf(dev, "failed to add child for PORT_B\n"); - error = ENXIO; - goto fail; - } - port = malloc(sizeof(int), M_DEVBUF, M_NOWAIT); - if (port == NULL) { - device_printf(dev, "failed to allocate memory for " - "ivars of PORT_B\n"); - error = ENXIO; - goto fail; - } - *port = SK_PORT_B; - device_set_ivars(sc->sk_devs[SK_PORT_B], port); - } - - /* Turn on the 'driver is loaded' LED. */ - CSR_WRITE_2(sc, SK_LED, SK_LED_GREEN_ON); - - bus_generic_attach(dev); - - /* Hook interrupt last to avoid having to lock softc */ - error = bus_setup_intr(dev, sc->sk_irq, INTR_TYPE_NET|INTR_MPSAFE, - sk_intr, sc, &sc->sk_intrhand); - - if (error) { - printf("skc%d: couldn't set up irq\n", unit); - goto fail; - } - -fail: - if (error) - skc_detach(dev); - - return(error); -} - -/* - * Shutdown hardware and free up resources. This can be called any - * time after the mutex has been initialized. It is called in both - * the error case in attach and the normal detach case so it needs - * to be careful about only freeing resources that have actually been - * allocated. - */ -static int -sk_detach(dev) - device_t dev; -{ - struct sk_if_softc *sc_if; - struct ifnet *ifp; - - sc_if = device_get_softc(dev); - KASSERT(mtx_initialized(&sc_if->sk_softc->sk_mtx), - ("sk mutex not initialized in sk_detach")); - SK_IF_LOCK(sc_if); - - ifp = sc_if->sk_ifp; - /* These should only be active if attach_xmac succeeded */ - if (device_is_attached(dev)) { - sk_stop(sc_if); - /* Can't hold locks while calling detach */ - SK_IF_UNLOCK(sc_if); - ether_ifdetach(ifp); - if_free(ifp); - SK_IF_LOCK(sc_if); - } - /* - * We're generally called from skc_detach() which is using - * device_delete_child() to get to here. It's already trashed - * miibus for us, so don't do it here or we'll panic. - */ - /* - if (sc_if->sk_miibus != NULL) - device_delete_child(dev, sc_if->sk_miibus); - */ - bus_generic_detach(dev); - if (sc_if->sk_cdata.sk_jumbo_buf != NULL) - sk_free_jumbo_mem(sc_if); - if (sc_if->sk_rdata != NULL) { - contigfree(sc_if->sk_rdata, sizeof(struct sk_ring_data), - M_DEVBUF); - } - SK_IF_UNLOCK(sc_if); - - return(0); -} - -static int -skc_detach(dev) - device_t dev; -{ - struct sk_softc *sc; - - sc = device_get_softc(dev); - KASSERT(mtx_initialized(&sc->sk_mtx), ("sk mutex not initialized")); - - if (device_is_alive(dev)) { - if (sc->sk_devs[SK_PORT_A] != NULL) { - free(device_get_ivars(sc->sk_devs[SK_PORT_A]), M_DEVBUF); - device_delete_child(dev, sc->sk_devs[SK_PORT_A]); - } - if (sc->sk_devs[SK_PORT_B] != NULL) { - free(device_get_ivars(sc->sk_devs[SK_PORT_B]), M_DEVBUF); - device_delete_child(dev, sc->sk_devs[SK_PORT_B]); - } - bus_generic_detach(dev); - } - - if (sc->sk_vpd_prodname != NULL) - free(sc->sk_vpd_prodname, M_DEVBUF); - if (sc->sk_vpd_readonly != NULL) - free(sc->sk_vpd_readonly, M_DEVBUF); - - if (sc->sk_intrhand) - bus_teardown_intr(dev, sc->sk_irq, sc->sk_intrhand); - if (sc->sk_irq) - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sk_irq); - if (sc->sk_res) - bus_release_resource(dev, SK_RES, SK_RID, sc->sk_res); - - mtx_destroy(&sc->sk_mtx); - - return(0); -} - -static int -sk_encap(sc_if, m_head, txidx) - struct sk_if_softc *sc_if; - struct mbuf *m_head; - u_int32_t *txidx; -{ - struct sk_tx_desc *f = NULL; - struct mbuf *m; - u_int32_t frag, cur, cnt = 0; - - SK_IF_LOCK_ASSERT(sc_if); - - m = m_head; - cur = frag = *txidx; - - /* - * Start packing the mbufs in this chain into - * the fragment pointers. Stop when we run out - * of fragments or hit the end of the mbuf chain. - */ - for (m = m_head; m != NULL; m = m->m_next) { - if (m->m_len != 0) { - if ((SK_TX_RING_CNT - - (sc_if->sk_cdata.sk_tx_cnt + cnt)) < 2) - return(ENOBUFS); - f = &sc_if->sk_rdata->sk_tx_ring[frag]; - f->sk_data_lo = vtophys(mtod(m, vm_offset_t)); - f->sk_ctl = m->m_len | SK_OPCODE_DEFAULT; - if (cnt == 0) - f->sk_ctl |= SK_TXCTL_FIRSTFRAG; - else - f->sk_ctl |= SK_TXCTL_OWN; - cur = frag; - SK_INC(frag, SK_TX_RING_CNT); - cnt++; - } - } - - if (m != NULL) - return(ENOBUFS); - - sc_if->sk_rdata->sk_tx_ring[cur].sk_ctl |= - SK_TXCTL_LASTFRAG|SK_TXCTL_EOF_INTR; - sc_if->sk_cdata.sk_tx_chain[cur].sk_mbuf = m_head; - sc_if->sk_rdata->sk_tx_ring[*txidx].sk_ctl |= SK_TXCTL_OWN; - sc_if->sk_cdata.sk_tx_cnt += cnt; - - *txidx = frag; - - return(0); -} - -static void -sk_start(ifp) - struct ifnet *ifp; -{ - struct sk_softc *sc; - struct sk_if_softc *sc_if; - struct mbuf *m_head = NULL; - u_int32_t idx; - - sc_if = ifp->if_softc; - sc = sc_if->sk_softc; - - SK_IF_LOCK(sc_if); - - idx = sc_if->sk_cdata.sk_tx_prod; - - while(sc_if->sk_cdata.sk_tx_chain[idx].sk_mbuf == NULL) { - IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); - if (m_head == NULL) - break; - - /* - * Pack the data into the transmit ring. If we - * don't have room, set the OACTIVE flag and wait - * for the NIC to drain the ring. - */ - if (sk_encap(sc_if, m_head, &idx)) { - IFQ_DRV_PREPEND(&ifp->if_snd, m_head); - ifp->if_flags |= IFF_OACTIVE; - break; - } - - /* - * If there's a BPF listener, bounce a copy of this frame - * to him. - */ - BPF_MTAP(ifp, m_head); - } - - /* Transmit */ - if (idx != sc_if->sk_cdata.sk_tx_prod) { - sc_if->sk_cdata.sk_tx_prod = idx; - CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_START); - - /* Set a timeout in case the chip goes out to lunch. */ - ifp->if_timer = 5; - } - SK_IF_UNLOCK(sc_if); - - return; -} - - -static void -sk_watchdog(ifp) - struct ifnet *ifp; -{ - struct sk_if_softc *sc_if; - - sc_if = ifp->if_softc; - - printf("sk%d: watchdog timeout\n", sc_if->sk_unit); - ifp->if_flags &= ~IFF_RUNNING; - sk_init(sc_if); - - return; -} - -static void -skc_shutdown(dev) - device_t dev; -{ - struct sk_softc *sc; - - sc = device_get_softc(dev); - SK_LOCK(sc); - - /* Turn off the 'driver is loaded' LED. */ - CSR_WRITE_2(sc, SK_LED, SK_LED_GREEN_OFF); - - /* - * Reset the GEnesis controller. Doing this should also - * assert the resets on the attached XMAC(s). - */ - sk_reset(sc); - SK_UNLOCK(sc); - - return; -} - -static void -sk_rxeof(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_softc *sc; - struct mbuf *m; - struct ifnet *ifp; - struct sk_chain *cur_rx; - int total_len = 0; - int i; - u_int32_t rxstat; - - sc = sc_if->sk_softc; - ifp = sc_if->sk_ifp; - i = sc_if->sk_cdata.sk_rx_prod; - cur_rx = &sc_if->sk_cdata.sk_rx_chain[i]; - - SK_LOCK_ASSERT(sc); - - while(!(sc_if->sk_rdata->sk_rx_ring[i].sk_ctl & SK_RXCTL_OWN)) { - - cur_rx = &sc_if->sk_cdata.sk_rx_chain[i]; - rxstat = sc_if->sk_rdata->sk_rx_ring[i].sk_xmac_rxstat; - m = cur_rx->sk_mbuf; - cur_rx->sk_mbuf = NULL; - total_len = SK_RXBYTES(sc_if->sk_rdata->sk_rx_ring[i].sk_ctl); - SK_INC(i, SK_RX_RING_CNT); - - if (rxstat & XM_RXSTAT_ERRFRAME) { - ifp->if_ierrors++; - sk_newbuf(sc_if, cur_rx, m); - continue; - } - - /* - * Try to allocate a new jumbo buffer. If that - * fails, copy the packet to mbufs and put the - * jumbo buffer back in the ring so it can be - * re-used. If allocating mbufs fails, then we - * have to drop the packet. - */ - if (sk_newbuf(sc_if, cur_rx, NULL) == ENOBUFS) { - struct mbuf *m0; - m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, - ifp, NULL); - sk_newbuf(sc_if, cur_rx, m); - if (m0 == NULL) { - printf("sk%d: no receive buffers " - "available -- packet dropped!\n", - sc_if->sk_unit); - ifp->if_ierrors++; - continue; - } - m = m0; - } else { - m->m_pkthdr.rcvif = ifp; - m->m_pkthdr.len = m->m_len = total_len; - } - - ifp->if_ipackets++; - SK_UNLOCK(sc); - (*ifp->if_input)(ifp, m); - SK_LOCK(sc); - } - - sc_if->sk_cdata.sk_rx_prod = i; - - return; -} - -static void -sk_txeof(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_softc *sc; - struct sk_tx_desc *cur_tx; - struct ifnet *ifp; - u_int32_t idx; - - sc = sc_if->sk_softc; - ifp = sc_if->sk_ifp; - - /* - * Go through our tx ring and free mbufs for those - * frames that have been sent. - */ - idx = sc_if->sk_cdata.sk_tx_cons; - while(idx != sc_if->sk_cdata.sk_tx_prod) { - cur_tx = &sc_if->sk_rdata->sk_tx_ring[idx]; - if (cur_tx->sk_ctl & SK_TXCTL_OWN) - break; - if (cur_tx->sk_ctl & SK_TXCTL_LASTFRAG) - ifp->if_opackets++; - if (sc_if->sk_cdata.sk_tx_chain[idx].sk_mbuf != NULL) { - m_freem(sc_if->sk_cdata.sk_tx_chain[idx].sk_mbuf); - sc_if->sk_cdata.sk_tx_chain[idx].sk_mbuf = NULL; - } - sc_if->sk_cdata.sk_tx_cnt--; - SK_INC(idx, SK_TX_RING_CNT); - } - - if (sc_if->sk_cdata.sk_tx_cnt == 0) { - ifp->if_timer = 0; - } else /* nudge chip to keep tx ring moving */ - CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_START); - - if (sc_if->sk_cdata.sk_tx_cnt < SK_TX_RING_CNT - 2) - ifp->if_flags &= ~IFF_OACTIVE; - - sc_if->sk_cdata.sk_tx_cons = idx; -} - -static void -sk_tick(xsc_if) - void *xsc_if; -{ - struct sk_if_softc *sc_if; - struct mii_data *mii; - struct ifnet *ifp; - int i; - - sc_if = xsc_if; - SK_IF_LOCK(sc_if); - ifp = sc_if->sk_ifp; - mii = device_get_softc(sc_if->sk_miibus); - - if (!(ifp->if_flags & IFF_UP)) { - SK_IF_UNLOCK(sc_if); - return; - } - - if (sc_if->sk_phytype == SK_PHYTYPE_BCOM) { - sk_intr_bcom(sc_if); - SK_IF_UNLOCK(sc_if); - return; - } - - /* - * According to SysKonnect, the correct way to verify that - * the link has come back up is to poll bit 0 of the GPIO - * register three times. This pin has the signal from the - * link_sync pin connected to it; if we read the same link - * state 3 times in a row, we know the link is up. - */ - for (i = 0; i < 3; i++) { - if (SK_XM_READ_2(sc_if, XM_GPIO) & XM_GPIO_GP0_SET) - break; - } - - if (i != 3) { - sc_if->sk_tick_ch = timeout(sk_tick, sc_if, hz); - SK_IF_UNLOCK(sc_if); - return; - } - - /* Turn the GP0 interrupt back on. */ - SK_XM_CLRBIT_2(sc_if, XM_IMR, XM_IMR_GP0_SET); - SK_XM_READ_2(sc_if, XM_ISR); - mii_tick(mii); - untimeout(sk_tick, sc_if, sc_if->sk_tick_ch); - - SK_IF_UNLOCK(sc_if); - return; -} - -static void -sk_intr_bcom(sc_if) - struct sk_if_softc *sc_if; -{ - struct mii_data *mii; - struct ifnet *ifp; - int status; - mii = device_get_softc(sc_if->sk_miibus); - ifp = sc_if->sk_ifp; - - SK_XM_CLRBIT_2(sc_if, XM_MMUCMD, XM_MMUCMD_TX_ENB|XM_MMUCMD_RX_ENB); - - /* - * Read the PHY interrupt register to make sure - * we clear any pending interrupts. - */ - status = sk_xmac_miibus_readreg(sc_if, SK_PHYADDR_BCOM, BRGPHY_MII_ISR); - - if (!(ifp->if_flags & IFF_RUNNING)) { - sk_init_xmac(sc_if); - return; - } - - if (status & (BRGPHY_ISR_LNK_CHG|BRGPHY_ISR_AN_PR)) { - int lstat; - lstat = sk_xmac_miibus_readreg(sc_if, SK_PHYADDR_BCOM, - BRGPHY_MII_AUXSTS); - - if (!(lstat & BRGPHY_AUXSTS_LINK) && sc_if->sk_link) { - mii_mediachg(mii); - /* Turn off the link LED. */ - SK_IF_WRITE_1(sc_if, 0, - SK_LINKLED1_CTL, SK_LINKLED_OFF); - sc_if->sk_link = 0; - } else if (status & BRGPHY_ISR_LNK_CHG) { - sk_xmac_miibus_writereg(sc_if, SK_PHYADDR_BCOM, - BRGPHY_MII_IMR, 0xFF00); - mii_tick(mii); - sc_if->sk_link = 1; - /* Turn on the link LED. */ - SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, - SK_LINKLED_ON|SK_LINKLED_LINKSYNC_OFF| - SK_LINKLED_BLINK_OFF); - } else { - mii_tick(mii); - sc_if->sk_tick_ch = timeout(sk_tick, sc_if, hz); - } - } - - SK_XM_SETBIT_2(sc_if, XM_MMUCMD, XM_MMUCMD_TX_ENB|XM_MMUCMD_RX_ENB); - - return; -} - -static void -sk_intr_xmac(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_softc *sc; - u_int16_t status; - - sc = sc_if->sk_softc; - status = SK_XM_READ_2(sc_if, XM_ISR); - - /* - * Link has gone down. Start MII tick timeout to - * watch for link resync. - */ - if (sc_if->sk_phytype == SK_PHYTYPE_XMAC) { - if (status & XM_ISR_GP0_SET) { - SK_XM_SETBIT_2(sc_if, XM_IMR, XM_IMR_GP0_SET); - sc_if->sk_tick_ch = timeout(sk_tick, sc_if, hz); - } - - if (status & XM_ISR_AUTONEG_DONE) { - sc_if->sk_tick_ch = timeout(sk_tick, sc_if, hz); - } - } - - if (status & XM_IMR_TX_UNDERRUN) - SK_XM_SETBIT_4(sc_if, XM_MODE, XM_MODE_FLUSH_TXFIFO); - - if (status & XM_IMR_RX_OVERRUN) - SK_XM_SETBIT_4(sc_if, XM_MODE, XM_MODE_FLUSH_RXFIFO); - - status = SK_XM_READ_2(sc_if, XM_ISR); - - return; -} - -static void -sk_intr_yukon(sc_if) - struct sk_if_softc *sc_if; -{ - int status; - - status = SK_IF_READ_2(sc_if, 0, SK_GMAC_ISR); - - return; -} - -static void -sk_intr(xsc) - void *xsc; -{ - struct sk_softc *sc = xsc; - struct sk_if_softc *sc_if0 = NULL, *sc_if1 = NULL; - struct ifnet *ifp0 = NULL, *ifp1 = NULL; - u_int32_t status; - - SK_LOCK(sc); - - sc_if0 = sc->sk_if[SK_PORT_A]; - sc_if1 = sc->sk_if[SK_PORT_B]; - - if (sc_if0 != NULL) - ifp0 = sc_if0->sk_ifp; - if (sc_if1 != NULL) - ifp1 = sc_if1->sk_ifp; - - for (;;) { - status = CSR_READ_4(sc, SK_ISSR); - if (!(status & sc->sk_intrmask)) - break; - - /* Handle receive interrupts first. */ - if (status & SK_ISR_RX1_EOF) { - sk_rxeof(sc_if0); - CSR_WRITE_4(sc, SK_BMU_RX_CSR0, - SK_RXBMU_CLR_IRQ_EOF|SK_RXBMU_RX_START); - } - if (status & SK_ISR_RX2_EOF) { - sk_rxeof(sc_if1); - CSR_WRITE_4(sc, SK_BMU_RX_CSR1, - SK_RXBMU_CLR_IRQ_EOF|SK_RXBMU_RX_START); - } - - /* Then transmit interrupts. */ - if (status & SK_ISR_TX1_S_EOF) { - sk_txeof(sc_if0); - CSR_WRITE_4(sc, SK_BMU_TXS_CSR0, - SK_TXBMU_CLR_IRQ_EOF); - } - if (status & SK_ISR_TX2_S_EOF) { - sk_txeof(sc_if1); - CSR_WRITE_4(sc, SK_BMU_TXS_CSR1, - SK_TXBMU_CLR_IRQ_EOF); - } - - /* Then MAC interrupts. */ - if (status & SK_ISR_MAC1 && ifp0->if_flags & IFF_RUNNING) { - if (sc->sk_type == SK_GENESIS) - sk_intr_xmac(sc_if0); - else - sk_intr_yukon(sc_if0); - } - - if (status & SK_ISR_MAC2 && ifp1->if_flags & IFF_RUNNING) { - if (sc->sk_type == SK_GENESIS) - sk_intr_xmac(sc_if1); - else - sk_intr_yukon(sc_if1); - } - - if (status & SK_ISR_EXTERNAL_REG) { - if (ifp0 != NULL && - sc_if0->sk_phytype == SK_PHYTYPE_BCOM) - sk_intr_bcom(sc_if0); - if (ifp1 != NULL && - sc_if1->sk_phytype == SK_PHYTYPE_BCOM) - sk_intr_bcom(sc_if1); - } - } - - CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask); - - if (ifp0 != NULL && !IFQ_DRV_IS_EMPTY(&ifp0->if_snd)) - sk_start(ifp0); - if (ifp1 != NULL && !IFQ_DRV_IS_EMPTY(&ifp1->if_snd)) - sk_start(ifp1); - - SK_UNLOCK(sc); - - return; -} - -static void -sk_init_xmac(sc_if) - struct sk_if_softc *sc_if; -{ - struct sk_softc *sc; - struct ifnet *ifp; - struct sk_bcom_hack bhack[] = { - { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 }, - { 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 }, - { 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 }, - { 0, 0 } }; - - sc = sc_if->sk_softc; - ifp = sc_if->sk_ifp; - - /* Unreset the XMAC. */ - SK_IF_WRITE_2(sc_if, 0, SK_TXF1_MACCTL, SK_TXMACCTL_XMAC_UNRESET); - DELAY(1000); - - /* Reset the XMAC's internal state. */ - SK_XM_SETBIT_2(sc_if, XM_GPIO, XM_GPIO_RESETMAC); - - /* Save the XMAC II revision */ - sc_if->sk_xmac_rev = XM_XMAC_REV(SK_XM_READ_4(sc_if, XM_DEVID)); - - /* - * Perform additional initialization for external PHYs, - * namely for the 1000baseTX cards that use the XMAC's - * GMII mode. - */ - if (sc_if->sk_phytype == SK_PHYTYPE_BCOM) { - int i = 0; - u_int32_t val; - - /* Take PHY out of reset. */ - val = sk_win_read_4(sc, SK_GPIO); - if (sc_if->sk_port == SK_PORT_A) - val |= SK_GPIO_DIR0|SK_GPIO_DAT0; - else - val |= SK_GPIO_DIR2|SK_GPIO_DAT2; - sk_win_write_4(sc, SK_GPIO, val); - - /* Enable GMII mode on the XMAC. */ - SK_XM_SETBIT_2(sc_if, XM_HWCFG, XM_HWCFG_GMIIMODE); - - sk_xmac_miibus_writereg(sc_if, SK_PHYADDR_BCOM, - BRGPHY_MII_BMCR, BRGPHY_BMCR_RESET); - DELAY(10000); - sk_xmac_miibus_writereg(sc_if, SK_PHYADDR_BCOM, - BRGPHY_MII_IMR, 0xFFF0); - - /* - * Early versions of the BCM5400 apparently have - * a bug that requires them to have their reserved - * registers initialized to some magic values. I don't - * know what the numbers do, I'm just the messenger. - */ - if (sk_xmac_miibus_readreg(sc_if, SK_PHYADDR_BCOM, 0x03) - == 0x6041) { - while(bhack[i].reg) { - sk_xmac_miibus_writereg(sc_if, SK_PHYADDR_BCOM, - bhack[i].reg, bhack[i].val); - i++; - } - } - } - - /* Set station address */ - SK_XM_WRITE_2(sc_if, XM_PAR0, - *(u_int16_t *)(&IFP2ENADDR(sc_if->sk_ifp)[0])); - SK_XM_WRITE_2(sc_if, XM_PAR1, - *(u_int16_t *)(&IFP2ENADDR(sc_if->sk_ifp)[2])); - SK_XM_WRITE_2(sc_if, XM_PAR2, - *(u_int16_t *)(&IFP2ENADDR(sc_if->sk_ifp)[4])); - SK_XM_SETBIT_4(sc_if, XM_MODE, XM_MODE_RX_USE_STATION); - - if (ifp->if_flags & IFF_BROADCAST) { - SK_XM_CLRBIT_4(sc_if, XM_MODE, XM_MODE_RX_NOBROAD); - } else { - SK_XM_SETBIT_4(sc_if, XM_MODE, XM_MODE_RX_NOBROAD); - } - - /* We don't need the FCS appended to the packet. */ - SK_XM_SETBIT_2(sc_if, XM_RXCMD, XM_RXCMD_STRIPFCS); - - /* We want short frames padded to 60 bytes. */ - SK_XM_SETBIT_2(sc_if, XM_TXCMD, XM_TXCMD_AUTOPAD); - - /* - * Enable the reception of all error frames. This is is - * a necessary evil due to the design of the XMAC. The - * XMAC's receive FIFO is only 8K in size, however jumbo - * frames can be up to 9000 bytes in length. When bad - * frame filtering is enabled, the XMAC's RX FIFO operates - * in 'store and forward' mode. For this to work, the - * entire frame has to fit into the FIFO, but that means - * that jumbo frames larger than 8192 bytes will be - * truncated. Disabling all bad frame filtering causes - * the RX FIFO to operate in streaming mode, in which - * case the XMAC will start transfering frames out of the - * RX FIFO as soon as the FIFO threshold is reached. - */ - SK_XM_SETBIT_4(sc_if, XM_MODE, XM_MODE_RX_BADFRAMES| - XM_MODE_RX_GIANTS|XM_MODE_RX_RUNTS|XM_MODE_RX_CRCERRS| - XM_MODE_RX_INRANGELEN); - - if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) - SK_XM_SETBIT_2(sc_if, XM_RXCMD, XM_RXCMD_BIGPKTOK); - else - SK_XM_CLRBIT_2(sc_if, XM_RXCMD, XM_RXCMD_BIGPKTOK); - - /* - * Bump up the transmit threshold. This helps hold off transmit - * underruns when we're blasting traffic from both ports at once. - */ - SK_XM_WRITE_2(sc_if, XM_TX_REQTHRESH, SK_XM_TX_FIFOTHRESH); - - /* Set promiscuous mode */ - sk_setpromisc(sc_if); - - /* Set multicast filter */ - sk_setmulti(sc_if); - - /* Clear and enable interrupts */ - SK_XM_READ_2(sc_if, XM_ISR); - if (sc_if->sk_phytype == SK_PHYTYPE_XMAC) - SK_XM_WRITE_2(sc_if, XM_IMR, XM_INTRS); - else - SK_XM_WRITE_2(sc_if, XM_IMR, 0xFFFF); - - /* Configure MAC arbiter */ - switch(sc_if->sk_xmac_rev) { - case XM_XMAC_REV_B2: - sk_win_write_1(sc, SK_RCINIT_RX1, SK_RCINIT_XMAC_B2); - sk_win_write_1(sc, SK_RCINIT_TX1, SK_RCINIT_XMAC_B2); - sk_win_write_1(sc, SK_RCINIT_RX2, SK_RCINIT_XMAC_B2); - sk_win_write_1(sc, SK_RCINIT_TX2, SK_RCINIT_XMAC_B2); - sk_win_write_1(sc, SK_MINIT_RX1, SK_MINIT_XMAC_B2); - sk_win_write_1(sc, SK_MINIT_TX1, SK_MINIT_XMAC_B2); - sk_win_write_1(sc, SK_MINIT_RX2, SK_MINIT_XMAC_B2); - sk_win_write_1(sc, SK_MINIT_TX2, SK_MINIT_XMAC_B2); - sk_win_write_1(sc, SK_RECOVERY_CTL, SK_RECOVERY_XMAC_B2); - break; - case XM_XMAC_REV_C1: - sk_win_write_1(sc, SK_RCINIT_RX1, SK_RCINIT_XMAC_C1); - sk_win_write_1(sc, SK_RCINIT_TX1, SK_RCINIT_XMAC_C1); - sk_win_write_1(sc, SK_RCINIT_RX2, SK_RCINIT_XMAC_C1); - sk_win_write_1(sc, SK_RCINIT_TX2, SK_RCINIT_XMAC_C1); - sk_win_write_1(sc, SK_MINIT_RX1, SK_MINIT_XMAC_C1); - sk_win_write_1(sc, SK_MINIT_TX1, SK_MINIT_XMAC_C1); - sk_win_write_1(sc, SK_MINIT_RX2, SK_MINIT_XMAC_C1); - sk_win_write_1(sc, SK_MINIT_TX2, SK_MINIT_XMAC_C1); - sk_win_write_1(sc, SK_RECOVERY_CTL, SK_RECOVERY_XMAC_B2); - break; - default: - break; - } - sk_win_write_2(sc, SK_MACARB_CTL, - SK_MACARBCTL_UNRESET|SK_MACARBCTL_FASTOE_OFF); - - sc_if->sk_link = 1; - - return; -} - -static void -sk_init_yukon(sc_if) - struct sk_if_softc *sc_if; -{ - u_int32_t phy; - u_int16_t reg; - struct sk_softc *sc; - struct ifnet *ifp; - int i; - - sc = sc_if->sk_softc; - ifp = sc_if->sk_ifp; - - if (sc->sk_type == SK_YUKON_LITE && - sc->sk_rev == SK_YUKON_LITE_REV_A3) { - /* Take PHY out of reset. */ - sk_win_write_4(sc, SK_GPIO, - (sk_win_read_4(sc, SK_GPIO) | SK_GPIO_DIR9) & ~SK_GPIO_DAT9); - } - - /* GMAC and GPHY Reset */ - SK_IF_WRITE_4(sc_if, 0, SK_GPHY_CTRL, SK_GPHY_RESET_SET); - SK_IF_WRITE_4(sc_if, 0, SK_GMAC_CTRL, SK_GMAC_RESET_SET); - DELAY(1000); - SK_IF_WRITE_4(sc_if, 0, SK_GMAC_CTRL, SK_GMAC_RESET_CLEAR); - SK_IF_WRITE_4(sc_if, 0, SK_GMAC_CTRL, SK_GMAC_RESET_SET); - DELAY(1000); - - phy = SK_GPHY_INT_POL_HI | SK_GPHY_DIS_FC | SK_GPHY_DIS_SLEEP | - SK_GPHY_ENA_XC | SK_GPHY_ANEG_ALL | SK_GPHY_ENA_PAUSE; - - switch(sc_if->sk_softc->sk_pmd) { - case IFM_1000_SX: - case IFM_1000_LX: - phy |= SK_GPHY_FIBER; - break; - - case IFM_1000_CX: - case IFM_1000_T: - phy |= SK_GPHY_COPPER; - break; - } - - SK_IF_WRITE_4(sc_if, 0, SK_GPHY_CTRL, phy | SK_GPHY_RESET_SET); - DELAY(1000); - SK_IF_WRITE_4(sc_if, 0, SK_GPHY_CTRL, phy | SK_GPHY_RESET_CLEAR); - SK_IF_WRITE_4(sc_if, 0, SK_GMAC_CTRL, SK_GMAC_LOOP_OFF | - SK_GMAC_PAUSE_ON | SK_GMAC_RESET_CLEAR); - - /* unused read of the interrupt source register */ - SK_IF_READ_2(sc_if, 0, SK_GMAC_ISR); - - reg = SK_YU_READ_2(sc_if, YUKON_PAR); - - /* MIB Counter Clear Mode set */ - reg |= YU_PAR_MIB_CLR; - SK_YU_WRITE_2(sc_if, YUKON_PAR, reg); - - /* MIB Counter Clear Mode clear */ - reg &= ~YU_PAR_MIB_CLR; - SK_YU_WRITE_2(sc_if, YUKON_PAR, reg); - - /* receive control reg */ - SK_YU_WRITE_2(sc_if, YUKON_RCR, YU_RCR_CRCR); - - /* transmit parameter register */ - SK_YU_WRITE_2(sc_if, YUKON_TPR, YU_TPR_JAM_LEN(0x3) | - YU_TPR_JAM_IPG(0xb) | YU_TPR_JAM2DATA_IPG(0x1a) ); - - /* serial mode register */ - reg = YU_SMR_DATA_BLIND(0x1c) | YU_SMR_MFL_VLAN | YU_SMR_IPG_DATA(0x1e); - if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) - reg |= YU_SMR_MFL_JUMBO; - SK_YU_WRITE_2(sc_if, YUKON_SMR, reg); - - /* Setup Yukon's address */ - for (i = 0; i < 3; i++) { - /* Write Source Address 1 (unicast filter) */ - SK_YU_WRITE_2(sc_if, YUKON_SAL1 + i * 4, - IFP2ENADDR(sc_if->sk_ifp)[i * 2] | - IFP2ENADDR(sc_if->sk_ifp)[i * 2 + 1] << 8); - } - - for (i = 0; i < 3; i++) { - reg = sk_win_read_2(sc_if->sk_softc, - SK_MAC1_0 + i * 2 + sc_if->sk_port * 8); - SK_YU_WRITE_2(sc_if, YUKON_SAL2 + i * 4, reg); - } - - /* Set promiscuous mode */ - sk_setpromisc(sc_if); - - /* Set multicast filter */ - sk_setmulti(sc_if); - - /* enable interrupt mask for counter overflows */ - SK_YU_WRITE_2(sc_if, YUKON_TIMR, 0); - SK_YU_WRITE_2(sc_if, YUKON_RIMR, 0); - SK_YU_WRITE_2(sc_if, YUKON_TRIMR, 0); - - /* Configure RX MAC FIFO */ - SK_IF_WRITE_1(sc_if, 0, SK_RXMF1_CTRL_TEST, SK_RFCTL_RESET_CLEAR); - SK_IF_WRITE_4(sc_if, 0, SK_RXMF1_CTRL_TEST, SK_RFCTL_OPERATION_ON); - - /* Configure TX MAC FIFO */ - SK_IF_WRITE_1(sc_if, 0, SK_TXMF1_CTRL_TEST, SK_TFCTL_RESET_CLEAR); - SK_IF_WRITE_4(sc_if, 0, SK_TXMF1_CTRL_TEST, SK_TFCTL_OPERATION_ON); -} - -/* - * Note that to properly initialize any part of the GEnesis chip, - * you first have to take it out of reset mode. - */ -static void -sk_init(xsc) - void *xsc; -{ - struct sk_if_softc *sc_if = xsc; - struct sk_softc *sc; - struct ifnet *ifp; - struct mii_data *mii; - u_int16_t reg; - u_int32_t imr; - - SK_IF_LOCK(sc_if); - - ifp = sc_if->sk_ifp; - sc = sc_if->sk_softc; - mii = device_get_softc(sc_if->sk_miibus); - - if (ifp->if_flags & IFF_RUNNING) { - SK_IF_UNLOCK(sc_if); - return; - } - - /* Cancel pending I/O and free all RX/TX buffers. */ - sk_stop(sc_if); - - if (sc->sk_type == SK_GENESIS) { - /* Configure LINK_SYNC LED */ - SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, SK_LINKLED_ON); - SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, - SK_LINKLED_LINKSYNC_ON); - - /* Configure RX LED */ - SK_IF_WRITE_1(sc_if, 0, SK_RXLED1_CTL, - SK_RXLEDCTL_COUNTER_START); - - /* Configure TX LED */ - SK_IF_WRITE_1(sc_if, 0, SK_TXLED1_CTL, - SK_TXLEDCTL_COUNTER_START); - } - - /* Configure I2C registers */ - - /* Configure XMAC(s) */ - switch (sc->sk_type) { - case SK_GENESIS: - sk_init_xmac(sc_if); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - sk_init_yukon(sc_if); - break; - } - mii_mediachg(mii); - - if (sc->sk_type == SK_GENESIS) { - /* Configure MAC FIFOs */ - SK_IF_WRITE_4(sc_if, 0, SK_RXF1_CTL, SK_FIFO_UNRESET); - SK_IF_WRITE_4(sc_if, 0, SK_RXF1_END, SK_FIFO_END); - SK_IF_WRITE_4(sc_if, 0, SK_RXF1_CTL, SK_FIFO_ON); - - SK_IF_WRITE_4(sc_if, 0, SK_TXF1_CTL, SK_FIFO_UNRESET); - SK_IF_WRITE_4(sc_if, 0, SK_TXF1_END, SK_FIFO_END); - SK_IF_WRITE_4(sc_if, 0, SK_TXF1_CTL, SK_FIFO_ON); - } - - /* Configure transmit arbiter(s) */ - SK_IF_WRITE_1(sc_if, 0, SK_TXAR1_COUNTERCTL, - SK_TXARCTL_ON|SK_TXARCTL_FSYNC_ON); - - /* Configure RAMbuffers */ - SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_UNRESET); - SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_START, sc_if->sk_rx_ramstart); - SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_WR_PTR, sc_if->sk_rx_ramstart); - SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_RD_PTR, sc_if->sk_rx_ramstart); - SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_END, sc_if->sk_rx_ramend); - SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_ON); - - SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_CTLTST, SK_RBCTL_UNRESET); - SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_CTLTST, SK_RBCTL_STORENFWD_ON); - SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_START, sc_if->sk_tx_ramstart); - SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_WR_PTR, sc_if->sk_tx_ramstart); - SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_RD_PTR, sc_if->sk_tx_ramstart); - SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_END, sc_if->sk_tx_ramend); - SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_CTLTST, SK_RBCTL_ON); - - /* Configure BMUs */ - SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, SK_RXBMU_ONLINE); - SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_CURADDR_LO, - vtophys(&sc_if->sk_rdata->sk_rx_ring[0])); - SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_CURADDR_HI, 0); - - SK_IF_WRITE_4(sc_if, 1, SK_TXQS1_BMU_CSR, SK_TXBMU_ONLINE); - SK_IF_WRITE_4(sc_if, 1, SK_TXQS1_CURADDR_LO, - vtophys(&sc_if->sk_rdata->sk_tx_ring[0])); - SK_IF_WRITE_4(sc_if, 1, SK_TXQS1_CURADDR_HI, 0); - - /* Init descriptors */ - if (sk_init_rx_ring(sc_if) == ENOBUFS) { - printf("sk%d: initialization failed: no " - "memory for rx buffers\n", sc_if->sk_unit); - sk_stop(sc_if); - SK_IF_UNLOCK(sc_if); - return; - } - sk_init_tx_ring(sc_if); - - /* Set interrupt moderation if changed via sysctl. */ - /* SK_LOCK(sc); */ - imr = sk_win_read_4(sc, SK_IMTIMERINIT); - if (imr != SK_IM_USECS(sc->sk_int_mod)) { - sk_win_write_4(sc, SK_IMTIMERINIT, SK_IM_USECS(sc->sk_int_mod)); - printf("skc%d: interrupt moderation is %d us\n", - sc->sk_unit, sc->sk_int_mod); - } - /* SK_UNLOCK(sc); */ - - /* Configure interrupt handling */ - CSR_READ_4(sc, SK_ISSR); - if (sc_if->sk_port == SK_PORT_A) - sc->sk_intrmask |= SK_INTRS1; - else - sc->sk_intrmask |= SK_INTRS2; - - sc->sk_intrmask |= SK_ISR_EXTERNAL_REG; - - CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask); - - /* Start BMUs. */ - SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, SK_RXBMU_RX_START); - - switch(sc->sk_type) { - case SK_GENESIS: - /* Enable XMACs TX and RX state machines */ - SK_XM_CLRBIT_2(sc_if, XM_MMUCMD, XM_MMUCMD_IGNPAUSE); - SK_XM_SETBIT_2(sc_if, XM_MMUCMD, XM_MMUCMD_TX_ENB|XM_MMUCMD_RX_ENB); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - reg = SK_YU_READ_2(sc_if, YUKON_GPCR); - reg |= YU_GPCR_TXEN | YU_GPCR_RXEN; - reg &= ~(YU_GPCR_SPEED_EN | YU_GPCR_DPLX_EN); - SK_YU_WRITE_2(sc_if, YUKON_GPCR, reg); - } - - ifp->if_flags |= IFF_RUNNING; - ifp->if_flags &= ~IFF_OACTIVE; - - SK_IF_UNLOCK(sc_if); - - return; -} - -static void -sk_stop(sc_if) - struct sk_if_softc *sc_if; -{ - int i; - struct sk_softc *sc; - struct ifnet *ifp; - - SK_IF_LOCK(sc_if); - sc = sc_if->sk_softc; - ifp = sc_if->sk_ifp; - - untimeout(sk_tick, sc_if, sc_if->sk_tick_ch); - - if (sc_if->sk_phytype == SK_PHYTYPE_BCOM) { - u_int32_t val; - - /* Put PHY back into reset. */ - val = sk_win_read_4(sc, SK_GPIO); - if (sc_if->sk_port == SK_PORT_A) { - val |= SK_GPIO_DIR0; - val &= ~SK_GPIO_DAT0; - } else { - val |= SK_GPIO_DIR2; - val &= ~SK_GPIO_DAT2; - } - sk_win_write_4(sc, SK_GPIO, val); - } - - /* Turn off various components of this interface. */ - SK_XM_SETBIT_2(sc_if, XM_GPIO, XM_GPIO_RESETMAC); - switch (sc->sk_type) { - case SK_GENESIS: - SK_IF_WRITE_2(sc_if, 0, SK_TXF1_MACCTL, SK_TXMACCTL_XMAC_RESET); - SK_IF_WRITE_4(sc_if, 0, SK_RXF1_CTL, SK_FIFO_RESET); - break; - case SK_YUKON: - case SK_YUKON_LITE: - case SK_YUKON_LP: - SK_IF_WRITE_1(sc_if,0, SK_RXMF1_CTRL_TEST, SK_RFCTL_RESET_SET); - SK_IF_WRITE_1(sc_if,0, SK_TXMF1_CTRL_TEST, SK_TFCTL_RESET_SET); - break; - } - SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, SK_RXBMU_OFFLINE); - SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_RESET|SK_RBCTL_OFF); - SK_IF_WRITE_4(sc_if, 1, SK_TXQS1_BMU_CSR, SK_TXBMU_OFFLINE); - SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_CTLTST, SK_RBCTL_RESET|SK_RBCTL_OFF); - SK_IF_WRITE_1(sc_if, 0, SK_TXAR1_COUNTERCTL, SK_TXARCTL_OFF); - SK_IF_WRITE_1(sc_if, 0, SK_RXLED1_CTL, SK_RXLEDCTL_COUNTER_STOP); - SK_IF_WRITE_1(sc_if, 0, SK_TXLED1_CTL, SK_RXLEDCTL_COUNTER_STOP); - SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, SK_LINKLED_OFF); - SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, SK_LINKLED_LINKSYNC_OFF); - - /* Disable interrupts */ - if (sc_if->sk_port == SK_PORT_A) - sc->sk_intrmask &= ~SK_INTRS1; - else - sc->sk_intrmask &= ~SK_INTRS2; - CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask); - - SK_XM_READ_2(sc_if, XM_ISR); - SK_XM_WRITE_2(sc_if, XM_IMR, 0xFFFF); - - /* Free RX and TX mbufs still in the queues. */ - for (i = 0; i < SK_RX_RING_CNT; i++) { - if (sc_if->sk_cdata.sk_rx_chain[i].sk_mbuf != NULL) { - m_freem(sc_if->sk_cdata.sk_rx_chain[i].sk_mbuf); - sc_if->sk_cdata.sk_rx_chain[i].sk_mbuf = NULL; - } - } - - for (i = 0; i < SK_TX_RING_CNT; i++) { - if (sc_if->sk_cdata.sk_tx_chain[i].sk_mbuf != NULL) { - m_freem(sc_if->sk_cdata.sk_tx_chain[i].sk_mbuf); - sc_if->sk_cdata.sk_tx_chain[i].sk_mbuf = NULL; - } - } - - ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); - SK_IF_UNLOCK(sc_if); - return; -} - -static int -sysctl_int_range(SYSCTL_HANDLER_ARGS, int low, int high) -{ - int error, value; - - if (!arg1) - return (EINVAL); - value = *(int *)arg1; - error = sysctl_handle_int(oidp, &value, 0, req); - if (error || !req->newptr) - return (error); - if (value < low || value > high) - return (EINVAL); - *(int *)arg1 = value; - return (0); -} - -static int -sysctl_hw_sk_int_mod(SYSCTL_HANDLER_ARGS) -{ - return (sysctl_int_range(oidp, arg1, arg2, req, SK_IM_MIN, SK_IM_MAX)); -} diff --git a/sys/dev/sk/if_skreg.h b/sys/dev/sk/if_skreg.h deleted file mode 100644 index e8b6b8a..0000000 --- a/sys/dev/sk/if_skreg.h +++ /dev/null @@ -1,1499 +0,0 @@ -/* $OpenBSD: if_skreg.h,v 1.10 2003/08/12 05:23:06 nate Exp $ */ - -/*- - * Copyright (c) 1997, 1998, 1999, 2000 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/*- - * Copyright (c) 2003 Nathan L. Binkert <binkertn@umich.edu> - * - * Permission to use, copy, modify, and distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -/* Values to keep the different chip revisions apart (SK_CHIPVER). */ -#define SK_GENESIS 0x0A -#define SK_YUKON 0xB0 -#define SK_YUKON_LITE 0xB1 -#define SK_YUKON_LP 0xB2 -#define SK_YUKON_FAMILY(x) ((x) & 0xB0) - -/* Known revisions in SK_CONFIG. */ -#define SK_YUKON_LITE_REV_A0 0x0 /* invented, see test in skc_attach. */ -#define SK_YUKON_LITE_REV_A1 0x3 -#define SK_YUKON_LITE_REV_A3 0x7 - -/* - * SysKonnect PCI vendor ID - */ -#define VENDORID_SK 0x1148 - -/* - * Marvell PCI vendor ID - */ -#define VENDORID_MARVELL 0x11AB - -/* - * SK-NET gigabit ethernet device IDs - */ -#define DEVICEID_SK_V1 0x4300 -#define DEVICEID_SK_V2 0x4320 - -/* - * Belkin F5D5005 - */ -#define DEVICEID_BELKIN_5005 0x5005 - -/* - * 3Com PCI vendor ID - */ -#define VENDORID_3COM 0x10b7 - -/* - * 3Com gigabit ethernet device ID - */ -#define DEVICEID_3COM_3C940 0x1700 - -/* - * Linksys PCI vendor ID - */ -#define VENDORID_LINKSYS 0x1737 - -/* - * Linksys gigabit ethernet device ID - */ -#define DEVICEID_LINKSYS_EG1032 0x1032 - -/* - * D-Link PCI vendor ID - */ -#define VENDORID_DLINK 0x1186 - -/* - * D-Link gigabit ethernet device ID - */ -#define DEVICEID_DLINK_DGE530T 0x4c00 - -/* - * GEnesis registers. The GEnesis chip has a 256-byte I/O window - * but internally it has a 16K register space. This 16K space is - * divided into 128-byte blocks. The first 128 bytes of the I/O - * window represent the first block, which is permanently mapped - * at the start of the window. The other 127 blocks can be mapped - * to the second 128 bytes of the I/O window by setting the desired - * block value in the RAP register in block 0. Not all of the 127 - * blocks are actually used. Most registers are 32 bits wide, but - * there are a few 16-bit and 8-bit ones as well. - */ - - -/* Start of remappable register window. */ -#define SK_WIN_BASE 0x0080 - -/* Size of a window */ -#define SK_WIN_LEN 0x80 - -#define SK_WIN_MASK 0x3F80 -#define SK_REG_MASK 0x7F - -/* Compute the window of a given register (for the RAP register) */ -#define SK_WIN(reg) (((reg) & SK_WIN_MASK) / SK_WIN_LEN) - -/* Compute the relative offset of a register within the window */ -#define SK_REG(reg) ((reg) & SK_REG_MASK) - -#define SK_PORT_A 0 -#define SK_PORT_B 1 - -/* - * Compute offset of port-specific register. Since there are two - * ports, there are two of some GEnesis modules (e.g. two sets of - * DMA queues, two sets of FIFO control registers, etc...). Normally, - * the block for port 0 is at offset 0x0 and the block for port 1 is - * at offset 0x80 (i.e. the next page over). However for the transmit - * BMUs and RAMbuffers, there are two blocks for each port: one for - * the sync transmit queue and one for the async queue (which we don't - * use). However instead of ordering them like this: - * TX sync 1 / TX sync 2 / TX async 1 / TX async 2 - * SysKonnect has instead ordered them like this: - * TX sync 1 / TX async 1 / TX sync 2 / TX async 2 - * This means that when referencing the TX BMU and RAMbuffer registers, - * we have to double the block offset (0x80 * 2) in order to reach the - * second queue. This prevents us from using the same formula - * (sk_port * 0x80) to compute the offsets for all of the port-specific - * blocks: we need an extra offset for the BMU and RAMbuffer registers. - * The simplest thing is to provide an extra argument to these macros: - * the 'skip' parameter. The 'skip' value is the number of extra pages - * for skip when computing the port0/port1 offsets. For most registers, - * the skip value is 0; for the BMU and RAMbuffer registers, it's 1. - */ -#define SK_IF_READ_4(sc_if, skip, reg) \ - sk_win_read_4(sc_if->sk_softc, reg + \ - ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN)) -#define SK_IF_READ_2(sc_if, skip, reg) \ - sk_win_read_2(sc_if->sk_softc, reg + \ - ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN)) -#define SK_IF_READ_1(sc_if, skip, reg) \ - sk_win_read_1(sc_if->sk_softc, reg + \ - ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN)) - -#define SK_IF_WRITE_4(sc_if, skip, reg, val) \ - sk_win_write_4(sc_if->sk_softc, \ - reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val) -#define SK_IF_WRITE_2(sc_if, skip, reg, val) \ - sk_win_write_2(sc_if->sk_softc, \ - reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val) -#define SK_IF_WRITE_1(sc_if, skip, reg, val) \ - sk_win_write_1(sc_if->sk_softc, \ - reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val) - -/* Block 0 registers, permanently mapped at iobase. */ -#define SK_RAP 0x0000 -#define SK_CSR 0x0004 -#define SK_LED 0x0006 -#define SK_ISR 0x0008 /* interrupt source */ -#define SK_IMR 0x000C /* interrupt mask */ -#define SK_IESR 0x0010 /* interrupt hardware error source */ -#define SK_IEMR 0x0014 /* interrupt hardware error mask */ -#define SK_ISSR 0x0018 /* special interrupt source */ -#define SK_XM_IMR0 0x0020 -#define SK_XM_ISR0 0x0028 -#define SK_XM_PHYADDR0 0x0030 -#define SK_XM_PHYDATA0 0x0034 -#define SK_XM_IMR1 0x0040 -#define SK_XM_ISR1 0x0048 -#define SK_XM_PHYADDR1 0x0050 -#define SK_XM_PHYDATA1 0x0054 -#define SK_BMU_RX_CSR0 0x0060 -#define SK_BMU_RX_CSR1 0x0064 -#define SK_BMU_TXS_CSR0 0x0068 -#define SK_BMU_TXA_CSR0 0x006C -#define SK_BMU_TXS_CSR1 0x0070 -#define SK_BMU_TXA_CSR1 0x0074 - -/* SK_CSR register */ -#define SK_CSR_SW_RESET 0x0001 -#define SK_CSR_SW_UNRESET 0x0002 -#define SK_CSR_MASTER_RESET 0x0004 -#define SK_CSR_MASTER_UNRESET 0x0008 -#define SK_CSR_MASTER_STOP 0x0010 -#define SK_CSR_MASTER_DONE 0x0020 -#define SK_CSR_SW_IRQ_CLEAR 0x0040 -#define SK_CSR_SW_IRQ_SET 0x0080 -#define SK_CSR_SLOTSIZE 0x0100 /* 1 == 64 bits, 0 == 32 */ -#define SK_CSR_BUSCLOCK 0x0200 /* 1 == 33/66 Mhz, = 33 */ - -/* SK_LED register */ -#define SK_LED_GREEN_OFF 0x01 -#define SK_LED_GREEN_ON 0x02 - -/* SK_ISR register */ -#define SK_ISR_TX2_AS_CHECK 0x00000001 -#define SK_ISR_TX2_AS_EOF 0x00000002 -#define SK_ISR_TX2_AS_EOB 0x00000004 -#define SK_ISR_TX2_S_CHECK 0x00000008 -#define SK_ISR_TX2_S_EOF 0x00000010 -#define SK_ISR_TX2_S_EOB 0x00000020 -#define SK_ISR_TX1_AS_CHECK 0x00000040 -#define SK_ISR_TX1_AS_EOF 0x00000080 -#define SK_ISR_TX1_AS_EOB 0x00000100 -#define SK_ISR_TX1_S_CHECK 0x00000200 -#define SK_ISR_TX1_S_EOF 0x00000400 -#define SK_ISR_TX1_S_EOB 0x00000800 -#define SK_ISR_RX2_CHECK 0x00001000 -#define SK_ISR_RX2_EOF 0x00002000 -#define SK_ISR_RX2_EOB 0x00004000 -#define SK_ISR_RX1_CHECK 0x00008000 -#define SK_ISR_RX1_EOF 0x00010000 -#define SK_ISR_RX1_EOB 0x00020000 -#define SK_ISR_LINK2_OFLOW 0x00040000 -#define SK_ISR_MAC2 0x00080000 -#define SK_ISR_LINK1_OFLOW 0x00100000 -#define SK_ISR_MAC1 0x00200000 -#define SK_ISR_TIMER 0x00400000 -#define SK_ISR_EXTERNAL_REG 0x00800000 -#define SK_ISR_SW 0x01000000 -#define SK_ISR_I2C_RDY 0x02000000 -#define SK_ISR_TX2_TIMEO 0x04000000 -#define SK_ISR_TX1_TIMEO 0x08000000 -#define SK_ISR_RX2_TIMEO 0x10000000 -#define SK_ISR_RX1_TIMEO 0x20000000 -#define SK_ISR_RSVD 0x40000000 -#define SK_ISR_HWERR 0x80000000 - -/* SK_IMR register */ -#define SK_IMR_TX2_AS_CHECK 0x00000001 -#define SK_IMR_TX2_AS_EOF 0x00000002 -#define SK_IMR_TX2_AS_EOB 0x00000004 -#define SK_IMR_TX2_S_CHECK 0x00000008 -#define SK_IMR_TX2_S_EOF 0x00000010 -#define SK_IMR_TX2_S_EOB 0x00000020 -#define SK_IMR_TX1_AS_CHECK 0x00000040 -#define SK_IMR_TX1_AS_EOF 0x00000080 -#define SK_IMR_TX1_AS_EOB 0x00000100 -#define SK_IMR_TX1_S_CHECK 0x00000200 -#define SK_IMR_TX1_S_EOF 0x00000400 -#define SK_IMR_TX1_S_EOB 0x00000800 -#define SK_IMR_RX2_CHECK 0x00001000 -#define SK_IMR_RX2_EOF 0x00002000 -#define SK_IMR_RX2_EOB 0x00004000 -#define SK_IMR_RX1_CHECK 0x00008000 -#define SK_IMR_RX1_EOF 0x00010000 -#define SK_IMR_RX1_EOB 0x00020000 -#define SK_IMR_LINK2_OFLOW 0x00040000 -#define SK_IMR_MAC2 0x00080000 -#define SK_IMR_LINK1_OFLOW 0x00100000 -#define SK_IMR_MAC1 0x00200000 -#define SK_IMR_TIMER 0x00400000 -#define SK_IMR_EXTERNAL_REG 0x00800000 -#define SK_IMR_SW 0x01000000 -#define SK_IMR_I2C_RDY 0x02000000 -#define SK_IMR_TX2_TIMEO 0x04000000 -#define SK_IMR_TX1_TIMEO 0x08000000 -#define SK_IMR_RX2_TIMEO 0x10000000 -#define SK_IMR_RX1_TIMEO 0x20000000 -#define SK_IMR_RSVD 0x40000000 -#define SK_IMR_HWERR 0x80000000 - -#define SK_INTRS1 \ - (SK_IMR_RX1_EOF|SK_IMR_TX1_S_EOF|SK_IMR_MAC1) - -#define SK_INTRS2 \ - (SK_IMR_RX2_EOF|SK_IMR_TX2_S_EOF|SK_IMR_MAC2) - -/* SK_IESR register */ -#define SK_IESR_PAR_RX2 0x00000001 -#define SK_IESR_PAR_RX1 0x00000002 -#define SK_IESR_PAR_MAC2 0x00000004 -#define SK_IESR_PAR_MAC1 0x00000008 -#define SK_IESR_PAR_WR_RAM 0x00000010 -#define SK_IESR_PAR_RD_RAM 0x00000020 -#define SK_IESR_NO_TSTAMP_MAC2 0x00000040 -#define SK_IESR_NO_TSTAMO_MAC1 0x00000080 -#define SK_IESR_NO_STS_MAC2 0x00000100 -#define SK_IESR_NO_STS_MAC1 0x00000200 -#define SK_IESR_IRQ_STS 0x00000400 -#define SK_IESR_MASTERERR 0x00000800 - -/* SK_IEMR register */ -#define SK_IEMR_PAR_RX2 0x00000001 -#define SK_IEMR_PAR_RX1 0x00000002 -#define SK_IEMR_PAR_MAC2 0x00000004 -#define SK_IEMR_PAR_MAC1 0x00000008 -#define SK_IEMR_PAR_WR_RAM 0x00000010 -#define SK_IEMR_PAR_RD_RAM 0x00000020 -#define SK_IEMR_NO_TSTAMP_MAC2 0x00000040 -#define SK_IEMR_NO_TSTAMO_MAC1 0x00000080 -#define SK_IEMR_NO_STS_MAC2 0x00000100 -#define SK_IEMR_NO_STS_MAC1 0x00000200 -#define SK_IEMR_IRQ_STS 0x00000400 -#define SK_IEMR_MASTERERR 0x00000800 - -/* Block 2 */ -#define SK_MAC0_0 0x0100 -#define SK_MAC0_1 0x0104 -#define SK_MAC1_0 0x0108 -#define SK_MAC1_1 0x010C -#define SK_MAC2_0 0x0110 -#define SK_MAC2_1 0x0114 -#define SK_CONNTYPE 0x0118 -#define SK_PMDTYPE 0x0119 -#define SK_CONFIG 0x011A -#define SK_CHIPVER 0x011B -#define SK_EPROM0 0x011C -#define SK_EPROM1 0x011D -#define SK_EPROM2 0x011E -#define SK_EPROM3 0x011F -#define SK_EP_ADDR 0x0120 -#define SK_EP_DATA 0x0124 -#define SK_EP_LOADCTL 0x0128 -#define SK_EP_LOADTST 0x0129 -#define SK_TIMERINIT 0x0130 -#define SK_TIMER 0x0134 -#define SK_TIMERCTL 0x0138 -#define SK_TIMERTST 0x0139 -#define SK_IMTIMERINIT 0x0140 -#define SK_IMTIMER 0x0144 -#define SK_IMTIMERCTL 0x0148 -#define SK_IMTIMERTST 0x0149 -#define SK_IMMR 0x014C -#define SK_IHWEMR 0x0150 -#define SK_TESTCTL1 0x0158 -#define SK_TESTCTL2 0x0159 -#define SK_GPIO 0x015C -#define SK_I2CHWCTL 0x0160 -#define SK_I2CHWDATA 0x0164 -#define SK_I2CHWIRQ 0x0168 -#define SK_I2CSW 0x016C -#define SK_BLNKINIT 0x0170 -#define SK_BLNKCOUNT 0x0174 -#define SK_BLNKCTL 0x0178 -#define SK_BLNKSTS 0x0179 -#define SK_BLNKTST 0x017A - -#define SK_IMCTL_STOP 0x02 -#define SK_IMCTL_START 0x04 - -#define SK_IMTIMER_TICKS 54 -#define SK_IM_USECS(x) ((x) * SK_IMTIMER_TICKS) - -#define SK_IM_MIN 10 -#define SK_IM_DEFAULT 100 -#define SK_IM_MAX 10000 - -/* - * The SK_EPROM0 register contains a byte that describes the - * amount of SRAM mounted on the NIC. The value also tells if - * the chips are 64K or 128K. This affects the RAMbuffer address - * offset that we need to use. - */ -#define SK_RAMSIZE_512K_64 0x1 -#define SK_RAMSIZE_1024K_128 0x2 -#define SK_RAMSIZE_1024K_64 0x3 -#define SK_RAMSIZE_2048K_128 0x4 - -#define SK_RBOFF_0 0x0 -#define SK_RBOFF_80000 0x80000 - -/* - * SK_EEPROM1 contains the PHY type, which may be XMAC for - * fiber-based cards or BCOM for 1000baseT cards with a Broadcom - * PHY. - */ -#define SK_PHYTYPE_XMAC 0 /* integeated XMAC II PHY */ -#define SK_PHYTYPE_BCOM 1 /* Broadcom BCM5400 */ -#define SK_PHYTYPE_LONE 2 /* Level One LXT1000 */ -#define SK_PHYTYPE_NAT 3 /* National DP83891 */ -#define SK_PHYTYPE_MARV_COPPER 4 /* Marvell 88E1011S */ -#define SK_PHYTYPE_MARV_FIBER 5 /* Marvell 88E1011S (fiber) */ - -/* - * PHY addresses. - */ -#define SK_PHYADDR_XMAC 0x0 -#define SK_PHYADDR_BCOM 0x1 -#define SK_PHYADDR_LONE 0x3 -#define SK_PHYADDR_NAT 0x0 -#define SK_PHYADDR_MARV 0x0 - -#define SK_CONFIG_SINGLEMAC 0x01 -#define SK_CONFIG_DIS_DSL_CLK 0x02 - -#define SK_PMD_1000BASELX 0x4C -#define SK_PMD_1000BASESX 0x53 -#define SK_PMD_1000BASECX 0x43 -#define SK_PMD_1000BASETX 0x54 - -/* GPIO bits */ -#define SK_GPIO_DAT0 0x00000001 -#define SK_GPIO_DAT1 0x00000002 -#define SK_GPIO_DAT2 0x00000004 -#define SK_GPIO_DAT3 0x00000008 -#define SK_GPIO_DAT4 0x00000010 -#define SK_GPIO_DAT5 0x00000020 -#define SK_GPIO_DAT6 0x00000040 -#define SK_GPIO_DAT7 0x00000080 -#define SK_GPIO_DAT8 0x00000100 -#define SK_GPIO_DAT9 0x00000200 -#define SK_GPIO_DIR0 0x00010000 -#define SK_GPIO_DIR1 0x00020000 -#define SK_GPIO_DIR2 0x00040000 -#define SK_GPIO_DIR3 0x00080000 -#define SK_GPIO_DIR4 0x00100000 -#define SK_GPIO_DIR5 0x00200000 -#define SK_GPIO_DIR6 0x00400000 -#define SK_GPIO_DIR7 0x00800000 -#define SK_GPIO_DIR8 0x01000000 -#define SK_GPIO_DIR9 0x02000000 - -/* Block 3 Ram interface and MAC arbiter registers */ -#define SK_RAMADDR 0x0180 -#define SK_RAMDATA0 0x0184 -#define SK_RAMDATA1 0x0188 -#define SK_TO0 0x0190 -#define SK_TO1 0x0191 -#define SK_TO2 0x0192 -#define SK_TO3 0x0193 -#define SK_TO4 0x0194 -#define SK_TO5 0x0195 -#define SK_TO6 0x0196 -#define SK_TO7 0x0197 -#define SK_TO8 0x0198 -#define SK_TO9 0x0199 -#define SK_TO10 0x019A -#define SK_TO11 0x019B -#define SK_RITIMEO_TMR 0x019C -#define SK_RAMCTL 0x01A0 -#define SK_RITIMER_TST 0x01A2 - -#define SK_RAMCTL_RESET 0x0001 -#define SK_RAMCTL_UNRESET 0x0002 -#define SK_RAMCTL_CLR_IRQ_WPAR 0x0100 -#define SK_RAMCTL_CLR_IRQ_RPAR 0x0200 - -/* Mac arbiter registers */ -#define SK_MINIT_RX1 0x01B0 -#define SK_MINIT_RX2 0x01B1 -#define SK_MINIT_TX1 0x01B2 -#define SK_MINIT_TX2 0x01B3 -#define SK_MTIMEO_RX1 0x01B4 -#define SK_MTIMEO_RX2 0x01B5 -#define SK_MTIMEO_TX1 0x01B6 -#define SK_MTIEMO_TX2 0x01B7 -#define SK_MACARB_CTL 0x01B8 -#define SK_MTIMER_TST 0x01BA -#define SK_RCINIT_RX1 0x01C0 -#define SK_RCINIT_RX2 0x01C1 -#define SK_RCINIT_TX1 0x01C2 -#define SK_RCINIT_TX2 0x01C3 -#define SK_RCTIMEO_RX1 0x01C4 -#define SK_RCTIMEO_RX2 0x01C5 -#define SK_RCTIMEO_TX1 0x01C6 -#define SK_RCTIMEO_TX2 0x01C7 -#define SK_RECOVERY_CTL 0x01C8 -#define SK_RCTIMER_TST 0x01CA - -/* Packet arbiter registers */ -#define SK_RXPA1_TINIT 0x01D0 -#define SK_RXPA2_TINIT 0x01D4 -#define SK_TXPA1_TINIT 0x01D8 -#define SK_TXPA2_TINIT 0x01DC -#define SK_RXPA1_TIMEO 0x01E0 -#define SK_RXPA2_TIMEO 0x01E4 -#define SK_TXPA1_TIMEO 0x01E8 -#define SK_TXPA2_TIMEO 0x01EC -#define SK_PKTARB_CTL 0x01F0 -#define SK_PKTATB_TST 0x01F2 - -#define SK_PKTARB_TIMEOUT 0x2000 - -#define SK_PKTARBCTL_RESET 0x0001 -#define SK_PKTARBCTL_UNRESET 0x0002 -#define SK_PKTARBCTL_RXTO1_OFF 0x0004 -#define SK_PKTARBCTL_RXTO1_ON 0x0008 -#define SK_PKTARBCTL_RXTO2_OFF 0x0010 -#define SK_PKTARBCTL_RXTO2_ON 0x0020 -#define SK_PKTARBCTL_TXTO1_OFF 0x0040 -#define SK_PKTARBCTL_TXTO1_ON 0x0080 -#define SK_PKTARBCTL_TXTO2_OFF 0x0100 -#define SK_PKTARBCTL_TXTO2_ON 0x0200 -#define SK_PKTARBCTL_CLR_IRQ_RXTO1 0x0400 -#define SK_PKTARBCTL_CLR_IRQ_RXTO2 0x0800 -#define SK_PKTARBCTL_CLR_IRQ_TXTO1 0x1000 -#define SK_PKTARBCTL_CLR_IRQ_TXTO2 0x2000 - -#define SK_MINIT_XMAC_B2 54 -#define SK_MINIT_XMAC_C1 63 - -#define SK_MACARBCTL_RESET 0x0001 -#define SK_MACARBCTL_UNRESET 0x0002 -#define SK_MACARBCTL_FASTOE_OFF 0x0004 -#define SK_MACARBCRL_FASTOE_ON 0x0008 - -#define SK_RCINIT_XMAC_B2 54 -#define SK_RCINIT_XMAC_C1 0 - -#define SK_RECOVERYCTL_RX1_OFF 0x0001 -#define SK_RECOVERYCTL_RX1_ON 0x0002 -#define SK_RECOVERYCTL_RX2_OFF 0x0004 -#define SK_RECOVERYCTL_RX2_ON 0x0008 -#define SK_RECOVERYCTL_TX1_OFF 0x0010 -#define SK_RECOVERYCTL_TX1_ON 0x0020 -#define SK_RECOVERYCTL_TX2_OFF 0x0040 -#define SK_RECOVERYCTL_TX2_ON 0x0080 - -#define SK_RECOVERY_XMAC_B2 \ - (SK_RECOVERYCTL_RX1_ON|SK_RECOVERYCTL_RX2_ON| \ - SK_RECOVERYCTL_TX1_ON|SK_RECOVERYCTL_TX2_ON) - -#define SK_RECOVERY_XMAC_C1 \ - (SK_RECOVERYCTL_RX1_OFF|SK_RECOVERYCTL_RX2_OFF| \ - SK_RECOVERYCTL_TX1_OFF|SK_RECOVERYCTL_TX2_OFF) - -/* Block 4 -- TX Arbiter MAC 1 */ -#define SK_TXAR1_TIMERINIT 0x0200 -#define SK_TXAR1_TIMERVAL 0x0204 -#define SK_TXAR1_LIMITINIT 0x0208 -#define SK_TXAR1_LIMITCNT 0x020C -#define SK_TXAR1_COUNTERCTL 0x0210 -#define SK_TXAR1_COUNTERTST 0x0212 -#define SK_TXAR1_COUNTERSTS 0x0212 - -/* Block 5 -- TX Arbiter MAC 2 */ -#define SK_TXAR2_TIMERINIT 0x0280 -#define SK_TXAR2_TIMERVAL 0x0284 -#define SK_TXAR2_LIMITINIT 0x0288 -#define SK_TXAR2_LIMITCNT 0x028C -#define SK_TXAR2_COUNTERCTL 0x0290 -#define SK_TXAR2_COUNTERTST 0x0291 -#define SK_TXAR2_COUNTERSTS 0x0292 - -#define SK_TXARCTL_OFF 0x01 -#define SK_TXARCTL_ON 0x02 -#define SK_TXARCTL_RATECTL_OFF 0x04 -#define SK_TXARCTL_RATECTL_ON 0x08 -#define SK_TXARCTL_ALLOC_OFF 0x10 -#define SK_TXARCTL_ALLOC_ON 0x20 -#define SK_TXARCTL_FSYNC_OFF 0x40 -#define SK_TXARCTL_FSYNC_ON 0x80 - -/* Block 6 -- External registers */ -#define SK_EXTREG_BASE 0x300 -#define SK_EXTREG_END 0x37C - -/* Block 7 -- PCI config registers */ -#define SK_PCI_BASE 0x0380 -#define SK_PCI_END 0x03FC - -/* Compute offset of mirrored PCI register */ -#define SK_PCI_REG(reg) ((reg) + SK_PCI_BASE) - -/* Block 8 -- RX queue 1 */ -#define SK_RXQ1_BUFCNT 0x0400 -#define SK_RXQ1_BUFCTL 0x0402 -#define SK_RXQ1_NEXTDESC 0x0404 -#define SK_RXQ1_RXBUF_LO 0x0408 -#define SK_RXQ1_RXBUF_HI 0x040C -#define SK_RXQ1_RXSTAT 0x0410 -#define SK_RXQ1_TIMESTAMP 0x0414 -#define SK_RXQ1_CSUM1 0x0418 -#define SK_RXQ1_CSUM2 0x041A -#define SK_RXQ1_CSUM1_START 0x041C -#define SK_RXQ1_CSUM2_START 0x041E -#define SK_RXQ1_CURADDR_LO 0x0420 -#define SK_RXQ1_CURADDR_HI 0x0424 -#define SK_RXQ1_CURCNT_LO 0x0428 -#define SK_RXQ1_CURCNT_HI 0x042C -#define SK_RXQ1_CURBYTES 0x0430 -#define SK_RXQ1_BMU_CSR 0x0434 -#define SK_RXQ1_WATERMARK 0x0438 -#define SK_RXQ1_FLAG 0x043A -#define SK_RXQ1_TEST1 0x043C -#define SK_RXQ1_TEST2 0x0440 -#define SK_RXQ1_TEST3 0x0444 - -/* Block 9 -- RX queue 2 */ -#define SK_RXQ2_BUFCNT 0x0480 -#define SK_RXQ2_BUFCTL 0x0482 -#define SK_RXQ2_NEXTDESC 0x0484 -#define SK_RXQ2_RXBUF_LO 0x0488 -#define SK_RXQ2_RXBUF_HI 0x048C -#define SK_RXQ2_RXSTAT 0x0490 -#define SK_RXQ2_TIMESTAMP 0x0494 -#define SK_RXQ2_CSUM1 0x0498 -#define SK_RXQ2_CSUM2 0x049A -#define SK_RXQ2_CSUM1_START 0x049C -#define SK_RXQ2_CSUM2_START 0x049E -#define SK_RXQ2_CURADDR_LO 0x04A0 -#define SK_RXQ2_CURADDR_HI 0x04A4 -#define SK_RXQ2_CURCNT_LO 0x04A8 -#define SK_RXQ2_CURCNT_HI 0x04AC -#define SK_RXQ2_CURBYTES 0x04B0 -#define SK_RXQ2_BMU_CSR 0x04B4 -#define SK_RXQ2_WATERMARK 0x04B8 -#define SK_RXQ2_FLAG 0x04BA -#define SK_RXQ2_TEST1 0x04BC -#define SK_RXQ2_TEST2 0x04C0 -#define SK_RXQ2_TEST3 0x04C4 - -#define SK_RXBMU_CLR_IRQ_ERR 0x00000001 -#define SK_RXBMU_CLR_IRQ_EOF 0x00000002 -#define SK_RXBMU_CLR_IRQ_EOB 0x00000004 -#define SK_RXBMU_CLR_IRQ_PAR 0x00000008 -#define SK_RXBMU_RX_START 0x00000010 -#define SK_RXBMU_RX_STOP 0x00000020 -#define SK_RXBMU_POLL_OFF 0x00000040 -#define SK_RXBMU_POLL_ON 0x00000080 -#define SK_RXBMU_TRANSFER_SM_RESET 0x00000100 -#define SK_RXBMU_TRANSFER_SM_UNRESET 0x00000200 -#define SK_RXBMU_DESCWR_SM_RESET 0x00000400 -#define SK_RXBMU_DESCWR_SM_UNRESET 0x00000800 -#define SK_RXBMU_DESCRD_SM_RESET 0x00001000 -#define SK_RXBMU_DESCRD_SM_UNRESET 0x00002000 -#define SK_RXBMU_SUPERVISOR_SM_RESET 0x00004000 -#define SK_RXBMU_SUPERVISOR_SM_UNRESET 0x00008000 -#define SK_RXBMU_PFI_SM_RESET 0x00010000 -#define SK_RXBMU_PFI_SM_UNRESET 0x00020000 -#define SK_RXBMU_FIFO_RESET 0x00040000 -#define SK_RXBMU_FIFO_UNRESET 0x00080000 -#define SK_RXBMU_DESC_RESET 0x00100000 -#define SK_RXBMU_DESC_UNRESET 0x00200000 -#define SK_RXBMU_SUPERVISOR_IDLE 0x01000000 - -#define SK_RXBMU_ONLINE \ - (SK_RXBMU_TRANSFER_SM_UNRESET|SK_RXBMU_DESCWR_SM_UNRESET| \ - SK_RXBMU_DESCRD_SM_UNRESET|SK_RXBMU_SUPERVISOR_SM_UNRESET| \ - SK_RXBMU_PFI_SM_UNRESET|SK_RXBMU_FIFO_UNRESET| \ - SK_RXBMU_DESC_UNRESET) - -#define SK_RXBMU_OFFLINE \ - (SK_RXBMU_TRANSFER_SM_RESET|SK_RXBMU_DESCWR_SM_RESET| \ - SK_RXBMU_DESCRD_SM_RESET|SK_RXBMU_SUPERVISOR_SM_RESET| \ - SK_RXBMU_PFI_SM_RESET|SK_RXBMU_FIFO_RESET| \ - SK_RXBMU_DESC_RESET) - -/* Block 12 -- TX sync queue 1 */ -#define SK_TXQS1_BUFCNT 0x0600 -#define SK_TXQS1_BUFCTL 0x0602 -#define SK_TXQS1_NEXTDESC 0x0604 -#define SK_TXQS1_RXBUF_LO 0x0608 -#define SK_TXQS1_RXBUF_HI 0x060C -#define SK_TXQS1_RXSTAT 0x0610 -#define SK_TXQS1_CSUM_STARTVAL 0x0614 -#define SK_TXQS1_CSUM_STARTPOS 0x0618 -#define SK_TXQS1_CSUM_WRITEPOS 0x061A -#define SK_TXQS1_CURADDR_LO 0x0620 -#define SK_TXQS1_CURADDR_HI 0x0624 -#define SK_TXQS1_CURCNT_LO 0x0628 -#define SK_TXQS1_CURCNT_HI 0x062C -#define SK_TXQS1_CURBYTES 0x0630 -#define SK_TXQS1_BMU_CSR 0x0634 -#define SK_TXQS1_WATERMARK 0x0638 -#define SK_TXQS1_FLAG 0x063A -#define SK_TXQS1_TEST1 0x063C -#define SK_TXQS1_TEST2 0x0640 -#define SK_TXQS1_TEST3 0x0644 - -/* Block 13 -- TX async queue 1 */ -#define SK_TXQA1_BUFCNT 0x0680 -#define SK_TXQA1_BUFCTL 0x0682 -#define SK_TXQA1_NEXTDESC 0x0684 -#define SK_TXQA1_RXBUF_LO 0x0688 -#define SK_TXQA1_RXBUF_HI 0x068C -#define SK_TXQA1_RXSTAT 0x0690 -#define SK_TXQA1_CSUM_STARTVAL 0x0694 -#define SK_TXQA1_CSUM_STARTPOS 0x0698 -#define SK_TXQA1_CSUM_WRITEPOS 0x069A -#define SK_TXQA1_CURADDR_LO 0x06A0 -#define SK_TXQA1_CURADDR_HI 0x06A4 -#define SK_TXQA1_CURCNT_LO 0x06A8 -#define SK_TXQA1_CURCNT_HI 0x06AC -#define SK_TXQA1_CURBYTES 0x06B0 -#define SK_TXQA1_BMU_CSR 0x06B4 -#define SK_TXQA1_WATERMARK 0x06B8 -#define SK_TXQA1_FLAG 0x06BA -#define SK_TXQA1_TEST1 0x06BC -#define SK_TXQA1_TEST2 0x06C0 -#define SK_TXQA1_TEST3 0x06C4 - -/* Block 14 -- TX sync queue 2 */ -#define SK_TXQS2_BUFCNT 0x0700 -#define SK_TXQS2_BUFCTL 0x0702 -#define SK_TXQS2_NEXTDESC 0x0704 -#define SK_TXQS2_RXBUF_LO 0x0708 -#define SK_TXQS2_RXBUF_HI 0x070C -#define SK_TXQS2_RXSTAT 0x0710 -#define SK_TXQS2_CSUM_STARTVAL 0x0714 -#define SK_TXQS2_CSUM_STARTPOS 0x0718 -#define SK_TXQS2_CSUM_WRITEPOS 0x071A -#define SK_TXQS2_CURADDR_LO 0x0720 -#define SK_TXQS2_CURADDR_HI 0x0724 -#define SK_TXQS2_CURCNT_LO 0x0728 -#define SK_TXQS2_CURCNT_HI 0x072C -#define SK_TXQS2_CURBYTES 0x0730 -#define SK_TXQS2_BMU_CSR 0x0734 -#define SK_TXQS2_WATERMARK 0x0738 -#define SK_TXQS2_FLAG 0x073A -#define SK_TXQS2_TEST1 0x073C -#define SK_TXQS2_TEST2 0x0740 -#define SK_TXQS2_TEST3 0x0744 - -/* Block 15 -- TX async queue 2 */ -#define SK_TXQA2_BUFCNT 0x0780 -#define SK_TXQA2_BUFCTL 0x0782 -#define SK_TXQA2_NEXTDESC 0x0784 -#define SK_TXQA2_RXBUF_LO 0x0788 -#define SK_TXQA2_RXBUF_HI 0x078C -#define SK_TXQA2_RXSTAT 0x0790 -#define SK_TXQA2_CSUM_STARTVAL 0x0794 -#define SK_TXQA2_CSUM_STARTPOS 0x0798 -#define SK_TXQA2_CSUM_WRITEPOS 0x079A -#define SK_TXQA2_CURADDR_LO 0x07A0 -#define SK_TXQA2_CURADDR_HI 0x07A4 -#define SK_TXQA2_CURCNT_LO 0x07A8 -#define SK_TXQA2_CURCNT_HI 0x07AC -#define SK_TXQA2_CURBYTES 0x07B0 -#define SK_TXQA2_BMU_CSR 0x07B4 -#define SK_TXQA2_WATERMARK 0x07B8 -#define SK_TXQA2_FLAG 0x07BA -#define SK_TXQA2_TEST1 0x07BC -#define SK_TXQA2_TEST2 0x07C0 -#define SK_TXQA2_TEST3 0x07C4 - -#define SK_TXBMU_CLR_IRQ_ERR 0x00000001 -#define SK_TXBMU_CLR_IRQ_EOF 0x00000002 -#define SK_TXBMU_CLR_IRQ_EOB 0x00000004 -#define SK_TXBMU_TX_START 0x00000010 -#define SK_TXBMU_TX_STOP 0x00000020 -#define SK_TXBMU_POLL_OFF 0x00000040 -#define SK_TXBMU_POLL_ON 0x00000080 -#define SK_TXBMU_TRANSFER_SM_RESET 0x00000100 -#define SK_TXBMU_TRANSFER_SM_UNRESET 0x00000200 -#define SK_TXBMU_DESCWR_SM_RESET 0x00000400 -#define SK_TXBMU_DESCWR_SM_UNRESET 0x00000800 -#define SK_TXBMU_DESCRD_SM_RESET 0x00001000 -#define SK_TXBMU_DESCRD_SM_UNRESET 0x00002000 -#define SK_TXBMU_SUPERVISOR_SM_RESET 0x00004000 -#define SK_TXBMU_SUPERVISOR_SM_UNRESET 0x00008000 -#define SK_TXBMU_PFI_SM_RESET 0x00010000 -#define SK_TXBMU_PFI_SM_UNRESET 0x00020000 -#define SK_TXBMU_FIFO_RESET 0x00040000 -#define SK_TXBMU_FIFO_UNRESET 0x00080000 -#define SK_TXBMU_DESC_RESET 0x00100000 -#define SK_TXBMU_DESC_UNRESET 0x00200000 -#define SK_TXBMU_SUPERVISOR_IDLE 0x01000000 - -#define SK_TXBMU_ONLINE \ - (SK_TXBMU_TRANSFER_SM_UNRESET|SK_TXBMU_DESCWR_SM_UNRESET| \ - SK_TXBMU_DESCRD_SM_UNRESET|SK_TXBMU_SUPERVISOR_SM_UNRESET| \ - SK_TXBMU_PFI_SM_UNRESET|SK_TXBMU_FIFO_UNRESET| \ - SK_TXBMU_DESC_UNRESET) - -#define SK_TXBMU_OFFLINE \ - (SK_TXBMU_TRANSFER_SM_RESET|SK_TXBMU_DESCWR_SM_RESET| \ - SK_TXBMU_DESCRD_SM_RESET|SK_TXBMU_SUPERVISOR_SM_RESET| \ - SK_TXBMU_PFI_SM_RESET|SK_TXBMU_FIFO_RESET| \ - SK_TXBMU_DESC_RESET) - -/* Block 16 -- Receive RAMbuffer 1 */ -#define SK_RXRB1_START 0x0800 -#define SK_RXRB1_END 0x0804 -#define SK_RXRB1_WR_PTR 0x0808 -#define SK_RXRB1_RD_PTR 0x080C -#define SK_RXRB1_UTHR_PAUSE 0x0810 -#define SK_RXRB1_LTHR_PAUSE 0x0814 -#define SK_RXRB1_UTHR_HIPRIO 0x0818 -#define SK_RXRB1_UTHR_LOPRIO 0x081C -#define SK_RXRB1_PKTCNT 0x0820 -#define SK_RXRB1_LVL 0x0824 -#define SK_RXRB1_CTLTST 0x0828 - -/* Block 17 -- Receive RAMbuffer 2 */ -#define SK_RXRB2_START 0x0880 -#define SK_RXRB2_END 0x0884 -#define SK_RXRB2_WR_PTR 0x0888 -#define SK_RXRB2_RD_PTR 0x088C -#define SK_RXRB2_UTHR_PAUSE 0x0890 -#define SK_RXRB2_LTHR_PAUSE 0x0894 -#define SK_RXRB2_UTHR_HIPRIO 0x0898 -#define SK_RXRB2_UTHR_LOPRIO 0x089C -#define SK_RXRB2_PKTCNT 0x08A0 -#define SK_RXRB2_LVL 0x08A4 -#define SK_RXRB2_CTLTST 0x08A8 - -/* Block 20 -- Sync. Transmit RAMbuffer 1 */ -#define SK_TXRBS1_START 0x0A00 -#define SK_TXRBS1_END 0x0A04 -#define SK_TXRBS1_WR_PTR 0x0A08 -#define SK_TXRBS1_RD_PTR 0x0A0C -#define SK_TXRBS1_PKTCNT 0x0A20 -#define SK_TXRBS1_LVL 0x0A24 -#define SK_TXRBS1_CTLTST 0x0A28 - -/* Block 21 -- Async. Transmit RAMbuffer 1 */ -#define SK_TXRBA1_START 0x0A80 -#define SK_TXRBA1_END 0x0A84 -#define SK_TXRBA1_WR_PTR 0x0A88 -#define SK_TXRBA1_RD_PTR 0x0A8C -#define SK_TXRBA1_PKTCNT 0x0AA0 -#define SK_TXRBA1_LVL 0x0AA4 -#define SK_TXRBA1_CTLTST 0x0AA8 - -/* Block 22 -- Sync. Transmit RAMbuffer 2 */ -#define SK_TXRBS2_START 0x0B00 -#define SK_TXRBS2_END 0x0B04 -#define SK_TXRBS2_WR_PTR 0x0B08 -#define SK_TXRBS2_RD_PTR 0x0B0C -#define SK_TXRBS2_PKTCNT 0x0B20 -#define SK_TXRBS2_LVL 0x0B24 -#define SK_TXRBS2_CTLTST 0x0B28 - -/* Block 23 -- Async. Transmit RAMbuffer 2 */ -#define SK_TXRBA2_START 0x0B80 -#define SK_TXRBA2_END 0x0B84 -#define SK_TXRBA2_WR_PTR 0x0B88 -#define SK_TXRBA2_RD_PTR 0x0B8C -#define SK_TXRBA2_PKTCNT 0x0BA0 -#define SK_TXRBA2_LVL 0x0BA4 -#define SK_TXRBA2_CTLTST 0x0BA8 - -#define SK_RBCTL_RESET 0x00000001 -#define SK_RBCTL_UNRESET 0x00000002 -#define SK_RBCTL_OFF 0x00000004 -#define SK_RBCTL_ON 0x00000008 -#define SK_RBCTL_STORENFWD_OFF 0x00000010 -#define SK_RBCTL_STORENFWD_ON 0x00000020 - -/* Block 24 -- RX MAC FIFO 1 regisrers and LINK_SYNC counter */ -#define SK_RXF1_END 0x0C00 -#define SK_RXF1_WPTR 0x0C04 -#define SK_RXF1_RPTR 0x0C0C -#define SK_RXF1_PKTCNT 0x0C10 -#define SK_RXF1_LVL 0x0C14 -#define SK_RXF1_MACCTL 0x0C18 -#define SK_RXF1_CTL 0x0C1C -#define SK_RXLED1_CNTINIT 0x0C20 -#define SK_RXLED1_COUNTER 0x0C24 -#define SK_RXLED1_CTL 0x0C28 -#define SK_RXLED1_TST 0x0C29 -#define SK_LINK_SYNC1_CINIT 0x0C30 -#define SK_LINK_SYNC1_COUNTER 0x0C34 -#define SK_LINK_SYNC1_CTL 0x0C38 -#define SK_LINK_SYNC1_TST 0x0C39 -#define SK_LINKLED1_CTL 0x0C3C - -#define SK_FIFO_END 0x3F - -/* Receive MAC FIFO 1 (Yukon Only) */ -#define SK_RXMF1_END 0x0C40 -#define SK_RXMF1_THRESHOLD 0x0C44 -#define SK_RXMF1_CTRL_TEST 0x0C48 -#define SK_RXMF1_WRITE_PTR 0x0C60 -#define SK_RXMF1_WRITE_LEVEL 0x0C68 -#define SK_RXMF1_READ_PTR 0x0C70 -#define SK_RXMF1_READ_LEVEL 0x0C78 - -#define SK_RFCTL_WR_PTR_TST_ON 0x00004000 /* Write pointer test on*/ -#define SK_RFCTL_WR_PTR_TST_OFF 0x00002000 /* Write pointer test off */ -#define SK_RFCTL_WR_PTR_STEP 0x00001000 /* Write pointer increment */ -#define SK_RFCTL_RD_PTR_TST_ON 0x00000400 /* Read pointer test on */ -#define SK_RFCTL_RD_PTR_TST_OFF 0x00000200 /* Read pointer test off */ -#define SK_RFCTL_RD_PTR_STEP 0x00000100 /* Read pointer increment */ -#define SK_RFCTL_RX_FIFO_OVER 0x00000040 /* Clear IRQ RX FIFO Overrun */ -#define SK_RFCTL_FRAME_RX_DONE 0x00000010 /* Clear IRQ Frame RX Done */ -#define SK_RFCTL_OPERATION_ON 0x00000008 /* Operational mode on */ -#define SK_RFCTL_OPERATION_OFF 0x00000004 /* Operational mode off */ -#define SK_RFCTL_RESET_CLEAR 0x00000002 /* MAC FIFO Reset Clear */ -#define SK_RFCTL_RESET_SET 0x00000001 /* MAC FIFO Reset Set */ - -/* Block 25 -- RX MAC FIFO 2 regisrers and LINK_SYNC counter */ -#define SK_RXF2_END 0x0C80 -#define SK_RXF2_WPTR 0x0C84 -#define SK_RXF2_RPTR 0x0C8C -#define SK_RXF2_PKTCNT 0x0C90 -#define SK_RXF2_LVL 0x0C94 -#define SK_RXF2_MACCTL 0x0C98 -#define SK_RXF2_CTL 0x0C9C -#define SK_RXLED2_CNTINIT 0x0CA0 -#define SK_RXLED2_COUNTER 0x0CA4 -#define SK_RXLED2_CTL 0x0CA8 -#define SK_RXLED2_TST 0x0CA9 -#define SK_LINK_SYNC2_CINIT 0x0CB0 -#define SK_LINK_SYNC2_COUNTER 0x0CB4 -#define SK_LINK_SYNC2_CTL 0x0CB8 -#define SK_LINK_SYNC2_TST 0x0CB9 -#define SK_LINKLED2_CTL 0x0CBC - -#define SK_RXMACCTL_CLR_IRQ_NOSTS 0x00000001 -#define SK_RXMACCTL_CLR_IRQ_NOTSTAMP 0x00000002 -#define SK_RXMACCTL_TSTAMP_OFF 0x00000004 -#define SK_RXMACCTL_RSTAMP_ON 0x00000008 -#define SK_RXMACCTL_FLUSH_OFF 0x00000010 -#define SK_RXMACCTL_FLUSH_ON 0x00000020 -#define SK_RXMACCTL_PAUSE_OFF 0x00000040 -#define SK_RXMACCTL_PAUSE_ON 0x00000080 -#define SK_RXMACCTL_AFULL_OFF 0x00000100 -#define SK_RXMACCTL_AFULL_ON 0x00000200 -#define SK_RXMACCTL_VALIDTIME_PATCH_OFF 0x00000400 -#define SK_RXMACCTL_VALIDTIME_PATCH_ON 0x00000800 -#define SK_RXMACCTL_RXRDY_PATCH_OFF 0x00001000 -#define SK_RXMACCTL_RXRDY_PATCH_ON 0x00002000 -#define SK_RXMACCTL_STS_TIMEO 0x00FF0000 -#define SK_RXMACCTL_TSTAMP_TIMEO 0xFF000000 - -#define SK_RXLEDCTL_ENABLE 0x0001 -#define SK_RXLEDCTL_COUNTER_STOP 0x0002 -#define SK_RXLEDCTL_COUNTER_START 0x0004 - -#define SK_LINKLED_OFF 0x0001 -#define SK_LINKLED_ON 0x0002 -#define SK_LINKLED_LINKSYNC_OFF 0x0004 -#define SK_LINKLED_LINKSYNC_ON 0x0008 -#define SK_LINKLED_BLINK_OFF 0x0010 -#define SK_LINKLED_BLINK_ON 0x0020 - -/* Block 26 -- TX MAC FIFO 1 regisrers */ -#define SK_TXF1_END 0x0D00 -#define SK_TXF1_WPTR 0x0D04 -#define SK_TXF1_RPTR 0x0D0C -#define SK_TXF1_PKTCNT 0x0D10 -#define SK_TXF1_LVL 0x0D14 -#define SK_TXF1_MACCTL 0x0D18 -#define SK_TXF1_CTL 0x0D1C -#define SK_TXLED1_CNTINIT 0x0D20 -#define SK_TXLED1_COUNTER 0x0D24 -#define SK_TXLED1_CTL 0x0D28 -#define SK_TXLED1_TST 0x0D29 - -/* Receive MAC FIFO 1 (Yukon Only) */ -#define SK_TXMF1_END 0x0D40 -#define SK_TXMF1_THRESHOLD 0x0D44 -#define SK_TXMF1_CTRL_TEST 0x0D48 -#define SK_TXMF1_WRITE_PTR 0x0D60 -#define SK_TXMF1_WRITE_SHADOW 0x0D64 -#define SK_TXMF1_WRITE_LEVEL 0x0D68 -#define SK_TXMF1_READ_PTR 0x0D70 -#define SK_TXMF1_RESTART_PTR 0x0D74 -#define SK_TXMF1_READ_LEVEL 0x0D78 - -#define SK_TFCTL_WR_PTR_TST_ON 0x00004000 /* Write pointer test on*/ -#define SK_TFCTL_WR_PTR_TST_OFF 0x00002000 /* Write pointer test off */ -#define SK_TFCTL_WR_PTR_STEP 0x00001000 /* Write pointer increment */ -#define SK_TFCTL_RD_PTR_TST_ON 0x00000400 /* Read pointer test on */ -#define SK_TFCTL_RD_PTR_TST_OFF 0x00000200 /* Read pointer test off */ -#define SK_TFCTL_RD_PTR_STEP 0x00000100 /* Read pointer increment */ -#define SK_TFCTL_TX_FIFO_UNDER 0x00000040 /* Clear IRQ TX FIFO Under */ -#define SK_TFCTL_FRAME_TX_DONE 0x00000020 /* Clear IRQ Frame TX Done */ -#define SK_TFCTL_IRQ_PARITY_ER 0x00000010 /* Clear IRQ Parity Error */ -#define SK_TFCTL_OPERATION_ON 0x00000008 /* Operational mode on */ -#define SK_TFCTL_OPERATION_OFF 0x00000004 /* Operational mode off */ -#define SK_TFCTL_RESET_CLEAR 0x00000002 /* MAC FIFO Reset Clear */ -#define SK_TFCTL_RESET_SET 0x00000001 /* MAC FIFO Reset Set */ - -/* Block 27 -- TX MAC FIFO 2 regisrers */ -#define SK_TXF2_END 0x0D80 -#define SK_TXF2_WPTR 0x0D84 -#define SK_TXF2_RPTR 0x0D8C -#define SK_TXF2_PKTCNT 0x0D90 -#define SK_TXF2_LVL 0x0D94 -#define SK_TXF2_MACCTL 0x0D98 -#define SK_TXF2_CTL 0x0D9C -#define SK_TXLED2_CNTINIT 0x0DA0 -#define SK_TXLED2_COUNTER 0x0DA4 -#define SK_TXLED2_CTL 0x0DA8 -#define SK_TXLED2_TST 0x0DA9 - -#define SK_TXMACCTL_XMAC_RESET 0x00000001 -#define SK_TXMACCTL_XMAC_UNRESET 0x00000002 -#define SK_TXMACCTL_LOOP_OFF 0x00000004 -#define SK_TXMACCTL_LOOP_ON 0x00000008 -#define SK_TXMACCTL_FLUSH_OFF 0x00000010 -#define SK_TXMACCTL_FLUSH_ON 0x00000020 -#define SK_TXMACCTL_WAITEMPTY_OFF 0x00000040 -#define SK_TXMACCTL_WAITEMPTY_ON 0x00000080 -#define SK_TXMACCTL_AFULL_OFF 0x00000100 -#define SK_TXMACCTL_AFULL_ON 0x00000200 -#define SK_TXMACCTL_TXRDY_PATCH_OFF 0x00000400 -#define SK_TXMACCTL_RXRDY_PATCH_ON 0x00000800 -#define SK_TXMACCTL_PKT_RECOVERY_OFF 0x00001000 -#define SK_TXMACCTL_PKT_RECOVERY_ON 0x00002000 -#define SK_TXMACCTL_CLR_IRQ_PERR 0x00008000 -#define SK_TXMACCTL_WAITAFTERFLUSH 0x00010000 - -#define SK_TXLEDCTL_ENABLE 0x0001 -#define SK_TXLEDCTL_COUNTER_STOP 0x0002 -#define SK_TXLEDCTL_COUNTER_START 0x0004 - -#define SK_FIFO_RESET 0x00000001 -#define SK_FIFO_UNRESET 0x00000002 -#define SK_FIFO_OFF 0x00000004 -#define SK_FIFO_ON 0x00000008 - -/* Block 28 -- Descriptor Poll Timer */ -#define SK_DPT_INIT 0x0e00 /* Initial value 24 bits */ -#define SK_DPT_TIMER 0x0e04 /* Mul of 78.12MHz clk (24b) */ - -#define SK_DPT_TIMER_CTRL 0x0e08 /* Timer Control 16 bits */ -#define SK_DPT_TCTL_STOP 0x0001 /* Stop Timer */ -#define SK_DPT_TCTL_START 0x0002 /* Start Timer */ - -#define SK_DPT_TIMER_TEST 0x0e0a /* Timer Test 16 bits */ -#define SK_DPT_TTEST_STEP 0x0001 /* Timer Decrement */ -#define SK_DPT_TTEST_OFF 0x0002 /* Test Mode Off */ -#define SK_DPT_TTEST_ON 0x0004 /* Test Mode On */ - -/* Block 29 -- reserved */ - -/* Block 30 -- GMAC/GPHY Control Registers (Yukon Only)*/ -#define SK_GMAC_CTRL 0x0f00 /* GMAC Control Register */ -#define SK_GPHY_CTRL 0x0f04 /* GPHY Control Register */ -#define SK_GMAC_ISR 0x0f08 /* GMAC Interrupt Source Register */ -#define SK_GMAC_IMR 0x0f08 /* GMAC Interrupt Mask Register */ -#define SK_LINK_CTRL 0x0f10 /* Link Control Register (LCR) */ -#define SK_WOL_CTRL 0x0f20 /* Wake on LAN Control Register */ -#define SK_MAC_ADDR_LOW 0x0f24 /* Mack Address Registers LOW */ -#define SK_MAC_ADDR_HIGH 0x0f28 /* Mack Address Registers HIGH */ -#define SK_PAT_READ_PTR 0x0f2c /* Pattern Read Pointer Register */ -#define SK_PAT_LEN_REG0 0x0f30 /* Pattern Length Register 0 */ -#define SK_PAT_LEN0 0x0f30 /* Pattern Length 0 */ -#define SK_PAT_LEN1 0x0f31 /* Pattern Length 1 */ -#define SK_PAT_LEN2 0x0f32 /* Pattern Length 2 */ -#define SK_PAT_LEN3 0x0f33 /* Pattern Length 3 */ -#define SK_PAT_LEN_REG1 0x0f34 /* Pattern Length Register 1 */ -#define SK_PAT_LEN4 0x0f34 /* Pattern Length 4 */ -#define SK_PAT_LEN5 0x0f35 /* Pattern Length 5 */ -#define SK_PAT_LEN6 0x0f36 /* Pattern Length 6 */ -#define SK_PAT_LEN7 0x0f37 /* Pattern Length 7 */ -#define SK_PAT_CTR_REG0 0x0f38 /* Pattern Counter Register 0 */ -#define SK_PAT_CTR0 0x0f38 /* Pattern Counter 0 */ -#define SK_PAT_CTR1 0x0f39 /* Pattern Counter 1 */ -#define SK_PAT_CTR2 0x0f3a /* Pattern Counter 2 */ -#define SK_PAT_CTR3 0x0f3b /* Pattern Counter 3 */ -#define SK_PAT_CTR_REG1 0x0f3c /* Pattern Counter Register 1 */ -#define SK_PAT_CTR4 0x0f3c /* Pattern Counter 4 */ -#define SK_PAT_CTR5 0x0f3d /* Pattern Counter 5 */ -#define SK_PAT_CTR6 0x0f3e /* Pattern Counter 6 */ -#define SK_PAT_CTR7 0x0f3f /* Pattern Counter 7 */ - -#define SK_GMAC_LOOP_ON 0x00000020 /* Loopback mode for testing */ -#define SK_GMAC_LOOP_OFF 0x00000010 /* purposes */ -#define SK_GMAC_PAUSE_ON 0x00000008 /* enable forward of pause */ -#define SK_GMAC_PAUSE_OFF 0x00000004 /* signal to GMAC */ -#define SK_GMAC_RESET_CLEAR 0x00000002 /* Clear GMAC Reset */ -#define SK_GMAC_RESET_SET 0x00000001 /* Set GMAC Reset */ - -#define SK_GPHY_SEL_BDT 0x10000000 /* Select Bidirectional xfer */ -#define SK_GPHY_INT_POL_HI 0x08000000 /* IRQ Polarity Active */ -#define SK_GPHY_75_OHM 0x04000000 /* Use 75 Ohm Termination */ -#define SK_GPHY_DIS_FC 0x02000000 /* Disable Auto Fiber/Copper */ -#define SK_GPHY_DIS_SLEEP 0x01000000 /* Disable Energy Detect */ -#define SK_GPHY_HWCFG_M_3 0x00800000 /* HWCFG_MODE[3] */ -#define SK_GPHY_HWCFG_M_2 0x00400000 /* HWCFG_MODE[2] */ -#define SK_GPHY_HWCFG_M_1 0x00200000 /* HWCFG_MODE[1] */ -#define SK_GPHY_HWCFG_M_0 0x00100000 /* HWCFG_MODE[0] */ -#define SK_GPHY_ANEG_0 0x00080000 /* ANEG[0] */ -#define SK_GPHY_ENA_XC 0x00040000 /* Enable MDI Crossover */ -#define SK_GPHY_DIS_125 0x00020000 /* Disable 125MHz Clock */ -#define SK_GPHY_ANEG_3 0x00010000 /* ANEG[3] */ -#define SK_GPHY_ANEG_2 0x00008000 /* ANEG[2] */ -#define SK_GPHY_ANEG_1 0x00004000 /* ANEG[1] */ -#define SK_GPHY_ENA_PAUSE 0x00002000 /* Enable Pause */ -#define SK_GPHY_PHYADDR_4 0x00001000 /* Bit 4 of Phy Addr */ -#define SK_GPHY_PHYADDR_3 0x00000800 /* Bit 3 of Phy Addr */ -#define SK_GPHY_PHYADDR_2 0x00000400 /* Bit 2 of Phy Addr */ -#define SK_GPHY_PHYADDR_1 0x00000200 /* Bit 1 of Phy Addr */ -#define SK_GPHY_PHYADDR_0 0x00000100 /* Bit 0 of Phy Addr */ -#define SK_GPHY_RESET_CLEAR 0x00000002 /* Clear GPHY Reset */ -#define SK_GPHY_RESET_SET 0x00000001 /* Set GPHY Reset */ - -#define SK_GPHY_COPPER (SK_GPHY_HWCFG_M_0 | SK_GPHY_HWCFG_M_1 | \ - SK_GPHY_HWCFG_M_2 | SK_GPHY_HWCFG_M_3 ) -#define SK_GPHY_FIBER (SK_GPHY_HWCFG_M_0 | SK_GPHY_HWCFG_M_1 | \ - SK_GPHY_HWCFG_M_2 ) -#define SK_GPHY_ANEG_ALL (SK_GPHY_ANEG_0 | SK_GPHY_ANEG_1 | \ - SK_GPHY_ANEG_2 | SK_GPHY_ANEG_3 ) - -#define SK_GMAC_INT_TX_OFLOW 0x20 /* Transmit Counter Overflow */ -#define SK_GMAC_INT_RX_OFLOW 0x10 /* Receiver Overflow */ -#define SK_GMAC_INT_TX_UNDER 0x08 /* Transmit FIFO Underrun */ -#define SK_GMAC_INT_TX_DONE 0x04 /* Transmit Complete */ -#define SK_GMAC_INT_RX_OVER 0x02 /* Receive FIFO Overrun */ -#define SK_GMAC_INT_RX_DONE 0x01 /* Receive Complete */ - -#define SK_LINK_RESET_CLEAR 0x0002 /* Link Reset Clear */ -#define SK_LINK_RESET_SET 0x0001 /* Link Reset Set */ - -/* Block 31 -- reserved */ - -/* Block 32-33 -- Pattern Ram */ -#define SK_WOL_PRAM 0x1000 - -/* Block 0x22 - 0x3f -- reserved */ - -/* Block 0x40 to 0x4F -- XMAC 1 registers */ -#define SK_XMAC1_BASE 0x2000 - -/* Block 0x50 to 0x5F -- MARV 1 registers */ -#define SK_MARV1_BASE 0x2800 - -/* Block 0x60 to 0x6F -- XMAC 2 registers */ -#define SK_XMAC2_BASE 0x3000 - -/* Block 0x70 to 0x7F -- MARV 2 registers */ -#define SK_MARV2_BASE 0x3800 - -/* Compute relative offset of an XMAC register in the XMAC window(s). */ -#define SK_XMAC_REG(sc, reg) (((reg) * 2) + SK_XMAC1_BASE + \ - (((sc)->sk_port) * (SK_XMAC2_BASE - SK_XMAC1_BASE))) - -#if 0 -#define SK_XM_READ_4(sc, reg) \ - ((sk_win_read_2(sc->sk_softc, \ - SK_XMAC_REG(sc, reg)) & 0xFFFF) | \ - ((sk_win_read_2(sc->sk_softc, \ - SK_XMAC_REG(sc, reg + 2)) & 0xFFFF) << 16)) - -#define SK_XM_WRITE_4(sc, reg, val) \ - sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg), \ - ((val) & 0xFFFF)); \ - sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg + 2), \ - ((val) >> 16) & 0xFFFF) -#else -#define SK_XM_READ_4(sc, reg) \ - sk_win_read_4(sc->sk_softc, SK_XMAC_REG(sc, reg)) - -#define SK_XM_WRITE_4(sc, reg, val) \ - sk_win_write_4(sc->sk_softc, SK_XMAC_REG(sc, reg), (val)) -#endif - -#define SK_XM_READ_2(sc, reg) \ - sk_win_read_2(sc->sk_softc, SK_XMAC_REG(sc, reg)) - -#define SK_XM_WRITE_2(sc, reg, val) \ - sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg), val) - -#define SK_XM_SETBIT_4(sc, reg, x) \ - SK_XM_WRITE_4(sc, reg, (SK_XM_READ_4(sc, reg)) | (x)) - -#define SK_XM_CLRBIT_4(sc, reg, x) \ - SK_XM_WRITE_4(sc, reg, (SK_XM_READ_4(sc, reg)) & ~(x)) - -#define SK_XM_SETBIT_2(sc, reg, x) \ - SK_XM_WRITE_2(sc, reg, (SK_XM_READ_2(sc, reg)) | (x)) - -#define SK_XM_CLRBIT_2(sc, reg, x) \ - SK_XM_WRITE_2(sc, reg, (SK_XM_READ_2(sc, reg)) & ~(x)) - -/* Compute relative offset of an MARV register in the MARV window(s). */ -#define SK_YU_REG(sc, reg) \ - ((reg) + SK_MARV1_BASE + \ - (((sc)->sk_port) * (SK_MARV2_BASE - SK_MARV1_BASE))) - -#define SK_YU_READ_4(sc, reg) \ - sk_win_read_4((sc)->sk_softc, SK_YU_REG((sc), (reg))) - -#define SK_YU_READ_2(sc, reg) \ - sk_win_read_2((sc)->sk_softc, SK_YU_REG((sc), (reg))) - -#define SK_YU_WRITE_4(sc, reg, val) \ - sk_win_write_4((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val)) - -#define SK_YU_WRITE_2(sc, reg, val) \ - sk_win_write_2((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val)) - -#define SK_YU_SETBIT_4(sc, reg, x) \ - SK_YU_WRITE_4(sc, reg, (SK_YU_READ_4(sc, reg)) | (x)) - -#define SK_YU_CLRBIT_4(sc, reg, x) \ - SK_YU_WRITE_4(sc, reg, (SK_YU_READ_4(sc, reg)) & ~(x)) - -#define SK_YU_SETBIT_2(sc, reg, x) \ - SK_YU_WRITE_2(sc, reg, (SK_YU_READ_2(sc, reg)) | (x)) - -#define SK_YU_CLRBIT_2(sc, reg, x) \ - SK_YU_WRITE_2(sc, reg, (SK_YU_READ_2(sc, reg)) & ~(x)) - -/* - * The default FIFO threshold on the XMAC II is 4 bytes. On - * dual port NICs, this often leads to transmit underruns, so we - * bump the threshold a little. - */ -#define SK_XM_TX_FIFOTHRESH 512 - -#define SK_PCI_VENDOR_ID 0x0000 -#define SK_PCI_DEVICE_ID 0x0002 -#define SK_PCI_COMMAND 0x0004 -#define SK_PCI_STATUS 0x0006 -#define SK_PCI_REVID 0x0008 -#define SK_PCI_CLASSCODE 0x0009 -#define SK_PCI_CACHELEN 0x000C -#define SK_PCI_LATENCY_TIMER 0x000D -#define SK_PCI_HEADER_TYPE 0x000E -#define SK_PCI_LOMEM 0x0010 -#define SK_PCI_LOIO 0x0014 -#define SK_PCI_SUBVEN_ID 0x002C -#define SK_PCI_SYBSYS_ID 0x002E -#define SK_PCI_BIOSROM 0x0030 -#define SK_PCI_INTLINE 0x003C -#define SK_PCI_INTPIN 0x003D -#define SK_PCI_MINGNT 0x003E -#define SK_PCI_MINLAT 0x003F - -/* device specific PCI registers */ -#define SK_PCI_OURREG1 0x0040 -#define SK_PCI_OURREG2 0x0044 -#define SK_PCI_CAPID 0x0048 /* 8 bits */ -#define SK_PCI_NEXTPTR 0x0049 /* 8 bits */ -#define SK_PCI_PWRMGMTCAP 0x004A /* 16 bits */ -#define SK_PCI_PWRMGMTCTRL 0x004C /* 16 bits */ -#define SK_PCI_PME_EVENT 0x004F -#define SK_PCI_VPD_CAPID 0x0050 -#define SK_PCI_VPD_NEXTPTR 0x0051 -#define SK_PCI_VPD_ADDR 0x0052 -#define SK_PCI_VPD_DATA 0x0054 - -#define SK_PSTATE_MASK 0x0003 -#define SK_PSTATE_D0 0x0000 -#define SK_PSTATE_D1 0x0001 -#define SK_PSTATE_D2 0x0002 -#define SK_PSTATE_D3 0x0003 -#define SK_PME_EN 0x0010 -#define SK_PME_STATUS 0x8000 - -/* - * VPD flag bit. Set to 0 to initiate a read, will become 1 when - * read is complete. Set to 1 to initiate a write, will become 0 - * when write is finished. - */ -#define SK_VPD_FLAG 0x8000 - -/* VPD structures */ -struct vpd_res { - u_int8_t vr_id; - u_int8_t vr_len; - u_int8_t vr_pad; -}; - -struct vpd_key { - char vk_key[2]; - u_int8_t vk_len; -}; - -#define VPD_RES_ID 0x82 /* ID string */ -#define VPD_RES_READ 0x90 /* start of read only area */ -#define VPD_RES_WRITE 0x81 /* start of read/write area */ -#define VPD_RES_END 0x78 /* end tag */ - -#define CSR_WRITE_4(sc, reg, val) \ - bus_space_write_4((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val)) -#define CSR_WRITE_2(sc, reg, val) \ - bus_space_write_2((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val)) -#define CSR_WRITE_1(sc, reg, val) \ - bus_space_write_1((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val)) - -#define CSR_READ_4(sc, reg) \ - bus_space_read_4((sc)->sk_btag, (sc)->sk_bhandle, (reg)) -#define CSR_READ_2(sc, reg) \ - bus_space_read_2((sc)->sk_btag, (sc)->sk_bhandle, (reg)) -#define CSR_READ_1(sc, reg) \ - bus_space_read_1((sc)->sk_btag, (sc)->sk_bhandle, (reg)) - -struct sk_type { - u_int16_t sk_vid; - u_int16_t sk_did; - char *sk_name; -}; - -/* RX queue descriptor data structure */ -struct sk_rx_desc { - u_int32_t sk_ctl; - u_int32_t sk_next; - u_int32_t sk_data_lo; - u_int32_t sk_data_hi; - u_int32_t sk_xmac_rxstat; - u_int32_t sk_timestamp; - u_int16_t sk_csum2; - u_int16_t sk_csum1; - u_int16_t sk_csum2_start; - u_int16_t sk_csum1_start; -}; - -#define SK_OPCODE_DEFAULT 0x00550000 -#define SK_OPCODE_CSUM 0x00560000 - -#define SK_RXCTL_LEN 0x0000FFFF -#define SK_RXCTL_OPCODE 0x00FF0000 -#define SK_RXCTL_TSTAMP_VALID 0x01000000 -#define SK_RXCTL_STATUS_VALID 0x02000000 -#define SK_RXCTL_DEV0 0x04000000 -#define SK_RXCTL_EOF_INTR 0x08000000 -#define SK_RXCTL_EOB_INTR 0x10000000 -#define SK_RXCTL_LASTFRAG 0x20000000 -#define SK_RXCTL_FIRSTFRAG 0x40000000 -#define SK_RXCTL_OWN 0x80000000 - -#define SK_RXSTAT \ - (SK_OPCODE_DEFAULT|SK_RXCTL_EOF_INTR|SK_RXCTL_LASTFRAG| \ - SK_RXCTL_FIRSTFRAG|SK_RXCTL_OWN) - -struct sk_tx_desc { - u_int32_t sk_ctl; - u_int32_t sk_next; - u_int32_t sk_data_lo; - u_int32_t sk_data_hi; - u_int32_t sk_xmac_txstat; - u_int16_t sk_rsvd0; - u_int16_t sk_csum_startval; - u_int16_t sk_csum_startpos; - u_int16_t sk_csum_writepos; - u_int32_t sk_rsvd1; -}; - -#define SK_TXCTL_LEN 0x0000FFFF -#define SK_TXCTL_OPCODE 0x00FF0000 -#define SK_TXCTL_SW 0x01000000 -#define SK_TXCTL_NOCRC 0x02000000 -#define SK_TXCTL_STORENFWD 0x04000000 -#define SK_TXCTL_EOF_INTR 0x08000000 -#define SK_TXCTL_EOB_INTR 0x10000000 -#define SK_TXCTL_LASTFRAG 0x20000000 -#define SK_TXCTL_FIRSTFRAG 0x40000000 -#define SK_TXCTL_OWN 0x80000000 - -#define SK_TXSTAT \ - (SK_OPCODE_DEFAULT|SK_TXCTL_EOF_INTR|SK_TXCTL_LASTFRAG|SK_TXCTL_OWN) - -#define SK_RXBYTES(x) (x) & 0x0000FFFF; -#define SK_TXBYTES SK_RXBYTES - -#define SK_TX_RING_CNT 512 -#define SK_RX_RING_CNT 256 - -/* - * Jumbo buffer stuff. Note that we must allocate more jumbo - * buffers than there are descriptors in the receive ring. This - * is because we don't know how long it will take for a packet - * to be released after we hand it off to the upper protocol - * layers. To be safe, we allocate 1.5 times the number of - * receive descriptors. - */ -#define SK_JUMBO_FRAMELEN 9018 -#define SK_JUMBO_MTU (SK_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN) -#define SK_JSLOTS ((SK_RX_RING_CNT * 3) / 2) - -#define SK_JRAWLEN (SK_JUMBO_FRAMELEN + ETHER_ALIGN) -#define SK_JLEN (SK_JRAWLEN + (sizeof(u_int64_t) - \ - (SK_JRAWLEN % sizeof(u_int64_t)))) -#define SK_JPAGESZ PAGE_SIZE -#define SK_RESID (SK_JPAGESZ - (SK_JLEN * SK_JSLOTS) % SK_JPAGESZ) -#define SK_JMEM ((SK_JLEN * SK_JSLOTS) + SK_RESID) - -struct sk_jpool_entry { - int slot; - SLIST_ENTRY(sk_jpool_entry) jpool_entries; -}; - -struct sk_chain { - void *sk_desc; - struct mbuf *sk_mbuf; - struct sk_chain *sk_next; -}; - -struct sk_chain_data { - struct sk_chain sk_tx_chain[SK_TX_RING_CNT]; - struct sk_chain sk_rx_chain[SK_RX_RING_CNT]; - int sk_tx_prod; - int sk_tx_cons; - int sk_tx_cnt; - int sk_rx_prod; - int sk_rx_cons; - int sk_rx_cnt; - /* Stick the jumbo mem management stuff here too. */ - caddr_t sk_jslots[SK_JSLOTS]; - void *sk_jumbo_buf; - -}; - -struct sk_ring_data { - struct sk_tx_desc sk_tx_ring[SK_TX_RING_CNT]; - struct sk_rx_desc sk_rx_ring[SK_RX_RING_CNT]; -}; - -struct sk_bcom_hack { - int reg; - int val; -}; - -#define SK_INC(x, y) (x) = (x + 1) % y - -/* Forward decl. */ -struct sk_if_softc; - -/* Softc for the GEnesis controller. */ -struct sk_softc { - bus_space_handle_t sk_bhandle; /* bus space handle */ - bus_space_tag_t sk_btag; /* bus space tag */ - void *sk_intrhand; /* irq handler handle */ - struct resource *sk_irq; /* IRQ resource handle */ - struct resource *sk_res; /* I/O or shared mem handle */ - u_int8_t sk_unit; /* controller number */ - u_int8_t sk_type; - u_int8_t sk_rev; - u_int8_t spare; - char *sk_vpd_prodname; - char *sk_vpd_readonly; - uint16_t sk_vpd_readonly_len; - u_int32_t sk_rboff; /* RAMbuffer offset */ - u_int32_t sk_ramsize; /* amount of RAM on NIC */ - u_int32_t sk_pmd; /* physical media type */ - u_int32_t sk_intrmask; - int sk_int_mod; - struct sk_if_softc *sk_if[2]; - device_t sk_devs[2]; - struct mtx sk_mtx; -}; - -#define SK_LOCK(_sc) mtx_lock(&(_sc)->sk_mtx) -#define SK_UNLOCK(_sc) mtx_unlock(&(_sc)->sk_mtx) -#define SK_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sk_mtx, MA_OWNED) -#define SK_IF_LOCK(_sc) SK_LOCK((_sc)->sk_softc) -#define SK_IF_UNLOCK(_sc) SK_UNLOCK((_sc)->sk_softc) -#define SK_IF_LOCK_ASSERT(_sc) SK_LOCK_ASSERT((_sc)->sk_softc) - -/* Softc for each logical interface */ -struct sk_if_softc { - struct ifnet *sk_ifp; /* interface info */ - device_t sk_miibus; - u_int8_t sk_unit; /* interface number */ - u_int8_t sk_port; /* port # on controller */ - u_int8_t sk_xmac_rev; /* XMAC chip rev (B2 or C1) */ - u_int32_t sk_rx_ramstart; - u_int32_t sk_rx_ramend; - u_int32_t sk_tx_ramstart; - u_int32_t sk_tx_ramend; - int sk_phytype; - int sk_phyaddr; - device_t sk_dev; - int sk_cnt; - int sk_link; - struct callout_handle sk_tick_ch; - struct sk_chain_data sk_cdata; - struct sk_ring_data *sk_rdata; - struct sk_softc *sk_softc; /* parent controller */ - int sk_tx_bmu; /* TX BMU register */ - int sk_if_flags; - SLIST_HEAD(__sk_jfreehead, sk_jpool_entry) sk_jfree_listhead; - SLIST_HEAD(__sk_jinusehead, sk_jpool_entry) sk_jinuse_listhead; - struct mtx sk_jlist_mtx; -}; - -#define SK_JLIST_LOCK(_sc) mtx_lock(&(_sc)->sk_jlist_mtx) -#define SK_JLIST_UNLOCK(_sc) mtx_unlock(&(_sc)->sk_jlist_mtx) - -#define SK_MAXUNIT 256 -#define SK_TIMEOUT 1000 -#define ETHER_ALIGN 2 - -#ifdef __alpha__ -#undef vtophys -#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) -#endif diff --git a/sys/dev/sk/xmaciireg.h b/sys/dev/sk/xmaciireg.h deleted file mode 100644 index 38cd8cb..0000000 --- a/sys/dev/sk/xmaciireg.h +++ /dev/null @@ -1,403 +0,0 @@ -/*- - * Copyright (c) 1997, 1998, 1999, 2000 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Registers and data structures for the XaQti Corporation XMAC II - * Gigabit Ethernet MAC. Datasheet is available from http://www.xaqti.com. - * The XMAC can be programmed for 16-bit or 32-bit register access modes. - * The SysKonnect gigabit ethernet adapters use 16-bit mode, so that's - * how the registers are laid out here. - */ - -#define XM_DEVICEID 0x00E0AE20 -#define XM_XAQTI_OUI 0x00E0AE - -#define XM_XMAC_REV(x) (((x) & 0x000000E0) >> 5) - -#define XM_XMAC_REV_B2 0x0 -#define XM_XMAC_REV_C1 0x1 - -#define XM_MMUCMD 0x0000 -#define XM_POFF 0x0008 -#define XM_BURST 0x000C -#define XM_VLAN_TAGLEV1 0x0010 -#define XM_VLAN_TAGLEV2 0x0014 -#define XM_TXCMD 0x0020 -#define XM_TX_RETRYLIMIT 0x0024 -#define XM_TX_SLOTTIME 0x0028 -#define XM_TX_IPG 0x003C -#define XM_RXCMD 0x0030 -#define XM_PHY_ADDR 0x0034 -#define XM_PHY_DATA 0x0038 -#define XM_GPIO 0x0040 -#define XM_IMR 0x0044 -#define XM_ISR 0x0048 -#define XM_HWCFG 0x004C -#define XM_TX_LOWAT 0x0060 -#define XM_TX_HIWAT 0x0062 -#define XM_TX_REQTHRESH_LO 0x0064 -#define XM_TX_REQTHRESH_HI 0x0066 -#define XM_TX_REQTHRESH XM_TX_REQTHRESH_LO -#define XM_PAUSEDST0 0x0068 -#define XM_PAUSEDST1 0x006A -#define XM_PAUSEDST2 0x006C -#define XM_CTLPARM_LO 0x0070 -#define XM_CTLPARM_HI 0x0072 -#define XM_CTLPARM XM_CTLPARM_LO -#define XM_OPCODE_PAUSE_TIMER 0x0074 -#define XM_TXSTAT_LIFO 0x0078 - -/* - * Perfect filter registers. The XMAC has a table of 16 perfect - * filter entries, spaced 8 bytes apart. This is in addition to - * the station address registers, which appear below. - */ -#define XM_RXFILT_BASE 0x0080 -#define XM_RXFILT_END 0x0107 -#define XM_RXFILT_MAX 16 -#define XM_RXFILT_ENTRY(ent) (XM_RXFILT_BASE + ((ent * 8))) - -/* Primary station address. */ -#define XM_PAR0 0x0108 -#define XM_PAR1 0x010A -#define XM_PAR2 0x010C - -/* 64-bit multicast hash table registers */ -#define XM_MAR0 0x0110 -#define XM_MAR1 0x0112 -#define XM_MAR2 0x0114 -#define XM_MAR3 0x0116 -#define XM_RX_LOWAT 0x0118 -#define XM_RX_HIWAT 0x011A -#define XM_RX_REQTHRESH_LO 0x011C -#define XM_RX_REQTHRESH_HI 0x011E -#define XM_RX_REQTHRESH XM_RX_REQTHRESH_LO -#define XM_DEVID_LO 0x0120 -#define XM_DEVID_HI 0x0122 -#define XM_DEVID XM_DEVID_LO -#define XM_MODE_LO 0x0124 -#define XM_MODE_HI 0x0126 -#define XM_MODE XM_MODE_LO -#define XM_LASTSRC0 0x0128 -#define XM_LASTSRC1 0x012A -#define XM_LASTSRC2 0x012C -#define XM_TSTAMP_READ 0x0130 -#define XM_TSTAMP_LOAD 0x0134 -#define XM_STATS_CMD 0x0200 -#define XM_RXCNT_EVENT_LO 0x0204 -#define XM_RXCNT_EVENT_HI 0x0206 -#define XM_RXCNT_EVENT XM_RXCNT_EVENT_LO -#define XM_TXCNT_EVENT_LO 0x0208 -#define XM_TXCNT_EVENT_HI 0x020A -#define XM_TXCNT_EVENT XM_TXCNT_EVENT_LO -#define XM_RXCNT_EVMASK_LO 0x020C -#define XM_RXCNT_EVMASK_HI 0x020E -#define XM_RXCNT_EVMASK XM_RXCNT_EVMASK_LO -#define XM_TXCNT_EVMASK_LO 0x0210 -#define XM_TXCNT_EVMASK_HI 0x0212 -#define XM_TXCNT_EVMASK XM_TXCNT_EVMASK_LO - -/* Statistics command register */ -#define XM_STATCMD_CLR_TX 0x0001 -#define XM_STATCMD_CLR_RX 0x0002 -#define XM_STATCMD_COPY_TX 0x0004 -#define XM_STATCMD_COPY_RX 0x0008 -#define XM_STATCMD_SNAP_TX 0x0010 -#define XM_STATCMD_SNAP_RX 0x0020 - -/* TX statistics registers */ -#define XM_TXSTATS_PKTSOK 0x280 -#define XM_TXSTATS_BYTESOK_HI 0x284 -#define XM_TXSTATS_BYTESOK_LO 0x288 -#define XM_TXSTATS_BCASTSOK 0x28C -#define XM_TXSTATS_MCASTSOK 0x290 -#define XM_TXSTATS_UCASTSOK 0x294 -#define XM_TXSTATS_GIANTS 0x298 -#define XM_TXSTATS_BURSTCNT 0x29C -#define XM_TXSTATS_PAUSEPKTS 0x2A0 -#define XM_TXSTATS_MACCTLPKTS 0x2A4 -#define XM_TXSTATS_SINGLECOLS 0x2A8 -#define XM_TXSTATS_MULTICOLS 0x2AC -#define XM_TXSTATS_EXCESSCOLS 0x2B0 -#define XM_TXSTATS_LATECOLS 0x2B4 -#define XM_TXSTATS_DEFER 0x2B8 -#define XM_TXSTATS_EXCESSDEFER 0x2BC -#define XM_TXSTATS_UNDERRUN 0x2C0 -#define XM_TXSTATS_CARRIERSENSE 0x2C4 -#define XM_TXSTATS_UTILIZATION 0x2C8 -#define XM_TXSTATS_64 0x2D0 -#define XM_TXSTATS_65_127 0x2D4 -#define XM_TXSTATS_128_255 0x2D8 -#define XM_TXSTATS_256_511 0x2DC -#define XM_TXSTATS_512_1023 0x2E0 -#define XM_TXSTATS_1024_MAX 0x2E4 - -/* RX statistics registers */ -#define XM_RXSTATS_PKTSOK 0x300 -#define XM_RXSTATS_BYTESOK_HI 0x304 -#define XM_RXSTATS_BYTESOK_LO 0x308 -#define XM_RXSTATS_BCASTSOK 0x30C -#define XM_RXSTATS_MCASTSOK 0x310 -#define XM_RXSTATS_UCASTSOK 0x314 -#define XM_RXSTATS_PAUSEPKTS 0x318 -#define XM_RXSTATS_MACCTLPKTS 0x31C -#define XM_RXSTATS_BADPAUSEPKTS 0x320 -#define XM_RXSTATS_BADMACCTLPKTS 0x324 -#define XM_RXSTATS_BURSTCNT 0x328 -#define XM_RXSTATS_MISSEDPKTS 0x32C -#define XM_RXSTATS_FRAMEERRS 0x330 -#define XM_RXSTATS_OVERRUN 0x334 -#define XM_RXSTATS_JABBER 0x338 -#define XM_RXSTATS_CARRLOSS 0x33C -#define XM_RXSTATS_INRNGLENERR 0x340 -#define XM_RXSTATS_SYMERR 0x344 -#define XM_RXSTATS_SHORTEVENT 0x348 -#define XM_RXSTATS_RUNTS 0x34C -#define XM_RXSTATS_GIANTS 0x350 -#define XM_RXSTATS_CRCERRS 0x354 -#define XM_RXSTATS_CEXTERRS 0x35C -#define XM_RXSTATS_UTILIZATION 0x360 -#define XM_RXSTATS_64 0x368 -#define XM_RXSTATS_65_127 0x36C -#define XM_RXSTATS_128_255 0x370 -#define XM_RXSTATS_256_511 0x374 -#define XM_RXSTATS_512_1023 0x378 -#define XM_RXSTATS_1024_MAX 0x37C - -#define XM_MMUCMD_TX_ENB 0x0001 -#define XM_MMUCMD_RX_ENB 0x0002 -#define XM_MMUCMD_GMIILOOP 0x0004 -#define XM_MMUCMD_RATECTL 0x0008 -#define XM_MMUCMD_GMIIFDX 0x0010 -#define XM_MMUCMD_NO_MGMT_PRMB 0x0020 -#define XM_MMUCMD_SIMCOL 0x0040 -#define XM_MMUCMD_FORCETX 0x0080 -#define XM_MMUCMD_LOOPENB 0x0200 -#define XM_MMUCMD_IGNPAUSE 0x0400 -#define XM_MMUCMD_PHYBUSY 0x0800 -#define XM_MMUCMD_PHYDATARDY 0x1000 - -#define XM_TXCMD_AUTOPAD 0x0001 -#define XM_TXCMD_NOCRC 0x0002 -#define XM_TXCMD_NOPREAMBLE 0x0004 -#define XM_TXCMD_NOGIGAMODE 0x0008 -#define XM_TXCMD_SAMPLELINE 0x0010 -#define XM_TXCMD_ENCBYPASS 0x0020 -#define XM_TXCMD_XMITBK2BK 0x0040 -#define XM_TXCMD_FAIRSHARE 0x0080 - -#define XM_RXCMD_DISABLE_CEXT 0x0001 -#define XM_RXCMD_STRIPPAD 0x0002 -#define XM_RXCMD_SAMPLELINE 0x0004 -#define XM_RXCMD_SELFRX 0x0008 -#define XM_RXCMD_STRIPFCS 0x0010 -#define XM_RXCMD_TRANSPARENT 0x0020 -#define XM_RXCMD_IPGCAPTURE 0x0040 -#define XM_RXCMD_BIGPKTOK 0x0080 -#define XM_RXCMD_LENERROK 0x0100 - -#define XM_GPIO_GP0_SET 0x0001 -#define XM_GPIO_RESETSTATS 0x0004 -#define XM_GPIO_RESETMAC 0x0008 -#define XM_GPIO_FORCEINT 0x0020 -#define XM_GPIO_ANEGINPROG 0x0040 - -#define XM_IMR_RX_EOF 0x0001 -#define XM_IMR_TX_EOF 0x0002 -#define XM_IMR_TX_UNDERRUN 0x0004 -#define XM_IMR_RX_OVERRUN 0x0008 -#define XM_IMR_TX_STATS_OFLOW 0x0010 -#define XM_IMR_RX_STATS_OFLOW 0x0020 -#define XM_IMR_TSTAMP_OFLOW 0x0040 -#define XM_IMR_AUTONEG_DONE 0x0080 -#define XM_IMR_NEXTPAGE_RDY 0x0100 -#define XM_IMR_PAGE_RECEIVED 0x0200 -#define XM_IMR_LP_REQCFG 0x0400 -#define XM_IMR_GP0_SET 0x0800 -#define XM_IMR_FORCEINTR 0x1000 -#define XM_IMR_TX_ABORT 0x2000 -#define XM_IMR_LINKEVENT 0x4000 - -#define XM_INTRS \ - (~(XM_IMR_GP0_SET|XM_IMR_AUTONEG_DONE|XM_IMR_TX_UNDERRUN)) - -#define XM_ISR_RX_EOF 0x0001 -#define XM_ISR_TX_EOF 0x0002 -#define XM_ISR_TX_UNDERRUN 0x0004 -#define XM_ISR_RX_OVERRUN 0x0008 -#define XM_ISR_TX_STATS_OFLOW 0x0010 -#define XM_ISR_RX_STATS_OFLOW 0x0020 -#define XM_ISR_TSTAMP_OFLOW 0x0040 -#define XM_ISR_AUTONEG_DONE 0x0080 -#define XM_ISR_NEXTPAGE_RDY 0x0100 -#define XM_ISR_PAGE_RECEIVED 0x0200 -#define XM_ISR_LP_REQCFG 0x0400 -#define XM_ISR_GP0_SET 0x0800 -#define XM_ISR_FORCEINTR 0x1000 -#define XM_ISR_TX_ABORT 0x2000 -#define XM_ISR_LINKEVENT 0x4000 - -#define XM_HWCFG_GENEOP 0x0008 -#define XM_HWCFG_SIGSTATCKH 0x0004 -#define XM_HWCFG_GMIIMODE 0x0001 - -#define XM_MODE_FLUSH_RXFIFO 0x00000001 -#define XM_MODE_FLUSH_TXFIFO 0x00000002 -#define XM_MODE_BIGENDIAN 0x00000004 -#define XM_MODE_RX_PROMISC 0x00000008 -#define XM_MODE_RX_NOBROAD 0x00000010 -#define XM_MODE_RX_NOMULTI 0x00000020 -#define XM_MODE_RX_NOUNI 0x00000040 -#define XM_MODE_RX_BADFRAMES 0x00000080 -#define XM_MODE_RX_CRCERRS 0x00000100 -#define XM_MODE_RX_GIANTS 0x00000200 -#define XM_MODE_RX_INRANGELEN 0x00000400 -#define XM_MODE_RX_RUNTS 0x00000800 -#define XM_MODE_RX_MACCTL 0x00001000 -#define XM_MODE_RX_USE_PERFECT 0x00002000 -#define XM_MODE_RX_USE_STATION 0x00004000 -#define XM_MODE_RX_USE_HASH 0x00008000 -#define XM_MODE_RX_ADDRPAIR 0x00010000 -#define XM_MODE_PAUSEONHI 0x00020000 -#define XM_MODE_PAUSEONLO 0x00040000 -#define XM_MODE_TIMESTAMP 0x00080000 -#define XM_MODE_SENDPAUSE 0x00100000 -#define XM_MODE_SENDCONTINUOUS 0x00200000 -#define XM_MODE_LE_STATUSWORD 0x00400000 -#define XM_MODE_AUTOFIFOPAUSE 0x00800000 -#define XM_MODE_EXPAUSEGEN 0x02000000 -#define XM_MODE_RX_INVERSE 0x04000000 - -#define XM_RXSTAT_MACCTL 0x00000001 -#define XM_RXSTAT_ERRFRAME 0x00000002 -#define XM_RXSTAT_CRCERR 0x00000004 -#define XM_RXSTAT_GIANT 0x00000008 -#define XM_RXSTAT_RUNT 0x00000010 -#define XM_RXSTAT_FRAMEERR 0x00000020 -#define XM_RXSTAT_INRANGEERR 0x00000040 -#define XM_RXSTAT_CARRIERERR 0x00000080 -#define XM_RXSTAT_COLLERR 0x00000100 -#define XM_RXSTAT_802_3 0x00000200 -#define XM_RXSTAT_CARREXTERR 0x00000400 -#define XM_RXSTAT_BURSTMODE 0x00000800 -#define XM_RXSTAT_UNICAST 0x00002000 -#define XM_RXSTAT_MULTICAST 0x00004000 -#define XM_RXSTAT_BROADCAST 0x00008000 -#define XM_RXSTAT_VLAN_LEV1 0x00010000 -#define XM_RXSTAT_VLAN_LEV2 0x00020000 -#define XM_RXSTAT_LEN 0xFFFC0000 - -/* - * XMAC PHY registers, indirectly accessed through - * XM_PHY_ADDR and XM_PHY_REG. - */ - -#define XM_PHY_BMCR 0x0000 /* control */ -#define XM_PHY_BMSR 0x0001 /* status */ -#define XM_PHY_VENID 0x0002 /* vendor id */ -#define XM_PHY_DEVID 0x0003 /* device id */ -#define XM_PHY_ANAR 0x0004 /* autoneg advertisenemt */ -#define XM_PHY_LPAR 0x0005 /* link partner ability */ -#define XM_PHY_ANEXP 0x0006 /* autoneg expansion */ -#define XM_PHY_NEXTP 0x0007 /* nextpage */ -#define XM_PHY_LPNEXTP 0x0008 /* link partner's nextpage */ -#define XM_PHY_EXTSTS 0x000F /* extented status */ -#define XM_PHY_RESAB 0x0010 /* resolved ability */ - -#define XM_BMCR_DUPLEX 0x0100 -#define XM_BMCR_RENEGOTIATE 0x0200 -#define XM_BMCR_AUTONEGENBL 0x1000 -#define XM_BMCR_LOOPBACK 0x4000 -#define XM_BMCR_RESET 0x8000 - -#define XM_BMSR_EXTCAP 0x0001 -#define XM_BMSR_LINKSTAT 0x0004 -#define XM_BMSR_AUTONEGABLE 0x0008 -#define XM_BMSR_REMFAULT 0x0010 -#define XM_BMSR_AUTONEGDONE 0x0020 -#define XM_BMSR_EXTSTAT 0x0100 - -#define XM_VENID_XAQTI 0xD14C -#define XM_DEVID_XMAC 0x0002 - -#define XM_ANAR_FULLDUPLEX 0x0020 -#define XM_ANAR_HALFDUPLEX 0x0040 -#define XM_ANAR_PAUSEBITS 0x0180 -#define XM_ANAR_REMFAULTBITS 0x1800 -#define XM_ANAR_ACK 0x4000 -#define XM_ANAR_NEXTPAGE 0x8000 - -#define XM_LPAR_FULLDUPLEX 0x0020 -#define XM_LPAR_HALFDUPLEX 0x0040 -#define XM_LPAR_PAUSEBITS 0x0180 -#define XM_LPAR_REMFAULTBITS 0x1800 -#define XM_LPAR_ACK 0x4000 -#define XM_LPAR_NEXTPAGE 0x8000 - -#define XM_PAUSE_NOPAUSE 0x0000 -#define XM_PAUSE_SYMPAUSE 0x0080 -#define XM_PAUSE_ASYMPAUSE 0x0100 -#define XM_PAUSE_BOTH 0x0180 - -#define XM_REMFAULT_LINKOK 0x0000 -#define XM_REMFAULT_LINKFAIL 0x0800 -#define XM_REMFAULT_OFFLINE 0x1000 -#define XM_REMFAULT_ANEGERR 0x1800 - -#define XM_ANEXP_GOTPAGE 0x0002 -#define XM_ANEXP_NEXTPAGE_SELF 0x0004 -#define XM_ANEXP_NEXTPAGE_LP 0x0008 - -#define XM_NEXTP_MESSAGE 0x07FF -#define XM_NEXTP_TOGGLE 0x0800 -#define XM_NEXTP_ACK2 0x1000 -#define XM_NEXTP_MPAGE 0x2000 -#define XM_NEXTP_ACK1 0x4000 -#define XM_NEXTP_NPAGE 0x8000 - -#define XM_LPNEXTP_MESSAGE 0x07FF -#define XM_LPNEXTP_TOGGLE 0x0800 -#define XM_LPNEXTP_ACK2 0x1000 -#define XM_LPNEXTP_MPAGE 0x2000 -#define XM_LPNEXTP_ACK1 0x4000 -#define XM_LPNEXTP_NPAGE 0x8000 - -#define XM_EXTSTS_HALFDUPLEX 0x4000 -#define XM_EXTSTS_FULLDUPLEX 0x8000 - -#define XM_RESAB_PAUSEMISMATCH 0x0008 -#define XM_RESAB_ABLMISMATCH 0x0010 -#define XM_RESAB_FDMODESEL 0x0020 -#define XM_RESAB_HDMODESEL 0x0040 -#define XM_RESAB_PAUSEBITS 0x0180 diff --git a/sys/dev/sk/yukonreg.h b/sys/dev/sk/yukonreg.h deleted file mode 100644 index 51d9f3a..0000000 --- a/sys/dev/sk/yukonreg.h +++ /dev/null @@ -1,171 +0,0 @@ -/* $OpenBSD: yukonreg.h,v 1.2 2003/08/12 05:23:06 nate Exp $ */ -/*- - * Copyright (c) 2003 Nathan L. Binkert <binkertn@umich.edu> - * - * Permission to use, copy, modify, and distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - * $FreeBSD$ - */ - -/* General Purpose Status Register (GPSR) */ -#define YUKON_GPSR 0x0000 - -#define YU_GPSR_SPEED 0x8000 /* speed 0 - 10Mbps, 1 - 100Mbps */ -#define YU_GPSR_DUPLEX 0x4000 /* 0 - half duplex, 1 - full duplex */ -#define YU_GPSR_FCTL_TX 0x2000 /* flow control */ -#define YU_GPSR_LINK 0x1000 /* link status (down/up) */ -#define YU_GPSR_PAUSE 0x0800 /* flow control enable/disable */ -#define YU_GPSR_TX_IN_PROG 0x0400 /* transmit in progress */ -#define YU_GPSR_EXCESS_COL 0x0200 /* excessive collisions occurred */ -#define YU_GPSR_LATE_COL 0x0100 /* late collision occurred */ -#define YU_GPSR_MII_PHY_STC 0x0020 /* MII PHY status change */ -#define YU_GPSR_GIG_SPEED 0x0010 /* Gigabit Speed (0 - use speed bit) */ -#define YU_GPSR_PARTITION 0x0008 /* partition mode */ -#define YU_GPSR_FCTL_RX 0x0004 /* flow control enable/disable */ -#define YU_GPSR_PROMS_EN 0x0002 /* promiscuous mode enable/disable */ - -/* General Purpose Control Register (GPCR) */ -#define YUKON_GPCR 0x0004 - -#define YU_GPCR_FCTL_TX 0x2000 /* Transmit flow control 802.3x */ -#define YU_GPCR_TXEN 0x1000 /* Transmit Enable */ -#define YU_GPCR_RXEN 0x0800 /* Receive Enable */ -#define YU_GPCR_LPBK 0x0200 /* Loopback Enable */ -#define YU_GPCR_PAR 0x0100 /* Partition Enable */ -#define YU_GPCR_GIG 0x0080 /* Gigabit Speed */ -#define YU_GPCR_FLP 0x0040 /* Force Link Pass */ -#define YU_GPCR_DUPLEX 0x0020 /* Duplex Enable */ -#define YU_GPCR_FCTL_RX 0x0010 /* Receive flow control 802.3x */ -#define YU_GPCR_SPEED 0x0008 /* Port Speed */ -#define YU_GPCR_DPLX_EN 0x0004 /* Enable Auto-Update for duplex */ -#define YU_GPCR_FCTL_EN 0x0002 /* Enabel Auto-Update for 802.3x */ -#define YU_GPCR_SPEED_EN 0x0001 /* Enable Auto-Update for speed */ - -/* Transmit Control Register (TCR) */ -#define YUKON_TCR 0x0008 - -#define YU_TCR_FJ 0x8000 /* force jam / flow control */ -#define YU_TCR_CRCD 0x4000 /* insert CRC (0 - enable) */ -#define YU_TCR_PADD 0x2000 /* pad packets to 64b (0 - enable) */ -#define YU_TCR_COLTH 0x1c00 /* collision threshold */ - -/* Receive Control Register (RCR) */ -#define YUKON_RCR 0x000c - -#define YU_RCR_UFLEN 0x8000 /* unicast filter enable */ -#define YU_RCR_MUFLEN 0x4000 /* multicast filter enable */ -#define YU_RCR_CRCR 0x2000 /* remove CRC */ -#define YU_RCR_PASSFC 0x1000 /* pass flow control packets */ - -/* Transmit Flow Control Register (TFCR) */ -#define YUKON_TFCR 0x0010 /* Pause Time */ - -/* Transmit Parameter Register (TPR) */ -#define YUKON_TPR 0x0014 - -#define YU_TPR_JAM_LEN(x) (((x) & 0x3) << 14) -#define YU_TPR_JAM_IPG(x) (((x) & 0x1f) << 9) -#define YU_TPR_JAM2DATA_IPG(x) (((x) & 0x1f) << 4) - -/* Serial Mode Register (SMR) */ -#define YUKON_SMR 0x0018 - -#define YU_SMR_DATA_BLIND(x) (((x) & 0x1f) << 11) -#define YU_SMR_LIMIT4 0x0400 /* reset after 16 / 4 collisions */ -#define YU_SMR_MFL_JUMBO 0x0100 /* max frame length for jumbo frames */ -#define YU_SMR_MFL_VLAN 0x0200 /* max frame length + vlan tag */ -#define YU_SMR_IPG_DATA(x) ((x) & 0x1f) - -/* Source Address Low #1 (SAL1) */ -#define YUKON_SAL1 0x001c /* SA1[15:0] */ - -/* Source Address Middle #1 (SAM1) */ -#define YUKON_SAM1 0x0020 /* SA1[31:16] */ - -/* Source Address High #1 (SAH1) */ -#define YUKON_SAH1 0x0024 /* SA1[47:32] */ - -/* Source Address Low #2 (SAL2) */ -#define YUKON_SAL2 0x0028 /* SA2[15:0] */ - -/* Source Address Middle #2 (SAM2) */ -#define YUKON_SAM2 0x002c /* SA2[31:16] */ - -/* Source Address High #2 (SAH2) */ -#define YUKON_SAH2 0x0030 /* SA2[47:32] */ - -/* Multicatst Address Hash Register 1 (MCAH1) */ -#define YUKON_MCAH1 0x0034 - -/* Multicatst Address Hash Register 2 (MCAH2) */ -#define YUKON_MCAH2 0x0038 - -/* Multicatst Address Hash Register 3 (MCAH3) */ -#define YUKON_MCAH3 0x003c - -/* Multicatst Address Hash Register 4 (MCAH4) */ -#define YUKON_MCAH4 0x0040 - -/* Transmit Interrupt Register (TIR) */ -#define YUKON_TIR 0x0044 - -#define YU_TIR_OUT_UNICAST 0x0001 /* Num Unicast Packets Transmitted */ -#define YU_TIR_OUT_BROADCAST 0x0002 /* Num Broadcast Packets Transmitted */ -#define YU_TIR_OUT_PAUSE 0x0004 /* Num Pause Packets Transmitted */ -#define YU_TIR_OUT_MULTICAST 0x0008 /* Num Multicast Packets Transmitted */ -#define YU_TIR_OUT_OCTETS 0x0030 /* Num Bytes Transmitted */ -#define YU_TIR_OUT_64_OCTETS 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_127_OCTETS 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_255_OCTETS 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_511_OCTETS 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_1023_OCTETS 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_1518_OCTETS 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_MAX_OCTETS 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_SPARE 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_COLLISIONS 0x0000 /* Num Packets Transmitted */ -#define YU_TIR_OUT_LATE 0x0000 /* Num Packets Transmitted */ - -/* Receive Interrupt Register (RIR) */ -#define YUKON_RIR 0x0048 - -/* Transmit and Receive Interrupt Register (TRIR) */ -#define YUKON_TRIR 0x004c - -/* Transmit Interrupt Mask Register (TIMR) */ -#define YUKON_TIMR 0x0050 - -/* Receive Interrupt Mask Register (RIMR) */ -#define YUKON_RIMR 0x0054 - -/* Transmit and Receive Interrupt Mask Register (TRIMR) */ -#define YUKON_TRIMR 0x0058 - -/* SMI Control Register (SMICR) */ -#define YUKON_SMICR 0x0080 - -#define YU_SMICR_PHYAD(x) (((x) & 0x1f) << 11) -#define YU_SMICR_REGAD(x) (((x) & 0x1f) << 6) -#define YU_SMICR_OPCODE 0x0020 /* opcode (0 - write, 1 - read) */ -#define YU_SMICR_OP_READ 0x0020 /* opcode read */ -#define YU_SMICR_OP_WRITE 0x0000 /* opcode write */ -#define YU_SMICR_READ_VALID 0x0010 /* read valid */ -#define YU_SMICR_BUSY 0x0008 /* busy (writing) */ - -/* SMI Data Register (SMIDR) */ -#define YUKON_SMIDR 0x0084 - -/* PHY Addres Register (PAR) */ -#define YUKON_PAR 0x0088 - -#define YU_PAR_MIB_CLR 0x0020 /* MIB Counters Clear Mode */ -#define YU_PAR_LOAD_TSTCNT 0x0010 /* Load count 0xfffffff0 into cntr */ diff --git a/sys/dev/speaker/speaker.h b/sys/dev/speaker/speaker.h deleted file mode 100644 index 6b1f021..0000000 --- a/sys/dev/speaker/speaker.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * speaker.h -- interface definitions for speaker ioctl() - * - * v1.4 by Eric S. Raymond (esr@snark.thyrsus.com) Aug 1993 - * modified for FreeBSD by Andrew A. Chernov <ache@astral.msk.su> - * - * $FreeBSD$ - */ - -#ifndef _MACHINE_SPEAKER_H_ -#define _MACHINE_SPEAKER_H_ - -#include <sys/ioccom.h> - -#define SPKRTONE _IOW('S', 1, tone_t) /* emit tone */ -#define SPKRTUNE _IO('S', 2) /* emit tone sequence*/ - -typedef struct -{ - int frequency; /* in hertz */ - int duration; /* in 1/100ths of a second */ -} tone_t; - -/* - * Strings written to the speaker device are interpreted as tunes and played; - * see the spkr(4) man page for details. - */ - -#endif /* !_MACHINE_SPEAKER_H_ */ diff --git a/sys/dev/speaker/spkr.c b/sys/dev/speaker/spkr.c deleted file mode 100644 index d265e7c..0000000 --- a/sys/dev/speaker/spkr.c +++ /dev/null @@ -1,656 +0,0 @@ -/*- - * spkr.c -- device driver for console speaker - * - * v1.4 by Eric S. Raymond (esr@snark.thyrsus.com) Aug 1993 - * modified for FreeBSD by Andrew A. Chernov <ache@astral.msk.su> - * modified for PC98 by Kakefuda - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/bus.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/uio.h> -#include <sys/conf.h> -#include <sys/ctype.h> -#include <sys/malloc.h> -#include <isa/isavar.h> -#include <machine/clock.h> -#include <machine/speaker.h> -#include <machine/ppireg.h> -#include <machine/timerreg.h> - -static d_open_t spkropen; -static d_close_t spkrclose; -static d_write_t spkrwrite; -static d_ioctl_t spkrioctl; - -static struct cdevsw spkr_cdevsw = { - .d_version = D_VERSION, - .d_flags = D_NEEDGIANT, - .d_open = spkropen, - .d_close = spkrclose, - .d_write = spkrwrite, - .d_ioctl = spkrioctl, - .d_name = "spkr", -}; - -static MALLOC_DEFINE(M_SPKR, "spkr", "Speaker buffer"); - -/**************** MACHINE DEPENDENT PART STARTS HERE ************************* - * - * This section defines a function tone() which causes a tone of given - * frequency and duration from the ISA console speaker. - * Another function endtone() is defined to force sound off, and there is - * also a rest() entry point to do pauses. - * - * Audible sound is generated using the Programmable Interval Timer (PIT) and - * Programmable Peripheral Interface (PPI) attached to the ISA speaker. The - * PPI controls whether sound is passed through at all; the PIT's channel 2 is - * used to generate clicks (a square wave) of whatever frequency is desired. - */ - -#ifdef PC98 -#define SPKR_DESC "PC98 speaker" -#else -#define SPKR_DESC "PC speaker" -#endif - -#define SPKRPRI PSOCK -static char endtone, endrest; - -static void tone(unsigned int thz, unsigned int ticks); -static void rest(int ticks); -static void playinit(void); -static void playtone(int pitch, int value, int sustain); -static void playstring(char *cp, size_t slen); - -/* emit tone of frequency thz for given number of ticks */ -static void -tone(thz, ticks) - unsigned int thz, ticks; -{ - unsigned int divisor; - int sps; - - if (thz <= 0) - return; - - divisor = timer_freq / thz; - -#ifdef DEBUG - (void) printf("tone: thz=%d ticks=%d\n", thz, ticks); -#endif /* DEBUG */ - - /* set timer to generate clicks at given frequency in Hertz */ - sps = splclock(); - - if (timer_spkr_acquire()) { - /* enter list of waiting procs ??? */ - splx(sps); - return; - } - splx(sps); - disable_intr(); - spkr_set_pitch(divisor); - enable_intr(); - - /* turn the speaker on */ - ppi_spkr_on(); - - /* - * Set timeout to endtone function, then give up the timeslice. - * This is so other processes can execute while the tone is being - * emitted. - */ - if (ticks > 0) - tsleep(&endtone, SPKRPRI | PCATCH, "spkrtn", ticks); - ppi_spkr_off(); - sps = splclock(); - timer_spkr_release(); - splx(sps); -} - -/* rest for given number of ticks */ -static void -rest(ticks) - int ticks; -{ - /* - * Set timeout to endrest function, then give up the timeslice. - * This is so other processes can execute while the rest is being - * waited out. - */ -#ifdef DEBUG - (void) printf("rest: %d\n", ticks); -#endif /* DEBUG */ - if (ticks > 0) - tsleep(&endrest, SPKRPRI | PCATCH, "spkrrs", ticks); -} - -/**************** PLAY STRING INTERPRETER BEGINS HERE ********************** - * - * Play string interpretation is modelled on IBM BASIC 2.0's PLAY statement; - * M[LNS] are missing; the ~ synonym and the _ slur mark and the octave- - * tracking facility are added. - * Requires tone(), rest(), and endtone(). String play is not interruptible - * except possibly at physical block boundaries. - */ - -typedef int bool; -#define TRUE 1 -#define FALSE 0 - -#define dtoi(c) ((c) - '0') - -static int octave; /* currently selected octave */ -static int whole; /* whole-note time at current tempo, in ticks */ -static int value; /* whole divisor for note time, quarter note = 1 */ -static int fill; /* controls spacing of notes */ -static bool octtrack; /* octave-tracking on? */ -static bool octprefix; /* override current octave-tracking state? */ - -/* - * Magic number avoidance... - */ -#define SECS_PER_MIN 60 /* seconds per minute */ -#define WHOLE_NOTE 4 /* quarter notes per whole note */ -#define MIN_VALUE 64 /* the most we can divide a note by */ -#define DFLT_VALUE 4 /* default value (quarter-note) */ -#define FILLTIME 8 /* for articulation, break note in parts */ -#define STACCATO 6 /* 6/8 = 3/4 of note is filled */ -#define NORMAL 7 /* 7/8ths of note interval is filled */ -#define LEGATO 8 /* all of note interval is filled */ -#define DFLT_OCTAVE 4 /* default octave */ -#define MIN_TEMPO 32 /* minimum tempo */ -#define DFLT_TEMPO 120 /* default tempo */ -#define MAX_TEMPO 255 /* max tempo */ -#define NUM_MULT 3 /* numerator of dot multiplier */ -#define DENOM_MULT 2 /* denominator of dot multiplier */ - -/* letter to half-tone: A B C D E F G */ -static int notetab[8] = {9, 11, 0, 2, 4, 5, 7}; - -/* - * This is the American Standard A440 Equal-Tempered scale with frequencies - * rounded to nearest integer. Thank Goddess for the good ol' CRC Handbook... - * our octave 0 is standard octave 2. - */ -#define OCTAVE_NOTES 12 /* semitones per octave */ -static int pitchtab[] = -{ -/* C C# D D# E F F# G G# A A# B*/ -/* 0 */ 65, 69, 73, 78, 82, 87, 93, 98, 103, 110, 117, 123, -/* 1 */ 131, 139, 147, 156, 165, 175, 185, 196, 208, 220, 233, 247, -/* 2 */ 262, 277, 294, 311, 330, 349, 370, 392, 415, 440, 466, 494, -/* 3 */ 523, 554, 587, 622, 659, 698, 740, 784, 831, 880, 932, 988, -/* 4 */ 1047, 1109, 1175, 1245, 1319, 1397, 1480, 1568, 1661, 1760, 1865, 1975, -/* 5 */ 2093, 2217, 2349, 2489, 2637, 2794, 2960, 3136, 3322, 3520, 3729, 3951, -/* 6 */ 4186, 4435, 4698, 4978, 5274, 5588, 5920, 6272, 6644, 7040, 7459, 7902, -}; - -static void -playinit() -{ - octave = DFLT_OCTAVE; - whole = (hz * SECS_PER_MIN * WHOLE_NOTE) / DFLT_TEMPO; - fill = NORMAL; - value = DFLT_VALUE; - octtrack = FALSE; - octprefix = TRUE; /* act as though there was an initial O(n) */ -} - -/* play tone of proper duration for current rhythm signature */ -static void -playtone(pitch, value, sustain) - int pitch, value, sustain; -{ - register int sound, silence, snum = 1, sdenom = 1; - - /* this weirdness avoids floating-point arithmetic */ - for (; sustain; sustain--) - { - /* See the BUGS section in the man page for discussion */ - snum *= NUM_MULT; - sdenom *= DENOM_MULT; - } - - if (value == 0 || sdenom == 0) - return; - - if (pitch == -1) - rest(whole * snum / (value * sdenom)); - else - { - sound = (whole * snum) / (value * sdenom) - - (whole * (FILLTIME - fill)) / (value * FILLTIME); - silence = whole * (FILLTIME-fill) * snum / (FILLTIME * value * sdenom); - -#ifdef DEBUG - (void) printf("playtone: pitch %d for %d ticks, rest for %d ticks\n", - pitch, sound, silence); -#endif /* DEBUG */ - - tone(pitchtab[pitch], sound); - if (fill != LEGATO) - rest(silence); - } -} - -/* interpret and play an item from a notation string */ -static void -playstring(cp, slen) - char *cp; - size_t slen; -{ - int pitch, oldfill, lastpitch = OCTAVE_NOTES * DFLT_OCTAVE; - -#define GETNUM(cp, v) for(v=0; isdigit(cp[1]) && slen > 0; ) \ - {v = v * 10 + (*++cp - '0'); slen--;} - for (; slen--; cp++) - { - int sustain, timeval, tempo; - register char c = toupper(*cp); - -#ifdef DEBUG - (void) printf("playstring: %c (%x)\n", c, c); -#endif /* DEBUG */ - - switch (c) - { - case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': case 'G': - - /* compute pitch */ - pitch = notetab[c - 'A'] + octave * OCTAVE_NOTES; - - /* this may be followed by an accidental sign */ - if (cp[1] == '#' || cp[1] == '+') - { - ++pitch; - ++cp; - slen--; - } - else if (cp[1] == '-') - { - --pitch; - ++cp; - slen--; - } - - /* - * If octave-tracking mode is on, and there has been no octave- - * setting prefix, find the version of the current letter note - * closest to the last regardless of octave. - */ - if (octtrack && !octprefix) - { - if (abs(pitch-lastpitch) > abs(pitch+OCTAVE_NOTES-lastpitch)) - { - ++octave; - pitch += OCTAVE_NOTES; - } - - if (abs(pitch-lastpitch) > abs((pitch-OCTAVE_NOTES)-lastpitch)) - { - --octave; - pitch -= OCTAVE_NOTES; - } - } - octprefix = FALSE; - lastpitch = pitch; - - /* ...which may in turn be followed by an override time value */ - GETNUM(cp, timeval); - if (timeval <= 0 || timeval > MIN_VALUE) - timeval = value; - - /* ...and/or sustain dots */ - for (sustain = 0; cp[1] == '.'; cp++) - { - slen--; - sustain++; - } - - /* ...and/or a slur mark */ - oldfill = fill; - if (cp[1] == '_') - { - fill = LEGATO; - ++cp; - slen--; - } - - /* time to emit the actual tone */ - playtone(pitch, timeval, sustain); - - fill = oldfill; - break; - - case 'O': - if (cp[1] == 'N' || cp[1] == 'n') - { - octprefix = octtrack = FALSE; - ++cp; - slen--; - } - else if (cp[1] == 'L' || cp[1] == 'l') - { - octtrack = TRUE; - ++cp; - slen--; - } - else - { - GETNUM(cp, octave); - if (octave >= sizeof(pitchtab) / sizeof(pitchtab[0]) / OCTAVE_NOTES) - octave = DFLT_OCTAVE; - octprefix = TRUE; - } - break; - - case '>': - if (octave < sizeof(pitchtab) / sizeof(pitchtab[0]) / OCTAVE_NOTES - 1) - octave++; - octprefix = TRUE; - break; - - case '<': - if (octave > 0) - octave--; - octprefix = TRUE; - break; - - case 'N': - GETNUM(cp, pitch); - for (sustain = 0; cp[1] == '.'; cp++) - { - slen--; - sustain++; - } - oldfill = fill; - if (cp[1] == '_') - { - fill = LEGATO; - ++cp; - slen--; - } - playtone(pitch - 1, value, sustain); - fill = oldfill; - break; - - case 'L': - GETNUM(cp, value); - if (value <= 0 || value > MIN_VALUE) - value = DFLT_VALUE; - break; - - case 'P': - case '~': - /* this may be followed by an override time value */ - GETNUM(cp, timeval); - if (timeval <= 0 || timeval > MIN_VALUE) - timeval = value; - for (sustain = 0; cp[1] == '.'; cp++) - { - slen--; - sustain++; - } - playtone(-1, timeval, sustain); - break; - - case 'T': - GETNUM(cp, tempo); - if (tempo < MIN_TEMPO || tempo > MAX_TEMPO) - tempo = DFLT_TEMPO; - whole = (hz * SECS_PER_MIN * WHOLE_NOTE) / tempo; - break; - - case 'M': - if (cp[1] == 'N' || cp[1] == 'n') - { - fill = NORMAL; - ++cp; - slen--; - } - else if (cp[1] == 'L' || cp[1] == 'l') - { - fill = LEGATO; - ++cp; - slen--; - } - else if (cp[1] == 'S' || cp[1] == 's') - { - fill = STACCATO; - ++cp; - slen--; - } - break; - } - } -} - -/******************* UNIX DRIVER HOOKS BEGIN HERE ************************** - * - * This section implements driver hooks to run playstring() and the tone(), - * endtone(), and rest() functions defined above. - */ - -static int spkr_active = FALSE; /* exclusion flag */ -static char *spkr_inbuf; /* incoming buf */ - -static int -spkropen(dev, flags, fmt, td) - struct cdev *dev; - int flags; - int fmt; - struct thread *td; -{ -#ifdef DEBUG - (void) printf("spkropen: entering with dev = %s\n", devtoname(dev)); -#endif /* DEBUG */ - - if (minor(dev) != 0) - return(ENXIO); - else if (spkr_active) - return(EBUSY); - else - { -#ifdef DEBUG - (void) printf("spkropen: about to perform play initialization\n"); -#endif /* DEBUG */ - playinit(); - spkr_inbuf = malloc(DEV_BSIZE, M_SPKR, M_WAITOK); - spkr_active = TRUE; - return(0); - } -} - -static int -spkrwrite(dev, uio, ioflag) - struct cdev *dev; - struct uio *uio; - int ioflag; -{ -#ifdef DEBUG - printf("spkrwrite: entering with dev = %s, count = %d\n", - devtoname(dev), uio->uio_resid); -#endif /* DEBUG */ - - if (minor(dev) != 0) - return(ENXIO); - else if (uio->uio_resid > (DEV_BSIZE - 1)) /* prevent system crashes */ - return(E2BIG); - else - { - unsigned n; - char *cp; - int error; - - n = uio->uio_resid; - cp = spkr_inbuf; - error = uiomove(cp, n, uio); - if (!error) { - cp[n] = '\0'; - playstring(cp, n); - } - return(error); - } -} - -static int -spkrclose(dev, flags, fmt, td) - struct cdev *dev; - int flags; - int fmt; - struct thread *td; -{ -#ifdef DEBUG - (void) printf("spkrclose: entering with dev = %s\n", devtoname(dev)); -#endif /* DEBUG */ - - if (minor(dev) != 0) - return(ENXIO); - else - { - wakeup(&endtone); - wakeup(&endrest); - free(spkr_inbuf, M_SPKR); - spkr_active = FALSE; - return(0); - } -} - -static int -spkrioctl(dev, cmd, cmdarg, flags, td) - struct cdev *dev; - unsigned long cmd; - caddr_t cmdarg; - int flags; - struct thread *td; -{ -#ifdef DEBUG - (void) printf("spkrioctl: entering with dev = %s, cmd = %lx\n", - devtoname(dev), cmd); -#endif /* DEBUG */ - - if (minor(dev) != 0) - return(ENXIO); - else if (cmd == SPKRTONE) - { - tone_t *tp = (tone_t *)cmdarg; - - if (tp->frequency == 0) - rest(tp->duration); - else - tone(tp->frequency, tp->duration); - return 0; - } - else if (cmd == SPKRTUNE) - { - tone_t *tp = (tone_t *)(*(caddr_t *)cmdarg); - tone_t ttp; - int error; - - for (; ; tp++) { - error = copyin(tp, &ttp, sizeof(tone_t)); - if (error) - return(error); - if (ttp.duration == 0) - break; - if (ttp.frequency == 0) - rest(ttp.duration); - else - tone(ttp.frequency, ttp.duration); - } - return(0); - } - return(EINVAL); -} - -/* - * Install placeholder to claim the resources owned by the - * AT tone generator. - */ -static struct isa_pnp_id speaker_ids[] = { -#ifndef PC98 - { 0x0008d041 /* PNP0800 */, SPKR_DESC }, -#endif - { 0 } -}; - -static struct cdev *speaker_dev; - -static int -speaker_probe(device_t dev) -{ - int error; - - error = ISA_PNP_PROBE(device_get_parent(dev), dev, speaker_ids); - - /* PnP match */ - if (error == 0) - return (0); - - /* No match */ - if (error == ENXIO) - return (ENXIO); - - /* Not configured by hints. */ - if (strncmp(device_get_name(dev), "speaker", 9)) - return (ENXIO); - - device_set_desc(dev, SPKR_DESC); - - return (0); -} - -static int -speaker_attach(device_t dev) -{ - - if (speaker_dev) { - device_printf(dev, "Already attached!\n"); - return (ENXIO); - } - - speaker_dev = make_dev(&spkr_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600, - "speaker"); - return (0); -} - -static int -speaker_detach(device_t dev) -{ - destroy_dev(speaker_dev); - return (0); -} - -static device_method_t speaker_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, speaker_probe), - DEVMETHOD(device_attach, speaker_attach), - DEVMETHOD(device_detach, speaker_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - { 0, 0 } -}; - -static driver_t speaker_driver = { - "speaker", - speaker_methods, - 1, /* no softc */ -}; - -static devclass_t speaker_devclass; - -DRIVER_MODULE(speaker, isa, speaker_driver, speaker_devclass, 0, 0); -#ifndef PC98 -DRIVER_MODULE(speaker, acpi, speaker_driver, speaker_devclass, 0, 0); -#endif - -/* spkr.c ends here */ diff --git a/sys/dev/ti/if_ti.c b/sys/dev/ti/if_ti.c deleted file mode 100644 index 1bbfe38..0000000 --- a/sys/dev/ti/if_ti.c +++ /dev/null @@ -1,3548 +0,0 @@ -/*- - * Copyright (c) 1997, 1998, 1999 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD. - * Manuals, sample driver and firmware source kits are available - * from http://www.alteon.com/support/openkits. - * - * Written by Bill Paul <wpaul@ctr.columbia.edu> - * Electrical Engineering Department - * Columbia University, New York City - */ - -/* - * The Alteon Networks Tigon chip contains an embedded R4000 CPU, - * gigabit MAC, dual DMA channels and a PCI interface unit. NICs - * using the Tigon may have anywhere from 512K to 2MB of SRAM. The - * Tigon supports hardware IP, TCP and UCP checksumming, multicast - * filtering and jumbo (9014 byte) frames. The hardware is largely - * controlled by firmware, which must be loaded into the NIC during - * initialization. - * - * The Tigon 2 contains 2 R4000 CPUs and requires a newer firmware - * revision, which supports new features such as extended commands, - * extended jumbo receive ring desciptors and a mini receive ring. - * - * Alteon Networks is to be commended for releasing such a vast amount - * of development material for the Tigon NIC without requiring an NDA - * (although they really should have done it a long time ago). With - * any luck, the other vendors will finally wise up and follow Alteon's - * stellar example. - * - * The firmware for the Tigon 1 and 2 NICs is compiled directly into - * this driver by #including it as a C header file. This bloats the - * driver somewhat, but it's the easiest method considering that the - * driver code and firmware code need to be kept in sync. The source - * for the firmware is not provided with the FreeBSD distribution since - * compiling it requires a GNU toolchain targeted for mips-sgi-irix5.3. - * - * The following people deserve special thanks: - * - Terry Murphy of 3Com, for providing a 3c985 Tigon 1 board - * for testing - * - Raymond Lee of Netgear, for providing a pair of Netgear - * GA620 Tigon 2 boards for testing - * - Ulf Zimmermann, for bringing the GA260 to my attention and - * convincing me to write this driver. - * - Andrew Gallatin for providing FreeBSD/Alpha support. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "opt_ti.h" - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/sockio.h> -#include <sys/mbuf.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/socket.h> -#include <sys/queue.h> -#include <sys/conf.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/ethernet.h> -#include <net/if_dl.h> -#include <net/if_media.h> -#include <net/if_types.h> -#include <net/if_vlan_var.h> - -#include <net/bpf.h> - -#include <netinet/in_systm.h> -#include <netinet/in.h> -#include <netinet/ip.h> - -#include <vm/vm.h> /* for vtophys */ -#include <vm/pmap.h> /* for vtophys */ -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/bus.h> -#include <sys/rman.h> - -/* #define TI_PRIVATE_JUMBOS */ - -#if !defined(TI_PRIVATE_JUMBOS) -#include <sys/sockio.h> -#include <sys/uio.h> -#include <sys/lock.h> -#include <sys/sf_buf.h> -#include <vm/vm_extern.h> -#include <vm/pmap.h> -#include <vm/vm_map.h> -#include <vm/vm_map.h> -#include <vm/vm_param.h> -#include <vm/vm_pageout.h> -#include <sys/vmmeter.h> -#include <vm/vm_page.h> -#include <vm/vm_object.h> -#include <vm/vm_kern.h> -#include <sys/proc.h> -#endif /* !TI_PRIVATE_JUMBOS */ - -#include <dev/pci/pcireg.h> -#include <dev/pci/pcivar.h> - -#include <sys/tiio.h> -#include <pci/if_tireg.h> -#include <pci/ti_fw.h> -#include <pci/ti_fw2.h> - -#define TI_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_IP_FRAGS) -/* - * We can only turn on header splitting if we're using extended receive - * BDs. - */ -#if defined(TI_JUMBO_HDRSPLIT) && defined(TI_PRIVATE_JUMBOS) -#error "options TI_JUMBO_HDRSPLIT and TI_PRIVATE_JUMBOS are mutually exclusive" -#endif /* TI_JUMBO_HDRSPLIT && TI_JUMBO_HDRSPLIT */ - -struct ti_softc *tis[8]; - -typedef enum { - TI_SWAP_HTON, - TI_SWAP_NTOH -} ti_swap_type; - - -/* - * Various supported device vendors/types and their names. - */ - -static struct ti_type ti_devs[] = { - { ALT_VENDORID, ALT_DEVICEID_ACENIC, - "Alteon AceNIC 1000baseSX Gigabit Ethernet" }, - { ALT_VENDORID, ALT_DEVICEID_ACENIC_COPPER, - "Alteon AceNIC 1000baseT Gigabit Ethernet" }, - { TC_VENDORID, TC_DEVICEID_3C985, - "3Com 3c985-SX Gigabit Ethernet" }, - { NG_VENDORID, NG_DEVICEID_GA620, - "Netgear GA620 1000baseSX Gigabit Ethernet" }, - { NG_VENDORID, NG_DEVICEID_GA620T, - "Netgear GA620 1000baseT Gigabit Ethernet" }, - { SGI_VENDORID, SGI_DEVICEID_TIGON, - "Silicon Graphics Gigabit Ethernet" }, - { DEC_VENDORID, DEC_DEVICEID_FARALLON_PN9000SX, - "Farallon PN9000SX Gigabit Ethernet" }, - { 0, 0, NULL } -}; - - -static d_open_t ti_open; -static d_close_t ti_close; -static d_ioctl_t ti_ioctl2; - -static struct cdevsw ti_cdevsw = { - .d_version = D_VERSION, - .d_flags = D_NEEDGIANT, - .d_open = ti_open, - .d_close = ti_close, - .d_ioctl = ti_ioctl2, - .d_name = "ti", -}; - -static int ti_probe(device_t); -static int ti_attach(device_t); -static int ti_detach(device_t); -static void ti_txeof(struct ti_softc *); -static void ti_rxeof(struct ti_softc *); - -static void ti_stats_update(struct ti_softc *); -static int ti_encap(struct ti_softc *, struct mbuf *, u_int32_t *); - -static void ti_intr(void *); -static void ti_start(struct ifnet *); -static int ti_ioctl(struct ifnet *, u_long, caddr_t); -static void ti_init(void *); -static void ti_init2(struct ti_softc *); -static void ti_stop(struct ti_softc *); -static void ti_watchdog(struct ifnet *); -static void ti_shutdown(device_t); -static int ti_ifmedia_upd(struct ifnet *); -static void ti_ifmedia_sts(struct ifnet *, struct ifmediareq *); - -static u_int32_t ti_eeprom_putbyte(struct ti_softc *, int); -static u_int8_t ti_eeprom_getbyte(struct ti_softc *, int, u_int8_t *); -static int ti_read_eeprom(struct ti_softc *, caddr_t, int, int); - -static void ti_add_mcast(struct ti_softc *, struct ether_addr *); -static void ti_del_mcast(struct ti_softc *, struct ether_addr *); -static void ti_setmulti(struct ti_softc *); - -static void ti_mem(struct ti_softc *, u_int32_t, u_int32_t, caddr_t); -static int ti_copy_mem(struct ti_softc *, u_int32_t, u_int32_t, caddr_t, int, int); -static int ti_copy_scratch(struct ti_softc *, u_int32_t, u_int32_t, caddr_t, - int, int, int); -static int ti_bcopy_swap(const void *, void *, size_t, ti_swap_type); -static void ti_loadfw(struct ti_softc *); -static void ti_cmd(struct ti_softc *, struct ti_cmd_desc *); -static void ti_cmd_ext(struct ti_softc *, struct ti_cmd_desc *, caddr_t, int); -static void ti_handle_events(struct ti_softc *); -#ifdef TI_PRIVATE_JUMBOS -static int ti_alloc_jumbo_mem(struct ti_softc *); -static void *ti_jalloc(struct ti_softc *); -static void ti_jfree(void *, void *); -#endif /* TI_PRIVATE_JUMBOS */ -static int ti_newbuf_std(struct ti_softc *, int, struct mbuf *); -static int ti_newbuf_mini(struct ti_softc *, int, struct mbuf *); -static int ti_newbuf_jumbo(struct ti_softc *, int, struct mbuf *); -static int ti_init_rx_ring_std(struct ti_softc *); -static void ti_free_rx_ring_std(struct ti_softc *); -static int ti_init_rx_ring_jumbo(struct ti_softc *); -static void ti_free_rx_ring_jumbo(struct ti_softc *); -static int ti_init_rx_ring_mini(struct ti_softc *); -static void ti_free_rx_ring_mini(struct ti_softc *); -static void ti_free_tx_ring(struct ti_softc *); -static int ti_init_tx_ring(struct ti_softc *); - -static int ti_64bitslot_war(struct ti_softc *); -static int ti_chipinit(struct ti_softc *); -static int ti_gibinit(struct ti_softc *); - -#ifdef TI_JUMBO_HDRSPLIT -static __inline void ti_hdr_split (struct mbuf *top, int hdr_len, - int pkt_len, int idx); -#endif /* TI_JUMBO_HDRSPLIT */ - -static device_method_t ti_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ti_probe), - DEVMETHOD(device_attach, ti_attach), - DEVMETHOD(device_detach, ti_detach), - DEVMETHOD(device_shutdown, ti_shutdown), - { 0, 0 } -}; - -static driver_t ti_driver = { - "ti", - ti_methods, - sizeof(struct ti_softc) -}; - -static devclass_t ti_devclass; - -DRIVER_MODULE(ti, pci, ti_driver, ti_devclass, 0, 0); -MODULE_DEPEND(ti, pci, 1, 1, 1); -MODULE_DEPEND(ti, ether, 1, 1, 1); - -/* - * Send an instruction or address to the EEPROM, check for ACK. - */ -static u_int32_t ti_eeprom_putbyte(sc, byte) - struct ti_softc *sc; - int byte; -{ - register int i, ack = 0; - - /* - * Make sure we're in TX mode. - */ - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); - - /* - * Feed in each bit and stobe the clock. - */ - for (i = 0x80; i; i >>= 1) { - if (byte & i) { - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); - } else { - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); - } - DELAY(1); - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); - DELAY(1); - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); - } - - /* - * Turn off TX mode. - */ - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); - - /* - * Check for ack. - */ - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); - ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN; - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); - - return (ack); -} - -/* - * Read a byte of data stored in the EEPROM at address 'addr.' - * We have to send two address bytes since the EEPROM can hold - * more than 256 bytes of data. - */ -static u_int8_t ti_eeprom_getbyte(sc, addr, dest) - struct ti_softc *sc; - int addr; - u_int8_t *dest; -{ - register int i; - u_int8_t byte = 0; - - EEPROM_START; - - /* - * Send write control code to EEPROM. - */ - if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) { - printf("ti%d: failed to send write command, status: %x\n", - sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); - return (1); - } - - /* - * Send first byte of address of byte we want to read. - */ - if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) { - printf("ti%d: failed to send address, status: %x\n", - sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); - return (1); - } - /* - * Send second byte address of byte we want to read. - */ - if (ti_eeprom_putbyte(sc, addr & 0xFF)) { - printf("ti%d: failed to send address, status: %x\n", - sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); - return (1); - } - - EEPROM_STOP; - EEPROM_START; - /* - * Send read control code to EEPROM. - */ - if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) { - printf("ti%d: failed to send read command, status: %x\n", - sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); - return (1); - } - - /* - * Start reading bits from EEPROM. - */ - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); - for (i = 0x80; i; i >>= 1) { - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); - DELAY(1); - if (CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN) - byte |= i; - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); - DELAY(1); - } - - EEPROM_STOP; - - /* - * No ACK generated for read, so just return byte. - */ - - *dest = byte; - - return (0); -} - -/* - * Read a sequence of bytes from the EEPROM. - */ -static int -ti_read_eeprom(sc, dest, off, cnt) - struct ti_softc *sc; - caddr_t dest; - int off; - int cnt; -{ - int err = 0, i; - u_int8_t byte = 0; - - for (i = 0; i < cnt; i++) { - err = ti_eeprom_getbyte(sc, off + i, &byte); - if (err) - break; - *(dest + i) = byte; - } - - return (err ? 1 : 0); -} - -/* - * NIC memory access function. Can be used to either clear a section - * of NIC local memory or (if buf is non-NULL) copy data into it. - */ -static void -ti_mem(sc, addr, len, buf) - struct ti_softc *sc; - u_int32_t addr, len; - caddr_t buf; -{ - int segptr, segsize, cnt; - caddr_t ti_winbase, ptr; - - segptr = addr; - cnt = len; - ti_winbase = (caddr_t)(sc->ti_vhandle + TI_WINDOW); - ptr = buf; - - while (cnt) { - if (cnt < TI_WINLEN) - segsize = cnt; - else - segsize = TI_WINLEN - (segptr % TI_WINLEN); - CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); - if (buf == NULL) - bzero((char *)ti_winbase + (segptr & - (TI_WINLEN - 1)), segsize); - else { - bcopy((char *)ptr, (char *)ti_winbase + - (segptr & (TI_WINLEN - 1)), segsize); - ptr += segsize; - } - segptr += segsize; - cnt -= segsize; - } -} - -static int -ti_copy_mem(sc, tigon_addr, len, buf, useraddr, readdata) - struct ti_softc *sc; - u_int32_t tigon_addr, len; - caddr_t buf; - int useraddr, readdata; -{ - int segptr, segsize, cnt; - caddr_t ptr; - u_int32_t origwin; - u_int8_t tmparray[TI_WINLEN], tmparray2[TI_WINLEN]; - int resid, segresid; - int first_pass; - - /* - * At the moment, we don't handle non-aligned cases, we just bail. - * If this proves to be a problem, it will be fixed. - */ - if ((readdata == 0) - && (tigon_addr & 0x3)) { - printf("ti%d: ti_copy_mem: tigon address %#x isn't " - "word-aligned\n", sc->ti_unit, tigon_addr); - printf("ti%d: ti_copy_mem: unaligned writes aren't yet " - "supported\n", sc->ti_unit); - return (EINVAL); - } - - segptr = tigon_addr & ~0x3; - segresid = tigon_addr - segptr; - - /* - * This is the non-aligned amount left over that we'll need to - * copy. - */ - resid = len & 0x3; - - /* Add in the left over amount at the front of the buffer */ - resid += segresid; - - cnt = len & ~0x3; - /* - * If resid + segresid is >= 4, add multiples of 4 to the count and - * decrease the residual by that much. - */ - cnt += resid & ~0x3; - resid -= resid & ~0x3; - - ptr = buf; - - first_pass = 1; - - /* - * Make sure we aren't interrupted while we're changing the window - * pointer. - */ - TI_LOCK(sc); - - /* - * Save the old window base value. - */ - origwin = CSR_READ_4(sc, TI_WINBASE); - - while (cnt) { - bus_size_t ti_offset; - - if (cnt < TI_WINLEN) - segsize = cnt; - else - segsize = TI_WINLEN - (segptr % TI_WINLEN); - CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); - - ti_offset = TI_WINDOW + (segptr & (TI_WINLEN -1)); - - if (readdata) { - - bus_space_read_region_4(sc->ti_btag, - sc->ti_bhandle, ti_offset, - (u_int32_t *)tmparray, - segsize >> 2); - if (useraddr) { - /* - * Yeah, this is a little on the kludgy - * side, but at least this code is only - * used for debugging. - */ - ti_bcopy_swap(tmparray, tmparray2, segsize, - TI_SWAP_NTOH); - - if (first_pass) { - copyout(&tmparray2[segresid], ptr, - segsize - segresid); - first_pass = 0; - } else - copyout(tmparray2, ptr, segsize); - } else { - if (first_pass) { - - ti_bcopy_swap(tmparray, tmparray2, - segsize, TI_SWAP_NTOH); - bcopy(&tmparray2[segresid], ptr, - segsize - segresid); - first_pass = 0; - } else - ti_bcopy_swap(tmparray, ptr, segsize, - TI_SWAP_NTOH); - } - - } else { - if (useraddr) { - copyin(ptr, tmparray2, segsize); - ti_bcopy_swap(tmparray2, tmparray, segsize, - TI_SWAP_HTON); - } else - ti_bcopy_swap(ptr, tmparray, segsize, - TI_SWAP_HTON); - - bus_space_write_region_4(sc->ti_btag, - sc->ti_bhandle, ti_offset, - (u_int32_t *)tmparray, - segsize >> 2); - } - segptr += segsize; - ptr += segsize; - cnt -= segsize; - } - - /* - * Handle leftover, non-word-aligned bytes. - */ - if (resid != 0) { - u_int32_t tmpval, tmpval2; - bus_size_t ti_offset; - - /* - * Set the segment pointer. - */ - CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); - - ti_offset = TI_WINDOW + (segptr & (TI_WINLEN - 1)); - - /* - * First, grab whatever is in our source/destination. - * We'll obviously need this for reads, but also for - * writes, since we'll be doing read/modify/write. - */ - bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle, - ti_offset, &tmpval, 1); - - /* - * Next, translate this from little-endian to big-endian - * (at least on i386 boxes). - */ - tmpval2 = ntohl(tmpval); - - if (readdata) { - /* - * If we're reading, just copy the leftover number - * of bytes from the host byte order buffer to - * the user's buffer. - */ - if (useraddr) - copyout(&tmpval2, ptr, resid); - else - bcopy(&tmpval2, ptr, resid); - } else { - /* - * If we're writing, first copy the bytes to be - * written into the network byte order buffer, - * leaving the rest of the buffer with whatever was - * originally in there. Then, swap the bytes - * around into host order and write them out. - * - * XXX KDM the read side of this has been verified - * to work, but the write side of it has not been - * verified. So user beware. - */ - if (useraddr) - copyin(ptr, &tmpval2, resid); - else - bcopy(ptr, &tmpval2, resid); - - tmpval = htonl(tmpval2); - - bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle, - ti_offset, &tmpval, 1); - } - } - - CSR_WRITE_4(sc, TI_WINBASE, origwin); - - TI_UNLOCK(sc); - - return (0); -} - -static int -ti_copy_scratch(sc, tigon_addr, len, buf, useraddr, readdata, cpu) - struct ti_softc *sc; - u_int32_t tigon_addr, len; - caddr_t buf; - int useraddr, readdata; - int cpu; -{ - u_int32_t segptr; - int cnt; - u_int32_t tmpval, tmpval2; - caddr_t ptr; - - /* - * At the moment, we don't handle non-aligned cases, we just bail. - * If this proves to be a problem, it will be fixed. - */ - if (tigon_addr & 0x3) { - printf("ti%d: ti_copy_scratch: tigon address %#x isn't " - "word-aligned\n", sc->ti_unit, tigon_addr); - return (EINVAL); - } - - if (len & 0x3) { - printf("ti%d: ti_copy_scratch: transfer length %d isn't " - "word-aligned\n", sc->ti_unit, len); - return (EINVAL); - } - - segptr = tigon_addr; - cnt = len; - ptr = buf; - - TI_LOCK(sc); - - while (cnt) { - CSR_WRITE_4(sc, CPU_REG(TI_SRAM_ADDR, cpu), segptr); - - if (readdata) { - tmpval2 = CSR_READ_4(sc, CPU_REG(TI_SRAM_DATA, cpu)); - - tmpval = ntohl(tmpval2); - - /* - * Note: I've used this debugging interface - * extensively with Alteon's 12.3.15 firmware, - * compiled with GCC 2.7.2.1 and binutils 2.9.1. - * - * When you compile the firmware without - * optimization, which is necessary sometimes in - * order to properly step through it, you sometimes - * read out a bogus value of 0xc0017c instead of - * whatever was supposed to be in that scratchpad - * location. That value is on the stack somewhere, - * but I've never been able to figure out what was - * causing the problem. - * - * The address seems to pop up in random places, - * often not in the same place on two subsequent - * reads. - * - * In any case, the underlying data doesn't seem - * to be affected, just the value read out. - * - * KDM, 3/7/2000 - */ - - if (tmpval2 == 0xc0017c) - printf("ti%d: found 0xc0017c at %#x " - "(tmpval2)\n", sc->ti_unit, segptr); - - if (tmpval == 0xc0017c) - printf("ti%d: found 0xc0017c at %#x " - "(tmpval)\n", sc->ti_unit, segptr); - - if (useraddr) - copyout(&tmpval, ptr, 4); - else - bcopy(&tmpval, ptr, 4); - } else { - if (useraddr) - copyin(ptr, &tmpval2, 4); - else - bcopy(ptr, &tmpval2, 4); - - tmpval = htonl(tmpval2); - - CSR_WRITE_4(sc, CPU_REG(TI_SRAM_DATA, cpu), tmpval); - } - - cnt -= 4; - segptr += 4; - ptr += 4; - } - - TI_UNLOCK(sc); - - return (0); -} - -static int -ti_bcopy_swap(src, dst, len, swap_type) - const void *src; - void *dst; - size_t len; - ti_swap_type swap_type; -{ - const u_int8_t *tmpsrc; - u_int8_t *tmpdst; - size_t tmplen; - - if (len & 0x3) { - printf("ti_bcopy_swap: length %zd isn't 32-bit aligned\n", - len); - return (-1); - } - - tmpsrc = src; - tmpdst = dst; - tmplen = len; - - while (tmplen) { - if (swap_type == TI_SWAP_NTOH) - *(u_int32_t *)tmpdst = - ntohl(*(const u_int32_t *)tmpsrc); - else - *(u_int32_t *)tmpdst = - htonl(*(const u_int32_t *)tmpsrc); - - tmpsrc += 4; - tmpdst += 4; - tmplen -= 4; - } - - return (0); -} - -/* - * Load firmware image into the NIC. Check that the firmware revision - * is acceptable and see if we want the firmware for the Tigon 1 or - * Tigon 2. - */ -static void -ti_loadfw(sc) - struct ti_softc *sc; -{ - switch (sc->ti_hwrev) { - case TI_HWREV_TIGON: - if (tigonFwReleaseMajor != TI_FIRMWARE_MAJOR || - tigonFwReleaseMinor != TI_FIRMWARE_MINOR || - tigonFwReleaseFix != TI_FIRMWARE_FIX) { - printf("ti%d: firmware revision mismatch; want " - "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit, - TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR, - TI_FIRMWARE_FIX, tigonFwReleaseMajor, - tigonFwReleaseMinor, tigonFwReleaseFix); - return; - } - ti_mem(sc, tigonFwTextAddr, tigonFwTextLen, - (caddr_t)tigonFwText); - ti_mem(sc, tigonFwDataAddr, tigonFwDataLen, - (caddr_t)tigonFwData); - ti_mem(sc, tigonFwRodataAddr, tigonFwRodataLen, - (caddr_t)tigonFwRodata); - ti_mem(sc, tigonFwBssAddr, tigonFwBssLen, NULL); - ti_mem(sc, tigonFwSbssAddr, tigonFwSbssLen, NULL); - CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigonFwStartAddr); - break; - case TI_HWREV_TIGON_II: - if (tigon2FwReleaseMajor != TI_FIRMWARE_MAJOR || - tigon2FwReleaseMinor != TI_FIRMWARE_MINOR || - tigon2FwReleaseFix != TI_FIRMWARE_FIX) { - printf("ti%d: firmware revision mismatch; want " - "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit, - TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR, - TI_FIRMWARE_FIX, tigon2FwReleaseMajor, - tigon2FwReleaseMinor, tigon2FwReleaseFix); - return; - } - ti_mem(sc, tigon2FwTextAddr, tigon2FwTextLen, - (caddr_t)tigon2FwText); - ti_mem(sc, tigon2FwDataAddr, tigon2FwDataLen, - (caddr_t)tigon2FwData); - ti_mem(sc, tigon2FwRodataAddr, tigon2FwRodataLen, - (caddr_t)tigon2FwRodata); - ti_mem(sc, tigon2FwBssAddr, tigon2FwBssLen, NULL); - ti_mem(sc, tigon2FwSbssAddr, tigon2FwSbssLen, NULL); - CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigon2FwStartAddr); - break; - default: - printf("ti%d: can't load firmware: unknown hardware rev\n", - sc->ti_unit); - break; - } -} - -/* - * Send the NIC a command via the command ring. - */ -static void -ti_cmd(sc, cmd) - struct ti_softc *sc; - struct ti_cmd_desc *cmd; -{ - u_int32_t index; - - if (sc->ti_rdata->ti_cmd_ring == NULL) - return; - - index = sc->ti_cmd_saved_prodidx; - CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd)); - TI_INC(index, TI_CMD_RING_CNT); - CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index); - sc->ti_cmd_saved_prodidx = index; -} - -/* - * Send the NIC an extended command. The 'len' parameter specifies the - * number of command slots to include after the initial command. - */ -static void -ti_cmd_ext(sc, cmd, arg, len) - struct ti_softc *sc; - struct ti_cmd_desc *cmd; - caddr_t arg; - int len; -{ - u_int32_t index; - register int i; - - if (sc->ti_rdata->ti_cmd_ring == NULL) - return; - - index = sc->ti_cmd_saved_prodidx; - CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd)); - TI_INC(index, TI_CMD_RING_CNT); - for (i = 0; i < len; i++) { - CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), - *(u_int32_t *)(&arg[i * 4])); - TI_INC(index, TI_CMD_RING_CNT); - } - CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index); - sc->ti_cmd_saved_prodidx = index; -} - -/* - * Handle events that have triggered interrupts. - */ -static void -ti_handle_events(sc) - struct ti_softc *sc; -{ - struct ti_event_desc *e; - - if (sc->ti_rdata->ti_event_ring == NULL) - return; - - while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) { - e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx]; - switch (e->ti_event) { - case TI_EV_LINKSTAT_CHANGED: - sc->ti_linkstat = e->ti_code; - if (e->ti_code == TI_EV_CODE_LINK_UP) - printf("ti%d: 10/100 link up\n", sc->ti_unit); - else if (e->ti_code == TI_EV_CODE_GIG_LINK_UP) - printf("ti%d: gigabit link up\n", sc->ti_unit); - else if (e->ti_code == TI_EV_CODE_LINK_DOWN) - printf("ti%d: link down\n", sc->ti_unit); - break; - case TI_EV_ERROR: - if (e->ti_code == TI_EV_CODE_ERR_INVAL_CMD) - printf("ti%d: invalid command\n", sc->ti_unit); - else if (e->ti_code == TI_EV_CODE_ERR_UNIMP_CMD) - printf("ti%d: unknown command\n", sc->ti_unit); - else if (e->ti_code == TI_EV_CODE_ERR_BADCFG) - printf("ti%d: bad config data\n", sc->ti_unit); - break; - case TI_EV_FIRMWARE_UP: - ti_init2(sc); - break; - case TI_EV_STATS_UPDATED: - ti_stats_update(sc); - break; - case TI_EV_RESET_JUMBO_RING: - case TI_EV_MCAST_UPDATED: - /* Who cares. */ - break; - default: - printf("ti%d: unknown event: %d\n", - sc->ti_unit, e->ti_event); - break; - } - /* Advance the consumer index. */ - TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT); - CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx); - } -} - -#ifdef TI_PRIVATE_JUMBOS - -/* - * Memory management for the jumbo receive ring is a pain in the - * butt. We need to allocate at least 9018 bytes of space per frame, - * _and_ it has to be contiguous (unless you use the extended - * jumbo descriptor format). Using malloc() all the time won't - * work: malloc() allocates memory in powers of two, which means we - * would end up wasting a considerable amount of space by allocating - * 9K chunks. We don't have a jumbo mbuf cluster pool. Thus, we have - * to do our own memory management. - * - * The driver needs to allocate a contiguous chunk of memory at boot - * time. We then chop this up ourselves into 9K pieces and use them - * as external mbuf storage. - * - * One issue here is how much memory to allocate. The jumbo ring has - * 256 slots in it, but at 9K per slot than can consume over 2MB of - * RAM. This is a bit much, especially considering we also need - * RAM for the standard ring and mini ring (on the Tigon 2). To - * save space, we only actually allocate enough memory for 64 slots - * by default, which works out to between 500 and 600K. This can - * be tuned by changing a #define in if_tireg.h. - */ - -static int -ti_alloc_jumbo_mem(sc) - struct ti_softc *sc; -{ - caddr_t ptr; - register int i; - struct ti_jpool_entry *entry; - - /* Grab a big chunk o' storage. */ - sc->ti_cdata.ti_jumbo_buf = contigmalloc(TI_JMEM, M_DEVBUF, - M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); - - if (sc->ti_cdata.ti_jumbo_buf == NULL) { - printf("ti%d: no memory for jumbo buffers!\n", sc->ti_unit); - return (ENOBUFS); - } - - SLIST_INIT(&sc->ti_jfree_listhead); - SLIST_INIT(&sc->ti_jinuse_listhead); - - /* - * Now divide it up into 9K pieces and save the addresses - * in an array. - */ - ptr = sc->ti_cdata.ti_jumbo_buf; - for (i = 0; i < TI_JSLOTS; i++) { - sc->ti_cdata.ti_jslots[i] = ptr; - ptr += TI_JLEN; - entry = malloc(sizeof(struct ti_jpool_entry), - M_DEVBUF, M_NOWAIT); - if (entry == NULL) { - contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, - M_DEVBUF); - sc->ti_cdata.ti_jumbo_buf = NULL; - printf("ti%d: no memory for jumbo " - "buffer queue!\n", sc->ti_unit); - return (ENOBUFS); - } - entry->slot = i; - SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries); - } - - return (0); -} - -/* - * Allocate a jumbo buffer. - */ -static void *ti_jalloc(sc) - struct ti_softc *sc; -{ - struct ti_jpool_entry *entry; - - entry = SLIST_FIRST(&sc->ti_jfree_listhead); - - if (entry == NULL) { - printf("ti%d: no free jumbo buffers\n", sc->ti_unit); - return (NULL); - } - - SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries); - SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries); - return (sc->ti_cdata.ti_jslots[entry->slot]); -} - -/* - * Release a jumbo buffer. - */ -static void -ti_jfree(buf, args) - void *buf; - void *args; -{ - struct ti_softc *sc; - int i; - struct ti_jpool_entry *entry; - - /* Extract the softc struct pointer. */ - sc = (struct ti_softc *)args; - - if (sc == NULL) - panic("ti_jfree: didn't get softc pointer!"); - - /* calculate the slot this buffer belongs to */ - i = ((vm_offset_t)buf - - (vm_offset_t)sc->ti_cdata.ti_jumbo_buf) / TI_JLEN; - - if ((i < 0) || (i >= TI_JSLOTS)) - panic("ti_jfree: asked to free buffer that we don't manage!"); - - entry = SLIST_FIRST(&sc->ti_jinuse_listhead); - if (entry == NULL) - panic("ti_jfree: buffer not in use!"); - entry->slot = i; - SLIST_REMOVE_HEAD(&sc->ti_jinuse_listhead, jpool_entries); - SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries); -} - -#endif /* TI_PRIVATE_JUMBOS */ - -/* - * Intialize a standard receive ring descriptor. - */ -static int -ti_newbuf_std(sc, i, m) - struct ti_softc *sc; - int i; - struct mbuf *m; -{ - struct mbuf *m_new = NULL; - struct ti_rx_desc *r; - - if (m == NULL) { - MGETHDR(m_new, M_DONTWAIT, MT_DATA); - if (m_new == NULL) - return (ENOBUFS); - - MCLGET(m_new, M_DONTWAIT); - if (!(m_new->m_flags & M_EXT)) { - m_freem(m_new); - return (ENOBUFS); - } - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - } else { - m_new = m; - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - m_new->m_data = m_new->m_ext.ext_buf; - } - - m_adj(m_new, ETHER_ALIGN); - sc->ti_cdata.ti_rx_std_chain[i] = m_new; - r = &sc->ti_rdata->ti_rx_std_ring[i]; - TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); - r->ti_type = TI_BDTYPE_RECV_BD; - r->ti_flags = 0; - if (sc->ti_ifp->if_hwassist) - r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; - r->ti_len = m_new->m_len; - r->ti_idx = i; - - return (0); -} - -/* - * Intialize a mini receive ring descriptor. This only applies to - * the Tigon 2. - */ -static int -ti_newbuf_mini(sc, i, m) - struct ti_softc *sc; - int i; - struct mbuf *m; -{ - struct mbuf *m_new = NULL; - struct ti_rx_desc *r; - - if (m == NULL) { - MGETHDR(m_new, M_DONTWAIT, MT_DATA); - if (m_new == NULL) { - return (ENOBUFS); - } - m_new->m_len = m_new->m_pkthdr.len = MHLEN; - } else { - m_new = m; - m_new->m_data = m_new->m_pktdat; - m_new->m_len = m_new->m_pkthdr.len = MHLEN; - } - - m_adj(m_new, ETHER_ALIGN); - r = &sc->ti_rdata->ti_rx_mini_ring[i]; - sc->ti_cdata.ti_rx_mini_chain[i] = m_new; - TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); - r->ti_type = TI_BDTYPE_RECV_BD; - r->ti_flags = TI_BDFLAG_MINI_RING; - if (sc->ti_ifp->if_hwassist) - r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; - r->ti_len = m_new->m_len; - r->ti_idx = i; - - return (0); -} - -#ifdef TI_PRIVATE_JUMBOS - -/* - * Initialize a jumbo receive ring descriptor. This allocates - * a jumbo buffer from the pool managed internally by the driver. - */ -static int -ti_newbuf_jumbo(sc, i, m) - struct ti_softc *sc; - int i; - struct mbuf *m; -{ - struct mbuf *m_new = NULL; - struct ti_rx_desc *r; - - if (m == NULL) { - caddr_t *buf = NULL; - - /* Allocate the mbuf. */ - MGETHDR(m_new, M_DONTWAIT, MT_DATA); - if (m_new == NULL) { - return (ENOBUFS); - } - - /* Allocate the jumbo buffer */ - buf = ti_jalloc(sc); - if (buf == NULL) { - m_freem(m_new); - printf("ti%d: jumbo allocation failed " - "-- packet dropped!\n", sc->ti_unit); - return (ENOBUFS); - } - - /* Attach the buffer to the mbuf. */ - m_new->m_data = (void *) buf; - m_new->m_len = m_new->m_pkthdr.len = TI_JUMBO_FRAMELEN; - MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, ti_jfree, - (struct ti_softc *)sc, 0, EXT_NET_DRV); - } else { - m_new = m; - m_new->m_data = m_new->m_ext.ext_buf; - m_new->m_ext.ext_size = TI_JUMBO_FRAMELEN; - } - - m_adj(m_new, ETHER_ALIGN); - /* Set up the descriptor. */ - r = &sc->ti_rdata->ti_rx_jumbo_ring[i]; - sc->ti_cdata.ti_rx_jumbo_chain[i] = m_new; - TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); - r->ti_type = TI_BDTYPE_RECV_JUMBO_BD; - r->ti_flags = TI_BDFLAG_JUMBO_RING; - if (sc->ti_ifp->if_hwassist) - r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; - r->ti_len = m_new->m_len; - r->ti_idx = i; - - return (0); -} - -#else -#include <vm/vm_page.h> - -#if (PAGE_SIZE == 4096) -#define NPAYLOAD 2 -#else -#define NPAYLOAD 1 -#endif - -#define TCP_HDR_LEN (52 + sizeof(struct ether_header)) -#define UDP_HDR_LEN (28 + sizeof(struct ether_header)) -#define NFS_HDR_LEN (UDP_HDR_LEN) -static int HDR_LEN = TCP_HDR_LEN; - - -/* - * Initialize a jumbo receive ring descriptor. This allocates - * a jumbo buffer from the pool managed internally by the driver. - */ -static int -ti_newbuf_jumbo(sc, idx, m_old) - struct ti_softc *sc; - int idx; - struct mbuf *m_old; -{ - struct mbuf *cur, *m_new = NULL; - struct mbuf *m[3] = {NULL, NULL, NULL}; - struct ti_rx_desc_ext *r; - vm_page_t frame; - static int color; - /* 1 extra buf to make nobufs easy*/ - struct sf_buf *sf[3] = {NULL, NULL, NULL}; - int i; - - if (m_old != NULL) { - m_new = m_old; - cur = m_old->m_next; - for (i = 0; i <= NPAYLOAD; i++){ - m[i] = cur; - cur = cur->m_next; - } - } else { - /* Allocate the mbufs. */ - MGETHDR(m_new, M_DONTWAIT, MT_DATA); - if (m_new == NULL) { - printf("ti%d: mbuf allocation failed " - "-- packet dropped!\n", sc->ti_unit); - goto nobufs; - } - MGET(m[NPAYLOAD], M_DONTWAIT, MT_DATA); - if (m[NPAYLOAD] == NULL) { - printf("ti%d: cluster mbuf allocation failed " - "-- packet dropped!\n", sc->ti_unit); - goto nobufs; - } - MCLGET(m[NPAYLOAD], M_DONTWAIT); - if ((m[NPAYLOAD]->m_flags & M_EXT) == 0) { - printf("ti%d: mbuf allocation failed " - "-- packet dropped!\n", sc->ti_unit); - goto nobufs; - } - m[NPAYLOAD]->m_len = MCLBYTES; - - for (i = 0; i < NPAYLOAD; i++){ - MGET(m[i], M_DONTWAIT, MT_DATA); - if (m[i] == NULL) { - printf("ti%d: mbuf allocation failed " - "-- packet dropped!\n", sc->ti_unit); - goto nobufs; - } - frame = vm_page_alloc(NULL, color++, - VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | - VM_ALLOC_WIRED); - if (frame == NULL) { - printf("ti%d: buffer allocation failed " - "-- packet dropped!\n", sc->ti_unit); - printf(" index %d page %d\n", idx, i); - goto nobufs; - } - sf[i] = sf_buf_alloc(frame, SFB_NOWAIT); - if (sf[i] == NULL) { - vm_page_lock_queues(); - vm_page_unwire(frame, 0); - vm_page_free(frame); - vm_page_unlock_queues(); - printf("ti%d: buffer allocation failed " - "-- packet dropped!\n", sc->ti_unit); - printf(" index %d page %d\n", idx, i); - goto nobufs; - } - } - for (i = 0; i < NPAYLOAD; i++){ - /* Attach the buffer to the mbuf. */ - m[i]->m_data = (void *)sf_buf_kva(sf[i]); - m[i]->m_len = PAGE_SIZE; - MEXTADD(m[i], sf_buf_kva(sf[i]), PAGE_SIZE, - sf_buf_mext, sf[i], 0, EXT_DISPOSABLE); - m[i]->m_next = m[i+1]; - } - /* link the buffers to the header */ - m_new->m_next = m[0]; - m_new->m_data += ETHER_ALIGN; - if (sc->ti_hdrsplit) - m_new->m_len = MHLEN - ETHER_ALIGN; - else - m_new->m_len = HDR_LEN; - m_new->m_pkthdr.len = NPAYLOAD * PAGE_SIZE + m_new->m_len; - } - - /* Set up the descriptor. */ - r = &sc->ti_rdata->ti_rx_jumbo_ring[idx]; - sc->ti_cdata.ti_rx_jumbo_chain[idx] = m_new; - TI_HOSTADDR(r->ti_addr0) = vtophys(mtod(m_new, caddr_t)); - r->ti_len0 = m_new->m_len; - - TI_HOSTADDR(r->ti_addr1) = vtophys(mtod(m[0], caddr_t)); - r->ti_len1 = PAGE_SIZE; - - TI_HOSTADDR(r->ti_addr2) = vtophys(mtod(m[1], caddr_t)); - r->ti_len2 = m[1]->m_ext.ext_size; /* could be PAGE_SIZE or MCLBYTES */ - - if (PAGE_SIZE == 4096) { - TI_HOSTADDR(r->ti_addr3) = vtophys(mtod(m[2], caddr_t)); - r->ti_len3 = MCLBYTES; - } else { - r->ti_len3 = 0; - } - r->ti_type = TI_BDTYPE_RECV_JUMBO_BD; - - r->ti_flags = TI_BDFLAG_JUMBO_RING|TI_RCB_FLAG_USE_EXT_RX_BD; - - if (sc->ti_ifp->if_hwassist) - r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM; - - r->ti_idx = idx; - - return (0); - -nobufs: - - /* - * Warning! : - * This can only be called before the mbufs are strung together. - * If the mbufs are strung together, m_freem() will free the chain, - * so that the later mbufs will be freed multiple times. - */ - if (m_new) - m_freem(m_new); - - for (i = 0; i < 3; i++) { - if (m[i]) - m_freem(m[i]); - if (sf[i]) - sf_buf_mext((void *)sf_buf_kva(sf[i]), sf[i]); - } - return (ENOBUFS); -} -#endif - - - -/* - * The standard receive ring has 512 entries in it. At 2K per mbuf cluster, - * that's 1MB or memory, which is a lot. For now, we fill only the first - * 256 ring entries and hope that our CPU is fast enough to keep up with - * the NIC. - */ -static int -ti_init_rx_ring_std(sc) - struct ti_softc *sc; -{ - register int i; - struct ti_cmd_desc cmd; - - for (i = 0; i < TI_SSLOTS; i++) { - if (ti_newbuf_std(sc, i, NULL) == ENOBUFS) - return (ENOBUFS); - }; - - TI_UPDATE_STDPROD(sc, i - 1); - sc->ti_std = i - 1; - - return (0); -} - -static void -ti_free_rx_ring_std(sc) - struct ti_softc *sc; -{ - register int i; - - for (i = 0; i < TI_STD_RX_RING_CNT; i++) { - if (sc->ti_cdata.ti_rx_std_chain[i] != NULL) { - m_freem(sc->ti_cdata.ti_rx_std_chain[i]); - sc->ti_cdata.ti_rx_std_chain[i] = NULL; - } - bzero((char *)&sc->ti_rdata->ti_rx_std_ring[i], - sizeof(struct ti_rx_desc)); - } -} - -static int -ti_init_rx_ring_jumbo(sc) - struct ti_softc *sc; -{ - register int i; - struct ti_cmd_desc cmd; - - for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) { - if (ti_newbuf_jumbo(sc, i, NULL) == ENOBUFS) - return (ENOBUFS); - }; - - TI_UPDATE_JUMBOPROD(sc, i - 1); - sc->ti_jumbo = i - 1; - - return (0); -} - -static void -ti_free_rx_ring_jumbo(sc) - struct ti_softc *sc; -{ - register int i; - - for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) { - if (sc->ti_cdata.ti_rx_jumbo_chain[i] != NULL) { - m_freem(sc->ti_cdata.ti_rx_jumbo_chain[i]); - sc->ti_cdata.ti_rx_jumbo_chain[i] = NULL; - } - bzero((char *)&sc->ti_rdata->ti_rx_jumbo_ring[i], - sizeof(struct ti_rx_desc)); - } -} - -static int -ti_init_rx_ring_mini(sc) - struct ti_softc *sc; -{ - register int i; - - for (i = 0; i < TI_MSLOTS; i++) { - if (ti_newbuf_mini(sc, i, NULL) == ENOBUFS) - return (ENOBUFS); - }; - - TI_UPDATE_MINIPROD(sc, i - 1); - sc->ti_mini = i - 1; - - return (0); -} - -static void -ti_free_rx_ring_mini(sc) - struct ti_softc *sc; -{ - register int i; - - for (i = 0; i < TI_MINI_RX_RING_CNT; i++) { - if (sc->ti_cdata.ti_rx_mini_chain[i] != NULL) { - m_freem(sc->ti_cdata.ti_rx_mini_chain[i]); - sc->ti_cdata.ti_rx_mini_chain[i] = NULL; - } - bzero((char *)&sc->ti_rdata->ti_rx_mini_ring[i], - sizeof(struct ti_rx_desc)); - } -} - -static void -ti_free_tx_ring(sc) - struct ti_softc *sc; -{ - register int i; - - if (sc->ti_rdata->ti_tx_ring == NULL) - return; - - for (i = 0; i < TI_TX_RING_CNT; i++) { - if (sc->ti_cdata.ti_tx_chain[i] != NULL) { - m_freem(sc->ti_cdata.ti_tx_chain[i]); - sc->ti_cdata.ti_tx_chain[i] = NULL; - } - bzero((char *)&sc->ti_rdata->ti_tx_ring[i], - sizeof(struct ti_tx_desc)); - } -} - -static int -ti_init_tx_ring(sc) - struct ti_softc *sc; -{ - sc->ti_txcnt = 0; - sc->ti_tx_saved_considx = 0; - CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0); - return (0); -} - -/* - * The Tigon 2 firmware has a new way to add/delete multicast addresses, - * but we have to support the old way too so that Tigon 1 cards will - * work. - */ -static void -ti_add_mcast(sc, addr) - struct ti_softc *sc; - struct ether_addr *addr; -{ - struct ti_cmd_desc cmd; - u_int16_t *m; - u_int32_t ext[2] = {0, 0}; - - m = (u_int16_t *)&addr->octet[0]; - - switch (sc->ti_hwrev) { - case TI_HWREV_TIGON: - CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0])); - CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2])); - TI_DO_CMD(TI_CMD_ADD_MCAST_ADDR, 0, 0); - break; - case TI_HWREV_TIGON_II: - ext[0] = htons(m[0]); - ext[1] = (htons(m[1]) << 16) | htons(m[2]); - TI_DO_CMD_EXT(TI_CMD_EXT_ADD_MCAST, 0, 0, (caddr_t)&ext, 2); - break; - default: - printf("ti%d: unknown hwrev\n", sc->ti_unit); - break; - } -} - -static void -ti_del_mcast(sc, addr) - struct ti_softc *sc; - struct ether_addr *addr; -{ - struct ti_cmd_desc cmd; - u_int16_t *m; - u_int32_t ext[2] = {0, 0}; - - m = (u_int16_t *)&addr->octet[0]; - - switch (sc->ti_hwrev) { - case TI_HWREV_TIGON: - CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0])); - CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2])); - TI_DO_CMD(TI_CMD_DEL_MCAST_ADDR, 0, 0); - break; - case TI_HWREV_TIGON_II: - ext[0] = htons(m[0]); - ext[1] = (htons(m[1]) << 16) | htons(m[2]); - TI_DO_CMD_EXT(TI_CMD_EXT_DEL_MCAST, 0, 0, (caddr_t)&ext, 2); - break; - default: - printf("ti%d: unknown hwrev\n", sc->ti_unit); - break; - } -} - -/* - * Configure the Tigon's multicast address filter. - * - * The actual multicast table management is a bit of a pain, thanks to - * slight brain damage on the part of both Alteon and us. With our - * multicast code, we are only alerted when the multicast address table - * changes and at that point we only have the current list of addresses: - * we only know the current state, not the previous state, so we don't - * actually know what addresses were removed or added. The firmware has - * state, but we can't get our grubby mits on it, and there is no 'delete - * all multicast addresses' command. Hence, we have to maintain our own - * state so we know what addresses have been programmed into the NIC at - * any given time. - */ -static void -ti_setmulti(sc) - struct ti_softc *sc; -{ - struct ifnet *ifp; - struct ifmultiaddr *ifma; - struct ti_cmd_desc cmd; - struct ti_mc_entry *mc; - u_int32_t intrs; - - ifp = sc->ti_ifp; - - if (ifp->if_flags & IFF_ALLMULTI) { - TI_DO_CMD(TI_CMD_SET_ALLMULTI, TI_CMD_CODE_ALLMULTI_ENB, 0); - return; - } else { - TI_DO_CMD(TI_CMD_SET_ALLMULTI, TI_CMD_CODE_ALLMULTI_DIS, 0); - } - - /* Disable interrupts. */ - intrs = CSR_READ_4(sc, TI_MB_HOSTINTR); - CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); - - /* First, zot all the existing filters. */ - while (SLIST_FIRST(&sc->ti_mc_listhead) != NULL) { - mc = SLIST_FIRST(&sc->ti_mc_listhead); - ti_del_mcast(sc, &mc->mc_addr); - SLIST_REMOVE_HEAD(&sc->ti_mc_listhead, mc_entries); - free(mc, M_DEVBUF); - } - - /* Now program new ones. */ - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - mc = malloc(sizeof(struct ti_mc_entry), M_DEVBUF, M_NOWAIT); - if (mc == NULL) { - if_printf(ifp, "no memory for mcast filter entry\n"); - continue; - } - bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), - (char *)&mc->mc_addr, ETHER_ADDR_LEN); - SLIST_INSERT_HEAD(&sc->ti_mc_listhead, mc, mc_entries); - ti_add_mcast(sc, &mc->mc_addr); - } - - /* Re-enable interrupts. */ - CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs); -} - -/* - * Check to see if the BIOS has configured us for a 64 bit slot when - * we aren't actually in one. If we detect this condition, we can work - * around it on the Tigon 2 by setting a bit in the PCI state register, - * but for the Tigon 1 we must give up and abort the interface attach. - */ -static int ti_64bitslot_war(sc) - struct ti_softc *sc; -{ - if (!(CSR_READ_4(sc, TI_PCI_STATE) & TI_PCISTATE_32BIT_BUS)) { - CSR_WRITE_4(sc, 0x600, 0); - CSR_WRITE_4(sc, 0x604, 0); - CSR_WRITE_4(sc, 0x600, 0x5555AAAA); - if (CSR_READ_4(sc, 0x604) == 0x5555AAAA) { - if (sc->ti_hwrev == TI_HWREV_TIGON) - return (EINVAL); - else { - TI_SETBIT(sc, TI_PCI_STATE, - TI_PCISTATE_32BIT_BUS); - return (0); - } - } - } - - return (0); -} - -/* - * Do endian, PCI and DMA initialization. Also check the on-board ROM - * self-test results. - */ -static int -ti_chipinit(sc) - struct ti_softc *sc; -{ - u_int32_t cacheline; - u_int32_t pci_writemax = 0; - u_int32_t hdrsplit; - - /* Initialize link to down state. */ - sc->ti_linkstat = TI_EV_CODE_LINK_DOWN; - - if (sc->ti_ifp->if_capenable & IFCAP_HWCSUM) - sc->ti_ifp->if_hwassist = TI_CSUM_FEATURES; - else - sc->ti_ifp->if_hwassist = 0; - - /* Set endianness before we access any non-PCI registers. */ -#if BYTE_ORDER == BIG_ENDIAN - CSR_WRITE_4(sc, TI_MISC_HOST_CTL, - TI_MHC_BIGENDIAN_INIT | (TI_MHC_BIGENDIAN_INIT << 24)); -#else - CSR_WRITE_4(sc, TI_MISC_HOST_CTL, - TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24)); -#endif - - /* Check the ROM failed bit to see if self-tests passed. */ - if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) { - printf("ti%d: board self-diagnostics failed!\n", sc->ti_unit); - return (ENODEV); - } - - /* Halt the CPU. */ - TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT); - - /* Figure out the hardware revision. */ - switch (CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK) { - case TI_REV_TIGON_I: - sc->ti_hwrev = TI_HWREV_TIGON; - break; - case TI_REV_TIGON_II: - sc->ti_hwrev = TI_HWREV_TIGON_II; - break; - default: - printf("ti%d: unsupported chip revision\n", sc->ti_unit); - return (ENODEV); - } - - /* Do special setup for Tigon 2. */ - if (sc->ti_hwrev == TI_HWREV_TIGON_II) { - TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT); - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K); - TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS); - } - - /* - * We don't have firmware source for the Tigon 1, so Tigon 1 boards - * can't do header splitting. - */ -#ifdef TI_JUMBO_HDRSPLIT - if (sc->ti_hwrev != TI_HWREV_TIGON) - sc->ti_hdrsplit = 1; - else - printf("ti%d: can't do header splitting on a Tigon I board\n", - sc->ti_unit); -#endif /* TI_JUMBO_HDRSPLIT */ - - /* Set up the PCI state register. */ - CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD); - if (sc->ti_hwrev == TI_HWREV_TIGON_II) { - TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT); - } - - /* Clear the read/write max DMA parameters. */ - TI_CLRBIT(sc, TI_PCI_STATE, (TI_PCISTATE_WRITE_MAXDMA| - TI_PCISTATE_READ_MAXDMA)); - - /* Get cache line size. */ - cacheline = CSR_READ_4(sc, TI_PCI_BIST) & 0xFF; - - /* - * If the system has set enabled the PCI memory write - * and invalidate command in the command register, set - * the write max parameter accordingly. This is necessary - * to use MWI with the Tigon 2. - */ - if (CSR_READ_4(sc, TI_PCI_CMDSTAT) & PCIM_CMD_MWIEN) { - switch (cacheline) { - case 1: - case 4: - case 8: - case 16: - case 32: - case 64: - break; - default: - /* Disable PCI memory write and invalidate. */ - if (bootverbose) - printf("ti%d: cache line size %d not " - "supported; disabling PCI MWI\n", - sc->ti_unit, cacheline); - CSR_WRITE_4(sc, TI_PCI_CMDSTAT, CSR_READ_4(sc, - TI_PCI_CMDSTAT) & ~PCIM_CMD_MWIEN); - break; - } - } - -#ifdef __brokenalpha__ - /* - * From the Alteon sample driver: - * Must insure that we do not cross an 8K (bytes) boundary - * for DMA reads. Our highest limit is 1K bytes. This is a - * restriction on some ALPHA platforms with early revision - * 21174 PCI chipsets, such as the AlphaPC 164lx - */ - TI_SETBIT(sc, TI_PCI_STATE, pci_writemax|TI_PCI_READMAX_1024); -#else - TI_SETBIT(sc, TI_PCI_STATE, pci_writemax); -#endif - - /* This sets the min dma param all the way up (0xff). */ - TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_MINDMA); - - if (sc->ti_hdrsplit) - hdrsplit = TI_OPMODE_JUMBO_HDRSPLIT; - else - hdrsplit = 0; - - /* Configure DMA variables. */ -#if BYTE_ORDER == BIG_ENDIAN - CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_BD | - TI_OPMODE_BYTESWAP_DATA | TI_OPMODE_WORDSWAP_BD | - TI_OPMODE_WARN_ENB | TI_OPMODE_FATAL_ENB | - TI_OPMODE_DONT_FRAG_JUMBO | hdrsplit); -#else /* BYTE_ORDER */ - CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_DATA| - TI_OPMODE_WORDSWAP_BD|TI_OPMODE_DONT_FRAG_JUMBO| - TI_OPMODE_WARN_ENB|TI_OPMODE_FATAL_ENB | hdrsplit); -#endif /* BYTE_ORDER */ - - /* - * Only allow 1 DMA channel to be active at a time. - * I don't think this is a good idea, but without it - * the firmware racks up lots of nicDmaReadRingFull - * errors. This is not compatible with hardware checksums. - */ - if (sc->ti_ifp->if_hwassist == 0) - TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE); - - /* Recommended settings from Tigon manual. */ - CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W); - CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W); - - if (ti_64bitslot_war(sc)) { - printf("ti%d: bios thinks we're in a 64 bit slot, " - "but we aren't", sc->ti_unit); - return (EINVAL); - } - - return (0); -} - -#define TI_RD_OFF(x) offsetof(struct ti_ring_data, x) - -/* - * Initialize the general information block and firmware, and - * start the CPU(s) running. - */ -static int -ti_gibinit(sc) - struct ti_softc *sc; -{ - struct ti_rcb *rcb; - int i; - struct ifnet *ifp; - uint32_t rdphys; - - ifp = sc->ti_ifp; - rdphys = sc->ti_rdata_phys; - - /* Disable interrupts for now. */ - CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); - - /* - * Tell the chip where to find the general information block. - * While this struct could go into >4GB memory, we allocate it in a - * single slab with the other descriptors, and those don't seem to - * support being located in a 64-bit region. - */ - CSR_WRITE_4(sc, TI_GCR_GENINFO_HI, 0); - CSR_WRITE_4(sc, TI_GCR_GENINFO_LO, rdphys + TI_RD_OFF(ti_info)); - - /* Load the firmware into SRAM. */ - ti_loadfw(sc); - - /* Set up the contents of the general info and ring control blocks. */ - - /* Set up the event ring and producer pointer. */ - rcb = &sc->ti_rdata->ti_info.ti_ev_rcb; - - TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_event_ring); - rcb->ti_flags = 0; - TI_HOSTADDR(sc->ti_rdata->ti_info.ti_ev_prodidx_ptr) = - rdphys + TI_RD_OFF(ti_ev_prodidx_r); - sc->ti_ev_prodidx.ti_idx = 0; - CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, 0); - sc->ti_ev_saved_considx = 0; - - /* Set up the command ring and producer mailbox. */ - rcb = &sc->ti_rdata->ti_info.ti_cmd_rcb; - - sc->ti_rdata->ti_cmd_ring = - (struct ti_cmd_desc *)(sc->ti_vhandle + TI_GCR_CMDRING); - TI_HOSTADDR(rcb->ti_hostaddr) = TI_GCR_NIC_ADDR(TI_GCR_CMDRING); - rcb->ti_flags = 0; - rcb->ti_max_len = 0; - for (i = 0; i < TI_CMD_RING_CNT; i++) { - CSR_WRITE_4(sc, TI_GCR_CMDRING + (i * 4), 0); - } - CSR_WRITE_4(sc, TI_GCR_CMDCONS_IDX, 0); - CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, 0); - sc->ti_cmd_saved_prodidx = 0; - - /* - * Assign the address of the stats refresh buffer. - * We re-use the current stats buffer for this to - * conserve memory. - */ - TI_HOSTADDR(sc->ti_rdata->ti_info.ti_refresh_stats_ptr) = - rdphys + TI_RD_OFF(ti_info.ti_stats); - - /* Set up the standard receive ring. */ - rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb; - TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_rx_std_ring); - rcb->ti_max_len = TI_FRAMELEN; - rcb->ti_flags = 0; - if (sc->ti_ifp->if_hwassist) - rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | - TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; - rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; - - /* Set up the jumbo receive ring. */ - rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb; - TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_rx_jumbo_ring); - -#ifdef TI_PRIVATE_JUMBOS - rcb->ti_max_len = TI_JUMBO_FRAMELEN; - rcb->ti_flags = 0; -#else - rcb->ti_max_len = PAGE_SIZE; - rcb->ti_flags = TI_RCB_FLAG_USE_EXT_RX_BD; -#endif - if (sc->ti_ifp->if_hwassist) - rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | - TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; - rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; - - /* - * Set up the mini ring. Only activated on the - * Tigon 2 but the slot in the config block is - * still there on the Tigon 1. - */ - rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb; - TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_rx_mini_ring); - rcb->ti_max_len = MHLEN - ETHER_ALIGN; - if (sc->ti_hwrev == TI_HWREV_TIGON) - rcb->ti_flags = TI_RCB_FLAG_RING_DISABLED; - else - rcb->ti_flags = 0; - if (sc->ti_ifp->if_hwassist) - rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | - TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; - rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; - - /* - * Set up the receive return ring. - */ - rcb = &sc->ti_rdata->ti_info.ti_return_rcb; - TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_rx_return_ring); - rcb->ti_flags = 0; - rcb->ti_max_len = TI_RETURN_RING_CNT; - TI_HOSTADDR(sc->ti_rdata->ti_info.ti_return_prodidx_ptr) = - rdphys + TI_RD_OFF(ti_return_prodidx_r); - - /* - * Set up the tx ring. Note: for the Tigon 2, we have the option - * of putting the transmit ring in the host's address space and - * letting the chip DMA it instead of leaving the ring in the NIC's - * memory and accessing it through the shared memory region. We - * do this for the Tigon 2, but it doesn't work on the Tigon 1, - * so we have to revert to the shared memory scheme if we detect - * a Tigon 1 chip. - */ - CSR_WRITE_4(sc, TI_WINBASE, TI_TX_RING_BASE); - if (sc->ti_hwrev == TI_HWREV_TIGON) { - sc->ti_rdata->ti_tx_ring_nic = - (struct ti_tx_desc *)(sc->ti_vhandle + TI_WINDOW); - } - bzero((char *)sc->ti_rdata->ti_tx_ring, - TI_TX_RING_CNT * sizeof(struct ti_tx_desc)); - rcb = &sc->ti_rdata->ti_info.ti_tx_rcb; - if (sc->ti_hwrev == TI_HWREV_TIGON) - rcb->ti_flags = 0; - else - rcb->ti_flags = TI_RCB_FLAG_HOST_RING; - rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; - if (sc->ti_ifp->if_hwassist) - rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | - TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; - rcb->ti_max_len = TI_TX_RING_CNT; - if (sc->ti_hwrev == TI_HWREV_TIGON) - TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE; - else - TI_HOSTADDR(rcb->ti_hostaddr) = rdphys + TI_RD_OFF(ti_tx_ring); - TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) = - rdphys + TI_RD_OFF(ti_tx_considx_r); - - /* Set up tuneables */ -#if 0 - if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) - CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, - (sc->ti_rx_coal_ticks / 10)); - else -#endif - CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, sc->ti_rx_coal_ticks); - CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks); - CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks); - CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds); - CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds); - CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio); - - /* Turn interrupts on. */ - CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0); - CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); - - /* Start CPU. */ - TI_CLRBIT(sc, TI_CPU_STATE, (TI_CPUSTATE_HALT|TI_CPUSTATE_STEP)); - - return (0); -} - -static void -ti_rdata_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - struct ti_softc *sc; - - sc = arg; - if (error || nseg != 1) - return; - - /* - * All of the Tigon data structures need to live at <4GB. This - * cast is fine since busdma was told about this constraint. - */ - sc->ti_rdata_phys = (uint32_t)segs[0].ds_addr; - return; -} - -/* - * Probe for a Tigon chip. Check the PCI vendor and device IDs - * against our list and return its name if we find a match. - */ -static int -ti_probe(dev) - device_t dev; -{ - struct ti_type *t; - - t = ti_devs; - - while (t->ti_name != NULL) { - if ((pci_get_vendor(dev) == t->ti_vid) && - (pci_get_device(dev) == t->ti_did)) { - device_set_desc(dev, t->ti_name); - return (BUS_PROBE_DEFAULT); - } - t++; - } - - return (ENXIO); -} - -static int -ti_attach(dev) - device_t dev; -{ - struct ifnet *ifp; - struct ti_softc *sc; - int unit, error = 0, rid; - u_char eaddr[6]; - - sc = device_get_softc(dev); - unit = device_get_unit(dev); - sc->ti_unit = unit; - - mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, - MTX_DEF | MTX_RECURSE); - ifmedia_init(&sc->ifmedia, IFM_IMASK, ti_ifmedia_upd, ti_ifmedia_sts); - ifp = sc->ti_ifp = if_alloc(IFT_ETHER); - if (ifp == NULL) { - printf("ti%d: can not if_alloc()\n", sc->ti_unit); - error = ENOSPC; - goto fail; - } - sc->ti_ifp->if_capabilities = IFCAP_HWCSUM | - IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; - sc->ti_ifp->if_capenable = sc->ti_ifp->if_capabilities; - - /* - * Map control/status registers. - */ - pci_enable_busmaster(dev); - - rid = TI_PCI_LOMEM; - sc->ti_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE|PCI_RF_DENSE); - - if (sc->ti_res == NULL) { - printf ("ti%d: couldn't map memory\n", unit); - error = ENXIO; - goto fail; - } - - sc->ti_btag = rman_get_bustag(sc->ti_res); - sc->ti_bhandle = rman_get_bushandle(sc->ti_res); - sc->ti_vhandle = (vm_offset_t)rman_get_virtual(sc->ti_res); - - /* Allocate interrupt */ - rid = 0; - - sc->ti_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->ti_irq == NULL) { - printf("ti%d: couldn't map interrupt\n", unit); - error = ENXIO; - goto fail; - } - - if (ti_chipinit(sc)) { - printf("ti%d: chip initialization failed\n", sc->ti_unit); - error = ENXIO; - goto fail; - } - - /* Zero out the NIC's on-board SRAM. */ - ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL); - - /* Init again -- zeroing memory may have clobbered some registers. */ - if (ti_chipinit(sc)) { - printf("ti%d: chip initialization failed\n", sc->ti_unit); - error = ENXIO; - goto fail; - } - - /* - * Get station address from the EEPROM. Note: the manual states - * that the MAC address is at offset 0x8c, however the data is - * stored as two longwords (since that's how it's loaded into - * the NIC). This means the MAC address is actually preceded - * by two zero bytes. We need to skip over those. - */ - if (ti_read_eeprom(sc, eaddr, - TI_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) { - printf("ti%d: failed to read station address\n", unit); - error = ENXIO; - goto fail; - } - - /* Allocate the general information block and ring buffers. */ - if (bus_dma_tag_create(NULL, /* parent */ - 1, 0, /* algnmnt, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ - 0, /* nsegments */ - BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->ti_parent_dmat) != 0) { - printf("ti%d: Failed to allocate parent dmat\n", sc->ti_unit); - error = ENOMEM; - goto fail; - } - - if (bus_dma_tag_create(sc->ti_parent_dmat, /* parent */ - PAGE_SIZE, 0, /* algnmnt, boundary */ - BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - sizeof(struct ti_ring_data), /* maxsize */ - 1, /* nsegments */ - sizeof(struct ti_ring_data), /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->ti_rdata_dmat) != 0) { - printf("ti%d: Failed to allocate rdata dmat\n", sc->ti_unit); - error = ENOMEM; - goto fail; - } - - if (bus_dmamem_alloc(sc->ti_rdata_dmat, (void**)&sc->ti_rdata, - BUS_DMA_NOWAIT, &sc->ti_rdata_dmamap) != 0) { - printf("ti%d: Failed to allocate rdata memory\n", sc->ti_unit); - error = ENOMEM; - goto fail; - } - - if (bus_dmamap_load(sc->ti_rdata_dmat, sc->ti_rdata_dmamap, - sc->ti_rdata, sizeof(struct ti_ring_data), - ti_rdata_cb, sc, BUS_DMA_NOWAIT) != 0) { - printf("ti%d: Failed to load rdata segments\n", sc->ti_unit); - error = ENOMEM; - goto fail; - } - - bzero(sc->ti_rdata, sizeof(struct ti_ring_data)); - - /* Try to allocate memory for jumbo buffers. */ -#ifdef TI_PRIVATE_JUMBOS - if (ti_alloc_jumbo_mem(sc)) { - printf("ti%d: jumbo buffer allocation failed\n", sc->ti_unit); - error = ENXIO; - goto fail; - } -#endif - - /* - * We really need a better way to tell a 1000baseTX card - * from a 1000baseSX one, since in theory there could be - * OEMed 1000baseTX cards from lame vendors who aren't - * clever enough to change the PCI ID. For the moment - * though, the AceNIC is the only copper card available. - */ - if (pci_get_vendor(dev) == ALT_VENDORID && - pci_get_device(dev) == ALT_DEVICEID_ACENIC_COPPER) - sc->ti_copper = 1; - /* Ok, it's not the only copper card available. */ - if (pci_get_vendor(dev) == NG_VENDORID && - pci_get_device(dev) == NG_DEVICEID_GA620T) - sc->ti_copper = 1; - - /* Set default tuneable values. */ - sc->ti_stat_ticks = 2 * TI_TICKS_PER_SEC; -#if 0 - sc->ti_rx_coal_ticks = TI_TICKS_PER_SEC / 5000; -#endif - sc->ti_rx_coal_ticks = 170; - sc->ti_tx_coal_ticks = TI_TICKS_PER_SEC / 500; - sc->ti_rx_max_coal_bds = 64; -#if 0 - sc->ti_tx_max_coal_bds = 128; -#endif - sc->ti_tx_max_coal_bds = 32; - sc->ti_tx_buf_ratio = 21; - - /* Set up ifnet structure */ - ifp->if_softc = sc; - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | - IFF_NEEDSGIANT; - tis[unit] = sc; - ifp->if_ioctl = ti_ioctl; - ifp->if_start = ti_start; - ifp->if_watchdog = ti_watchdog; - ifp->if_init = ti_init; - ifp->if_mtu = ETHERMTU; - ifp->if_snd.ifq_maxlen = TI_TX_RING_CNT - 1; - - /* Set up ifmedia support. */ - if (sc->ti_copper) { - /* - * Copper cards allow manual 10/100 mode selection, - * but not manual 1000baseTX mode selection. Why? - * Becuase currently there's no way to specify the - * master/slave setting through the firmware interface, - * so Alteon decided to just bag it and handle it - * via autonegotiation. - */ - ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); - ifmedia_add(&sc->ifmedia, - IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); - ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); - ifmedia_add(&sc->ifmedia, - IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); - ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_T, 0, NULL); - ifmedia_add(&sc->ifmedia, - IFM_ETHER|IFM_1000_T|IFM_FDX, 0, NULL); - } else { - /* Fiber cards don't support 10/100 modes. */ - ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL); - ifmedia_add(&sc->ifmedia, - IFM_ETHER|IFM_1000_SX|IFM_FDX, 0, NULL); - } - ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); - ifmedia_set(&sc->ifmedia, IFM_ETHER|IFM_AUTO); - - /* - * We're assuming here that card initialization is a sequential - * thing. If it isn't, multiple cards probing at the same time - * could stomp on the list of softcs here. - */ - - /* Register the device */ - sc->dev = make_dev(&ti_cdevsw, sc->ti_unit, UID_ROOT, GID_OPERATOR, - 0600, "ti%d", sc->ti_unit); - sc->dev->si_drv1 = sc; - - /* - * Call MI attach routine. - */ - ether_ifattach(ifp, eaddr); - - /* Hook interrupt last to avoid having to lock softc */ - error = bus_setup_intr(dev, sc->ti_irq, INTR_TYPE_NET, - ti_intr, sc, &sc->ti_intrhand); - - if (error) { - printf("ti%d: couldn't set up irq\n", unit); - ether_ifdetach(ifp); - if_free(ifp); - goto fail; - } - -fail: - if (sc && error) - ti_detach(dev); - - return (error); -} - -/* - * Shutdown hardware and free up resources. This can be called any - * time after the mutex has been initialized. It is called in both - * the error case in attach and the normal detach case so it needs - * to be careful about only freeing resources that have actually been - * allocated. - */ -static int -ti_detach(dev) - device_t dev; -{ - struct ti_softc *sc; - struct ifnet *ifp; - - sc = device_get_softc(dev); - if (sc->dev) - destroy_dev(sc->dev); - KASSERT(mtx_initialized(&sc->ti_mtx), ("ti mutex not initialized")); - TI_LOCK(sc); - ifp = sc->ti_ifp; - - /* These should only be active if attach succeeded */ - if (device_is_attached(dev)) { - ti_stop(sc); - ether_ifdetach(ifp); - if_free(ifp); - bus_generic_detach(dev); - } - ifmedia_removeall(&sc->ifmedia); - - if (sc->ti_rdata) - bus_dmamem_free(sc->ti_rdata_dmat, sc->ti_rdata, - sc->ti_rdata_dmamap); - if (sc->ti_rdata_dmat) - bus_dma_tag_destroy(sc->ti_rdata_dmat); - if (sc->ti_parent_dmat) - bus_dma_tag_destroy(sc->ti_parent_dmat); - if (sc->ti_intrhand) - bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); - if (sc->ti_irq) - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); - if (sc->ti_res) { - bus_release_resource(dev, SYS_RES_MEMORY, TI_PCI_LOMEM, - sc->ti_res); - } - -#ifdef TI_PRIVATE_JUMBOS - if (sc->ti_cdata.ti_jumbo_buf) - contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, M_DEVBUF); -#endif - if (sc->ti_rdata) - contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), M_DEVBUF); - - TI_UNLOCK(sc); - mtx_destroy(&sc->ti_mtx); - - return (0); -} - -#ifdef TI_JUMBO_HDRSPLIT -/* - * If hdr_len is 0, that means that header splitting wasn't done on - * this packet for some reason. The two most likely reasons are that - * the protocol isn't a supported protocol for splitting, or this - * packet had a fragment offset that wasn't 0. - * - * The header length, if it is non-zero, will always be the length of - * the headers on the packet, but that length could be longer than the - * first mbuf. So we take the minimum of the two as the actual - * length. - */ -static __inline void -ti_hdr_split(struct mbuf *top, int hdr_len, int pkt_len, int idx) -{ - int i = 0; - int lengths[4] = {0, 0, 0, 0}; - struct mbuf *m, *mp; - - if (hdr_len != 0) - top->m_len = min(hdr_len, top->m_len); - pkt_len -= top->m_len; - lengths[i++] = top->m_len; - - mp = top; - for (m = top->m_next; m && pkt_len; m = m->m_next) { - m->m_len = m->m_ext.ext_size = min(m->m_len, pkt_len); - pkt_len -= m->m_len; - lengths[i++] = m->m_len; - mp = m; - } - -#if 0 - if (hdr_len != 0) - printf("got split packet: "); - else - printf("got non-split packet: "); - - printf("%d,%d,%d,%d = %d\n", lengths[0], - lengths[1], lengths[2], lengths[3], - lengths[0] + lengths[1] + lengths[2] + - lengths[3]); -#endif - - if (pkt_len) - panic("header splitting didn't"); - - if (m) { - m_freem(m); - mp->m_next = NULL; - - } - if (mp->m_next != NULL) - panic("ti_hdr_split: last mbuf in chain should be null"); -} -#endif /* TI_JUMBO_HDRSPLIT */ - -/* - * Frame reception handling. This is called if there's a frame - * on the receive return list. - * - * Note: we have to be able to handle three possibilities here: - * 1) the frame is from the mini receive ring (can only happen) - * on Tigon 2 boards) - * 2) the frame is from the jumbo recieve ring - * 3) the frame is from the standard receive ring - */ - -static void -ti_rxeof(sc) - struct ti_softc *sc; -{ - struct ifnet *ifp; - struct ti_cmd_desc cmd; - - TI_LOCK_ASSERT(sc); - - ifp = sc->ti_ifp; - - while (sc->ti_rx_saved_considx != sc->ti_return_prodidx.ti_idx) { - struct ti_rx_desc *cur_rx; - u_int32_t rxidx; - struct mbuf *m = NULL; - u_int16_t vlan_tag = 0; - int have_tag = 0; - - cur_rx = - &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx]; - rxidx = cur_rx->ti_idx; - TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT); - - if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) { - have_tag = 1; - vlan_tag = cur_rx->ti_vlan_tag & 0xfff; - } - - if (cur_rx->ti_flags & TI_BDFLAG_JUMBO_RING) { - - TI_INC(sc->ti_jumbo, TI_JUMBO_RX_RING_CNT); - m = sc->ti_cdata.ti_rx_jumbo_chain[rxidx]; - sc->ti_cdata.ti_rx_jumbo_chain[rxidx] = NULL; - if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { - ifp->if_ierrors++; - ti_newbuf_jumbo(sc, sc->ti_jumbo, m); - continue; - } - if (ti_newbuf_jumbo(sc, sc->ti_jumbo, NULL) == ENOBUFS) { - ifp->if_ierrors++; - ti_newbuf_jumbo(sc, sc->ti_jumbo, m); - continue; - } -#ifdef TI_PRIVATE_JUMBOS - m->m_len = cur_rx->ti_len; -#else /* TI_PRIVATE_JUMBOS */ -#ifdef TI_JUMBO_HDRSPLIT - if (sc->ti_hdrsplit) - ti_hdr_split(m, TI_HOSTADDR(cur_rx->ti_addr), - cur_rx->ti_len, rxidx); - else -#endif /* TI_JUMBO_HDRSPLIT */ - m_adj(m, cur_rx->ti_len - m->m_pkthdr.len); -#endif /* TI_PRIVATE_JUMBOS */ - } else if (cur_rx->ti_flags & TI_BDFLAG_MINI_RING) { - TI_INC(sc->ti_mini, TI_MINI_RX_RING_CNT); - m = sc->ti_cdata.ti_rx_mini_chain[rxidx]; - sc->ti_cdata.ti_rx_mini_chain[rxidx] = NULL; - if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { - ifp->if_ierrors++; - ti_newbuf_mini(sc, sc->ti_mini, m); - continue; - } - if (ti_newbuf_mini(sc, sc->ti_mini, NULL) == ENOBUFS) { - ifp->if_ierrors++; - ti_newbuf_mini(sc, sc->ti_mini, m); - continue; - } - m->m_len = cur_rx->ti_len; - } else { - TI_INC(sc->ti_std, TI_STD_RX_RING_CNT); - m = sc->ti_cdata.ti_rx_std_chain[rxidx]; - sc->ti_cdata.ti_rx_std_chain[rxidx] = NULL; - if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { - ifp->if_ierrors++; - ti_newbuf_std(sc, sc->ti_std, m); - continue; - } - if (ti_newbuf_std(sc, sc->ti_std, NULL) == ENOBUFS) { - ifp->if_ierrors++; - ti_newbuf_std(sc, sc->ti_std, m); - continue; - } - m->m_len = cur_rx->ti_len; - } - - m->m_pkthdr.len = cur_rx->ti_len; - ifp->if_ipackets++; - m->m_pkthdr.rcvif = ifp; - - if (ifp->if_hwassist) { - m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | - CSUM_DATA_VALID; - if ((cur_rx->ti_ip_cksum ^ 0xffff) == 0) - m->m_pkthdr.csum_flags |= CSUM_IP_VALID; - m->m_pkthdr.csum_data = cur_rx->ti_tcp_udp_cksum; - } - - /* - * If we received a packet with a vlan tag, - * tag it before passing the packet upward. - */ - if (have_tag) - VLAN_INPUT_TAG(ifp, m, vlan_tag, continue); - TI_UNLOCK(sc); - (*ifp->if_input)(ifp, m); - TI_LOCK(sc); - } - - /* Only necessary on the Tigon 1. */ - if (sc->ti_hwrev == TI_HWREV_TIGON) - CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, - sc->ti_rx_saved_considx); - - TI_UPDATE_STDPROD(sc, sc->ti_std); - TI_UPDATE_MINIPROD(sc, sc->ti_mini); - TI_UPDATE_JUMBOPROD(sc, sc->ti_jumbo); -} - -static void -ti_txeof(sc) - struct ti_softc *sc; -{ - struct ti_tx_desc *cur_tx = NULL; - struct ifnet *ifp; - - ifp = sc->ti_ifp; - - /* - * Go through our tx ring and free mbufs for those - * frames that have been sent. - */ - while (sc->ti_tx_saved_considx != sc->ti_tx_considx.ti_idx) { - u_int32_t idx = 0; - - idx = sc->ti_tx_saved_considx; - if (sc->ti_hwrev == TI_HWREV_TIGON) { - if (idx > 383) - CSR_WRITE_4(sc, TI_WINBASE, - TI_TX_RING_BASE + 6144); - else if (idx > 255) - CSR_WRITE_4(sc, TI_WINBASE, - TI_TX_RING_BASE + 4096); - else if (idx > 127) - CSR_WRITE_4(sc, TI_WINBASE, - TI_TX_RING_BASE + 2048); - else - CSR_WRITE_4(sc, TI_WINBASE, - TI_TX_RING_BASE); - cur_tx = &sc->ti_rdata->ti_tx_ring_nic[idx % 128]; - } else - cur_tx = &sc->ti_rdata->ti_tx_ring[idx]; - if (cur_tx->ti_flags & TI_BDFLAG_END) - ifp->if_opackets++; - if (sc->ti_cdata.ti_tx_chain[idx] != NULL) { - m_freem(sc->ti_cdata.ti_tx_chain[idx]); - sc->ti_cdata.ti_tx_chain[idx] = NULL; - } - sc->ti_txcnt--; - TI_INC(sc->ti_tx_saved_considx, TI_TX_RING_CNT); - ifp->if_timer = 0; - } - - if (cur_tx != NULL) - ifp->if_flags &= ~IFF_OACTIVE; -} - -static void -ti_intr(xsc) - void *xsc; -{ - struct ti_softc *sc; - struct ifnet *ifp; - - sc = xsc; - TI_LOCK(sc); - ifp = sc->ti_ifp; - -/*#ifdef notdef*/ - /* Avoid this for now -- checking this register is expensive. */ - /* Make sure this is really our interrupt. */ - if (!(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_INTSTATE)) { - TI_UNLOCK(sc); - return; - } -/*#endif*/ - - /* Ack interrupt and stop others from occuring. */ - CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); - - if (ifp->if_flags & IFF_RUNNING) { - /* Check RX return ring producer/consumer */ - ti_rxeof(sc); - - /* Check TX ring producer/consumer */ - ti_txeof(sc); - } - - ti_handle_events(sc); - - /* Re-enable interrupts. */ - CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); - - if (ifp->if_flags & IFF_RUNNING && ifp->if_snd.ifq_head != NULL) - ti_start(ifp); - - TI_UNLOCK(sc); -} - -static void -ti_stats_update(sc) - struct ti_softc *sc; -{ - struct ifnet *ifp; - - ifp = sc->ti_ifp; - - ifp->if_collisions += - (sc->ti_rdata->ti_info.ti_stats.dot3StatsSingleCollisionFrames + - sc->ti_rdata->ti_info.ti_stats.dot3StatsMultipleCollisionFrames + - sc->ti_rdata->ti_info.ti_stats.dot3StatsExcessiveCollisions + - sc->ti_rdata->ti_info.ti_stats.dot3StatsLateCollisions) - - ifp->if_collisions; -} - -/* - * Encapsulate an mbuf chain in the tx ring by coupling the mbuf data - * pointers to descriptors. - */ -static int -ti_encap(sc, m_head, txidx) - struct ti_softc *sc; - struct mbuf *m_head; - u_int32_t *txidx; -{ - struct ti_tx_desc *f = NULL; - struct mbuf *m; - u_int32_t frag, cur, cnt = 0; - u_int16_t csum_flags = 0; - struct m_tag *mtag; - - m = m_head; - cur = frag = *txidx; - - if (m_head->m_pkthdr.csum_flags) { - if (m_head->m_pkthdr.csum_flags & CSUM_IP) - csum_flags |= TI_BDFLAG_IP_CKSUM; - if (m_head->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) - csum_flags |= TI_BDFLAG_TCP_UDP_CKSUM; - if (m_head->m_flags & M_LASTFRAG) - csum_flags |= TI_BDFLAG_IP_FRAG_END; - else if (m_head->m_flags & M_FRAG) - csum_flags |= TI_BDFLAG_IP_FRAG; - } - - mtag = VLAN_OUTPUT_TAG(sc->ti_ifp, m); - - /* - * Start packing the mbufs in this chain into - * the fragment pointers. Stop when we run out - * of fragments or hit the end of the mbuf chain. - */ - for (m = m_head; m != NULL; m = m->m_next) { - if (m->m_len != 0) { - if (sc->ti_hwrev == TI_HWREV_TIGON) { - if (frag > 383) - CSR_WRITE_4(sc, TI_WINBASE, - TI_TX_RING_BASE + 6144); - else if (frag > 255) - CSR_WRITE_4(sc, TI_WINBASE, - TI_TX_RING_BASE + 4096); - else if (frag > 127) - CSR_WRITE_4(sc, TI_WINBASE, - TI_TX_RING_BASE + 2048); - else - CSR_WRITE_4(sc, TI_WINBASE, - TI_TX_RING_BASE); - f = &sc->ti_rdata->ti_tx_ring_nic[frag % 128]; - } else - f = &sc->ti_rdata->ti_tx_ring[frag]; - if (sc->ti_cdata.ti_tx_chain[frag] != NULL) - break; - TI_HOSTADDR(f->ti_addr) = vtophys(mtod(m, vm_offset_t)); - f->ti_len = m->m_len; - f->ti_flags = csum_flags; - - if (mtag != NULL) { - f->ti_flags |= TI_BDFLAG_VLAN_TAG; - f->ti_vlan_tag = VLAN_TAG_VALUE(mtag) & 0xfff; - } else { - f->ti_vlan_tag = 0; - } - - /* - * Sanity check: avoid coming within 16 descriptors - * of the end of the ring. - */ - if ((TI_TX_RING_CNT - (sc->ti_txcnt + cnt)) < 16) - return (ENOBUFS); - cur = frag; - TI_INC(frag, TI_TX_RING_CNT); - cnt++; - } - } - - if (m != NULL) - return (ENOBUFS); - - if (frag == sc->ti_tx_saved_considx) - return (ENOBUFS); - - if (sc->ti_hwrev == TI_HWREV_TIGON) - sc->ti_rdata->ti_tx_ring_nic[cur % 128].ti_flags |= - TI_BDFLAG_END; - else - sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END; - sc->ti_cdata.ti_tx_chain[cur] = m_head; - sc->ti_txcnt += cnt; - - *txidx = frag; - - return (0); -} - -/* - * Main transmit routine. To avoid having to do mbuf copies, we put pointers - * to the mbuf data regions directly in the transmit descriptors. - */ -static void -ti_start(ifp) - struct ifnet *ifp; -{ - struct ti_softc *sc; - struct mbuf *m_head = NULL; - u_int32_t prodidx = 0; - - sc = ifp->if_softc; - TI_LOCK(sc); - - prodidx = CSR_READ_4(sc, TI_MB_SENDPROD_IDX); - - while (sc->ti_cdata.ti_tx_chain[prodidx] == NULL) { - IF_DEQUEUE(&ifp->if_snd, m_head); - if (m_head == NULL) - break; - - /* - * XXX - * safety overkill. If this is a fragmented packet chain - * with delayed TCP/UDP checksums, then only encapsulate - * it if we have enough descriptors to handle the entire - * chain at once. - * (paranoia -- may not actually be needed) - */ - if (m_head->m_flags & M_FIRSTFRAG && - m_head->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) { - if ((TI_TX_RING_CNT - sc->ti_txcnt) < - m_head->m_pkthdr.csum_data + 16) { - IF_PREPEND(&ifp->if_snd, m_head); - ifp->if_flags |= IFF_OACTIVE; - break; - } - } - - /* - * Pack the data into the transmit ring. If we - * don't have room, set the OACTIVE flag and wait - * for the NIC to drain the ring. - */ - if (ti_encap(sc, m_head, &prodidx)) { - IF_PREPEND(&ifp->if_snd, m_head); - ifp->if_flags |= IFF_OACTIVE; - break; - } - - /* - * If there's a BPF listener, bounce a copy of this frame - * to him. - */ - BPF_MTAP(ifp, m_head); - } - - /* Transmit */ - CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, prodidx); - - /* - * Set a timeout in case the chip goes out to lunch. - */ - ifp->if_timer = 5; - TI_UNLOCK(sc); -} - -static void -ti_init(xsc) - void *xsc; -{ - struct ti_softc *sc = xsc; - - /* Cancel pending I/O and flush buffers. */ - ti_stop(sc); - - TI_LOCK(sc); - /* Init the gen info block, ring control blocks and firmware. */ - if (ti_gibinit(sc)) { - printf("ti%d: initialization failure\n", sc->ti_unit); - TI_UNLOCK(sc); - return; - } - - TI_UNLOCK(sc); -} - -static void ti_init2(sc) - struct ti_softc *sc; -{ - struct ti_cmd_desc cmd; - struct ifnet *ifp; - u_int16_t *m; - struct ifmedia *ifm; - int tmp; - - ifp = sc->ti_ifp; - - /* Specify MTU and interface index. */ - CSR_WRITE_4(sc, TI_GCR_IFINDEX, sc->ti_unit); - CSR_WRITE_4(sc, TI_GCR_IFMTU, ifp->if_mtu + - ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN); - TI_DO_CMD(TI_CMD_UPDATE_GENCOM, 0, 0); - - /* Load our MAC address. */ - m = (u_int16_t *)&IFP2ENADDR(sc->ti_ifp)[0]; - CSR_WRITE_4(sc, TI_GCR_PAR0, htons(m[0])); - CSR_WRITE_4(sc, TI_GCR_PAR1, (htons(m[1]) << 16) | htons(m[2])); - TI_DO_CMD(TI_CMD_SET_MAC_ADDR, 0, 0); - - /* Enable or disable promiscuous mode as needed. */ - if (ifp->if_flags & IFF_PROMISC) { - TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, TI_CMD_CODE_PROMISC_ENB, 0); - } else { - TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, TI_CMD_CODE_PROMISC_DIS, 0); - } - - /* Program multicast filter. */ - ti_setmulti(sc); - - /* - * If this is a Tigon 1, we should tell the - * firmware to use software packet filtering. - */ - if (sc->ti_hwrev == TI_HWREV_TIGON) { - TI_DO_CMD(TI_CMD_FDR_FILTERING, TI_CMD_CODE_FILT_ENB, 0); - } - - /* Init RX ring. */ - ti_init_rx_ring_std(sc); - - /* Init jumbo RX ring. */ - if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) - ti_init_rx_ring_jumbo(sc); - - /* - * If this is a Tigon 2, we can also configure the - * mini ring. - */ - if (sc->ti_hwrev == TI_HWREV_TIGON_II) - ti_init_rx_ring_mini(sc); - - CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 0); - sc->ti_rx_saved_considx = 0; - - /* Init TX ring. */ - ti_init_tx_ring(sc); - - /* Tell firmware we're alive. */ - TI_DO_CMD(TI_CMD_HOST_STATE, TI_CMD_CODE_STACK_UP, 0); - - /* Enable host interrupts. */ - CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); - - ifp->if_flags |= IFF_RUNNING; - ifp->if_flags &= ~IFF_OACTIVE; - - /* - * Make sure to set media properly. We have to do this - * here since we have to issue commands in order to set - * the link negotiation and we can't issue commands until - * the firmware is running. - */ - ifm = &sc->ifmedia; - tmp = ifm->ifm_media; - ifm->ifm_media = ifm->ifm_cur->ifm_media; - ti_ifmedia_upd(ifp); - ifm->ifm_media = tmp; -} - -/* - * Set media options. - */ -static int -ti_ifmedia_upd(ifp) - struct ifnet *ifp; -{ - struct ti_softc *sc; - struct ifmedia *ifm; - struct ti_cmd_desc cmd; - u_int32_t flowctl; - - sc = ifp->if_softc; - ifm = &sc->ifmedia; - - if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) - return (EINVAL); - - flowctl = 0; - - switch (IFM_SUBTYPE(ifm->ifm_media)) { - case IFM_AUTO: - /* - * Transmit flow control doesn't work on the Tigon 1. - */ - flowctl = TI_GLNK_RX_FLOWCTL_Y; - - /* - * Transmit flow control can also cause problems on the - * Tigon 2, apparantly with both the copper and fiber - * boards. The symptom is that the interface will just - * hang. This was reproduced with Alteon 180 switches. - */ -#if 0 - if (sc->ti_hwrev != TI_HWREV_TIGON) - flowctl |= TI_GLNK_TX_FLOWCTL_Y; -#endif - - CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB| - TI_GLNK_FULL_DUPLEX| flowctl | - TI_GLNK_AUTONEGENB|TI_GLNK_ENB); - - flowctl = TI_LNK_RX_FLOWCTL_Y; -#if 0 - if (sc->ti_hwrev != TI_HWREV_TIGON) - flowctl |= TI_LNK_TX_FLOWCTL_Y; -#endif - - CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB|TI_LNK_10MB| - TI_LNK_FULL_DUPLEX|TI_LNK_HALF_DUPLEX| flowctl | - TI_LNK_AUTONEGENB|TI_LNK_ENB); - TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, - TI_CMD_CODE_NEGOTIATE_BOTH, 0); - break; - case IFM_1000_SX: - case IFM_1000_T: - flowctl = TI_GLNK_RX_FLOWCTL_Y; -#if 0 - if (sc->ti_hwrev != TI_HWREV_TIGON) - flowctl |= TI_GLNK_TX_FLOWCTL_Y; -#endif - - CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB| - flowctl |TI_GLNK_ENB); - CSR_WRITE_4(sc, TI_GCR_LINK, 0); - if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { - TI_SETBIT(sc, TI_GCR_GLINK, TI_GLNK_FULL_DUPLEX); - } - TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, - TI_CMD_CODE_NEGOTIATE_GIGABIT, 0); - break; - case IFM_100_FX: - case IFM_10_FL: - case IFM_100_TX: - case IFM_10_T: - flowctl = TI_LNK_RX_FLOWCTL_Y; -#if 0 - if (sc->ti_hwrev != TI_HWREV_TIGON) - flowctl |= TI_LNK_TX_FLOWCTL_Y; -#endif - - CSR_WRITE_4(sc, TI_GCR_GLINK, 0); - CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB|TI_LNK_PREF|flowctl); - if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_FX || - IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { - TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_100MB); - } else { - TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_10MB); - } - if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { - TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_FULL_DUPLEX); - } else { - TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_HALF_DUPLEX); - } - TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, - TI_CMD_CODE_NEGOTIATE_10_100, 0); - break; - } - - return (0); -} - -/* - * Report current media status. - */ -static void -ti_ifmedia_sts(ifp, ifmr) - struct ifnet *ifp; - struct ifmediareq *ifmr; -{ - struct ti_softc *sc; - u_int32_t media = 0; - - sc = ifp->if_softc; - - ifmr->ifm_status = IFM_AVALID; - ifmr->ifm_active = IFM_ETHER; - - if (sc->ti_linkstat == TI_EV_CODE_LINK_DOWN) - return; - - ifmr->ifm_status |= IFM_ACTIVE; - - if (sc->ti_linkstat == TI_EV_CODE_GIG_LINK_UP) { - media = CSR_READ_4(sc, TI_GCR_GLINK_STAT); - if (sc->ti_copper) - ifmr->ifm_active |= IFM_1000_T; - else - ifmr->ifm_active |= IFM_1000_SX; - if (media & TI_GLNK_FULL_DUPLEX) - ifmr->ifm_active |= IFM_FDX; - else - ifmr->ifm_active |= IFM_HDX; - } else if (sc->ti_linkstat == TI_EV_CODE_LINK_UP) { - media = CSR_READ_4(sc, TI_GCR_LINK_STAT); - if (sc->ti_copper) { - if (media & TI_LNK_100MB) - ifmr->ifm_active |= IFM_100_TX; - if (media & TI_LNK_10MB) - ifmr->ifm_active |= IFM_10_T; - } else { - if (media & TI_LNK_100MB) - ifmr->ifm_active |= IFM_100_FX; - if (media & TI_LNK_10MB) - ifmr->ifm_active |= IFM_10_FL; - } - if (media & TI_LNK_FULL_DUPLEX) - ifmr->ifm_active |= IFM_FDX; - if (media & TI_LNK_HALF_DUPLEX) - ifmr->ifm_active |= IFM_HDX; - } -} - -static int -ti_ioctl(ifp, command, data) - struct ifnet *ifp; - u_long command; - caddr_t data; -{ - struct ti_softc *sc = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *) data; - int mask, error = 0; - struct ti_cmd_desc cmd; - - TI_LOCK(sc); - - switch (command) { - case SIOCSIFMTU: - if (ifr->ifr_mtu > TI_JUMBO_MTU) - error = EINVAL; - else { - ifp->if_mtu = ifr->ifr_mtu; - ti_init(sc); - } - break; - case SIOCSIFFLAGS: - if (ifp->if_flags & IFF_UP) { - /* - * If only the state of the PROMISC flag changed, - * then just use the 'set promisc mode' command - * instead of reinitializing the entire NIC. Doing - * a full re-init means reloading the firmware and - * waiting for it to start up, which may take a - * second or two. - */ - if (ifp->if_flags & IFF_RUNNING && - ifp->if_flags & IFF_PROMISC && - !(sc->ti_if_flags & IFF_PROMISC)) { - TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, - TI_CMD_CODE_PROMISC_ENB, 0); - } else if (ifp->if_flags & IFF_RUNNING && - !(ifp->if_flags & IFF_PROMISC) && - sc->ti_if_flags & IFF_PROMISC) { - TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, - TI_CMD_CODE_PROMISC_DIS, 0); - } else - ti_init(sc); - } else { - if (ifp->if_flags & IFF_RUNNING) { - ti_stop(sc); - } - } - sc->ti_if_flags = ifp->if_flags; - error = 0; - break; - case SIOCADDMULTI: - case SIOCDELMULTI: - if (ifp->if_flags & IFF_RUNNING) { - ti_setmulti(sc); - error = 0; - } - break; - case SIOCSIFMEDIA: - case SIOCGIFMEDIA: - error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command); - break; - case SIOCSIFCAP: - mask = ifr->ifr_reqcap ^ ifp->if_capenable; - if (mask & IFCAP_HWCSUM) { - if (IFCAP_HWCSUM & ifp->if_capenable) - ifp->if_capenable &= ~IFCAP_HWCSUM; - else - ifp->if_capenable |= IFCAP_HWCSUM; - if (ifp->if_flags & IFF_RUNNING) - ti_init(sc); - } - error = 0; - break; - default: - error = ether_ioctl(ifp, command, data); - break; - } - - TI_UNLOCK(sc); - - return (error); -} - -static int -ti_open(struct cdev *dev, int flags, int fmt, struct thread *td) -{ - struct ti_softc *sc; - - sc = dev->si_drv1; - if (sc == NULL) - return (ENODEV); - - TI_LOCK(sc); - sc->ti_flags |= TI_FLAG_DEBUGING; - TI_UNLOCK(sc); - - return (0); -} - -static int -ti_close(struct cdev *dev, int flag, int fmt, struct thread *td) -{ - struct ti_softc *sc; - - sc = dev->si_drv1; - if (sc == NULL) - return (ENODEV); - - TI_LOCK(sc); - sc->ti_flags &= ~TI_FLAG_DEBUGING; - TI_UNLOCK(sc); - - return (0); -} - -/* - * This ioctl routine goes along with the Tigon character device. - */ -static int -ti_ioctl2(struct cdev *dev, u_long cmd, caddr_t addr, int flag, struct thread *td) -{ - int error; - struct ti_softc *sc; - - sc = dev->si_drv1; - if (sc == NULL) - return (ENODEV); - - error = 0; - - switch (cmd) { - case TIIOCGETSTATS: - { - struct ti_stats *outstats; - - outstats = (struct ti_stats *)addr; - - bcopy(&sc->ti_rdata->ti_info.ti_stats, outstats, - sizeof(struct ti_stats)); - break; - } - case TIIOCGETPARAMS: - { - struct ti_params *params; - - params = (struct ti_params *)addr; - - params->ti_stat_ticks = sc->ti_stat_ticks; - params->ti_rx_coal_ticks = sc->ti_rx_coal_ticks; - params->ti_tx_coal_ticks = sc->ti_tx_coal_ticks; - params->ti_rx_max_coal_bds = sc->ti_rx_max_coal_bds; - params->ti_tx_max_coal_bds = sc->ti_tx_max_coal_bds; - params->ti_tx_buf_ratio = sc->ti_tx_buf_ratio; - params->param_mask = TI_PARAM_ALL; - - error = 0; - - break; - } - case TIIOCSETPARAMS: - { - struct ti_params *params; - - params = (struct ti_params *)addr; - - if (params->param_mask & TI_PARAM_STAT_TICKS) { - sc->ti_stat_ticks = params->ti_stat_ticks; - CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks); - } - - if (params->param_mask & TI_PARAM_RX_COAL_TICKS) { - sc->ti_rx_coal_ticks = params->ti_rx_coal_ticks; - CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, - sc->ti_rx_coal_ticks); - } - - if (params->param_mask & TI_PARAM_TX_COAL_TICKS) { - sc->ti_tx_coal_ticks = params->ti_tx_coal_ticks; - CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, - sc->ti_tx_coal_ticks); - } - - if (params->param_mask & TI_PARAM_RX_COAL_BDS) { - sc->ti_rx_max_coal_bds = params->ti_rx_max_coal_bds; - CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, - sc->ti_rx_max_coal_bds); - } - - if (params->param_mask & TI_PARAM_TX_COAL_BDS) { - sc->ti_tx_max_coal_bds = params->ti_tx_max_coal_bds; - CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, - sc->ti_tx_max_coal_bds); - } - - if (params->param_mask & TI_PARAM_TX_BUF_RATIO) { - sc->ti_tx_buf_ratio = params->ti_tx_buf_ratio; - CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, - sc->ti_tx_buf_ratio); - } - - error = 0; - - break; - } - case TIIOCSETTRACE: { - ti_trace_type trace_type; - - trace_type = *(ti_trace_type *)addr; - - /* - * Set tracing to whatever the user asked for. Setting - * this register to 0 should have the effect of disabling - * tracing. - */ - CSR_WRITE_4(sc, TI_GCR_NIC_TRACING, trace_type); - - error = 0; - - break; - } - case TIIOCGETTRACE: { - struct ti_trace_buf *trace_buf; - u_int32_t trace_start, cur_trace_ptr, trace_len; - - trace_buf = (struct ti_trace_buf *)addr; - - trace_start = CSR_READ_4(sc, TI_GCR_NICTRACE_START); - cur_trace_ptr = CSR_READ_4(sc, TI_GCR_NICTRACE_PTR); - trace_len = CSR_READ_4(sc, TI_GCR_NICTRACE_LEN); - -#if 0 - printf("ti%d: trace_start = %#x, cur_trace_ptr = %#x, " - "trace_len = %d\n", sc->ti_unit, trace_start, - cur_trace_ptr, trace_len); - printf("ti%d: trace_buf->buf_len = %d\n", sc->ti_unit, - trace_buf->buf_len); -#endif - - error = ti_copy_mem(sc, trace_start, min(trace_len, - trace_buf->buf_len), - (caddr_t)trace_buf->buf, 1, 1); - - if (error == 0) { - trace_buf->fill_len = min(trace_len, - trace_buf->buf_len); - if (cur_trace_ptr < trace_start) - trace_buf->cur_trace_ptr = - trace_start - cur_trace_ptr; - else - trace_buf->cur_trace_ptr = - cur_trace_ptr - trace_start; - } else - trace_buf->fill_len = 0; - - break; - } - - /* - * For debugging, five ioctls are needed: - * ALT_ATTACH - * ALT_READ_TG_REG - * ALT_WRITE_TG_REG - * ALT_READ_TG_MEM - * ALT_WRITE_TG_MEM - */ - case ALT_ATTACH: - /* - * From what I can tell, Alteon's Solaris Tigon driver - * only has one character device, so you have to attach - * to the Tigon board you're interested in. This seems - * like a not-so-good way to do things, since unless you - * subsequently specify the unit number of the device - * you're interested in in every ioctl, you'll only be - * able to debug one board at a time. - */ - error = 0; - break; - case ALT_READ_TG_MEM: - case ALT_WRITE_TG_MEM: - { - struct tg_mem *mem_param; - u_int32_t sram_end, scratch_end; - - mem_param = (struct tg_mem *)addr; - - if (sc->ti_hwrev == TI_HWREV_TIGON) { - sram_end = TI_END_SRAM_I; - scratch_end = TI_END_SCRATCH_I; - } else { - sram_end = TI_END_SRAM_II; - scratch_end = TI_END_SCRATCH_II; - } - - /* - * For now, we'll only handle accessing regular SRAM, - * nothing else. - */ - if ((mem_param->tgAddr >= TI_BEG_SRAM) - && ((mem_param->tgAddr + mem_param->len) <= sram_end)) { - /* - * In this instance, we always copy to/from user - * space, so the user space argument is set to 1. - */ - error = ti_copy_mem(sc, mem_param->tgAddr, - mem_param->len, - mem_param->userAddr, 1, - (cmd == ALT_READ_TG_MEM) ? 1 : 0); - } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH) - && (mem_param->tgAddr <= scratch_end)) { - error = ti_copy_scratch(sc, mem_param->tgAddr, - mem_param->len, - mem_param->userAddr, 1, - (cmd == ALT_READ_TG_MEM) ? - 1 : 0, TI_PROCESSOR_A); - } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH_B_DEBUG) - && (mem_param->tgAddr <= TI_BEG_SCRATCH_B_DEBUG)) { - if (sc->ti_hwrev == TI_HWREV_TIGON) { - printf("ti%d: invalid memory range for " - "Tigon I\n", sc->ti_unit); - error = EINVAL; - break; - } - error = ti_copy_scratch(sc, mem_param->tgAddr - - TI_SCRATCH_DEBUG_OFF, - mem_param->len, - mem_param->userAddr, 1, - (cmd == ALT_READ_TG_MEM) ? - 1 : 0, TI_PROCESSOR_B); - } else { - printf("ti%d: memory address %#x len %d is out of " - "supported range\n", sc->ti_unit, - mem_param->tgAddr, mem_param->len); - error = EINVAL; - } - - break; - } - case ALT_READ_TG_REG: - case ALT_WRITE_TG_REG: - { - struct tg_reg *regs; - u_int32_t tmpval; - - regs = (struct tg_reg *)addr; - - /* - * Make sure the address in question isn't out of range. - */ - if (regs->addr > TI_REG_MAX) { - error = EINVAL; - break; - } - if (cmd == ALT_READ_TG_REG) { - bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle, - regs->addr, &tmpval, 1); - regs->data = ntohl(tmpval); -#if 0 - if ((regs->addr == TI_CPU_STATE) - || (regs->addr == TI_CPU_CTL_B)) { - printf("ti%d: register %#x = %#x\n", - sc->ti_unit, regs->addr, tmpval); - } -#endif - } else { - tmpval = htonl(regs->data); - bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle, - regs->addr, &tmpval, 1); - } - - break; - } - default: - error = ENOTTY; - break; - } - return (error); -} - -static void -ti_watchdog(ifp) - struct ifnet *ifp; -{ - struct ti_softc *sc; - - sc = ifp->if_softc; - TI_LOCK(sc); - - /* - * When we're debugging, the chip is often stopped for long periods - * of time, and that would normally cause the watchdog timer to fire. - * Since that impedes debugging, we don't want to do that. - */ - if (sc->ti_flags & TI_FLAG_DEBUGING) { - TI_UNLOCK(sc); - return; - } - - printf("ti%d: watchdog timeout -- resetting\n", sc->ti_unit); - ti_stop(sc); - ti_init(sc); - - ifp->if_oerrors++; - TI_UNLOCK(sc); -} - -/* - * Stop the adapter and free any mbufs allocated to the - * RX and TX lists. - */ -static void -ti_stop(sc) - struct ti_softc *sc; -{ - struct ifnet *ifp; - struct ti_cmd_desc cmd; - - TI_LOCK(sc); - - ifp = sc->ti_ifp; - - /* Disable host interrupts. */ - CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); - /* - * Tell firmware we're shutting down. - */ - TI_DO_CMD(TI_CMD_HOST_STATE, TI_CMD_CODE_STACK_DOWN, 0); - - /* Halt and reinitialize. */ - ti_chipinit(sc); - ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL); - ti_chipinit(sc); - - /* Free the RX lists. */ - ti_free_rx_ring_std(sc); - - /* Free jumbo RX list. */ - ti_free_rx_ring_jumbo(sc); - - /* Free mini RX list. */ - ti_free_rx_ring_mini(sc); - - /* Free TX buffers. */ - ti_free_tx_ring(sc); - - sc->ti_ev_prodidx.ti_idx = 0; - sc->ti_return_prodidx.ti_idx = 0; - sc->ti_tx_considx.ti_idx = 0; - sc->ti_tx_saved_considx = TI_TXCONS_UNSET; - - ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); - TI_UNLOCK(sc); -} - -/* - * Stop all chip I/O so that the kernel's probe routines don't - * get confused by errant DMAs when rebooting. - */ -static void -ti_shutdown(dev) - device_t dev; -{ - struct ti_softc *sc; - - sc = device_get_softc(dev); - TI_LOCK(sc); - ti_chipinit(sc); - TI_UNLOCK(sc); -} diff --git a/sys/dev/ti/if_tireg.h b/sys/dev/ti/if_tireg.h deleted file mode 100644 index 1bcdfbc..0000000 --- a/sys/dev/ti/if_tireg.h +++ /dev/null @@ -1,1072 +0,0 @@ -/*- - * Copyright (c) 1997, 1998, 1999 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Tigon register offsets. These are memory mapped registers - * which can be accessed with the CSR_READ_4()/CSR_WRITE_4() macros. - * Each register must be accessed using 32 bit operations. - * - * All reegisters are accessed through a 16K shared memory block. - * The first group of registers are actually copies of the PCI - * configuration space registers. - */ - -#define TI_PCI_ID 0x000 /* PCI device/vendor ID */ -#define TI_PCI_CMDSTAT 0x004 -#define TI_PCI_CLASSCODE 0x008 -#define TI_PCI_BIST 0x00C -#define TI_PCI_LOMEM 0x010 /* Shared memory base address */ -#define TI_PCI_SUBSYS 0x02C -#define TI_PCI_ROMBASE 0x030 -#define TI_PCI_INT 0x03C - -#ifndef PCIM_CMD_MWIEN -#define PCIM_CMD_MWIEN 0x0010 -#endif - -/* - * Alteon AceNIC PCI vendor/device ID. - */ -#define ALT_VENDORID 0x12AE -#define ALT_DEVICEID_ACENIC 0x0001 -#define ALT_DEVICEID_ACENIC_COPPER 0x0002 - -/* - * 3Com 3c985 PCI vendor/device ID. - */ -#define TC_VENDORID 0x10B7 -#define TC_DEVICEID_3C985 0x0001 - -/* - * Netgear GA620 PCI vendor/device ID. - */ -#define NG_VENDORID 0x1385 -#define NG_DEVICEID_GA620 0x620A -#define NG_DEVICEID_GA620T 0x630A - -/* - * SGI device/vendor ID. - */ -#define SGI_VENDORID 0x10A9 -#define SGI_DEVICEID_TIGON 0x0009 - -/* - * DEC vendor ID, Farallon device ID. Apparently, Farallon used - * the DEC vendor ID in their cards by mistake. - */ -#define DEC_VENDORID 0x1011 -#define DEC_DEVICEID_FARALLON_PN9000SX 0x001a - -/* - * Tigon configuration and control registers. - */ -#define TI_MISC_HOST_CTL 0x040 -#define TI_MISC_LOCAL_CTL 0x044 -#define TI_SEM_AB 0x048 /* Tigon 2 only */ -#define TI_MISC_CONF 0x050 /* Tigon 2 only */ -#define TI_TIMER_BITS 0x054 -#define TI_TIMERREF 0x058 -#define TI_PCI_STATE 0x05C -#define TI_MAIN_EVENT_A 0x060 -#define TI_MAILBOX_EVENT_A 0x064 -#define TI_WINBASE 0x068 -#define TI_WINDATA 0x06C -#define TI_MAIN_EVENT_B 0x070 /* Tigon 2 only */ -#define TI_MAILBOX_EVENT_B 0x074 /* Tigon 2 only */ -#define TI_TIMERREF_B 0x078 /* Tigon 2 only */ -#define TI_SERIAL 0x07C - -/* - * Misc host control bits. - */ -#define TI_MHC_INTSTATE 0x00000001 -#define TI_MHC_CLEARINT 0x00000002 -#define TI_MHC_RESET 0x00000008 -#define TI_MHC_BYTE_SWAP_ENB 0x00000010 -#define TI_MHC_WORD_SWAP_ENB 0x00000020 -#define TI_MHC_MASK_INTS 0x00000040 -#define TI_MHC_CHIP_REV_MASK 0xF0000000 - -#define TI_MHC_BIGENDIAN_INIT \ - (TI_MHC_BYTE_SWAP_ENB|TI_MHC_WORD_SWAP_ENB|TI_MHC_CLEARINT) - -#define TI_MHC_LITTLEENDIAN_INIT \ - (TI_MHC_WORD_SWAP_ENB|TI_MHC_CLEARINT) - -/* - * Tigon chip rev values. Rev 4 is the Tigon 1. Rev 6 is the Tigon 2. - * Rev 5 is also the Tigon 2, but is a broken version which was never - * used in any actual hardware, so we ignore it. - */ -#define TI_REV_TIGON_I 0x40000000 -#define TI_REV_TIGON_II 0x60000000 - -/* - * Firmware revision that we want. - */ -#define TI_FIRMWARE_MAJOR 0xc -#define TI_FIRMWARE_MINOR 0x4 -#define TI_FIRMWARE_FIX 0xb - -/* - * Miscelaneous Local Control register. - */ -#define TI_MLC_EE_WRITE_ENB 0x00000010 -#define TI_MLC_SRAM_BANK_SIZE 0x00000300 /* Tigon 2 only */ -#define TI_MLC_LOCALADDR_21 0x00004000 -#define TI_MLC_LOCALADDR_22 0x00008000 -#define TI_MLC_SBUS_WRITEERR 0x00080000 -#define TI_MLC_EE_CLK 0x00100000 -#define TI_MLC_EE_TXEN 0x00200000 -#define TI_MLC_EE_DOUT 0x00400000 -#define TI_MLC_EE_DIN 0x00800000 - -/* Possible memory sizes. */ -#define TI_MLC_SRAM_BANK_DISA 0x00000000 -#define TI_MLC_SRAM_BANK_1024K 0x00000100 -#define TI_MLC_SRAM_BANK_512K 0x00000200 -#define TI_MLC_SRAM_BANK_256K 0x00000300 - -/* - * Offset of MAC address inside EEPROM. - */ -#define TI_EE_MAC_OFFSET 0x8c - -#define TI_DMA_ASSIST 0x11C -#define TI_CPU_STATE 0x140 -#define TI_CPU_PROGRAM_COUNTER 0x144 -#define TI_SRAM_ADDR 0x154 -#define TI_SRAM_DATA 0x158 -#define TI_GEN_0 0x180 -#define TI_GEN_X 0x1FC -#define TI_MAC_TX_STATE 0x200 -#define TI_MAC_RX_STATE 0x220 -#define TI_CPU_CTL_B 0x240 /* Tigon 2 only */ -#define TI_CPU_PROGRAM_COUNTER_B 0x244 /* Tigon 2 only */ -#define TI_SRAM_ADDR_B 0x254 /* Tigon 2 only */ -#define TI_SRAM_DATA_B 0x258 /* Tigon 2 only */ -#define TI_GEN_B_0 0x280 /* Tigon 2 only */ -#define TI_GEN_B_X 0x2FC /* Tigon 2 only */ - -/* - * Misc config register. - */ -#define TI_MCR_SRAM_SYNCHRONOUS 0x00100000 /* Tigon 2 only */ - -/* - * PCI state register. - */ -#define TI_PCISTATE_FORCE_RESET 0x00000001 -#define TI_PCISTATE_PROVIDE_LEN 0x00000002 -#define TI_PCISTATE_READ_MAXDMA 0x0000001C -#define TI_PCISTATE_WRITE_MAXDMA 0x000000E0 -#define TI_PCISTATE_MINDMA 0x0000FF00 -#define TI_PCISTATE_FIFO_RETRY_ENB 0x00010000 -#define TI_PCISTATE_USE_MEM_RD_MULT 0x00020000 -#define TI_PCISTATE_NO_SWAP_READ_DMA 0x00040000 -#define TI_PCISTATE_NO_SWAP_WRITE_DMA 0x00080000 -#define TI_PCISTATE_66MHZ_BUS 0x00080000 /* Tigon 2 only */ -#define TI_PCISTATE_32BIT_BUS 0x00100000 /* Tigon 2 only */ -#define TI_PCISTATE_ENB_BYTE_ENABLES 0x00800000 /* Tigon 2 only */ -#define TI_PCISTATE_READ_CMD 0x0F000000 -#define TI_PCISTATE_WRITE_CMD 0xF0000000 - -#define TI_PCI_READMAX_4 0x04 -#define TI_PCI_READMAX_16 0x08 -#define TI_PCI_READMAX_32 0x0C -#define TI_PCI_READMAX_64 0x10 -#define TI_PCI_READMAX_128 0x14 -#define TI_PCI_READMAX_256 0x18 -#define TI_PCI_READMAX_1024 0x1C - -#define TI_PCI_WRITEMAX_4 0x20 -#define TI_PCI_WRITEMAX_16 0x40 -#define TI_PCI_WRITEMAX_32 0x60 -#define TI_PCI_WRITEMAX_64 0x80 -#define TI_PCI_WRITEMAX_128 0xA0 -#define TI_PCI_WRITEMAX_256 0xC0 -#define TI_PCI_WRITEMAX_1024 0xE0 - -#define TI_PCI_READ_CMD 0x06000000 -#define TI_PCI_WRITE_CMD 0x70000000 - -/* - * DMA state register. - */ -#define TI_DMASTATE_ENABLE 0x00000001 -#define TI_DMASTATE_PAUSE 0x00000002 - -/* - * CPU state register. - */ -#define TI_CPUSTATE_RESET 0x00000001 -#define TI_CPUSTATE_STEP 0x00000002 -#define TI_CPUSTATE_ROMFAIL 0x00000010 -#define TI_CPUSTATE_HALT 0x00010000 -/* - * MAC TX state register - */ -#define TI_TXSTATE_RESET 0x00000001 -#define TI_TXSTATE_ENB 0x00000002 -#define TI_TXSTATE_STOP 0x00000004 - -/* - * MAC RX state register - */ -#define TI_RXSTATE_RESET 0x00000001 -#define TI_RXSTATE_ENB 0x00000002 -#define TI_RXSTATE_STOP 0x00000004 - -/* - * Tigon 2 mailbox registers. The mailbox area consists of 256 bytes - * split into 64 bit registers. Only the lower 32 bits of each mailbox - * are used. - */ -#define TI_MB_HOSTINTR_HI 0x500 -#define TI_MB_HOSTINTR_LO 0x504 -#define TI_MB_HOSTINTR TI_MB_HOSTINTR_LO -#define TI_MB_CMDPROD_IDX_HI 0x508 -#define TI_MB_CMDPROD_IDX_LO 0x50C -#define TI_MB_CMDPROD_IDX TI_MB_CMDPROD_IDX_LO -#define TI_MB_SENDPROD_IDX_HI 0x510 -#define TI_MB_SENDPROD_IDX_LO 0x514 -#define TI_MB_SENDPROD_IDX TI_MB_SENDPROD_IDX_LO -#define TI_MB_STDRXPROD_IDX_HI 0x518 /* Tigon 2 only */ -#define TI_MB_STDRXPROD_IDX_LO 0x51C /* Tigon 2 only */ -#define TI_MB_STDRXPROD_IDX TI_MB_STDRXPROD_IDX_LO -#define TI_MB_JUMBORXPROD_IDX_HI 0x520 /* Tigon 2 only */ -#define TI_MB_JUMBORXPROD_IDX_LO 0x524 /* Tigon 2 only */ -#define TI_MB_JUMBORXPROD_IDX TI_MB_JUMBORXPROD_IDX_LO -#define TI_MB_MINIRXPROD_IDX_HI 0x528 /* Tigon 2 only */ -#define TI_MB_MINIRXPROD_IDX_LO 0x52C /* Tigon 2 only */ -#define TI_MB_MINIRXPROD_IDX TI_MB_MINIRXPROD_IDX_LO -#define TI_MB_RSVD 0x530 - -/* - * Tigon 2 general communication registers. These are 64 and 32 bit - * registers which are only valid after the firmware has been - * loaded and started. They actually exist in NIC memory but are - * mapped into the host memory via the shared memory region. - * - * The NIC internally maps these registers starting at address 0, - * so to determine the NIC address of any of these registers, we - * subtract 0x600 (the address of the first register). - */ - -#define TI_GCR_BASE 0x600 -#define TI_GCR_MACADDR 0x600 -#define TI_GCR_PAR0 0x600 -#define TI_GCR_PAR1 0x604 -#define TI_GCR_GENINFO_HI 0x608 -#define TI_GCR_GENINFO_LO 0x60C -#define TI_GCR_MCASTADDR 0x610 /* obsolete */ -#define TI_GCR_MAR0 0x610 /* obsolete */ -#define TI_GCR_MAR1 0x614 /* obsolete */ -#define TI_GCR_OPMODE 0x618 -#define TI_GCR_DMA_READCFG 0x61C -#define TI_GCR_DMA_WRITECFG 0x620 -#define TI_GCR_TX_BUFFER_RATIO 0x624 -#define TI_GCR_EVENTCONS_IDX 0x628 -#define TI_GCR_CMDCONS_IDX 0x62C -#define TI_GCR_TUNEPARMS 0x630 -#define TI_GCR_RX_COAL_TICKS 0x630 -#define TI_GCR_TX_COAL_TICKS 0x634 -#define TI_GCR_STAT_TICKS 0x638 -#define TI_GCR_TX_MAX_COAL_BD 0x63C -#define TI_GCR_RX_MAX_COAL_BD 0x640 -#define TI_GCR_NIC_TRACING 0x644 -#define TI_GCR_GLINK 0x648 -#define TI_GCR_LINK 0x64C -#define TI_GCR_NICTRACE_PTR 0x650 -#define TI_GCR_NICTRACE_START 0x654 -#define TI_GCR_NICTRACE_LEN 0x658 -#define TI_GCR_IFINDEX 0x65C -#define TI_GCR_IFMTU 0x660 -#define TI_GCR_MASK_INTRS 0x664 -#define TI_GCR_GLINK_STAT 0x668 -#define TI_GCR_LINK_STAT 0x66C -#define TI_GCR_RXRETURNCONS_IDX 0x680 -#define TI_GCR_CMDRING 0x700 - -#define TI_GCR_NIC_ADDR(x) (x - TI_GCR_BASE); - -/* - * Local memory window. The local memory window is a 2K shared - * memory region which can be used to access the NIC's internal - * SRAM. The window can be mapped to a given 2K region using - * the TI_WINDOW_BASE register. - */ -#define TI_WINDOW 0x800 -#define TI_WINLEN 0x800 - -#define TI_TICKS_PER_SEC 1000000 - -/* - * Operation mode register. - */ -#define TI_OPMODE_BYTESWAP_BD 0x00000002 -#define TI_OPMODE_WORDSWAP_BD 0x00000004 -#define TI_OPMODE_WARN_ENB 0x00000008 /* not yet implimented */ -#define TI_OPMODE_BYTESWAP_DATA 0x00000010 -#define TI_OPMODE_1_DMA_ACTIVE 0x00000040 -#define TI_OPMODE_SBUS 0x00000100 -#define TI_OPMODE_DONT_FRAG_JUMBO 0x00000200 -#define TI_OPMODE_INCLUDE_CRC 0x00000400 -#define TI_OPMODE_RX_BADFRAMES 0x00000800 -#define TI_OPMODE_NO_EVENT_INTRS 0x00001000 -#define TI_OPMODE_NO_TX_INTRS 0x00002000 -#define TI_OPMODE_NO_RX_INTRS 0x00004000 -#define TI_OPMODE_FATAL_ENB 0x40000000 /* not yet implimented */ -#define TI_OPMODE_JUMBO_HDRSPLIT 0x00008000 - -/* - * DMA configuration thresholds. - */ -#define TI_DMA_STATE_THRESH_16W 0x00000100 -#define TI_DMA_STATE_THRESH_8W 0x00000080 -#define TI_DMA_STATE_THRESH_4W 0x00000040 -#define TI_DMA_STATE_THRESH_2W 0x00000020 -#define TI_DMA_STATE_THRESH_1W 0x00000010 - -#define TI_DMA_STATE_FORCE_32_BIT 0x00000008 - -/* - * Gigabit link status bits. - */ -#define TI_GLNK_SENSE_NO_BEG 0x00002000 -#define TI_GLNK_LOOPBACK 0x00004000 -#define TI_GLNK_PREF 0x00008000 -#define TI_GLNK_1000MB 0x00040000 -#define TI_GLNK_FULL_DUPLEX 0x00080000 -#define TI_GLNK_TX_FLOWCTL_Y 0x00200000 /* Tigon 2 only */ -#define TI_GLNK_RX_FLOWCTL_Y 0x00800000 -#define TI_GLNK_AUTONEGENB 0x20000000 -#define TI_GLNK_ENB 0x40000000 - -/* - * Link status bits. - */ -#define TI_LNK_LOOPBACK 0x00004000 -#define TI_LNK_PREF 0x00008000 -#define TI_LNK_10MB 0x00010000 -#define TI_LNK_100MB 0x00020000 -#define TI_LNK_1000MB 0x00040000 -#define TI_LNK_FULL_DUPLEX 0x00080000 -#define TI_LNK_HALF_DUPLEX 0x00100000 -#define TI_LNK_TX_FLOWCTL_Y 0x00200000 /* Tigon 2 only */ -#define TI_LNK_RX_FLOWCTL_Y 0x00800000 -#define TI_LNK_AUTONEGENB 0x20000000 -#define TI_LNK_ENB 0x40000000 - -/* - * Ring size constants. - */ -#define TI_EVENT_RING_CNT 256 -#define TI_CMD_RING_CNT 64 -#define TI_STD_RX_RING_CNT 512 -#define TI_JUMBO_RX_RING_CNT 256 -#define TI_MINI_RX_RING_CNT 1024 -#define TI_RETURN_RING_CNT 2048 - -/* - * Possible TX ring sizes. - */ -#define TI_TX_RING_CNT_128 128 -#define TI_TX_RING_BASE_128 0x3800 - -#define TI_TX_RING_CNT_256 256 -#define TI_TX_RING_BASE_256 0x3000 - -#define TI_TX_RING_CNT_512 512 -#define TI_TX_RING_BASE_512 0x2000 - -#define TI_TX_RING_CNT TI_TX_RING_CNT_512 -#define TI_TX_RING_BASE TI_TX_RING_BASE_512 - -/* - * The Tigon can have up to 8MB of external SRAM, however the Tigon 1 - * is limited to 2MB total, and in general I think most adapters have - * around 1MB. We use this value for zeroing the NIC's SRAM, so to - * be safe we use the largest possible value (zeroing memory that - * isn't there doesn't hurt anything). - */ -#define TI_MEM_MAX 0x7FFFFF - -/* - * Maximum register address on the Tigon. - */ -#define TI_REG_MAX 0x3fff - -/* - * These values were taken from Alteon's tg.h. - */ -#define TI_BEG_SRAM 0x0 /* host thinks it's here */ -#define TI_BEG_SCRATCH 0xc00000 /* beg of scratch pad area */ -#define TI_END_SRAM_II 0x800000 /* end of SRAM, for 2 MB stuffed */ -#define TI_END_SCRATCH_II 0xc04000 /* end of scratch pad CPU A (16KB) */ -#define TI_END_SCRATCH_B 0xc02000 /* end of scratch pad CPU B (8KB) */ -#define TI_BEG_SCRATCH_B_DEBUG 0xd00000 /* beg of scratch pad for ioctl */ -#define TI_END_SCRATCH_B_DEBUG 0xd02000 /* end of scratch pad for ioctl */ -#define TI_SCRATCH_DEBUG_OFF 0x100000 /* offset for ioctl usage */ -#define TI_END_SRAM_I 0x200000 /* end of SRAM, for 2 MB stuffed */ -#define TI_END_SCRATCH_I 0xc00800 /* end of scratch pad area (2KB) */ -#define TI_BEG_PROM 0x40000000 /* beg of PROM, special access */ -#define TI_BEG_FLASH 0x80000000 /* beg of EEPROM, special access */ -#define TI_END_FLASH 0x80100000 /* end of EEPROM for 1 MB stuff */ -#define TI_BEG_SER_EEPROM 0xa0000000 /* beg of Serial EEPROM (fake out) */ -#define TI_END_SER_EEPROM 0xa0002000 /* end of Serial EEPROM (fake out) */ -#define TI_BEG_REGS 0xc0000000 /* beg of register area */ -#define TI_END_REGS 0xc0000400 /* end of register area */ -#define TI_END_WRITE_REGS 0xc0000180 /* can't write GPRs currently */ -#define TI_BEG_REGS2 0xc0000200 /* beg of second writeable reg area */ -/* the EEPROM is byte addressable in a pretty odd way */ -#define EEPROM_BYTE_LOC 0xff000000 - -/* - * From Alteon's tg.h. - */ -#define TI_PROCESSOR_A 0 -#define TI_PROCESSOR_B 1 -#define TI_CPU_A TG_PROCESSOR_A -#define TI_CPU_B TG_PROCESSOR_B - -/* - * Following macro can be used to access to any of the CPU registers - * It will adjust the address appropriately. - * Parameters: - * reg - The register to access, e.g TI_CPU_CONTROL - * cpu - cpu, i.e PROCESSOR_A or PROCESSOR_B (or TI_CPU_A or TI_CPU_B) - */ -#define CPU_REG(reg, cpu) ((reg) + (cpu) * 0x100) - -/* - * Even on the alpha, pci addresses are 32-bit quantities - */ - -#ifdef __64_bit_pci_addressing__ -typedef struct { - u_int64_t ti_addr; -} ti_hostaddr; -#define TI_HOSTADDR(x) x.ti_addr -#else -typedef struct { - u_int32_t ti_addr_hi; - u_int32_t ti_addr_lo; -} ti_hostaddr; -#define TI_HOSTADDR(x) x.ti_addr_lo -#endif - -/* - * Ring control block structure. The rules for the max_len field - * are as follows: - * - * For the send ring, max_len indicates the number of entries in the - * ring (128, 256 or 512). - * - * For the standard receive ring, max_len indicates the threshold - * used to decide when a frame should be put in the jumbo receive ring - * instead of the standard one. - * - * For the mini ring, max_len indicates the size of the buffers in the - * ring. This is the value used to decide when a frame is small enough - * to be placed in the mini ring. - * - * For the return receive ring, max_len indicates the number of entries - * in the ring. It can be one of 2048, 1024 or 0 (which is the same as - * 2048 for backwards compatibility). The value 1024 can only be used - * if the mini ring is disabled. - */ -struct ti_rcb { - ti_hostaddr ti_hostaddr; -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_max_len; - u_int16_t ti_flags; -#else - u_int16_t ti_flags; - u_int16_t ti_max_len; -#endif - u_int32_t ti_unused; -}; - -#define TI_RCB_FLAG_TCP_UDP_CKSUM 0x00000001 -#define TI_RCB_FLAG_IP_CKSUM 0x00000002 -#define TI_RCB_FLAG_NO_PHDR_CKSUM 0x00000008 -#define TI_RCB_FLAG_VLAN_ASSIST 0x00000010 -#define TI_RCB_FLAG_COAL_UPD_ONLY 0x00000020 -#define TI_RCB_FLAG_HOST_RING 0x00000040 -#define TI_RCB_FLAG_IEEE_SNAP_CKSUM 0x00000080 -#define TI_RCB_FLAG_USE_EXT_RX_BD 0x00000100 -#define TI_RCB_FLAG_RING_DISABLED 0x00000200 - -struct ti_producer { - u_int32_t ti_idx; - u_int32_t ti_unused; -}; - -/* - * Tigon general information block. This resides in host memory - * and contains the status counters, ring control blocks and - * producer pointers. - */ - -struct ti_gib { - struct ti_stats ti_stats; - struct ti_rcb ti_ev_rcb; - struct ti_rcb ti_cmd_rcb; - struct ti_rcb ti_tx_rcb; - struct ti_rcb ti_std_rx_rcb; - struct ti_rcb ti_jumbo_rx_rcb; - struct ti_rcb ti_mini_rx_rcb; - struct ti_rcb ti_return_rcb; - ti_hostaddr ti_ev_prodidx_ptr; - ti_hostaddr ti_return_prodidx_ptr; - ti_hostaddr ti_tx_considx_ptr; - ti_hostaddr ti_refresh_stats_ptr; -}; - -/* - * Buffer descriptor structures. There are basically three types - * of structures: normal receive descriptors, extended receive - * descriptors and transmit descriptors. The extended receive - * descriptors are optionally used only for the jumbo receive ring. - */ - -struct ti_rx_desc { - ti_hostaddr ti_addr; -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_idx; - u_int16_t ti_len; -#else - u_int16_t ti_len; - u_int16_t ti_idx; -#endif -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_type; - u_int16_t ti_flags; -#else - u_int16_t ti_flags; - u_int16_t ti_type; -#endif -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_ip_cksum; - u_int16_t ti_tcp_udp_cksum; -#else - u_int16_t ti_tcp_udp_cksum; - u_int16_t ti_ip_cksum; -#endif -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_error_flags; - u_int16_t ti_vlan_tag; -#else - u_int16_t ti_vlan_tag; - u_int16_t ti_error_flags; -#endif - u_int32_t ti_rsvd; - u_int32_t ti_opaque; -}; - -struct ti_rx_desc_ext { - ti_hostaddr ti_addr1; - ti_hostaddr ti_addr2; - ti_hostaddr ti_addr3; -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_len1; - u_int16_t ti_len2; -#else - u_int16_t ti_len2; - u_int16_t ti_len1; -#endif -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_len3; - u_int16_t ti_rsvd0; -#else - u_int16_t ti_rsvd0; - u_int16_t ti_len3; -#endif - ti_hostaddr ti_addr0; -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_idx; - u_int16_t ti_len0; -#else - u_int16_t ti_len0; - u_int16_t ti_idx; -#endif -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_type; - u_int16_t ti_flags; -#else - u_int16_t ti_flags; - u_int16_t ti_type; -#endif -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_ip_cksum; - u_int16_t ti_tcp_udp_cksum; -#else - u_int16_t ti_tcp_udp_cksum; - u_int16_t ti_ip_cksum; -#endif -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_error_flags; - u_int16_t ti_vlan_tag; -#else - u_int16_t ti_vlan_tag; - u_int16_t ti_error_flags; -#endif - u_int32_t ti_rsvd1; - u_int32_t ti_opaque; -}; - -/* - * Transmit descriptors are, mercifully, very small. - */ -struct ti_tx_desc { - ti_hostaddr ti_addr; -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_len; - u_int16_t ti_flags; -#else - u_int16_t ti_flags; - u_int16_t ti_len; -#endif -#if BYTE_ORDER == BIG_ENDIAN - u_int16_t ti_rsvd; - u_int16_t ti_vlan_tag; -#else - u_int16_t ti_vlan_tag; - u_int16_t ti_rsvd; -#endif -}; - -/* - * NOTE! On the Alpha, we have an alignment constraint. - * The first thing in the packet is a 14-byte Ethernet header. - * This means that the packet is misaligned. To compensate, - * we actually offset the data 2 bytes into the cluster. This - * alignes the packet after the Ethernet header at a 32-bit - * boundary. - */ - -#define ETHER_ALIGN 2 - -#define TI_FRAMELEN 1518 -#define TI_JUMBO_FRAMELEN 9018 -#define TI_JUMBO_MTU (TI_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN) -#define TI_PAGE_SIZE PAGE_SIZE -#define TI_MIN_FRAMELEN 60 - -/* - * Buffer descriptor error flags. - */ -#define TI_BDERR_CRC 0x0001 -#define TI_BDERR_COLLDETECT 0x0002 -#define TI_BDERR_LINKLOST 0x0004 -#define TI_BDERR_DECODE 0x0008 -#define TI_BDERR_ODD_NIBBLES 0x0010 -#define TI_BDERR_MAC_ABRT 0x0020 -#define TI_BDERR_RUNT 0x0040 -#define TI_BDERR_TRUNC 0x0080 -#define TI_BDERR_GIANT 0x0100 - -/* - * Buffer descriptor flags. - */ -#define TI_BDFLAG_TCP_UDP_CKSUM 0x0001 -#define TI_BDFLAG_IP_CKSUM 0x0002 -#define TI_BDFLAG_END 0x0004 -#define TI_BDFLAG_MORE 0x0008 -#define TI_BDFLAG_JUMBO_RING 0x0010 -#define TI_BDFLAG_UCAST_PKT 0x0020 -#define TI_BDFLAG_MCAST_PKT 0x0040 -#define TI_BDFLAG_BCAST_PKT 0x0060 -#define TI_BDFLAG_IP_FRAG 0x0080 -#define TI_BDFLAG_IP_FRAG_END 0x0100 -#define TI_BDFLAG_VLAN_TAG 0x0200 -#define TI_BDFLAG_ERROR 0x0400 -#define TI_BDFLAG_COAL_NOW 0x0800 -#define TI_BDFLAG_MINI_RING 0x1000 - -/* - * Descriptor type flags. I think these only have meaning for - * the Tigon 1. I had to extract them from the sample driver source - * since they aren't in the manual. - */ -#define TI_BDTYPE_TYPE_NULL 0x0000 -#define TI_BDTYPE_SEND_BD 0x0001 -#define TI_BDTYPE_RECV_BD 0x0002 -#define TI_BDTYPE_RECV_JUMBO_BD 0x0003 -#define TI_BDTYPE_RECV_BD_LAST 0x0004 -#define TI_BDTYPE_SEND_DATA 0x0005 -#define TI_BDTYPE_SEND_DATA_LAST 0x0006 -#define TI_BDTYPE_RECV_DATA 0x0007 -#define TI_BDTYPE_RECV_DATA_LAST 0x000b -#define TI_BDTYPE_EVENT_RUPT 0x000c -#define TI_BDTYPE_EVENT_NO_RUPT 0x000d -#define TI_BDTYPE_ODD_START 0x000e -#define TI_BDTYPE_UPDATE_STATS 0x000f -#define TI_BDTYPE_SEND_DUMMY_DMA 0x0010 -#define TI_BDTYPE_EVENT_PROD 0x0011 -#define TI_BDTYPE_TX_CONS 0x0012 -#define TI_BDTYPE_RX_PROD 0x0013 -#define TI_BDTYPE_REFRESH_STATS 0x0014 -#define TI_BDTYPE_SEND_DATA_LAST_VLAN 0x0015 -#define TI_BDTYPE_SEND_DATA_COAL 0x0016 -#define TI_BDTYPE_SEND_DATA_LAST_COAL 0x0017 -#define TI_BDTYPE_SEND_DATA_LAST_VLAN_COAL 0x0018 -#define TI_BDTYPE_TX_CONS_NO_INTR 0x0019 - -/* - * Tigon command structure. - */ -struct ti_cmd_desc { -#if BYTE_ORDER == BIG_ENDIAN - u_int32_t ti_cmd:8; - u_int32_t ti_code:12; - u_int32_t ti_idx:12; -#else - u_int32_t ti_idx:12; - u_int32_t ti_code:12; - u_int32_t ti_cmd:8; -#endif -}; - -#define TI_CMD_HOST_STATE 0x01 -#define TI_CMD_CODE_STACK_UP 0x01 -#define TI_CMD_CODE_STACK_DOWN 0x02 - -/* - * This command enables software address filtering. It's a workaround - * for a bug in the Tigon 1 and not implemented for the Tigon 2. - */ -#define TI_CMD_FDR_FILTERING 0x02 -#define TI_CMD_CODE_FILT_ENB 0x01 -#define TI_CMD_CODE_FILT_DIS 0x02 - -#define TI_CMD_SET_RX_PROD_IDX 0x03 /* obsolete */ -#define TI_CMD_UPDATE_GENCOM 0x04 -#define TI_CMD_RESET_JUMBO_RING 0x05 -#define TI_CMD_SET_PARTIAL_RX_CNT 0x06 -#define TI_CMD_ADD_MCAST_ADDR 0x08 /* obsolete */ -#define TI_CMD_DEL_MCAST_ADDR 0x09 /* obsolete */ - -#define TI_CMD_SET_PROMISC_MODE 0x0A -#define TI_CMD_CODE_PROMISC_ENB 0x01 -#define TI_CMD_CODE_PROMISC_DIS 0x02 - -#define TI_CMD_LINK_NEGOTIATION 0x0B -#define TI_CMD_CODE_NEGOTIATE_BOTH 0x00 -#define TI_CMD_CODE_NEGOTIATE_GIGABIT 0x01 -#define TI_CMD_CODE_NEGOTIATE_10_100 0x02 - -#define TI_CMD_SET_MAC_ADDR 0x0C -#define TI_CMD_CLR_PROFILE 0x0D - -#define TI_CMD_SET_ALLMULTI 0x0E -#define TI_CMD_CODE_ALLMULTI_ENB 0x01 -#define TI_CMD_CODE_ALLMULTI_DIS 0x02 - -#define TI_CMD_CLR_STATS 0x0F -#define TI_CMD_SET_RX_JUMBO_PROD_IDX 0x10 /* obsolete */ -#define TI_CMD_RFRSH_STATS 0x11 - -#define TI_CMD_EXT_ADD_MCAST 0x12 -#define TI_CMD_EXT_DEL_MCAST 0x13 - -/* - * Utility macros to make issuing commands a little simpler. Assumes - * that 'sc' and 'cmd' are in local scope. - */ -#define TI_DO_CMD(x, y, z) \ - cmd.ti_cmd = (x); \ - cmd.ti_code = (y); \ - cmd.ti_idx = (z); \ - ti_cmd(sc, &cmd); - -#define TI_DO_CMD_EXT(x, y, z, v, w) \ - cmd.ti_cmd = (x); \ - cmd.ti_code = (y); \ - cmd.ti_idx = (z); \ - ti_cmd_ext(sc, &cmd, (v), (w)); - -/* - * Other utility macros. - */ -#define TI_INC(x, y) (x) = (x + 1) % y - -#define TI_UPDATE_JUMBOPROD(x, y) \ - if (x->ti_hwrev == TI_HWREV_TIGON) { \ - TI_DO_CMD(TI_CMD_SET_RX_JUMBO_PROD_IDX, 0, y); \ - } else { \ - CSR_WRITE_4(x, TI_MB_JUMBORXPROD_IDX, y); \ - } - -#define TI_UPDATE_MINIPROD(x, y) \ - CSR_WRITE_4(x, TI_MB_MINIRXPROD_IDX, y); - -#define TI_UPDATE_STDPROD(x, y) \ - if (x->ti_hwrev == TI_HWREV_TIGON) { \ - TI_DO_CMD(TI_CMD_SET_RX_PROD_IDX, 0, y); \ - } else { \ - CSR_WRITE_4(x, TI_MB_STDRXPROD_IDX, y); \ - } - - -/* - * Tigon event structure. - */ -struct ti_event_desc { -#if BYTE_ORDER == BIG_ENDIAN - u_int32_t ti_event:8; - u_int32_t ti_code:12; - u_int32_t ti_idx:12; -#else - u_int32_t ti_idx:12; - u_int32_t ti_code:12; - u_int32_t ti_event:8; -#endif - u_int32_t ti_rsvd; -}; - -/* - * Tigon events. - */ -#define TI_EV_FIRMWARE_UP 0x01 -#define TI_EV_STATS_UPDATED 0x04 - -#define TI_EV_LINKSTAT_CHANGED 0x06 -#define TI_EV_CODE_GIG_LINK_UP 0x01 -#define TI_EV_CODE_LINK_DOWN 0x02 -#define TI_EV_CODE_LINK_UP 0x03 - -#define TI_EV_ERROR 0x07 -#define TI_EV_CODE_ERR_INVAL_CMD 0x01 -#define TI_EV_CODE_ERR_UNIMP_CMD 0x02 -#define TI_EV_CODE_ERR_BADCFG 0x03 - -#define TI_EV_MCAST_UPDATED 0x08 -#define TI_EV_CODE_MCAST_ADD 0x01 -#define TI_EV_CODE_MCAST_DEL 0x02 - -#define TI_EV_RESET_JUMBO_RING 0x09 -/* - * Register access macros. The Tigon always uses memory mapped register - * accesses and all registers must be accessed with 32 bit operations. - */ - -#define CSR_WRITE_4(sc, reg, val) \ - bus_space_write_4(sc->ti_btag, sc->ti_bhandle, reg, val) - -#define CSR_READ_4(sc, reg) \ - bus_space_read_4(sc->ti_btag, sc->ti_bhandle, reg) - -#define TI_SETBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) | x)) -#define TI_CLRBIT(sc, reg, x) \ - CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) & ~x)) - -/* - * Memory management stuff. Note: the SSLOTS, MSLOTS and JSLOTS - * values are tuneable. They control the actual amount of buffers - * allocated for the standard, mini and jumbo receive rings. - */ - -#define TI_SSLOTS 256 -#define TI_MSLOTS 256 -#define TI_JSLOTS 384 - -#define TI_JRAWLEN (TI_JUMBO_FRAMELEN + ETHER_ALIGN) -#define TI_JLEN (TI_JRAWLEN + (sizeof(u_int64_t) - \ - (TI_JRAWLEN % sizeof(u_int64_t)))) -#define TI_JPAGESZ PAGE_SIZE -#define TI_RESID (TI_JPAGESZ - (TI_JLEN * TI_JSLOTS) % TI_JPAGESZ) -#define TI_JMEM ((TI_JLEN * TI_JSLOTS) + TI_RESID) - -/* - * Ring structures. Most of these reside in host memory and we tell - * the NIC where they are via the ring control blocks. The exceptions - * are the tx and command rings, which live in NIC memory and which - * we access via the shared memory window. - */ -struct ti_ring_data { - struct ti_rx_desc ti_rx_std_ring[TI_STD_RX_RING_CNT]; -#ifdef PRIVATE_JUMBOS - struct ti_rx_desc ti_rx_jumbo_ring[TI_JUMBO_RX_RING_CNT]; -#else - struct ti_rx_desc_ext ti_rx_jumbo_ring[TI_JUMBO_RX_RING_CNT]; -#endif - struct ti_rx_desc ti_rx_mini_ring[TI_MINI_RX_RING_CNT]; - struct ti_rx_desc ti_rx_return_ring[TI_RETURN_RING_CNT]; - struct ti_event_desc ti_event_ring[TI_EVENT_RING_CNT]; - struct ti_tx_desc ti_tx_ring[TI_TX_RING_CNT]; - /* - * Make sure producer structures are aligned on 32-byte cache - * line boundaries. - */ - struct ti_producer ti_ev_prodidx_r; - u_int32_t ti_pad0[6]; - struct ti_producer ti_return_prodidx_r; - u_int32_t ti_pad1[6]; - struct ti_producer ti_tx_considx_r; - u_int32_t ti_pad2[6]; - struct ti_tx_desc *ti_tx_ring_nic;/* pointer to shared mem */ - struct ti_cmd_desc *ti_cmd_ring; /* pointer to shared mem */ - struct ti_gib ti_info; -}; - -/* - * Mbuf pointers. We need these to keep track of the virtual addresses - * of our mbuf chains since we can only convert from physical to virtual, - * not the other way around. - */ -struct ti_chain_data { - struct mbuf *ti_tx_chain[TI_TX_RING_CNT]; - struct mbuf *ti_rx_std_chain[TI_STD_RX_RING_CNT]; - struct mbuf *ti_rx_jumbo_chain[TI_JUMBO_RX_RING_CNT]; - struct mbuf *ti_rx_mini_chain[TI_MINI_RX_RING_CNT]; - /* Stick the jumbo mem management stuff here too. */ - caddr_t ti_jslots[TI_JSLOTS]; - void *ti_jumbo_buf; -}; - -struct ti_type { - u_int16_t ti_vid; - u_int16_t ti_did; - char *ti_name; -}; - -#define TI_HWREV_TIGON 0x01 -#define TI_HWREV_TIGON_II 0x02 -#define TI_TIMEOUT 1000 -#define TI_TXCONS_UNSET 0xFFFF /* impossible value */ - -struct ti_mc_entry { - struct ether_addr mc_addr; - SLIST_ENTRY(ti_mc_entry) mc_entries; -}; - -struct ti_jpool_entry { - int slot; - SLIST_ENTRY(ti_jpool_entry) jpool_entries; -}; - -typedef enum { - TI_FLAG_NONE = 0x00, - TI_FLAG_DEBUGING = 0x01, - TI_FLAG_WAIT_FOR_LINK = 0x02 -} ti_flag_vals; - -struct ti_softc { - STAILQ_ENTRY(ti_softc) ti_links; - struct ifnet *ti_ifp; - bus_space_handle_t ti_bhandle; - vm_offset_t ti_vhandle; - bus_space_tag_t ti_btag; - void *ti_intrhand; - struct resource *ti_irq; - struct resource *ti_res; - struct ifmedia ifmedia; /* media info */ - u_int8_t ti_unit; /* interface number */ - u_int8_t ti_hwrev; /* Tigon rev (1 or 2) */ - u_int8_t ti_copper; /* 1000baseTX card */ - u_int8_t ti_linkstat; /* Link state */ - int ti_hdrsplit; /* enable header splitting */ - bus_dma_tag_t ti_parent_dmat; - bus_dma_tag_t ti_rdata_dmat; - bus_dmamap_t ti_rdata_dmamap; - uint32_t ti_rdata_phys; - struct ti_ring_data *ti_rdata; /* rings */ - struct ti_chain_data ti_cdata; /* mbufs */ -#define ti_ev_prodidx ti_rdata->ti_ev_prodidx_r -#define ti_return_prodidx ti_rdata->ti_return_prodidx_r -#define ti_tx_considx ti_rdata->ti_tx_considx_r - u_int16_t ti_tx_saved_considx; - u_int16_t ti_rx_saved_considx; - u_int16_t ti_ev_saved_considx; - u_int16_t ti_cmd_saved_prodidx; - u_int16_t ti_std; /* current std ring head */ - u_int16_t ti_mini; /* current mini ring head */ - u_int16_t ti_jumbo; /* current jumo ring head */ - SLIST_HEAD(__ti_mchead, ti_mc_entry) ti_mc_listhead; - SLIST_HEAD(__ti_jfreehead, ti_jpool_entry) ti_jfree_listhead; - SLIST_HEAD(__ti_jinusehead, ti_jpool_entry) ti_jinuse_listhead; - u_int32_t ti_stat_ticks; - u_int32_t ti_rx_coal_ticks; - u_int32_t ti_tx_coal_ticks; - u_int32_t ti_rx_max_coal_bds; - u_int32_t ti_tx_max_coal_bds; - u_int32_t ti_tx_buf_ratio; - int ti_if_flags; - int ti_txcnt; - struct mtx ti_mtx; - ti_flag_vals ti_flags; - struct cdev *dev; -}; - -#define TI_LOCK(_sc) mtx_lock(&(_sc)->ti_mtx) -#define TI_UNLOCK(_sc) mtx_unlock(&(_sc)->ti_mtx) -#define TI_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->ti_mtx, MA_OWNED) - -/* - * Microchip Technology 24Cxx EEPROM control bytes - */ -#define EEPROM_CTL_READ 0xA1 /* 0101 0001 */ -#define EEPROM_CTL_WRITE 0xA0 /* 0101 0000 */ - -/* - * Note that EEPROM_START leaves transmission enabled. - */ -#define EEPROM_START \ - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock pin high */\ - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Set DATA bit to 1 */ \ - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit to write bit */\ - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA bit to 0 again */\ - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */ - -/* - * EEPROM_STOP ends access to the EEPROM and clears the ETXEN bit so - * that no further data can be written to the EEPROM I/O pin. - */ -#define EEPROM_STOP \ - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit */ \ - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA to 0 */ \ - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock high */ \ - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit */ \ - TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Toggle DATA to 1 */ \ - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit. */ \ - TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */ - - -#ifdef __alpha__ -#undef vtophys -#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) -#endif diff --git a/sys/dev/ti/ti_fw.h b/sys/dev/ti/ti_fw.h deleted file mode 100644 index 89f5c9f..0000000 --- a/sys/dev/ti/ti_fw.h +++ /dev/null @@ -1,4593 +0,0 @@ -/* - * Firmware for Alteon Tigon 1 chip. - * Generated by genfw.c - * - * $FreeBSD$ - */ -static int tigonFwReleaseMajor = 0xc; -static int tigonFwReleaseMinor = 0x4; -static int tigonFwReleaseFix = 0xb; -static u_int32_t tigonFwStartAddr = 0x00004000; -static u_int32_t tigonFwTextAddr = 0x00004000; -static int tigonFwTextLen = 0x11140; -static u_int32_t tigonFwRodataAddr = 0x00015140; -static int tigonFwRodataLen = 0xac0; -static u_int32_t tigonFwDataAddr = 0x00015c20; -static int tigonFwDataLen = 0x170; -static u_int32_t tigonFwSbssAddr = 0x00015d90; -static int tigonFwSbssLen = 0x38; -static u_int32_t tigonFwBssAddr = 0x00015dd0; -static int tigonFwBssLen = 0x2080; -static u_int32_t tigonFwText[] = { -0x10000003, -0x0, 0xd, 0xd, 0x3c1d0001, -0x8fbd5c54, 0x3a0f021, 0x3c100000, 0x26104000, -0xc00100c, 0x0, 0xd, 0x27bdffd8, -0x3c1cc000, 0x3c1b0013, 0x377bd800, 0xd021, -0x3c170013, 0x36f75418, 0x2e02021, 0x340583e8, -0xafbf0024, 0xc002488, 0xafb00020, 0xc0023e8, -0x0, 0x3c040001, 0x248451a4, 0x24050001, -0x2e03021, 0x3821, 0x3c100001, 0x26107e50, -0xafb00010, 0xc002403, 0xafbb0014, 0x3c02000f, -0x3442ffff, 0x2021024, 0x362102b, 0x10400009, -0x24050003, 0x3c040001, 0x248451b0, 0x2003021, -0x3603821, 0x3c020010, 0xafa20010, 0xc002403, -0xafa00014, 0x2021, 0x3405c000, 0x3c010001, -0x370821, 0xa02083b0, 0x3c010001, 0x370821, -0xa02083b2, 0x3c010001, 0x370821, 0xa02083b3, -0x3c010001, 0x370821, 0xac2083b4, 0xa2e004d8, -0x418c0, 0x24840001, 0x771021, 0xac40727c, -0x771021, 0xac407280, 0x2e31021, 0xa445727c, -0x2c820020, 0x1440fff7, 0x418c0, 0x2021, -0x3405c000, 0x418c0, 0x24840001, 0x771021, -0xac40737c, 0x771021, 0xac407380, 0x2e31021, -0xa445737c, 0x2c820080, 0x5440fff7, 0x418c0, -0xaf800054, 0xaf80011c, 0x8f820044, 0x34420040, -0xaf820044, 0x8f820044, 0x34420020, 0xaf820044, -0x8f420218, 0x30420002, 0x10400009, 0x0, -0x8f420220, 0x3c030002, 0x34630004, 0x431025, -0xaee204c4, 0x8f42021c, 0x8001074, 0x34420004, -0x8f420220, 0x3c030002, 0x34630006, 0x431025, -0xaee204c4, 0x8f42021c, 0x34420006, 0xaee204cc, -0x8f420218, 0x30420010, 0x1040000a, 0x0, -0x8f42021c, 0x34420004, 0xaee204c8, 0x8f420220, -0x3c03000a, 0x34630004, 0x431025, 0x800108a, -0xaee204c0, 0x8f420220, 0x3c03000a, 0x34630006, -0x431025, 0xaee204c0, 0x8f42021c, 0x34420006, -0xaee204c8, 0x8f420218, 0x30420200, 0x10400003, -0x24020001, 0x8001091, 0xa2e27248, 0xa2e07248, -0x24020001, 0xaf8200a0, 0xaf8200b0, 0x8f830054, -0x8f820054, 0x8001099, 0x24630064, 0x8f820054, -0x621023, 0x2c420065, 0x1440fffc, 0x0, -0xaf800044, 0x8f420208, 0x8f43020c, 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0xf670, 0x572d444d, -0x41456e46, 0x0, 0x0, 0xfdc0, -0x1015c, 0xfddc, 0x1015c, 0x1015c, -0x1015c, 0x1015c, 0x1015c, 0x1015c, -0xf704, 0x1015c, 0x1015c, 0x1015c, -0x1015c, 0x1015c, 0x10154, 0x10154, -0x10154, 0x24486561, 0x6465723a, 0x202f7072, -0x6f6a6563, 0x74732f72, 0x63732f73, 0x772f6765, -0x2f2e2f6e, 0x69632f66, 0x772f636f, 0x6d6d6f6e, -0x2f6d6163, 0x2e632c76, 0x20312e31, 0x2e322e31, -0x32203139, 0x39382f30, 0x342f3237, 0x2032323a, -0x31333a34, 0x32207368, 0x75616e67, 0x20457870, -0x20240000, 0x6d616374, 0x7841544e, 0x0, -0x4e745379, 0x6e264c6b, 0x0, 0x72656d61, -0x73737274, 0x0, 0x6c696e6b, 0x444f574e, -0x0, 0x656e714d, 0x45765046, 0x61696c00, -0x656e714d, 0x45764661, 0x696c0000, 0x6661696c, -0x456e454d, 0x0, 0x6c696e6b, 0x55500000, -0x0, 0x24486561, 0x6465723a, 0x202f7072, -0x6f6a6563, 0x74732f72, 0x63732f73, 0x772f6765, -0x2f2e2f6e, 0x69632f66, 0x772f636f, 0x6d6d6f6e, -0x2f636b73, 0x756d2e63, 0x2c762031, 0x2e312e32, -0x2e322031, 0x3939382f, 0x30342f32, 0x37203232, -0x3a31333a, 0x33392073, 0x6875616e, 0x67204578, -0x70202400, 0x50726f62, 0x65506879, 0x0, -0x6c6e6b41, 0x53535254, 0x0, 0x11b2c, -0x11bc4, 0x11bf8, 0x11c2c, 0x11c58, -0x11c6c, 0x11ca8, 0x1207c, 0x11de4, -0x11e24, 0x11e50, 0x11e90, 0x11ec0, -0x11efc, 0x11f30, 0x1207c, 0x122c0, -0x122d8, 0x12300, 0x12320, 0x12348, -0x12478, 0x124a0, 0x124f4, 0x1251c, -0x0, 0x1278c, 0x1285c, 0x12934, -0x12a04, 0x12a60, 0x12b3c, 0x12b64, -0x12c40, 0x12c68, 0x12e10, 0x12e38, -0x12fe0, 0x131d8, 0x1346c, 0x13380, -0x1346c, 0x13498, 0x13008, 0x131b0, -0x0, 0x13b84, 0x13bc8, 0x13c60, -0x13cac, 0x13d1c, 0x13db4, 0x13de8, -0x13e70, 0x13f08, 0x13fd8, 0x14018, -0x1409c, 0x140c0, 0x141f4, 0x646f4261, -0x73655067, 0x0, 0x0, 0x0, -0x0, 0x73746d61, 0x634c4e4b, 0x0, -0x0, 0x14c38, 0x14c38, 0x14b80, -0x14bc4, 0x14c38, 0x14c38, 0x0, -0x0, 0x0 }; -static u_int32_t tigonFwData[] = { -0x416c7465, -0x6f6e2041, 0x63654e49, 0x43205600, 0x416c7465, -0x6f6e2041, 0x63654e49, 0x43205600, 0x42424242, -0x0, 0x0, 0x0, 0x135418, -0x13e7fc, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x60cf00, -0x60, 0xcf000000, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x3, 0x0, -0x1, 0x0, 0x0, 0x0, -0x1, 0x0, 0x1, 0x0, -0x0, 0x0, 0x0, 0x1, -0x1, 0x0, 0x0, 0x0, -0x0, 0x0, 0x1000000, 0x21000000, -0x12000140, 0x0, 0x0, 0x20000000, -0x120000a0, 0x0, 0x12000060, 0x12000180, -0x120001e0, 0x0, 0x0, 0x0, -0x1, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x2, -0x0, 0x0, 0x30001, 0x1, -0x30201, 0x0, 0x0, 0x0 }; diff --git a/sys/dev/ti/ti_fw2.h b/sys/dev/ti/ti_fw2.h deleted file mode 100644 index e54c920..0000000 --- a/sys/dev/ti/ti_fw2.h +++ /dev/null @@ -1,5232 +0,0 @@ -/* - * Generated by Ken's special genfw.c - * Built on Wed Aug 2 17:21:09 MDT 2000 by ken@roadwarrior.plutotech.com - * OS: FreeBSD 5.0-CURRENT - * $FreeBSD$ - */ -static int tigon2FwReleaseMajor = 0xc; -static int tigon2FwReleaseMinor = 0x4; -static int tigon2FwReleaseFix = 0xb; -static u_int32_t tigon2FwStartAddr = 0x00004000; -static u_int32_t tigon2FwTextAddr = 0x00004000; -int tigon2FwTextLen = 0x132f8; -static u_int32_t tigon2FwRodataAddr = 0x000172f8; -int tigon2FwRodataLen = 0x10da; -static u_int32_t tigon2FwDataAddr = 0x000185c0; -int tigon2FwDataLen = 0x17c; -static u_int32_t tigon2FwSbssAddr = 0x0001873c; -int tigon2FwSbssLen = 0xcc; -static u_int32_t tigon2FwBssAddr = 0x00018810; -int tigon2FwBssLen = 0x20c0; -static u_int32_t tigon2FwText[] = { -0x0, -0x10000003, 0x0, 0xd, 0xd, -0x3c1d0002, 0x8fbd8600, 0x3a0f021, 0x3c100000, -0x26104000, 0xc001082, 0x0, 0xd, -0x3c1d0002, 0x8fbd8604, 0x3a0f021, 0x3c100000, -0x26104000, 0xc0018cc, 0x0, 0xd, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x2000008, -0x0, 0x80017d9, 0x3c0a0001, 0x80017d9, -0x3c0a0002, 0x80017d9, 0x0, 0x8002ec4, -0x0, 0x8002e4e, 0x0, 0x80017d9, -0x3c0a0004, 0x80035a3, 0x0, 0x8001b5a, -0x0, 0x8003df3, 0x0, 0x8003d81, -0x0, 0x80017d9, 0x3c0a0006, 0x8003e7a, -0x3c0a0007, 0x80017d9, 0x3c0a0008, 0x80017d9, -0x3c0a0009, 0x8003eeb, 0x0, 0x80030d9, -0x0, 0x80017d9, 0x3c0a000b, 0x80017d9, -0x3c0a000c, 0x80017d9, 0x3c0a000d, 0x8002af6, -0x0, 0x8002a8a, 0x0, 0x80017d9, -0x3c0a000e, 0x800219b, 0x0, 0x8001a69, -0x0, 0x8001b0b, 0x0, 0x80041cb, -0x0, 0x80041b9, 0x0, 0x80017d9, -0x0, 0x8001a1f, 0x0, 0x80017d9, -0x0, 0x80017d9, 0x3c0a0013, 0x80017d9, -0x3c0a0014, 0x27bdffe0, 0x3c1cc000, 0xafbf001c, -0xafb00018, 0x8f820140, 0x24030003, 0xaf8300ec, -0x34420004, 0xaf820140, 0xc002d20, 0x0, -0x3c0100c0, 0xac203ffc, 0xc00184f, 0x0, -0x401821, 0x3c020010, 0x3c010002, 0xac238758, -0x10620025, 0x43102b, 0x14400002, 0x3c020020, -0x3c020008, 0x10620020, 0x24050100, 0x3c040001, -0x248473ac, 0x3c060002, 0x8cc68758, 0x3821, -0xafa00010, 0xc002d3b, 0xafa00014, 0x3c040001, -0x248473b8, 0x24020256, 0xafa20010, 0xafa00014, -0x8f860144, 0x3c070001, 0x24e773c0, 0xc002d3b, -0x3405dead, 0x8f82011c, 0x34420002, 0xaf82011c, -0x8f820220, 0x34420004, 0xaf820220, 0x8f830140, -0x3c020020, 0x3c010002, 0xac228758, 0x3c020001, -0x621825, 0xaf830140, 0x24020008, 0x3c010002, -0xac228770, 0x2402001f, 0x3c010002, 0xac228780, -0x24020016, 0x3c010002, 0xac228754, 0x3c05fffe, -0x34a56f08, 0x3c020002, 0x8c428758, 0x3c030002, -0x2463a8d0, 0x3c040002, 0x8c8485c4, 0x431023, -0x14800002, 0x458021, 0x2610fa38, 0x2402f000, -0x2028024, 0xc001871, 0x2002021, 0x2022823, -0x3c040020, 0x821823, 0x651823, 0x247bb000, -0x3c03fffe, 0x3463bf08, 0x363b821, 0x3c0600bf, -0x34c6f000, 0x3c070002, 0x8ce785c0, 0x3c0300bf, -0x3463e000, 0x852023, 0x3c010002, 0xac248764, -0x822023, 0x3c010002, 0xac25874c, 0x52842, -0x3c010002, 0xac228740, 0x27620ffc, 0x3c010002, -0xac228600, 0x27621ffc, 0xdb3023, 0x7b1823, -0x3c010002, 0xac248744, 0x3c010002, 0xac258768, -0x3c010002, 0xac228604, 0xaf860150, 0xaf830250, -0x10e00027, 0x33620fff, 0x10400014, 0x2402028b, -0x3c040001, 0x248473b8, 0xafa20010, 0xafa00014, -0x8f860144, 0x3c070001, 0x24e773c0, 0xc002d3b, -0x3405dead, 0x8f82011c, 0x34420002, 0xaf82011c, -0x8f820220, 0x34420004, 0xaf820220, 0x8f820140, -0x3c030001, 0x431025, 0xaf820140, 0x3c1d0002, -0x8fbd85cc, 0x3a0f021, 0xc001807, 0x0, -0x3c020002, 0x8c4285d0, 0x3c030002, 0x8c6385d4, -0x2442fe00, 0x24630200, 0x3c010002, 0xac2285d0, -0x3c010002, 0xac2385d4, 0x10000004, 0x0, -0x3c1d0002, 0x8fbd8600, 0x3a0f021, 0x3c020002, -0x8c4285c4, 0x1040000d, 0x26fafa38, 0x3c020002, -0x8c4285d0, 0x3c030002, 0x8c6385d4, 0x3c1a0002, -0x8f5a85d4, 0x2442fa38, 0x246305c8, 0x3c010002, -0xac2285d0, 0x3c010002, 0xac2385d4, 0x3c020002, -0x8c4285c8, 0x14400003, 0x0, 0x3c010002, -0xac2085d0, 0xc001140, 0x0, 0x8fbf001c, -0x8fb00018, 0x3e00008, 0x27bd0020, 0x3c020002, -0x8c4285d0, 0x3c030002, 0x8c6385d4, 0x27bdff98, -0xafb00048, 0x3c100001, 0x8e107d5c, 0xafb20050, -0x3c120000, 0x26524100, 0xafbf0060, 0xafbe005c, -0xafb50058, 0xafb30054, 0xafb1004c, 0xafa20034, -0xafa30030, 0xafa00010, 0xafa00014, 0x8f860040, -0x3c040001, 0x248473cc, 0x24050200, 0x3c010002, -0xac32873c, 0xc002d3b, 0x2003821, 0x8f830040, -0x3c02f000, 0x621824, 0x3c026000, 0x1062001f, -0xa3a0003f, 0x3c040001, 0x248473d4, 0xafa00010, -0xafa00014, 0x8f860040, 0x24050300, 0xc002d3b, -0x2003821, 0x3c040001, 0x248473b8, 0x240202e1, -0xafa20010, 0xafa00014, 0x8f860144, 0x3c070001, -0x24e773c0, 0xc002d3b, 0x3405dead, 0x8f82011c, -0x34420002, 0xaf82011c, 0x8f820220, 0x34420004, -0xaf820220, 0x8f820140, 0x240e0001, 0x3c030001, -0xa3ae003f, 0x431025, 0xaf820140, 0x8f820240, -0x3c030001, 0x431025, 0xaf820240, 0xaf800048, -0x8f820048, 0x14400005, 0x0, 0xaf800048, -0x8f820048, 0x10400004, 0x0, 0xaf800048, -0x10000003, 0x2e02021, 0xaf80004c, 0x2e02021, -0x3c050001, 0xc002da8, 0x34a540f8, 0x3402021, -0xc002da8, 0x240505c8, 0x3c020002, 0x8c428764, -0x3c0d0002, 0x8dad8744, 0x3c030002, 0x8c638740, -0x3c080002, 0x8d08874c, 0x3c090002, 0x8d298768, -0x3c0a0002, 0x8d4a8770, 0x3c0b0002, 0x8d6b8780, -0x3c0c0002, 0x8d8c8754, 0x3c040001, 0x248473e0, -0x24050400, 0xaf42013c, 0x8f42013c, 0x24060001, -0x24070001, 0xaf400000, 0xaf4d0138, 0xaf430144, -0xaf480148, 0xaf49014c, 0xaf4a0150, 0xaf4b0154, -0xaf4c0158, 0x2442ff80, 0xaf420140, 0x24020001, -0xafa20010, 0xc002d3b, 0xafa00014, 0x8f420138, -0xafa20010, 0x8f42013c, 0xafa20014, 0x8f460144, -0x8f470148, 0x3c040001, 0x248473ec, 0xc002d3b, -0x24050500, 0xafb70010, 0xafba0014, 0x8f46014c, -0x8f470150, 0x3c040001, 0x248473f8, 0xc002d3b, -0x24050600, 0x3c020002, 0x8c428758, 0x3603821, -0x3c060002, 0x24c6a8d0, 0x2448ffff, 0x1061824, -0xe81024, 0x43102b, 0x1040001a, 0x24050900, -0x3c040001, 0x24847404, 0xafa80010, 0xc002d3b, -0xafa00014, 0x3c040001, 0x248473b8, 0x2402033a, -0xafa20010, 0xafa00014, 0x8f860144, 0x3c070001, -0x24e773c0, 0xc002d3b, 0x3405dead, 0x8f82011c, -0x34420002, 0xaf82011c, 0x8f820220, 0x34420004, -0xaf820220, 0x8f820140, 0x3c030001, 0x431025, -0xaf820140, 0x8f82000c, 0xafa20010, 0x8f82003c, -0xafa20014, 0x8f860000, 0x8f870004, 0x3c040001, -0x24847410, 0xc002d3b, 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-0x51725072, 0x6f644600, 0x2a50414e, 0x49432a00, -0x6d61632e, 0x68000000, 0x73656e64, 0x2e630000, -0x69736e74, 0x54637055, 0x0, 0x24486561, -0x6465723a, 0x202f7072, 0x6f6a6563, 0x74732f72, -0x63732f73, 0x772f6765, 0x2f2e2f6e, 0x69632f66, -0x77322f63, 0x6f6d6d6f, 0x6e2f7265, 0x63762e63, -0x2c762031, 0x2e312e32, 0x2e353320, 0x31393939, -0x2f30312f, 0x31362030, 0x323a3535, 0x3a343320, -0x73687561, 0x6e672045, 0x78702024, 0x0, -0x65767452, 0x6e674600, 0x51657674, 0x46000000, -0x51657674, 0x505f4600, 0x4d657674, 0x526e6746, -0x0, 0x4d516576, 0x74460000, 0x4d516576, -0x505f4600, 0x5173436f, 0x6e495f46, 0x0, -0x5173436f, 0x6e734600, 0x51725072, 0x6f644600, -0x2a50414e, 0x49432a00, 0x6d61632e, 0x68000000, -0x724d6163, 0x43686b30, 0x0, 0x72784672, -0x6d324c67, 0x0, 0x72784e6f, 0x53744264, -0x0, 0x72784e6f, 0x4d694264, 0x0, -0x72784e6f, 0x4a6d4264, 0x0, 0x72656376, -0x2e630000, 0x7278436b, 0x446d6146, 0x0, -0x72785144, 0x6d457846, 0x0, 0x72785144, -0x6d614600, 0x72785144, 0x4c426446, 0x0, -0x72785144, 0x6d426446, 0x0, 0x72784372, -0x63506164, 0x0, 0x72536d51, 0x446d6146, -0x0, 0x24486561, 0x6465723a, 0x202f7072, -0x6f6a6563, 0x74732f72, 0x63732f73, 0x772f6765, -0x2f2e2f6e, 0x69632f66, 0x77322f63, 0x6f6d6d6f, -0x6e2f6d61, 0x632e632c, 0x7620312e, 0x312e322e, -0x32322031, 0x3939382f, 0x31322f30, 0x38203032, -0x3a33363a, 0x33302073, 0x6875616e, 0x67204578, -0x70202400, 0x65767452, 0x6e674600, 0x51657674, -0x46000000, 0x51657674, 0x505f4600, 0x4d657674, -0x526e6746, 0x0, 0x4d516576, 0x74460000, -0x4d516576, 0x505f4600, 0x5173436f, 0x6e495f46, -0x0, 0x5173436f, 0x6e734600, 0x51725072, -0x6f644600, 0x2a50414e, 0x49432a00, 0x6d61632e, -0x68000000, 0x6d616354, 0x68726573, 0x0, -0x23744d61, 0x6341544e, 0x0, 0x23724d61, -0x6341544e, 0x0, 0x72656d41, 0x73737274, -0x0, 0x6d61632e, 0x63000000, 0x6c696e6b, -0x444f574e, 0x0, 0x6c696e6b, 0x55500000, -0x24486561, 0x6465723a, 0x202f7072, 0x6f6a6563, -0x74732f72, 0x63732f73, 0x772f6765, 0x2f2e2f6e, -0x69632f66, 0x77322f63, 0x6f6d6d6f, 0x6e2f636b, -0x73756d2e, 0x632c7620, 0x312e312e, 0x322e3920, -0x31393939, 0x2f30312f, 0x31342030, 0x303a3033, -0x3a343820, 0x73687561, 0x6e672045, 0x78702024, -0x0, 0x65767452, 0x6e674600, 0x51657674, -0x46000000, 0x51657674, 0x505f4600, 0x4d657674, -0x526e6746, 0x0, 0x4d516576, 0x74460000, -0x4d516576, 0x505f4600, 0x5173436f, 0x6e495f46, -0x0, 0x5173436f, 0x6e734600, 0x51725072, -0x6f644600, 0x2a50414e, 0x49432a00, 0x6d61632e, -0x68000000, 0x2a50414e, 0x49432a00, 0x2e2e2f63, -0x6f6d6d6f, 0x6e2f6d61, 0x632e6800, 0x2e2e2f2e, -0x2e2f2e2e, 0x2f636f6d, 0x6d6f6e2f, 0x6c696e6b, -0x2e630000, 0x50726f62, 0x65506879, 0x0, -0x6c6e6b41, 0x53535254, 0x0, 0x6e6f4863, -0x644c6b00, 0x11f8c, 0x1200c, 0x12040, -0x1206c, 0x120e8, 0x12160, 0x121c8, -0x12940, 0x12324, 0x1235c, 0x12374, -0x123b8, 0x123e0, 0x12404, 0x1242c, -0x12940, 0x12324, 0x124b8, 0x124d0, -0x12500, 0x123e0, 0x12528, 0x12550, -0x0, 0x12684, 0x126b4, 0x126d8, -0x12940, 0x126fc, 0x127b8, 0x1284c, -0x0, 0x2a50414e, 0x49432a00, 0x2e2e2f63, -0x6f6d6d6f, 0x6e2f6d61, 0x632e6800, 0x130e4, -0x131b4, 0x1328c, 0x1335c, 0x133b8, -0x13494, 0x134bc, 0x13598, 0x135c0, -0x13768, 0x13790, 0x13938, 0x13b30, -0x13dc8, 0x13cd8, 0x13dc8, 0x13df4, -0x13960, 0x13b08, 0x7273745f, 0x676d6969, -0x0, 0x13e88, 0x13ec4, 0x13fb0, -0x14c04, 0x14c48, 0x14c60, 0x7365746c, -0x6f6f7000, 0x2a50414e, 0x49432a00, 0x2e2e2f63, -0x6f6d6d6f, 0x6e2f6d61, 0x632e6800, 0x15454, -0x15494, 0x1552c, 0x15570, 0x155dc, -0x1566c, 0x156a0, 0x1572c, 0x157d0, -0x158a0, 0x158e0, 0x1596c, 0x15990, -0x15aa8, 0x646f4261, 0x73655067, 0x0, -0x0, 0x2a50414e, 0x49432a00, 0x2e2e2f63, -0x6f6d6d6f, 0x6e2f6d61, 0x632e6800, 0x73746d61, -0x634c4e4b, 0x0, 0x6765746d, 0x636c6e6b, -0x0, 0x167cc, 0x167cc, 0x1647c, -0x164c8, 0x16514, 0x167cc, 0x7365746d, -0x61636163, 0x74000000, 0x0 }; -static u_int32_t tigon2FwData[] = { -0x1, -0x1, 0x1, 0xc001fc, 0x3ffc, -0xc00000, 0x416c7465, 0x6f6e2041, 0x63654e49, -0x43205600, 0x0, 0x416c7465, 0x6f6e2041, -0x63654e49, 0x43205600, 0x42424242, 0x1ffffc, -0x1fff7c, 0x0, 0x0, 0x0, -0x60cf00, 0x60, 0xcf000000, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x3, -0x0, 0x1, 0x0, 0x0, -0x0, 0x1, 0x0, 0x1, -0x0, 0x0, 0x1, 0x1, -0x0, 0x0, 0x0, 0x0, -0x0, 0x1000000, 0x21000000, 0x12000140, -0x0, 0x0, 0x20000000, 0x120000a0, -0x0, 0x12000060, 0x12000180, 0x120001e0, -0x0, 0x0, 0x0, 0x1, -0x0, 0x0, 0x0, 0x0, -0x2, 0x0, 0x0, 0x30001, -0x1, 0x30201, 0x1010101, 0x1010100, -0x10100, 0x1010001, 0x10001, 0x1000101, -0x101, 0x0, 0x0 }; diff --git a/sys/dev/vr/if_vr.c b/sys/dev/vr/if_vr.c deleted file mode 100644 index 23194f7..0000000 --- a/sys/dev/vr/if_vr.c +++ /dev/null @@ -1,1707 +0,0 @@ -/*- - * Copyright (c) 1997, 1998 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * VIA Rhine fast ethernet PCI NIC driver - * - * Supports various network adapters based on the VIA Rhine - * and Rhine II PCI controllers, including the D-Link DFE530TX. - * Datasheets are available at http://www.via.com.tw. - * - * Written by Bill Paul <wpaul@ctr.columbia.edu> - * Electrical Engineering Department - * Columbia University, New York City - */ - -/* - * The VIA Rhine controllers are similar in some respects to the - * the DEC tulip chips, except less complicated. The controller - * uses an MII bus and an external physical layer interface. The - * receiver has a one entry perfect filter and a 64-bit hash table - * multicast filter. Transmit and receive descriptors are similar - * to the tulip. - * - * The Rhine has a serious flaw in its transmit DMA mechanism: - * transmit buffers must be longword aligned. Unfortunately, - * FreeBSD doesn't guarantee that mbufs will be filled in starting - * at longword boundaries, so we have to do a buffer copy before - * transmission. - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/sockio.h> -#include <sys/mbuf.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/socket.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/ethernet.h> -#include <net/if_dl.h> -#include <net/if_media.h> -#include <net/if_types.h> - -#include <net/bpf.h> - -#include <vm/vm.h> /* for vtophys */ -#include <vm/pmap.h> /* for vtophys */ -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/bus.h> -#include <sys/rman.h> - -#include <dev/mii/mii.h> -#include <dev/mii/miivar.h> - -#include <dev/pci/pcireg.h> -#include <dev/pci/pcivar.h> - -#define VR_USEIOSPACE - -#include <pci/if_vrreg.h> - -MODULE_DEPEND(vr, pci, 1, 1, 1); -MODULE_DEPEND(vr, ether, 1, 1, 1); -MODULE_DEPEND(vr, miibus, 1, 1, 1); - -/* "controller miibus0" required. See GENERIC if you get errors here. */ -#include "miibus_if.h" - -#undef VR_USESWSHIFT - -/* - * Various supported device vendors/types and their names. - */ -static struct vr_type vr_devs[] = { - { VIA_VENDORID, VIA_DEVICEID_RHINE, - "VIA VT3043 Rhine I 10/100BaseTX" }, - { VIA_VENDORID, VIA_DEVICEID_RHINE_II, - "VIA VT86C100A Rhine II 10/100BaseTX" }, - { VIA_VENDORID, VIA_DEVICEID_RHINE_II_2, - "VIA VT6102 Rhine II 10/100BaseTX" }, - { VIA_VENDORID, VIA_DEVICEID_RHINE_III, - "VIA VT6105 Rhine III 10/100BaseTX" }, - { VIA_VENDORID, VIA_DEVICEID_RHINE_III_M, - "VIA VT6105M Rhine III 10/100BaseTX" }, - { DELTA_VENDORID, DELTA_DEVICEID_RHINE_II, - "Delta Electronics Rhine II 10/100BaseTX" }, - { ADDTRON_VENDORID, ADDTRON_DEVICEID_RHINE_II, - "Addtron Technology Rhine II 10/100BaseTX" }, - { 0, 0, NULL } -}; - -static int vr_probe(device_t); -static int vr_attach(device_t); -static int vr_detach(device_t); - -static int vr_newbuf(struct vr_softc *, struct vr_chain_onefrag *, - struct mbuf *); -static int vr_encap(struct vr_softc *, struct vr_chain *, struct mbuf * ); - -static void vr_rxeof(struct vr_softc *); -static void vr_rxeoc(struct vr_softc *); -static void vr_txeof(struct vr_softc *); -static void vr_tick(void *); -static void vr_intr(void *); -static void vr_start(struct ifnet *); -static void vr_start_locked(struct ifnet *); -static int vr_ioctl(struct ifnet *, u_long, caddr_t); -static void vr_init(void *); -static void vr_init_locked(struct vr_softc *); -static void vr_stop(struct vr_softc *); -static void vr_watchdog(struct ifnet *); -static void vr_shutdown(device_t); -static int vr_ifmedia_upd(struct ifnet *); -static void vr_ifmedia_sts(struct ifnet *, struct ifmediareq *); - -#ifdef VR_USESWSHIFT -static void vr_mii_sync(struct vr_softc *); -static void vr_mii_send(struct vr_softc *, uint32_t, int); -#endif -static int vr_mii_readreg(struct vr_softc *, struct vr_mii_frame *); -static int vr_mii_writereg(struct vr_softc *, struct vr_mii_frame *); -static int vr_miibus_readreg(device_t, uint16_t, uint16_t); -static int vr_miibus_writereg(device_t, uint16_t, uint16_t, uint16_t); -static void vr_miibus_statchg(device_t); - -static void vr_setcfg(struct vr_softc *, int); -static void vr_setmulti(struct vr_softc *); -static void vr_reset(struct vr_softc *); -static int vr_list_rx_init(struct vr_softc *); -static int vr_list_tx_init(struct vr_softc *); - -#ifdef VR_USEIOSPACE -#define VR_RES SYS_RES_IOPORT -#define VR_RID VR_PCI_LOIO -#else -#define VR_RES SYS_RES_MEMORY -#define VR_RID VR_PCI_LOMEM -#endif - -static device_method_t vr_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, vr_probe), - DEVMETHOD(device_attach, vr_attach), - DEVMETHOD(device_detach, vr_detach), - DEVMETHOD(device_shutdown, vr_shutdown), - - /* bus interface */ - DEVMETHOD(bus_print_child, bus_generic_print_child), - DEVMETHOD(bus_driver_added, bus_generic_driver_added), - - /* MII interface */ - DEVMETHOD(miibus_readreg, vr_miibus_readreg), - DEVMETHOD(miibus_writereg, vr_miibus_writereg), - DEVMETHOD(miibus_statchg, vr_miibus_statchg), - - { 0, 0 } -}; - -static driver_t vr_driver = { - "vr", - vr_methods, - sizeof(struct vr_softc) -}; - -static devclass_t vr_devclass; - -DRIVER_MODULE(vr, pci, vr_driver, vr_devclass, 0, 0); -DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0); - -#define VR_SETBIT(sc, reg, x) \ - CSR_WRITE_1(sc, reg, \ - CSR_READ_1(sc, reg) | (x)) - -#define VR_CLRBIT(sc, reg, x) \ - CSR_WRITE_1(sc, reg, \ - CSR_READ_1(sc, reg) & ~(x)) - -#define VR_SETBIT16(sc, reg, x) \ - CSR_WRITE_2(sc, reg, \ - CSR_READ_2(sc, reg) | (x)) - -#define VR_CLRBIT16(sc, reg, x) \ - CSR_WRITE_2(sc, reg, \ - CSR_READ_2(sc, reg) & ~(x)) - -#define VR_SETBIT32(sc, reg, x) \ - CSR_WRITE_4(sc, reg, \ - CSR_READ_4(sc, reg) | (x)) - -#define VR_CLRBIT32(sc, reg, x) \ - CSR_WRITE_4(sc, reg, \ - CSR_READ_4(sc, reg) & ~(x)) - -#define SIO_SET(x) \ - CSR_WRITE_1(sc, VR_MIICMD, \ - CSR_READ_1(sc, VR_MIICMD) | (x)) - -#define SIO_CLR(x) \ - CSR_WRITE_1(sc, VR_MIICMD, \ - CSR_READ_1(sc, VR_MIICMD) & ~(x)) - -#ifdef VR_USESWSHIFT -/* - * Sync the PHYs by setting data bit and strobing the clock 32 times. - */ -static void -vr_mii_sync(struct vr_softc *sc) -{ - register int i; - - SIO_SET(VR_MIICMD_DIR|VR_MIICMD_DATAIN); - - for (i = 0; i < 32; i++) { - SIO_SET(VR_MIICMD_CLK); - DELAY(1); - SIO_CLR(VR_MIICMD_CLK); - DELAY(1); - } -} - -/* - * Clock a series of bits through the MII. - */ -static void -vr_mii_send(struct vr_softc *sc, uint32_t bits, int cnt) -{ - int i; - - SIO_CLR(VR_MIICMD_CLK); - - for (i = (0x1 << (cnt - 1)); i; i >>= 1) { - if (bits & i) { - SIO_SET(VR_MIICMD_DATAIN); - } else { - SIO_CLR(VR_MIICMD_DATAIN); - } - DELAY(1); - SIO_CLR(VR_MIICMD_CLK); - DELAY(1); - SIO_SET(VR_MIICMD_CLK); - } -} -#endif - -/* - * Read an PHY register through the MII. - */ -static int -vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame) -#ifdef VR_USESWSHIFT -{ - int i, ack; - - /* Set up frame for RX. */ - frame->mii_stdelim = VR_MII_STARTDELIM; - frame->mii_opcode = VR_MII_READOP; - frame->mii_turnaround = 0; - frame->mii_data = 0; - - CSR_WRITE_1(sc, VR_MIICMD, 0); - VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM); - - /* Turn on data xmit. */ - SIO_SET(VR_MIICMD_DIR); - - vr_mii_sync(sc); - - /* Send command/address info. */ - vr_mii_send(sc, frame->mii_stdelim, 2); - vr_mii_send(sc, frame->mii_opcode, 2); - vr_mii_send(sc, frame->mii_phyaddr, 5); - vr_mii_send(sc, frame->mii_regaddr, 5); - - /* Idle bit. */ - SIO_CLR((VR_MIICMD_CLK|VR_MIICMD_DATAIN)); - DELAY(1); - SIO_SET(VR_MIICMD_CLK); - DELAY(1); - - /* Turn off xmit. */ - SIO_CLR(VR_MIICMD_DIR); - - /* Check for ack */ - SIO_CLR(VR_MIICMD_CLK); - DELAY(1); - ack = CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT; - SIO_SET(VR_MIICMD_CLK); - DELAY(1); - - /* - * Now try reading data bits. If the ack failed, we still - * need to clock through 16 cycles to keep the PHY(s) in sync. - */ - if (ack) { - for(i = 0; i < 16; i++) { - SIO_CLR(VR_MIICMD_CLK); - DELAY(1); - SIO_SET(VR_MIICMD_CLK); - DELAY(1); - } - goto fail; - } - - for (i = 0x8000; i; i >>= 1) { - SIO_CLR(VR_MIICMD_CLK); - DELAY(1); - if (!ack) { - if (CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT) - frame->mii_data |= i; - DELAY(1); - } - SIO_SET(VR_MIICMD_CLK); - DELAY(1); - } - -fail: - SIO_CLR(VR_MIICMD_CLK); - DELAY(1); - SIO_SET(VR_MIICMD_CLK); - DELAY(1); - - if (ack) - return (1); - return (0); -} -#else -{ - int i; - - /* Set the PHY address. */ - CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)| - frame->mii_phyaddr); - - /* Set the register address. */ - CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr); - VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_READ_ENB); - - for (i = 0; i < 10000; i++) { - if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_READ_ENB) == 0) - break; - DELAY(1); - } - frame->mii_data = CSR_READ_2(sc, VR_MIIDATA); - - return (0); -} -#endif - - -/* - * Write to a PHY register through the MII. - */ -static int -vr_mii_writereg(struct vr_softc *sc, struct vr_mii_frame *frame) -#ifdef VR_USESWSHIFT -{ - CSR_WRITE_1(sc, VR_MIICMD, 0); - VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM); - - /* Set up frame for TX. */ - frame->mii_stdelim = VR_MII_STARTDELIM; - frame->mii_opcode = VR_MII_WRITEOP; - frame->mii_turnaround = VR_MII_TURNAROUND; - - /* Turn on data output. */ - SIO_SET(VR_MIICMD_DIR); - - vr_mii_sync(sc); - - vr_mii_send(sc, frame->mii_stdelim, 2); - vr_mii_send(sc, frame->mii_opcode, 2); - vr_mii_send(sc, frame->mii_phyaddr, 5); - vr_mii_send(sc, frame->mii_regaddr, 5); - vr_mii_send(sc, frame->mii_turnaround, 2); - vr_mii_send(sc, frame->mii_data, 16); - - /* Idle bit. */ - SIO_SET(VR_MIICMD_CLK); - DELAY(1); - SIO_CLR(VR_MIICMD_CLK); - DELAY(1); - - /* Turn off xmit. */ - SIO_CLR(VR_MIICMD_DIR); - - return (0); -} -#else -{ - int i; - - /* Set the PHY address. */ - CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)| - frame->mii_phyaddr); - - /* Set the register address and data to write. */ - CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr); - CSR_WRITE_2(sc, VR_MIIDATA, frame->mii_data); - - VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_WRITE_ENB); - - for (i = 0; i < 10000; i++) { - if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_WRITE_ENB) == 0) - break; - DELAY(1); - } - - return (0); -} -#endif - -static int -vr_miibus_readreg(device_t dev, uint16_t phy, uint16_t reg) -{ - struct vr_mii_frame frame; - struct vr_softc *sc = device_get_softc(dev); - - switch (sc->vr_revid) { - case REV_ID_VT6102_APOLLO: - if (phy != 1) { - frame.mii_data = 0; - goto out; - } - default: - break; - } - - bzero((char *)&frame, sizeof(frame)); - frame.mii_phyaddr = phy; - frame.mii_regaddr = reg; - vr_mii_readreg(sc, &frame); - -out: - return (frame.mii_data); -} - -static int -vr_miibus_writereg(device_t dev, uint16_t phy, uint16_t reg, uint16_t data) -{ - struct vr_mii_frame frame; - struct vr_softc *sc = device_get_softc(dev); - - switch (sc->vr_revid) { - case REV_ID_VT6102_APOLLO: - if (phy != 1) - return (0); - default: - break; - } - - bzero((char *)&frame, sizeof(frame)); - frame.mii_phyaddr = phy; - frame.mii_regaddr = reg; - frame.mii_data = data; - vr_mii_writereg(sc, &frame); - - return (0); -} - -static void -vr_miibus_statchg(device_t dev) -{ - struct mii_data *mii; - struct vr_softc *sc = device_get_softc(dev); - - mii = device_get_softc(sc->vr_miibus); - vr_setcfg(sc, mii->mii_media_active); -} - -/* - * Program the 64-bit multicast hash filter. - */ -static void -vr_setmulti(struct vr_softc *sc) -{ - struct ifnet *ifp = sc->vr_ifp; - int h = 0; - uint32_t hashes[2] = { 0, 0 }; - struct ifmultiaddr *ifma; - uint8_t rxfilt; - int mcnt = 0; - - VR_LOCK_ASSERT(sc); - - rxfilt = CSR_READ_1(sc, VR_RXCFG); - - if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { - rxfilt |= VR_RXCFG_RX_MULTI; - CSR_WRITE_1(sc, VR_RXCFG, rxfilt); - CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF); - CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF); - return; - } - - /* First, zero out all the existing hash bits. */ - CSR_WRITE_4(sc, VR_MAR0, 0); - CSR_WRITE_4(sc, VR_MAR1, 0); - - /* Now program new ones. */ - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - h = ether_crc32_be(LLADDR((struct sockaddr_dl *) - ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; - if (h < 32) - hashes[0] |= (1 << h); - else - hashes[1] |= (1 << (h - 32)); - mcnt++; - } - - if (mcnt) - rxfilt |= VR_RXCFG_RX_MULTI; - else - rxfilt &= ~VR_RXCFG_RX_MULTI; - - CSR_WRITE_4(sc, VR_MAR0, hashes[0]); - CSR_WRITE_4(sc, VR_MAR1, hashes[1]); - CSR_WRITE_1(sc, VR_RXCFG, rxfilt); -} - -/* - * In order to fiddle with the - * 'full-duplex' and '100Mbps' bits in the netconfig register, we - * first have to put the transmit and/or receive logic in the idle state. - */ -static void -vr_setcfg(struct vr_softc *sc, int media) -{ - int restart = 0; - - VR_LOCK_ASSERT(sc); - - if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON|VR_CMD_RX_ON)) { - restart = 1; - VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON)); - } - - if ((media & IFM_GMASK) == IFM_FDX) - VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX); - else - VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX); - - if (restart) - VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON); -} - -static void -vr_reset(struct vr_softc *sc) -{ - register int i; - - /*VR_LOCK_ASSERT(sc);*/ /* XXX: Called during detach w/o lock. */ - - VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET); - - for (i = 0; i < VR_TIMEOUT; i++) { - DELAY(10); - if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET)) - break; - } - if (i == VR_TIMEOUT) { - if (sc->vr_revid < REV_ID_VT3065_A) - printf("vr%d: reset never completed!\n", sc->vr_unit); - else { - /* Use newer force reset command */ - printf("vr%d: Using force reset command.\n", - sc->vr_unit); - VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST); - } - } - - /* Wait a little while for the chip to get its brains in order. */ - DELAY(1000); -} - -/* - * Probe for a VIA Rhine chip. Check the PCI vendor and device - * IDs against our list and return a device name if we find a match. - */ -static int -vr_probe(device_t dev) -{ - struct vr_type *t = vr_devs; - - while (t->vr_name != NULL) { - if ((pci_get_vendor(dev) == t->vr_vid) && - (pci_get_device(dev) == t->vr_did)) { - device_set_desc(dev, t->vr_name); - return (BUS_PROBE_DEFAULT); - } - t++; - } - - return (ENXIO); -} - -/* - * Attach the interface. Allocate softc structures, do ifmedia - * setup and ethernet/BPF attach. - */ -static int -vr_attach(dev) - device_t dev; -{ - int i; - u_char eaddr[ETHER_ADDR_LEN]; - struct vr_softc *sc; - struct ifnet *ifp; - int unit, error = 0, rid; - - sc = device_get_softc(dev); - unit = device_get_unit(dev); - - mtx_init(&sc->vr_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, - MTX_DEF); - /* - * Map control/status registers. - */ - pci_enable_busmaster(dev); - sc->vr_revid = pci_read_config(dev, VR_PCI_REVID, 4) & 0x000000FF; - - rid = VR_RID; - sc->vr_res = bus_alloc_resource_any(dev, VR_RES, &rid, RF_ACTIVE); - - if (sc->vr_res == NULL) { - printf("vr%d: couldn't map ports/memory\n", unit); - error = ENXIO; - goto fail; - } - - sc->vr_btag = rman_get_bustag(sc->vr_res); - sc->vr_bhandle = rman_get_bushandle(sc->vr_res); - - /* Allocate interrupt */ - rid = 0; - sc->vr_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->vr_irq == NULL) { - printf("vr%d: couldn't map interrupt\n", unit); - error = ENXIO; - goto fail; - } - - /* - * Windows may put the chip in suspend mode when it - * shuts down. Be sure to kick it in the head to wake it - * up again. - */ - VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1)); - - /* Reset the adapter. */ - vr_reset(sc); - - /* - * Turn on bit2 (MIION) in PCI configuration register 0x53 during - * initialization and disable AUTOPOLL. - */ - pci_write_config(dev, VR_PCI_MODE, - pci_read_config(dev, VR_PCI_MODE, 4) | (VR_MODE3_MIION << 24), 4); - VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL); - - /* - * Get station address. The way the Rhine chips work, - * you're not allowed to directly access the EEPROM once - * they've been programmed a special way. Consequently, - * we need to read the node address from the PAR0 and PAR1 - * registers. - */ - VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD); - DELAY(200); - for (i = 0; i < ETHER_ADDR_LEN; i++) - eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i); - - sc->vr_unit = unit; - - sc->vr_ldata = contigmalloc(sizeof(struct vr_list_data), M_DEVBUF, - M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); - - if (sc->vr_ldata == NULL) { - printf("vr%d: no memory for list buffers!\n", unit); - error = ENXIO; - goto fail; - } - - bzero(sc->vr_ldata, sizeof(struct vr_list_data)); - - ifp = sc->vr_ifp = if_alloc(IFT_ETHER); - if (ifp == NULL) { - printf("vr%d: can not if_alloc()\n", unit); - error = ENOSPC; - goto fail; - } - ifp->if_softc = sc; - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - ifp->if_mtu = ETHERMTU; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - ifp->if_ioctl = vr_ioctl; - ifp->if_start = vr_start; - ifp->if_watchdog = vr_watchdog; - ifp->if_init = vr_init; - ifp->if_baudrate = 10000000; - IFQ_SET_MAXLEN(&ifp->if_snd, VR_TX_LIST_CNT - 1); - ifp->if_snd.ifq_maxlen = VR_TX_LIST_CNT - 1; - IFQ_SET_READY(&ifp->if_snd); -#ifdef DEVICE_POLLING - ifp->if_capabilities |= IFCAP_POLLING; -#endif - ifp->if_capenable = ifp->if_capabilities; - - /* Do MII setup. */ - if (mii_phy_probe(dev, &sc->vr_miibus, - vr_ifmedia_upd, vr_ifmedia_sts)) { - printf("vr%d: MII without any phy!\n", sc->vr_unit); - error = ENXIO; - goto fail; - } - - callout_handle_init(&sc->vr_stat_ch); - - /* Call MI attach routine. */ - ether_ifattach(ifp, eaddr); - - sc->suspended = 0; - - /* Hook interrupt last to avoid having to lock softc */ - error = bus_setup_intr(dev, sc->vr_irq, INTR_TYPE_NET | INTR_MPSAFE, - vr_intr, sc, &sc->vr_intrhand); - - if (error) { - printf("vr%d: couldn't set up irq\n", unit); - ether_ifdetach(ifp); - if_free(ifp); - goto fail; - } - -fail: - if (error) - vr_detach(dev); - - return (error); -} - -/* - * Shutdown hardware and free up resources. This can be called any - * time after the mutex has been initialized. It is called in both - * the error case in attach and the normal detach case so it needs - * to be careful about only freeing resources that have actually been - * allocated. - */ -static int -vr_detach(device_t dev) -{ - struct vr_softc *sc = device_get_softc(dev); - struct ifnet *ifp = sc->vr_ifp; - - KASSERT(mtx_initialized(&sc->vr_mtx), ("vr mutex not initialized")); - - VR_LOCK(sc); - - sc->suspended = 1; - - /* These should only be active if attach succeeded */ - if (device_is_attached(dev)) { - vr_stop(sc); - VR_UNLOCK(sc); /* XXX: Avoid recursive acquire. */ - ether_ifdetach(ifp); - if_free(ifp); - VR_LOCK(sc); - } - if (sc->vr_miibus) - device_delete_child(dev, sc->vr_miibus); - bus_generic_detach(dev); - - if (sc->vr_intrhand) - bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand); - if (sc->vr_irq) - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq); - if (sc->vr_res) - bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res); - - if (sc->vr_ldata) - contigfree(sc->vr_ldata, sizeof(struct vr_list_data), M_DEVBUF); - - VR_UNLOCK(sc); - mtx_destroy(&sc->vr_mtx); - - return (0); -} - -/* - * Initialize the transmit descriptors. - */ -static int -vr_list_tx_init(struct vr_softc *sc) -{ - struct vr_chain_data *cd; - struct vr_list_data *ld; - int i; - - cd = &sc->vr_cdata; - ld = sc->vr_ldata; - for (i = 0; i < VR_TX_LIST_CNT; i++) { - cd->vr_tx_chain[i].vr_ptr = &ld->vr_tx_list[i]; - if (i == (VR_TX_LIST_CNT - 1)) - cd->vr_tx_chain[i].vr_nextdesc = - &cd->vr_tx_chain[0]; - else - cd->vr_tx_chain[i].vr_nextdesc = - &cd->vr_tx_chain[i + 1]; - } - cd->vr_tx_cons = cd->vr_tx_prod = &cd->vr_tx_chain[0]; - - return (0); -} - - -/* - * Initialize the RX descriptors and allocate mbufs for them. Note that - * we arrange the descriptors in a closed ring, so that the last descriptor - * points back to the first. - */ -static int -vr_list_rx_init(struct vr_softc *sc) -{ - struct vr_chain_data *cd; - struct vr_list_data *ld; - int i; - - VR_LOCK_ASSERT(sc); - - cd = &sc->vr_cdata; - ld = sc->vr_ldata; - - for (i = 0; i < VR_RX_LIST_CNT; i++) { - cd->vr_rx_chain[i].vr_ptr = - (struct vr_desc *)&ld->vr_rx_list[i]; - if (vr_newbuf(sc, &cd->vr_rx_chain[i], NULL) == ENOBUFS) - return (ENOBUFS); - if (i == (VR_RX_LIST_CNT - 1)) { - cd->vr_rx_chain[i].vr_nextdesc = - &cd->vr_rx_chain[0]; - ld->vr_rx_list[i].vr_next = - vtophys(&ld->vr_rx_list[0]); - } else { - cd->vr_rx_chain[i].vr_nextdesc = - &cd->vr_rx_chain[i + 1]; - ld->vr_rx_list[i].vr_next = - vtophys(&ld->vr_rx_list[i + 1]); - } - } - - cd->vr_rx_head = &cd->vr_rx_chain[0]; - - return (0); -} - -/* - * Initialize an RX descriptor and attach an MBUF cluster. - * Note: the length fields are only 11 bits wide, which means the - * largest size we can specify is 2047. This is important because - * MCLBYTES is 2048, so we have to subtract one otherwise we'll - * overflow the field and make a mess. - */ -static int -vr_newbuf(struct vr_softc *sc, struct vr_chain_onefrag *c, struct mbuf *m) -{ - struct mbuf *m_new = NULL; - - if (m == NULL) { - MGETHDR(m_new, M_DONTWAIT, MT_DATA); - if (m_new == NULL) - return (ENOBUFS); - - MCLGET(m_new, M_DONTWAIT); - if (!(m_new->m_flags & M_EXT)) { - m_freem(m_new); - return (ENOBUFS); - } - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - } else { - m_new = m; - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - m_new->m_data = m_new->m_ext.ext_buf; - } - - m_adj(m_new, sizeof(uint64_t)); - - c->vr_mbuf = m_new; - c->vr_ptr->vr_status = VR_RXSTAT; - c->vr_ptr->vr_data = vtophys(mtod(m_new, caddr_t)); - c->vr_ptr->vr_ctl = VR_RXCTL | VR_RXLEN; - - return (0); -} - -/* - * A frame has been uploaded: pass the resulting mbuf chain up to - * the higher level protocols. - */ -static void -vr_rxeof(struct vr_softc *sc) -{ - struct mbuf *m, *m0; - struct ifnet *ifp; - struct vr_chain_onefrag *cur_rx; - int total_len = 0; - uint32_t rxstat; - - VR_LOCK_ASSERT(sc); - ifp = sc->vr_ifp; - - while (!((rxstat = sc->vr_cdata.vr_rx_head->vr_ptr->vr_status) & - VR_RXSTAT_OWN)) { -#ifdef DEVICE_POLLING - if (ifp->if_flags & IFF_POLLING) { - if (sc->rxcycles <= 0) - break; - sc->rxcycles--; - } -#endif /* DEVICE_POLLING */ - m0 = NULL; - cur_rx = sc->vr_cdata.vr_rx_head; - sc->vr_cdata.vr_rx_head = cur_rx->vr_nextdesc; - m = cur_rx->vr_mbuf; - - /* - * If an error occurs, update stats, clear the - * status word and leave the mbuf cluster in place: - * it should simply get re-used next time this descriptor - * comes up in the ring. - */ - if (rxstat & VR_RXSTAT_RXERR) { - ifp->if_ierrors++; - printf("vr%d: rx error (%02x):", sc->vr_unit, - rxstat & 0x000000ff); - if (rxstat & VR_RXSTAT_CRCERR) - printf(" crc error"); - if (rxstat & VR_RXSTAT_FRAMEALIGNERR) - printf(" frame alignment error\n"); - if (rxstat & VR_RXSTAT_FIFOOFLOW) - printf(" FIFO overflow"); - if (rxstat & VR_RXSTAT_GIANT) - printf(" received giant packet"); - if (rxstat & VR_RXSTAT_RUNT) - printf(" received runt packet"); - if (rxstat & VR_RXSTAT_BUSERR) - printf(" system bus error"); - if (rxstat & VR_RXSTAT_BUFFERR) - printf("rx buffer error"); - printf("\n"); - vr_newbuf(sc, cur_rx, m); - continue; - } - - /* No errors; receive the packet. */ - total_len = VR_RXBYTES(cur_rx->vr_ptr->vr_status); - - /* - * XXX The VIA Rhine chip includes the CRC with every - * received frame, and there's no way to turn this - * behavior off (at least, I can't find anything in - * the manual that explains how to do it) so we have - * to trim off the CRC manually. - */ - total_len -= ETHER_CRC_LEN; - - m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, ifp, - NULL); - vr_newbuf(sc, cur_rx, m); - if (m0 == NULL) { - ifp->if_ierrors++; - continue; - } - m = m0; - - ifp->if_ipackets++; - VR_UNLOCK(sc); - (*ifp->if_input)(ifp, m); - VR_LOCK(sc); - } -} - -static void -vr_rxeoc(struct vr_softc *sc) -{ - struct ifnet *ifp = sc->vr_ifp; - int i; - - VR_LOCK_ASSERT(sc); - - ifp->if_ierrors++; - - VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON); - DELAY(10000); - - /* Wait for receiver to stop */ - for (i = 0x400; - i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON); - i--) { - ; - } - - if (!i) { - printf("vr%d: rx shutdown error!\n", sc->vr_unit); - sc->vr_flags |= VR_F_RESTART; - return; - } - - vr_rxeof(sc); - - CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr)); - VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON); - VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO); -} - -/* - * A frame was downloaded to the chip. It's safe for us to clean up - * the list buffers. - */ -static void -vr_txeof(struct vr_softc *sc) -{ - struct vr_chain *cur_tx; - struct ifnet *ifp = sc->vr_ifp; - - VR_LOCK_ASSERT(sc); - - /* - * Go through our tx list and free mbufs for those - * frames that have been transmitted. - */ - cur_tx = sc->vr_cdata.vr_tx_cons; - while (cur_tx->vr_mbuf != NULL) { - uint32_t txstat; - int i; - - txstat = cur_tx->vr_ptr->vr_status; - - if ((txstat & VR_TXSTAT_ABRT) || - (txstat & VR_TXSTAT_UDF)) { - for (i = 0x400; - i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_TX_ON); - i--) - ; /* Wait for chip to shutdown */ - if (!i) { - printf("vr%d: tx shutdown timeout\n", - sc->vr_unit); - sc->vr_flags |= VR_F_RESTART; - break; - } - VR_TXOWN(cur_tx) = VR_TXSTAT_OWN; - CSR_WRITE_4(sc, VR_TXADDR, vtophys(cur_tx->vr_ptr)); - break; - } - - if (txstat & VR_TXSTAT_OWN) - break; - - if (txstat & VR_TXSTAT_ERRSUM) { - ifp->if_oerrors++; - if (txstat & VR_TXSTAT_DEFER) - ifp->if_collisions++; - if (txstat & VR_TXSTAT_LATECOLL) - ifp->if_collisions++; - } - - ifp->if_collisions +=(txstat & VR_TXSTAT_COLLCNT) >> 3; - - ifp->if_opackets++; - m_freem(cur_tx->vr_mbuf); - cur_tx->vr_mbuf = NULL; - ifp->if_flags &= ~IFF_OACTIVE; - - cur_tx = cur_tx->vr_nextdesc; - } - sc->vr_cdata.vr_tx_cons = cur_tx; - if (cur_tx->vr_mbuf == NULL) - ifp->if_timer = 0; -} - -static void -vr_tick(void *xsc) -{ - struct vr_softc *sc = xsc; - struct mii_data *mii; - - VR_LOCK(sc); - - if (sc->vr_flags & VR_F_RESTART) { - printf("vr%d: restarting\n", sc->vr_unit); - vr_stop(sc); - vr_reset(sc); - vr_init_locked(sc); - sc->vr_flags &= ~VR_F_RESTART; - } - - mii = device_get_softc(sc->vr_miibus); - mii_tick(mii); - sc->vr_stat_ch = timeout(vr_tick, sc, hz); - - VR_UNLOCK(sc); -} - -#ifdef DEVICE_POLLING -static poll_handler_t vr_poll; -static poll_handler_t vr_poll_locked; - -static void -vr_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) -{ - struct vr_softc *sc = ifp->if_softc; - - VR_LOCK(sc); - vr_poll_locked(ifp, cmd, count); - VR_UNLOCK(sc); -} - -static void -vr_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count) -{ - struct vr_softc *sc = ifp->if_softc; - - VR_LOCK_ASSERT(sc); - - if (!(ifp->if_capenable & IFCAP_POLLING)) { - ether_poll_deregister(ifp); - cmd = POLL_DEREGISTER; - } - - if (cmd == POLL_DEREGISTER) { - /* Final call, enable interrupts. */ - CSR_WRITE_2(sc, VR_IMR, VR_INTRS); - return; - } - - sc->rxcycles = count; - vr_rxeof(sc); - vr_txeof(sc); - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - vr_start_locked(ifp); - - if (cmd == POLL_AND_CHECK_STATUS) { - uint16_t status; - - /* Also check status register. */ - status = CSR_READ_2(sc, VR_ISR); - if (status) - CSR_WRITE_2(sc, VR_ISR, status); - - if ((status & VR_INTRS) == 0) - return; - - if (status & VR_ISR_RX_DROPPED) { - printf("vr%d: rx packet lost\n", sc->vr_unit); - ifp->if_ierrors++; - } - - if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) || - (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) { - printf("vr%d: receive error (%04x)", - sc->vr_unit, status); - if (status & VR_ISR_RX_NOBUF) - printf(" no buffers"); - if (status & VR_ISR_RX_OFLOW) - printf(" overflow"); - if (status & VR_ISR_RX_DROPPED) - printf(" packet lost"); - printf("\n"); - vr_rxeoc(sc); - } - - if ((status & VR_ISR_BUSERR) || - (status & VR_ISR_TX_UNDERRUN)) { - vr_reset(sc); - vr_init_locked(sc); - return; - } - - if ((status & VR_ISR_UDFI) || - (status & VR_ISR_TX_ABRT2) || - (status & VR_ISR_TX_ABRT)) { - ifp->if_oerrors++; - if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) { - VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON); - VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_GO); - } - } - } -} -#endif /* DEVICE_POLLING */ - -static void -vr_intr(void *arg) -{ - struct vr_softc *sc = arg; - struct ifnet *ifp = sc->vr_ifp; - uint16_t status; - - VR_LOCK(sc); - - if (sc->suspended) { - /* - * Forcibly disable interrupts. - * XXX: Mobile VIA based platforms may need - * interrupt re-enable on resume. - */ - CSR_WRITE_2(sc, VR_IMR, 0x0000); - goto done_locked; - } - -#ifdef DEVICE_POLLING - if (ifp->if_flags & IFF_POLLING) - goto done_locked; - - if ((ifp->if_capenable & IFCAP_POLLING) && - ether_poll_register(vr_poll, ifp)) { - /* OK, disable interrupts. */ - CSR_WRITE_2(sc, VR_IMR, 0x0000); - vr_poll_locked(ifp, 0, 1); - goto done_locked; - } -#endif /* DEVICE_POLLING */ - - /* Suppress unwanted interrupts. */ - if (!(ifp->if_flags & IFF_UP)) { - vr_stop(sc); - goto done_locked; - } - - /* Disable interrupts. */ - CSR_WRITE_2(sc, VR_IMR, 0x0000); - - for (;;) { - status = CSR_READ_2(sc, VR_ISR); - if (status) - CSR_WRITE_2(sc, VR_ISR, status); - - if ((status & VR_INTRS) == 0) - break; - - if (status & VR_ISR_RX_OK) - vr_rxeof(sc); - - if (status & VR_ISR_RX_DROPPED) { - printf("vr%d: rx packet lost\n", sc->vr_unit); - ifp->if_ierrors++; - } - - if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) || - (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) { - printf("vr%d: receive error (%04x)", - sc->vr_unit, status); - if (status & VR_ISR_RX_NOBUF) - printf(" no buffers"); - if (status & VR_ISR_RX_OFLOW) - printf(" overflow"); - if (status & VR_ISR_RX_DROPPED) - printf(" packet lost"); - printf("\n"); - vr_rxeoc(sc); - } - - if ((status & VR_ISR_BUSERR) || (status & VR_ISR_TX_UNDERRUN)) { - vr_reset(sc); - vr_init_locked(sc); - break; - } - - if ((status & VR_ISR_TX_OK) || (status & VR_ISR_TX_ABRT) || - (status & VR_ISR_TX_ABRT2) || (status & VR_ISR_UDFI)) { - vr_txeof(sc); - if ((status & VR_ISR_UDFI) || - (status & VR_ISR_TX_ABRT2) || - (status & VR_ISR_TX_ABRT)) { - ifp->if_oerrors++; - if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) { - VR_SETBIT16(sc, VR_COMMAND, - VR_CMD_TX_ON); - VR_SETBIT16(sc, VR_COMMAND, - VR_CMD_TX_GO); - } - } - } - } - - /* Re-enable interrupts. */ - CSR_WRITE_2(sc, VR_IMR, VR_INTRS); - - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - vr_start_locked(ifp); - -done_locked: - VR_UNLOCK(sc); -} - -/* - * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data - * pointers to the fragment pointers. - */ -static int -vr_encap(struct vr_softc *sc, struct vr_chain *c, struct mbuf *m_head) -{ - struct vr_desc *f = NULL; - struct mbuf *m; - - VR_LOCK_ASSERT(sc); - /* - * The VIA Rhine wants packet buffers to be longword - * aligned, but very often our mbufs aren't. Rather than - * waste time trying to decide when to copy and when not - * to copy, just do it all the time. - */ - m = m_defrag(m_head, M_DONTWAIT); - if (m == NULL) - return (1); - - /* - * The Rhine chip doesn't auto-pad, so we have to make - * sure to pad short frames out to the minimum frame length - * ourselves. - */ - if (m->m_len < VR_MIN_FRAMELEN) { - m->m_pkthdr.len += VR_MIN_FRAMELEN - m->m_len; - m->m_len = m->m_pkthdr.len; - } - - c->vr_mbuf = m; - f = c->vr_ptr; - f->vr_data = vtophys(mtod(m, caddr_t)); - f->vr_ctl = m->m_len; - f->vr_ctl |= VR_TXCTL_TLINK|VR_TXCTL_FIRSTFRAG; - f->vr_status = 0; - f->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT; - f->vr_next = vtophys(c->vr_nextdesc->vr_ptr); - - return (0); -} - -/* - * Main transmit routine. To avoid having to do mbuf copies, we put pointers - * to the mbuf data regions directly in the transmit lists. We also save a - * copy of the pointers since the transmit list fragment pointers are - * physical addresses. - */ - -static void -vr_start(struct ifnet *ifp) -{ - struct vr_softc *sc = ifp->if_softc; - - VR_LOCK(sc); - vr_start_locked(ifp); - VR_UNLOCK(sc); -} - -static void -vr_start_locked(struct ifnet *ifp) -{ - struct vr_softc *sc = ifp->if_softc; - struct mbuf *m_head; - struct vr_chain *cur_tx; - - if (ifp->if_flags & IFF_OACTIVE) - return; - - cur_tx = sc->vr_cdata.vr_tx_prod; - while (cur_tx->vr_mbuf == NULL) { - IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); - if (m_head == NULL) - break; - - /* Pack the data into the descriptor. */ - if (vr_encap(sc, cur_tx, m_head)) { - /* Rollback, send what we were able to encap. */ - IFQ_DRV_PREPEND(&ifp->if_snd, m_head); - break; - } - - VR_TXOWN(cur_tx) = VR_TXSTAT_OWN; - - /* - * If there's a BPF listener, bounce a copy of this frame - * to him. - */ - BPF_MTAP(ifp, cur_tx->vr_mbuf); - - cur_tx = cur_tx->vr_nextdesc; - } - if (cur_tx != sc->vr_cdata.vr_tx_prod || cur_tx->vr_mbuf != NULL) { - sc->vr_cdata.vr_tx_prod = cur_tx; - - /* Tell the chip to start transmitting. */ - VR_SETBIT16(sc, VR_COMMAND, /*VR_CMD_TX_ON|*/ VR_CMD_TX_GO); - - /* Set a timeout in case the chip goes out to lunch. */ - ifp->if_timer = 5; - - if (cur_tx->vr_mbuf != NULL) - ifp->if_flags |= IFF_OACTIVE; - } -} - -static void -vr_init(void *xsc) -{ - struct vr_softc *sc = xsc; - - VR_LOCK(sc); - vr_init_locked(sc); - VR_UNLOCK(sc); -} - -static void -vr_init_locked(struct vr_softc *sc) -{ - struct ifnet *ifp = sc->vr_ifp; - struct mii_data *mii; - int i; - - VR_LOCK_ASSERT(sc); - - mii = device_get_softc(sc->vr_miibus); - - /* Cancel pending I/O and free all RX/TX buffers. */ - vr_stop(sc); - vr_reset(sc); - - /* Set our station address. */ - for (i = 0; i < ETHER_ADDR_LEN; i++) - CSR_WRITE_1(sc, VR_PAR0 + i, IFP2ENADDR(sc->vr_ifp)[i]); - - /* Set DMA size. */ - VR_CLRBIT(sc, VR_BCR0, VR_BCR0_DMA_LENGTH); - VR_SETBIT(sc, VR_BCR0, VR_BCR0_DMA_STORENFWD); - - /* - * BCR0 and BCR1 can override the RXCFG and TXCFG registers, - * so we must set both. - */ - VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH); - VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTHRESH128BYTES); - - VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH); - VR_SETBIT(sc, VR_BCR1, VR_BCR1_TXTHRESHSTORENFWD); - - VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH); - VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_128BYTES); - - VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH); - VR_SETBIT(sc, VR_TXCFG, VR_TXTHRESH_STORENFWD); - - /* Init circular RX list. */ - if (vr_list_rx_init(sc) == ENOBUFS) { - printf( -"vr%d: initialization failed: no memory for rx buffers\n", sc->vr_unit); - vr_stop(sc); - return; - } - - /* Init tx descriptors. */ - vr_list_tx_init(sc); - - /* If we want promiscuous mode, set the allframes bit. */ - if (ifp->if_flags & IFF_PROMISC) - VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC); - else - VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC); - - /* Set capture broadcast bit to capture broadcast frames. */ - if (ifp->if_flags & IFF_BROADCAST) - VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD); - else - VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD); - - /* - * Program the multicast filter, if necessary. - */ - vr_setmulti(sc); - - /* - * Load the address of the RX list. - */ - CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr)); - - /* Enable receiver and transmitter. */ - CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START| - VR_CMD_TX_ON|VR_CMD_RX_ON| - VR_CMD_RX_GO); - - CSR_WRITE_4(sc, VR_TXADDR, vtophys(&sc->vr_ldata->vr_tx_list[0])); - - CSR_WRITE_2(sc, VR_ISR, 0xFFFF); -#ifdef DEVICE_POLLING - /* - * Disable interrupts if we are polling. - */ - if (ifp->if_flags & IFF_POLLING) - CSR_WRITE_2(sc, VR_IMR, 0); - else -#endif /* DEVICE_POLLING */ - /* - * Enable interrupts. - */ - CSR_WRITE_2(sc, VR_IMR, VR_INTRS); - - mii_mediachg(mii); - - ifp->if_flags |= IFF_RUNNING; - ifp->if_flags &= ~IFF_OACTIVE; - - sc->vr_stat_ch = timeout(vr_tick, sc, hz); -} - -/* - * Set media options. - */ -static int -vr_ifmedia_upd(struct ifnet *ifp) -{ - struct vr_softc *sc = ifp->if_softc; - - if (ifp->if_flags & IFF_UP) - vr_init(sc); - - return (0); -} - -/* - * Report current media status. - */ -static void -vr_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) -{ - struct vr_softc *sc = ifp->if_softc; - struct mii_data *mii; - - mii = device_get_softc(sc->vr_miibus); - VR_LOCK(sc); - mii_pollstat(mii); - VR_UNLOCK(sc); - ifmr->ifm_active = mii->mii_media_active; - ifmr->ifm_status = mii->mii_media_status; -} - -static int -vr_ioctl(struct ifnet *ifp, u_long command, caddr_t data) -{ - struct vr_softc *sc = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *) data; - struct mii_data *mii; - int error = 0; - - switch (command) { - case SIOCSIFFLAGS: - VR_LOCK(sc); - if (ifp->if_flags & IFF_UP) { - vr_init_locked(sc); - } else { - if (ifp->if_flags & IFF_RUNNING) - vr_stop(sc); - } - VR_UNLOCK(sc); - error = 0; - break; - case SIOCADDMULTI: - case SIOCDELMULTI: - VR_LOCK(sc); - vr_setmulti(sc); - VR_UNLOCK(sc); - error = 0; - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: - mii = device_get_softc(sc->vr_miibus); - error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); - break; - case SIOCSIFCAP: - ifp->if_capenable = ifr->ifr_reqcap; - break; - default: - error = ether_ioctl(ifp, command, data); - break; - } - - return (error); -} - -static void -vr_watchdog(struct ifnet *ifp) -{ - struct vr_softc *sc = ifp->if_softc; - - VR_LOCK(sc); - - ifp->if_oerrors++; - printf("vr%d: watchdog timeout\n", sc->vr_unit); - - vr_stop(sc); - vr_reset(sc); - vr_init_locked(sc); - - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - vr_start_locked(ifp); - - VR_UNLOCK(sc); -} - -/* - * Stop the adapter and free any mbufs allocated to the - * RX and TX lists. - */ -static void -vr_stop(struct vr_softc *sc) -{ - register int i; - struct ifnet *ifp; - - VR_LOCK_ASSERT(sc); - - ifp = sc->vr_ifp; - ifp->if_timer = 0; - - untimeout(vr_tick, sc, sc->vr_stat_ch); - ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); -#ifdef DEVICE_POLLING - ether_poll_deregister(ifp); -#endif /* DEVICE_POLLING */ - - VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP); - VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON)); - CSR_WRITE_2(sc, VR_IMR, 0x0000); - CSR_WRITE_4(sc, VR_TXADDR, 0x00000000); - CSR_WRITE_4(sc, VR_RXADDR, 0x00000000); - - /* - * Free data in the RX lists. - */ - for (i = 0; i < VR_RX_LIST_CNT; i++) { - if (sc->vr_cdata.vr_rx_chain[i].vr_mbuf != NULL) { - m_freem(sc->vr_cdata.vr_rx_chain[i].vr_mbuf); - sc->vr_cdata.vr_rx_chain[i].vr_mbuf = NULL; - } - } - bzero((char *)&sc->vr_ldata->vr_rx_list, - sizeof(sc->vr_ldata->vr_rx_list)); - - /* - * Free the TX list buffers. - */ - for (i = 0; i < VR_TX_LIST_CNT; i++) { - if (sc->vr_cdata.vr_tx_chain[i].vr_mbuf != NULL) { - m_freem(sc->vr_cdata.vr_tx_chain[i].vr_mbuf); - sc->vr_cdata.vr_tx_chain[i].vr_mbuf = NULL; - } - } - bzero((char *)&sc->vr_ldata->vr_tx_list, - sizeof(sc->vr_ldata->vr_tx_list)); -} - -/* - * Stop all chip I/O so that the kernel's probe routines don't - * get confused by errant DMAs when rebooting. - */ -static void -vr_shutdown(device_t dev) -{ - - vr_detach(dev); -} diff --git a/sys/dev/vr/if_vrreg.h b/sys/dev/vr/if_vrreg.h deleted file mode 100644 index 7d42656..0000000 --- a/sys/dev/vr/if_vrreg.h +++ /dev/null @@ -1,598 +0,0 @@ -/*- - * Copyright (c) 1997, 1998 - * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Bill Paul. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Rhine register definitions. - */ - -#define VR_PAR0 0x00 /* node address 0 to 4 */ -#define VR_PAR1 0x04 /* node address 2 to 6 */ -#define VR_RXCFG 0x06 /* receiver config register */ -#define VR_TXCFG 0x07 /* transmit config register */ -#define VR_COMMAND 0x08 /* command register */ -#define VR_ISR 0x0C /* interrupt/status register */ -#define VR_IMR 0x0E /* interrupt mask register */ -#define VR_MAR0 0x10 /* multicast hash 0 */ -#define VR_MAR1 0x14 /* multicast hash 1 */ -#define VR_RXADDR 0x18 /* rx descriptor list start addr */ -#define VR_TXADDR 0x1C /* tx descriptor list start addr */ -#define VR_CURRXDESC0 0x20 -#define VR_CURRXDESC1 0x24 -#define VR_CURRXDESC2 0x28 -#define VR_CURRXDESC3 0x2C -#define VR_NEXTRXDESC0 0x30 -#define VR_NEXTRXDESC1 0x34 -#define VR_NEXTRXDESC2 0x38 -#define VR_NEXTRXDESC3 0x3C -#define VR_CURTXDESC0 0x40 -#define VR_CURTXDESC1 0x44 -#define VR_CURTXDESC2 0x48 -#define VR_CURTXDESC3 0x4C -#define VR_NEXTTXDESC0 0x50 -#define VR_NEXTTXDESC1 0x54 -#define VR_NEXTTXDESC2 0x58 -#define VR_NEXTTXDESC3 0x5C -#define VR_CURRXDMA 0x60 /* current RX DMA address */ -#define VR_CURTXDMA 0x64 /* current TX DMA address */ -#define VR_TALLYCNT 0x68 /* tally counter test register */ -#define VR_PHYADDR 0x6C -#define VR_MIISTAT 0x6D -#define VR_BCR0 0x6E -#define VR_BCR1 0x6F -#define VR_MIICMD 0x70 -#define VR_MIIADDR 0x71 -#define VR_MIIDATA 0x72 -#define VR_EECSR 0x74 -#define VR_TEST 0x75 -#define VR_GPIO 0x76 -#define VR_CONFIG 0x78 -#define VR_MPA_CNT 0x7C -#define VR_CRC_CNT 0x7E -#define VR_STICKHW 0x83 - -/* Misc Registers */ -#define VR_MISC_CR1 0x81 -#define VR_MISCCR1_FORSRST 0x40 - -/* - * RX config bits. - */ -#define VR_RXCFG_RX_ERRPKTS 0x01 -#define VR_RXCFG_RX_RUNT 0x02 -#define VR_RXCFG_RX_MULTI 0x04 -#define VR_RXCFG_RX_BROAD 0x08 -#define VR_RXCFG_RX_PROMISC 0x10 -#define VR_RXCFG_RX_THRESH 0xE0 - -#define VR_RXTHRESH_32BYTES 0x00 -#define VR_RXTHRESH_64BYTES 0x20 -#define VR_RXTHRESH_128BYTES 0x40 -#define VR_RXTHRESH_256BYTES 0x60 -#define VR_RXTHRESH_512BYTES 0x80 -#define VR_RXTHRESH_768BYTES 0xA0 -#define VR_RXTHRESH_1024BYTES 0xC0 -#define VR_RXTHRESH_STORENFWD 0xE0 - -/* - * TX config bits. - */ -#define VR_TXCFG_RSVD0 0x01 -#define VR_TXCFG_LOOPBKMODE 0x06 -#define VR_TXCFG_BACKOFF 0x08 -#define VR_TXCFG_RSVD1 0x10 -#define VR_TXCFG_TX_THRESH 0xE0 - -#define VR_TXTHRESH_32BYTES 0x00 -#define VR_TXTHRESH_64BYTES 0x20 -#define VR_TXTHRESH_128BYTES 0x40 -#define VR_TXTHRESH_256BYTES 0x60 -#define VR_TXTHRESH_512BYTES 0x80 -#define VR_TXTHRESH_768BYTES 0xA0 -#define VR_TXTHRESH_1024BYTES 0xC0 -#define VR_TXTHRESH_STORENFWD 0xE0 - -/* - * Command register bits. - */ -#define VR_CMD_INIT 0x0001 -#define VR_CMD_START 0x0002 -#define VR_CMD_STOP 0x0004 -#define VR_CMD_RX_ON 0x0008 -#define VR_CMD_TX_ON 0x0010 -#define VR_CMD_TX_GO 0x0020 -#define VR_CMD_RX_GO 0x0040 -#define VR_CMD_RSVD 0x0080 -#define VR_CMD_RX_EARLY 0x0100 -#define VR_CMD_TX_EARLY 0x0200 -#define VR_CMD_FULLDUPLEX 0x0400 -#define VR_CMD_TX_NOPOLL 0x0800 - -#define VR_CMD_RESET 0x8000 - -/* - * Interrupt status bits. - */ -#define VR_ISR_RX_OK 0x0001 /* packet rx ok */ -#define VR_ISR_TX_OK 0x0002 /* packet tx ok */ -#define VR_ISR_RX_ERR 0x0004 /* packet rx with err */ -#define VR_ISR_TX_ABRT 0x0008 /* tx aborted due to excess colls */ -#define VR_ISR_TX_UNDERRUN 0x0010 /* tx buffer underflow */ -#define VR_ISR_RX_NOBUF 0x0020 /* no rx buffer available */ -#define VR_ISR_BUSERR 0x0040 /* PCI bus error */ -#define VR_ISR_STATSOFLOW 0x0080 /* stats counter oflow */ -#define VR_ISR_RX_EARLY 0x0100 /* rx early */ -#define VR_ISR_LINKSTAT 0x0200 /* MII status change */ -#define VR_ISR_ETI 0x0200 /* Tx early (3043/3071) */ -#define VR_ISR_UDFI 0x0200 /* Tx FIFO underflow (3065) */ -#define VR_ISR_RX_OFLOW 0x0400 /* rx FIFO overflow */ -#define VR_ISR_RX_DROPPED 0x0800 -#define VR_ISR_RX_NOBUF2 0x1000 -#define VR_ISR_TX_ABRT2 0x2000 -#define VR_ISR_LINKSTAT2 0x4000 -#define VR_ISR_MAGICPACKET 0x8000 - -/* - * Interrupt mask bits. - */ -#define VR_IMR_RX_OK 0x0001 /* packet rx ok */ -#define VR_IMR_TX_OK 0x0002 /* packet tx ok */ -#define VR_IMR_RX_ERR 0x0004 /* packet rx with err */ -#define VR_IMR_TX_ABRT 0x0008 /* tx aborted due to excess colls */ -#define VR_IMR_TX_UNDERRUN 0x0010 /* tx buffer underflow */ -#define VR_IMR_RX_NOBUF 0x0020 /* no rx buffer available */ -#define VR_IMR_BUSERR 0x0040 /* PCI bus error */ -#define VR_IMR_STATSOFLOW 0x0080 /* stats counter oflow */ -#define VR_IMR_RX_EARLY 0x0100 /* rx early */ -#define VR_IMR_LINKSTAT 0x0200 /* MII status change */ -#define VR_IMR_RX_OFLOW 0x0400 /* rx FIFO overflow */ -#define VR_IMR_RX_DROPPED 0x0800 -#define VR_IMR_RX_NOBUF2 0x1000 -#define VR_IMR_TX_ABRT2 0x2000 -#define VR_IMR_LINKSTAT2 0x4000 -#define VR_IMR_MAGICPACKET 0x8000 - -#define VR_INTRS \ - (VR_IMR_RX_OK|VR_IMR_TX_OK|VR_IMR_RX_NOBUF| \ - VR_IMR_TX_ABRT|VR_IMR_TX_UNDERRUN|VR_IMR_BUSERR| \ - VR_IMR_RX_ERR|VR_ISR_RX_DROPPED) - -/* - * MII status register. - */ - -#define VR_MIISTAT_SPEED 0x01 -#define VR_MIISTAT_LINKFAULT 0x02 -#define VR_MIISTAT_MGTREADERR 0x04 -#define VR_MIISTAT_MIIERR 0x08 -#define VR_MIISTAT_PHYOPT 0x10 -#define VR_MIISTAT_MDC_SPEED 0x20 -#define VR_MIISTAT_RSVD 0x40 -#define VR_MIISTAT_GPIO1POLL 0x80 - -/* - * MII command register bits. - */ -#define VR_MIICMD_CLK 0x01 -#define VR_MIICMD_DATAOUT 0x02 -#define VR_MIICMD_DATAIN 0x04 -#define VR_MIICMD_DIR 0x08 -#define VR_MIICMD_DIRECTPGM 0x10 -#define VR_MIICMD_WRITE_ENB 0x20 -#define VR_MIICMD_READ_ENB 0x40 -#define VR_MIICMD_AUTOPOLL 0x80 - -/* - * EEPROM control bits. - */ -#define VR_EECSR_DATAIN 0x01 /* data out */ -#define VR_EECSR_DATAOUT 0x02 /* data in */ -#define VR_EECSR_CLK 0x04 /* clock */ -#define VR_EECSR_CS 0x08 /* chip select */ -#define VR_EECSR_DPM 0x10 -#define VR_EECSR_LOAD 0x20 -#define VR_EECSR_EMBP 0x40 -#define VR_EECSR_EEPR 0x80 - -#define VR_EECMD_WRITE 0x140 -#define VR_EECMD_READ 0x180 -#define VR_EECMD_ERASE 0x1c0 - -/* - * Test register bits. - */ -#define VR_TEST_TEST0 0x01 -#define VR_TEST_TEST1 0x02 -#define VR_TEST_TEST2 0x04 -#define VR_TEST_TSTUD 0x08 -#define VR_TEST_TSTOV 0x10 -#define VR_TEST_BKOFF 0x20 -#define VR_TEST_FCOL 0x40 -#define VR_TEST_HBDES 0x80 - -/* - * Config register bits. - */ -#define VR_CFG_GPIO2OUTENB 0x00000001 -#define VR_CFG_GPIO2OUT 0x00000002 /* gen. purp. pin */ -#define VR_CFG_GPIO2IN 0x00000004 /* gen. purp. pin */ -#define VR_CFG_AUTOOPT 0x00000008 /* enable rx/tx autopoll */ -#define VR_CFG_MIIOPT 0x00000010 -#define VR_CFG_MMIENB 0x00000020 /* memory mapped mode enb */ -#define VR_CFG_JUMPER 0x00000040 /* PHY and oper. mode select */ -#define VR_CFG_EELOAD 0x00000080 /* enable EEPROM programming */ -#define VR_CFG_LATMENB 0x00000100 /* larency timer effect enb. */ -#define VR_CFG_MRREADWAIT 0x00000200 -#define VR_CFG_MRWRITEWAIT 0x00000400 -#define VR_CFG_RX_ARB 0x00000800 -#define VR_CFG_TX_ARB 0x00001000 -#define VR_CFG_READMULTI 0x00002000 -#define VR_CFG_TX_PACE 0x00004000 -#define VR_CFG_TX_QDIS 0x00008000 -#define VR_CFG_ROMSEL0 0x00010000 -#define VR_CFG_ROMSEL1 0x00020000 -#define VR_CFG_ROMSEL2 0x00040000 -#define VR_CFG_ROMTIMESEL 0x00080000 -#define VR_CFG_RSVD0 0x00100000 -#define VR_CFG_ROMDLY 0x00200000 -#define VR_CFG_ROMOPT 0x00400000 -#define VR_CFG_RSVD1 0x00800000 -#define VR_CFG_BACKOFFOPT 0x01000000 -#define VR_CFG_BACKOFFMOD 0x02000000 -#define VR_CFG_CAPEFFECT 0x04000000 -#define VR_CFG_BACKOFFRAND 0x08000000 -#define VR_CFG_MAGICKPACKET 0x10000000 -#define VR_CFG_PCIREADLINE 0x20000000 -#define VR_CFG_DIAG 0x40000000 -#define VR_CFG_GPIOEN 0x80000000 - -/* Sticky HW bits */ -#define VR_STICKHW_DS0 0x01 -#define VR_STICKHW_DS1 0x02 -#define VR_STICKHW_WOL_ENB 0x04 -#define VR_STICKHW_WOL_STS 0x08 -#define VR_STICKHW_LEGWOL_ENB 0x80 - -/* - * BCR0 register bits. (At least for the VT6102 chip.) - */ -#define VR_BCR0_DMA_LENGTH 0x07 - -#define VR_BCR0_DMA_32BYTES 0x00 -#define VR_BCR0_DMA_64BYTES 0x01 -#define VR_BCR0_DMA_128BYTES 0x02 -#define VR_BCR0_DMA_256BYTES 0x03 -#define VR_BCR0_DMA_512BYTES 0x04 -#define VR_BCR0_DMA_1024BYTES 0x05 -#define VR_BCR0_DMA_STORENFWD 0x07 - -#define VR_BCR0_RX_THRESH 0x38 - -#define VR_BCR0_RXTHRESHCFG 0x00 -#define VR_BCR0_RXTHRESH64BYTES 0x08 -#define VR_BCR0_RXTHRESH128BYTES 0x10 -#define VR_BCR0_RXTHRESH256BYTES 0x18 -#define VR_BCR0_RXTHRESH512BYTES 0x20 -#define VR_BCR0_RXTHRESH1024BYTES 0x28 -#define VR_BCR0_RXTHRESHSTORENFWD 0x38 -#define VR_BCR0_EXTLED 0x40 -#define VR_BCR0_MED2 0x80 - -/* - * BCR1 register bits. (At least for the VT6102 chip.) - */ -#define VR_BCR1_POT0 0x01 -#define VR_BCR1_POT1 0x02 -#define VR_BCR1_POT2 0x04 -#define VR_BCR1_TX_THRESH 0x38 -#define VR_BCR1_TXTHRESHCFG 0x00 -#define VR_BCR1_TXTHRESH64BYTES 0x08 -#define VR_BCR1_TXTHRESH128BYTES 0x10 -#define VR_BCR1_TXTHRESH256BYTES 0x18 -#define VR_BCR1_TXTHRESH512BYTES 0x20 -#define VR_BCR1_TXTHRESH1024BYTES 0x28 -#define VR_BCR1_TXTHRESHSTORENFWD 0x38 - -/* - * Rhine TX/RX list structure. - */ - -struct vr_desc { - u_int32_t vr_status; - u_int32_t vr_ctl; - u_int32_t vr_ptr1; - u_int32_t vr_ptr2; -}; - -#define vr_data vr_ptr1 -#define vr_next vr_ptr2 - - -#define VR_RXSTAT_RXERR 0x00000001 -#define VR_RXSTAT_CRCERR 0x00000002 -#define VR_RXSTAT_FRAMEALIGNERR 0x00000004 -#define VR_RXSTAT_FIFOOFLOW 0x00000008 -#define VR_RXSTAT_GIANT 0x00000010 -#define VR_RXSTAT_RUNT 0x00000020 -#define VR_RXSTAT_BUSERR 0x00000040 -#define VR_RXSTAT_BUFFERR 0x00000080 -#define VR_RXSTAT_LASTFRAG 0x00000100 -#define VR_RXSTAT_FIRSTFRAG 0x00000200 -#define VR_RXSTAT_RLINK 0x00000400 -#define VR_RXSTAT_RX_PHYS 0x00000800 -#define VR_RXSTAT_RX_BROAD 0x00001000 -#define VR_RXSTAT_RX_MULTI 0x00002000 -#define VR_RXSTAT_RX_OK 0x00004000 -#define VR_RXSTAT_RXLEN 0x07FF0000 -#define VR_RXSTAT_RXLEN_EXT 0x78000000 -#define VR_RXSTAT_OWN 0x80000000 - -#define VR_RXBYTES(x) ((x & VR_RXSTAT_RXLEN) >> 16) -#define VR_RXSTAT (VR_RXSTAT_FIRSTFRAG|VR_RXSTAT_LASTFRAG|VR_RXSTAT_OWN) - -#define VR_RXCTL_BUFLEN 0x000007FF -#define VR_RXCTL_BUFLEN_EXT 0x00007800 -#define VR_RXCTL_CHAIN 0x00008000 -#define VR_RXCTL_RX_INTR 0x00800000 - -#define VR_RXCTL (VR_RXCTL_CHAIN|VR_RXCTL_RX_INTR) - -#define VR_TXSTAT_DEFER 0x00000001 -#define VR_TXSTAT_UNDERRUN 0x00000002 -#define VR_TXSTAT_COLLCNT 0x00000078 -#define VR_TXSTAT_SQE 0x00000080 -#define VR_TXSTAT_ABRT 0x00000100 -#define VR_TXSTAT_LATECOLL 0x00000200 -#define VR_TXSTAT_CARRLOST 0x00000400 -#define VR_TXSTAT_UDF 0x00000800 -#define VR_TXSTAT_BUSERR 0x00002000 -#define VR_TXSTAT_JABTIMEO 0x00004000 -#define VR_TXSTAT_ERRSUM 0x00008000 -#define VR_TXSTAT_OWN 0x80000000 - -#define VR_TXCTL_BUFLEN 0x000007FF -#define VR_TXCTL_BUFLEN_EXT 0x00007800 -#define VR_TXCTL_TLINK 0x00008000 -#define VR_TXCTL_FIRSTFRAG 0x00200000 -#define VR_TXCTL_LASTFRAG 0x00400000 -#define VR_TXCTL_FINT 0x00800000 - - -#define VR_MAXFRAGS 16 -#define VR_RX_LIST_CNT 64 -#define VR_TX_LIST_CNT 128 -#define VR_MIN_FRAMELEN 60 -#define VR_FRAMELEN 1536 -#define VR_RXLEN 1520 - -#define VR_TXOWN(x) x->vr_ptr->vr_status - -struct vr_list_data { - struct vr_desc vr_rx_list[VR_RX_LIST_CNT]; - struct vr_desc vr_tx_list[VR_TX_LIST_CNT]; -}; - -struct vr_chain { - struct vr_desc *vr_ptr; - struct mbuf *vr_mbuf; - struct vr_chain *vr_nextdesc; -}; - -struct vr_chain_onefrag { - struct vr_desc *vr_ptr; - struct mbuf *vr_mbuf; - struct vr_chain_onefrag *vr_nextdesc; -}; - -struct vr_chain_data { - struct vr_chain_onefrag vr_rx_chain[VR_RX_LIST_CNT]; - struct vr_chain vr_tx_chain[VR_TX_LIST_CNT]; - - struct vr_chain_onefrag *vr_rx_head; - - struct vr_chain *vr_tx_cons; - struct vr_chain *vr_tx_prod; -}; - -struct vr_type { - u_int16_t vr_vid; - u_int16_t vr_did; - char *vr_name; -}; - -struct vr_mii_frame { - u_int8_t mii_stdelim; - u_int8_t mii_opcode; - u_int8_t mii_phyaddr; - u_int8_t mii_regaddr; - u_int8_t mii_turnaround; - u_int16_t mii_data; -}; - -/* - * MII constants - */ -#define VR_MII_STARTDELIM 0x01 -#define VR_MII_READOP 0x02 -#define VR_MII_WRITEOP 0x01 -#define VR_MII_TURNAROUND 0x02 - -#define VR_FLAG_FORCEDELAY 1 -#define VR_FLAG_SCHEDDELAY 2 -#define VR_FLAG_DELAYTIMEO 3 - -struct vr_softc { - struct ifnet *vr_ifp; /* interface info */ - bus_space_handle_t vr_bhandle; /* bus space handle */ - bus_space_tag_t vr_btag; /* bus space tag */ - struct resource *vr_res; - struct resource *vr_irq; - void *vr_intrhand; - device_t vr_miibus; - struct vr_type *vr_info; /* Rhine adapter info */ - u_int8_t vr_unit; /* interface number */ - u_int8_t vr_type; - u_int8_t vr_revid; /* Rhine chip revision */ - u_int8_t vr_flags; /* See VR_F_* below */ - struct vr_list_data *vr_ldata; - struct vr_chain_data vr_cdata; - struct callout_handle vr_stat_ch; - struct mtx vr_mtx; - int suspended; /* if 1, sleeping/detaching */ -#ifdef DEVICE_POLLING - int rxcycles; -#endif -}; - -#define VR_F_RESTART 0x01 /* Restart unit on next tick */ - -#define VR_LOCK(_sc) mtx_lock(&(_sc)->vr_mtx) -#define VR_UNLOCK(_sc) mtx_unlock(&(_sc)->vr_mtx) -#define VR_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vr_mtx, MA_OWNED) - -/* - * register space access macros - */ -#define CSR_WRITE_4(sc, reg, val) \ - bus_space_write_4(sc->vr_btag, sc->vr_bhandle, reg, val) -#define CSR_WRITE_2(sc, reg, val) \ - bus_space_write_2(sc->vr_btag, sc->vr_bhandle, reg, val) -#define CSR_WRITE_1(sc, reg, val) \ - bus_space_write_1(sc->vr_btag, sc->vr_bhandle, reg, val) - -#define CSR_READ_4(sc, reg) \ - bus_space_read_4(sc->vr_btag, sc->vr_bhandle, reg) -#define CSR_READ_2(sc, reg) \ - bus_space_read_2(sc->vr_btag, sc->vr_bhandle, reg) -#define CSR_READ_1(sc, reg) \ - bus_space_read_1(sc->vr_btag, sc->vr_bhandle, reg) - -#define VR_TIMEOUT 1000 -#define ETHER_ALIGN 2 - -/* - * General constants that are fun to know. - * - * VIA vendor ID - */ -#define VIA_VENDORID 0x1106 - -/* - * VIA Rhine device IDs. - */ -#define VIA_DEVICEID_RHINE 0x3043 -#define VIA_DEVICEID_RHINE_II 0x6100 -#define VIA_DEVICEID_RHINE_II_2 0x3065 -#define VIA_DEVICEID_RHINE_III 0x3106 -#define VIA_DEVICEID_RHINE_III_M 0x3053 - -/* - * Delta Electronics device ID. - */ -#define DELTA_VENDORID 0x1500 - -/* - * Delta device IDs. - */ -#define DELTA_DEVICEID_RHINE_II 0x1320 - -/* - * Addtron vendor ID. - */ -#define ADDTRON_VENDORID 0x4033 - -/* - * Addtron device IDs. - */ -#define ADDTRON_DEVICEID_RHINE_II 0x1320 - -/* - * VIA Rhine revision IDs - */ - -#define REV_ID_VT3043_E 0x04 -#define REV_ID_VT3071_A 0x20 -#define REV_ID_VT3071_B 0x21 -#define REV_ID_VT3065_A 0x40 -#define REV_ID_VT3065_B 0x41 -#define REV_ID_VT3065_C 0x42 -#define REV_ID_VT6102_APOLLO 0x74 -#define REV_ID_VT3106 0x80 -#define REV_ID_VT3106_J 0x80 /* 0x80-0x8F */ -#define REV_ID_VT3106_S 0x90 /* 0x90-0xA0 */ - -/* - * PCI low memory base and low I/O base register, and - * other PCI registers. - */ - -#define VR_PCI_VENDOR_ID 0x00 -#define VR_PCI_DEVICE_ID 0x02 -#define VR_PCI_COMMAND 0x04 -#define VR_PCI_STATUS 0x06 -#define VR_PCI_REVID 0x08 -#define VR_PCI_CLASSCODE 0x09 -#define VR_PCI_LATENCY_TIMER 0x0D -#define VR_PCI_HEADER_TYPE 0x0E -#define VR_PCI_LOIO 0x10 -#define VR_PCI_LOMEM 0x14 -#define VR_PCI_BIOSROM 0x30 -#define VR_PCI_INTLINE 0x3C -#define VR_PCI_INTPIN 0x3D -#define VR_PCI_MINGNT 0x3E -#define VR_PCI_MINLAT 0x0F -#define VR_PCI_RESETOPT 0x48 -#define VR_PCI_EEPROM_DATA 0x4C -#define VR_PCI_MODE 0x50 - -#define VR_MODE3_MIION 0x04 - -/* power management registers */ -#define VR_PCI_CAPID 0xDC /* 8 bits */ -#define VR_PCI_NEXTPTR 0xDD /* 8 bits */ -#define VR_PCI_PWRMGMTCAP 0xDE /* 16 bits */ -#define VR_PCI_PWRMGMTCTRL 0xE0 /* 16 bits */ - -#define VR_PSTATE_MASK 0x0003 -#define VR_PSTATE_D0 0x0000 -#define VR_PSTATE_D1 0x0002 -#define VR_PSTATE_D2 0x0002 -#define VR_PSTATE_D3 0x0003 -#define VR_PME_EN 0x0010 -#define VR_PME_STATUS 0x8000 - - -#ifdef __alpha__ -#undef vtophys -#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) -#endif |
