diff options
Diffstat (limited to 'sys/dev/hwpmc/hwpmc_piv.c')
| -rw-r--r-- | sys/dev/hwpmc/hwpmc_piv.c | 49 |
1 files changed, 25 insertions, 24 deletions
diff --git a/sys/dev/hwpmc/hwpmc_piv.c b/sys/dev/hwpmc/hwpmc_piv.c index ff47cb8..872ad89 100644 --- a/sys/dev/hwpmc/hwpmc_piv.c +++ b/sys/dev/hwpmc/hwpmc_piv.c @@ -563,7 +563,7 @@ p4_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[p4,%d] insane cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,0, "p4-init cpu=%d is-primary=%d", cpu, + PMCDBG2(MDP,INI,0, "p4-init cpu=%d is-primary=%d", cpu, pmc_cpu_is_primary(cpu) != 0); first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P4].pcd_ri; @@ -590,7 +590,7 @@ p4_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(plc != pc, ("[p4,%d] per-cpu config error", __LINE__)); - PMCDBG(MDP,INI,1, "p4-init cpu=%d phycpu=%d pc=%p", cpu, + PMCDBG3(MDP,INI,1, "p4-init cpu=%d phycpu=%d pc=%p", cpu, phycpu, pc); KASSERT(pc, ("[p4,%d] Null Per-Cpu state cpu=%d phycpu=%d", __LINE__, cpu, phycpu)); @@ -642,7 +642,7 @@ p4_pcpu_fini(struct pmc_mdep *md, int cpu) struct p4_cpu *p4c; struct pmc_cpu *pc; - PMCDBG(MDP,INI,0, "p4-cleanup cpu=%d", cpu); + PMCDBG1(MDP,INI,0, "p4-cleanup cpu=%d", cpu); pc = pmc_pcpu[cpu]; first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P4].pcd_ri; @@ -702,7 +702,7 @@ p4_read_pmc(int cpu, int ri, pmc_value_t *v) mode = PMC_TO_MODE(pm); - PMCDBG(MDP,REA,1, "p4-read cpu=%d ri=%d mode=%d", cpu, ri, mode); + PMCDBG3(MDP,REA,1, "p4-read cpu=%d ri=%d mode=%d", cpu, ri, mode); KASSERT(pd->pm_descr.pd_class == PMC_CLASS_P4, ("[p4,%d] unknown PMC class %d", __LINE__, pd->pm_descr.pd_class)); @@ -723,7 +723,7 @@ p4_read_pmc(int cpu, int ri, pmc_value_t *v) else *v = tmp; - PMCDBG(MDP,REA,2, "p4-read -> %jx", *v); + PMCDBG1(MDP,REA,2, "p4-read -> %jx", *v); return (0); } @@ -757,7 +757,7 @@ p4_write_pmc(int cpu, int ri, pmc_value_t v) mode = PMC_TO_MODE(pm); - PMCDBG(MDP,WRI,1, "p4-write cpu=%d ri=%d mode=%d v=%jx", cpu, ri, + PMCDBG4(MDP,WRI,1, "p4-write cpu=%d ri=%d mode=%d v=%jx", cpu, ri, mode, v); /* @@ -800,7 +800,7 @@ p4_config_pmc(int cpu, int ri, struct pmc *pm) KASSERT(ri >= 0 && ri < P4_NPMCS, ("[p4,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; phw = &pc->pc_p4pmcs[ri]; @@ -930,7 +930,7 @@ p4_allocate_pmc(int cpu, int ri, struct pmc *pm, pd = &p4_pmcdesc[ri]; - PMCDBG(MDP,ALL,1, "p4-allocate ri=%d class=%d pmccaps=0x%x " + PMCDBG4(MDP,ALL,1, "p4-allocate ri=%d class=%d pmccaps=0x%x " "reqcaps=0x%x", ri, pd->pm_descr.pd_class, pd->pm_descr.pd_caps, pm->pm_caps); @@ -965,7 +965,7 @@ p4_allocate_pmc(int cpu, int ri, struct pmc *pm, if ((pevent = p4_find_event(pm->pm_event)) == NULL) return (ESRCH); - PMCDBG(MDP,ALL,2, "pevent={ev=%d,escrsel=0x%x,cccrsel=0x%x,isti=%d}", + PMCDBG4(MDP,ALL,2, "pevent={ev=%d,escrsel=0x%x,cccrsel=0x%x,isti=%d}", pevent->pm_event, pevent->pm_escr_eventselect, pevent->pm_cccr_select, pevent->pm_is_ti_event); @@ -1105,7 +1105,7 @@ p4_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_p4.pm_p4_cccrvalue = cccrvalue; pm->pm_md.pm_p4.pm_p4_escrvalue = escrvalue; - PMCDBG(MDP,ALL,2, "p4-allocate cccrsel=0x%x cccrval=0x%x " + PMCDBG5(MDP,ALL,2, "p4-allocate cccrsel=0x%x cccrval=0x%x " "escr=%d escrmsr=0x%x escrval=0x%x", pevent->pm_cccr_select, cccrvalue, escr, pm->pm_md.pm_p4.pm_p4_escrmsr, escrvalue); @@ -1127,7 +1127,7 @@ p4_release_pmc(int cpu, int ri, struct pmc *pm) escr = pm->pm_md.pm_p4.pm_p4_escr; - PMCDBG(MDP,REL,1, "p4-release cpu=%d ri=%d escr=%d", cpu, ri, escr); + PMCDBG3(MDP,REL,1, "p4-release cpu=%d ri=%d escr=%d", cpu, ri, escr); if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; @@ -1171,7 +1171,7 @@ p4_start_pmc(int cpu, int ri) KASSERT(pm != NULL, ("[p4,%d] starting cpu%d,pmc%d with null pmc", __LINE__, cpu, ri)); - PMCDBG(MDP,STA,1, "p4-start cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STA,1, "p4-start cpu=%d ri=%d", cpu, ri); KASSERT(pd->pm_descr.pd_class == PMC_CLASS_P4, ("[p4,%d] wrong PMC class %d", __LINE__, @@ -1283,9 +1283,10 @@ p4_start_pmc(int cpu, int ri) mtx_unlock_spin(&pc->pc_mtx); - PMCDBG(MDP,STA,2,"p4-start cpu=%d rc=%d ri=%d escr=%d " - "escrmsr=0x%x escrvalue=0x%x cccr_config=0x%x v=%jx", cpu, rc, - ri, pm->pm_md.pm_p4.pm_p4_escr, escrmsr, escrvalue, + PMCDBG6(MDP,STA,2,"p4-start cpu=%d rc=%d ri=%d escr=%d " + "escrmsr=0x%x escrvalue=0x%x", cpu, rc, + ri, pm->pm_md.pm_p4.pm_p4_escr, escrmsr, escrvalue); + PMCDBG2(MDP,STA,2,"cccr_config=0x%x v=%jx", cccrvalue, P4_PCPU_HW_VALUE(pc,ri,cpu)); return (0); @@ -1317,7 +1318,7 @@ p4_stop_pmc(int cpu, int ri) KASSERT(pm != NULL, ("[p4,%d] null pmc for cpu%d, ri%d", __LINE__, cpu, ri)); - PMCDBG(MDP,STO,1, "p4-stop cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STO,1, "p4-stop cpu=%d ri=%d", cpu, ri); if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { wrmsr(pd->pm_cccr_msr, @@ -1385,9 +1386,9 @@ p4_stop_pmc(int cpu, int ri) mtx_unlock_spin(&pc->pc_mtx); - PMCDBG(MDP,STO,2, "p4-stop cpu=%d rc=%d ri=%d escrmsr=0x%x " - "escrval=0x%x cccrval=0x%x v=%jx", cpu, rc, ri, escrmsr, - escrvalue, cccrvalue, tmp); + PMCDBG5(MDP,STO,2, "p4-stop cpu=%d rc=%d ri=%d escrmsr=0x%x " + "escrval=0x%x", cpu, rc, ri, escrmsr, escrvalue); + PMCDBG2(MDP,STO,2, "cccrval=0x%x v=%jx", cccrvalue, tmp); if (tmp < P4_PCPU_HW_VALUE(pc,ri,cpu)) /* 40 bit counter overflow */ tmp += (P4_PERFCTR_MASK + 1) - P4_PCPU_HW_VALUE(pc,ri,cpu); @@ -1422,7 +1423,7 @@ p4_intr(int cpu, struct trapframe *tf) struct pmc *pm; pmc_value_t v; - PMCDBG(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, + PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, TRAPF_USERMODE(tf)); pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; @@ -1492,7 +1493,7 @@ p4_intr(int cpu, struct trapframe *tf) v = rdmsr(P4_PERFCTR_MSR_FIRST + ri); - PMCDBG(MDP,INT, 2, "ri=%d v=%jx", ri, v); + PMCDBG2(MDP,INT, 2, "ri=%d v=%jx", ri, v); /* Stop the counter, and reset the overflow bit */ cccrval &= ~(P4_CCCR_OVF | P4_CCCR_ENABLE); @@ -1568,7 +1569,7 @@ p4_describe(int cpu, int ri, struct pmc_info *pi, KASSERT(ri >= 0 && ri < P4_NPMCS, ("[p4,%d] row-index %d out of range", __LINE__, ri)); - PMCDBG(MDP,OPS,1,"p4-describe cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,OPS,1,"p4-describe cpu=%d ri=%d", cpu, ri); if (P4_CPU_IS_HTT_SECONDARY(cpu)) return (EINVAL); @@ -1604,7 +1605,7 @@ p4_get_msr(int ri, uint32_t *msr) *msr = p4_pmcdesc[ri].pm_pmc_msr - P4_PERFCTR_MSR_FIRST; - PMCDBG(MDP,OPS, 1, "ri=%d getmsr=0x%x", ri, *msr); + PMCDBG2(MDP,OPS, 1, "ri=%d getmsr=0x%x", ri, *msr); return 0; } @@ -1620,7 +1621,7 @@ pmc_p4_initialize(struct pmc_mdep *md, int ncpus) KASSERT(cpu_vendor_id == CPU_VENDOR_INTEL, ("[p4,%d] Initializing non-intel processor", __LINE__)); - PMCDBG(MDP,INI,1, "%s", "p4-initialize"); + PMCDBG0(MDP,INI,1, "p4-initialize"); /* Allocate space for pointers to per-cpu descriptors. */ p4_pcpu = malloc(sizeof(*p4_pcpu) * ncpus, M_PMC, M_ZERO | M_WAITOK); |
