diff options
Diffstat (limited to 'sys/dev/ct/bshw_machdep.c')
| -rw-r--r-- | sys/dev/ct/bshw_machdep.c | 396 |
1 files changed, 213 insertions, 183 deletions
diff --git a/sys/dev/ct/bshw_machdep.c b/sys/dev/ct/bshw_machdep.c index 6b375ab..c7995ce 100644 --- a/sys/dev/ct/bshw_machdep.c +++ b/sys/dev/ct/bshw_machdep.c @@ -1,13 +1,13 @@ /* $FreeBSD$ */ -/* $NecBSD: bshw_machdep.c,v 1.8 1999/07/23 20:54:00 honda Exp $ */ +/* $NecBSD: bshw_machdep.c,v 1.8.12.6 2001/06/29 06:28:05 honda Exp $ */ /* $NetBSD$ */ /* * [NetBSD for NEC PC-98 series] - * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999 + * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 * NetBSD/pc98 porting staff. All rights reserved. * - * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999 + * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 * Naofumi HONDA. All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -39,18 +39,19 @@ #include <sys/param.h> #include <sys/systm.h> #include <sys/kernel.h> -#include <sys/disklabel.h> +#if defined(__FreeBSD__) && __FreeBSD_version > 500001 #include <sys/bio.h> +#endif /* __ FreeBSD__ */ #include <sys/buf.h> #include <sys/queue.h> #include <sys/malloc.h> -#include <sys/device_port.h> #include <sys/errno.h> #include <vm/vm.h> -#include <vm/pmap.h> #ifdef __NetBSD__ +#include <sys/device.h> + #include <machine/bus.h> #include <machine/intr.h> @@ -66,6 +67,7 @@ #include <dev/ic/wd33c93reg.h> #include <i386/Cbus/dev/ct/ctvar.h> +#include <i386/Cbus/dev/ct/ct_machdep.h> #include <i386/Cbus/dev/ct/bshwvar.h> #endif /* __NetBSD__ */ @@ -73,7 +75,6 @@ #include <machine/bus.h> #include <machine/clock.h> #include <machine/md_var.h> -#include <machine/pmap.h> #include <machine/dvcfg.h> #include <machine/physio_proc.h> @@ -82,32 +83,50 @@ #include <dev/ic/wd33c93reg.h> #include <dev/ct/ctvar.h> +#include <dev/ct/ct_machdep.h> #include <dev/ct/bshwvar.h> + +#include <vm/pmap.h> +#endif /* __FreeBSD__ */ + +#define BSHW_IO_CONTROL_FLAGS 0 + +u_int bshw_io_control = BSHW_IO_CONTROL_FLAGS; +int bshw_data_read_bytes = 4096; +int bshw_data_write_bytes = 4096; + +/********************************************************* + * OS dep part + *********************************************************/ +#ifdef __NetBSD__ +#define BSHW_PAGE_SIZE NBPG +#endif /* __NetBSD__ */ + +#ifdef __FreeBSD__ +#define BSHW_PAGE_SIZE PAGE_SIZE +typedef unsigned long vaddr_t; #endif /* __FreeBSD__ */ /********************************************************* * GENERIC MACHDEP FUNCTIONS *********************************************************/ void -bshw_synch_setup(ct, li) +bshw_synch_setup(ct, ti) struct ct_softc *ct; - struct lun_info *li; + struct targ_info *ti; { - struct scsi_low_softc *slp = &ct->sc_sclow; - struct targ_info *ti = slp->sl_nexus; - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; struct ct_targ_info *cti = (void *) ti; struct bshw_softc *bs = ct->ct_hw; struct bshw *hw = bs->sc_hw; - if (hw->sregaddr == 0) + if (hw->hw_sregaddr == 0) return; - ct_cr_write_1(bst, bsh, hw->sregaddr + ti->ti_id, cti->cti_syncreg); + ct_cr_write_1(chp, hw->hw_sregaddr + ti->ti_id, cti->cti_syncreg); if (hw->hw_flags & BSHW_DOUBLE_DMACHAN) { - ct_cr_write_1(bst, bsh, hw->sregaddr + ti->ti_id + 8, + ct_cr_write_1(chp, hw->hw_sregaddr + ti->ti_id + 8, cti->cti_syncreg); } } @@ -117,8 +136,7 @@ bshw_bus_reset(ct) struct ct_softc *ct; { struct scsi_low_softc *slp = &ct->sc_sclow; - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; struct bshw_softc *bs = ct->ct_hw; struct bshw *hw = bs->sc_hw; bus_addr_t offs; @@ -126,53 +144,52 @@ bshw_bus_reset(ct) int i; /* open hardware busmaster mode */ - if (hw->dma_init != NULL && ((*hw->dma_init)(ct)) != 0) + if (hw->hw_dma_init != NULL && ((*hw->hw_dma_init)(ct)) != 0) { - printf("%s change mode using external DMA (%x)\n", - slp->sl_xname, (u_int)ct_cr_read_1(bst, bsh, 0x37)); + printf("%s: change mode using external DMA (%x)\n", + slp->sl_xname, (u_int)ct_cr_read_1(chp, 0x37)); } /* clear hardware synch registers */ - offs = hw->sregaddr; + offs = hw->hw_sregaddr; if (offs != 0) { for (i = 0; i < 8; i ++, offs ++) { - ct_cr_write_1(bst, bsh, offs, 0); + ct_cr_write_1(chp, offs, 0); if ((hw->hw_flags & BSHW_DOUBLE_DMACHAN) != 0) - ct_cr_write_1(bst, bsh, offs + 8, 0); + ct_cr_write_1(chp, offs + 8, 0); } } /* disable interrupt & assert reset */ - regv = ct_cr_read_1(bst, bsh, wd3s_mbank); + regv = ct_cr_read_1(chp, wd3s_mbank); regv |= MBR_RST; regv &= ~MBR_IEN; - ct_cr_write_1(bst, bsh, wd3s_mbank, regv); + ct_cr_write_1(chp, wd3s_mbank, regv); - delay(500000); + SCSI_LOW_DELAY(500000); /* reset signal off */ regv &= ~MBR_RST; - ct_cr_write_1(bst, bsh, wd3s_mbank, regv); + ct_cr_write_1(chp, wd3s_mbank, regv); /* interrupt enable */ regv |= MBR_IEN; - ct_cr_write_1(bst, bsh, wd3s_mbank, regv); + ct_cr_write_1(chp, wd3s_mbank, regv); } /* probe */ int -bshw_read_settings(bst, bsh, bs) - bus_space_tag_t bst; - bus_space_handle_t bsh; +bshw_read_settings(chp, bs) + struct ct_bus_access_handle *chp; struct bshw_softc *bs; { static int irq_tbl[] = { 3, 5, 6, 9, 12, 13 }; - bs->sc_hostid = (ct_cr_read_1(bst, bsh, wd3s_auxc) & AUXCR_HIDM); - bs->sc_irq = irq_tbl[(ct_cr_read_1(bst, bsh, wd3s_auxc) >> 3) & 7]; - bs->sc_drq = bus_space_read_1(bst, bsh, cmd_port) & 3; + bs->sc_hostid = (ct_cr_read_1(chp, wd3s_auxc) & AUXCR_HIDM); + bs->sc_irq = irq_tbl[(ct_cr_read_1(chp, wd3s_auxc) >> 3) & 7]; + bs->sc_drq = ct_cmdp_read_1(chp) & 3; return 0; } @@ -194,18 +211,17 @@ bshw_read_settings(bst, bsh, bs) #define SF_RDY 0x10 static __inline void bshw_lc_smit_start __P((struct ct_softc *, int, u_int)); -static int bshw_lc_smit_fstat __P((struct ct_softc *, int, int)); static __inline void bshw_lc_smit_stop __P((struct ct_softc *)); +static int bshw_lc_smit_fstat __P((struct ct_softc *, int, int)); static __inline void bshw_lc_smit_stop(ct) struct ct_softc *ct; { - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; - ct_cr_write_1(bst, bsh, BSHW_LC_FCTRL, 0); - bus_space_write_1(ct->sc_iot, ct->sc_ioh, cmd_port, CMDP_DMER); + ct_cr_write_1(chp, BSHW_LC_FCTRL, 0); + ct_cmdp_write_1(chp, CMDP_DMER); } static __inline void @@ -214,18 +230,17 @@ bshw_lc_smit_start(ct, count, direction) int count; u_int direction; { - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; u_int8_t pval, val; - val = ct_cr_read_1(bst, bsh, BSHW_LC_FSET); - cthw_set_count(bst, bsh, count); + val = ct_cr_read_1(chp, BSHW_LC_FSET); + cthw_set_count(chp, count); pval = FCTRL_EN; if (direction == SCSI_LOW_WRITE) pval |= (val & 0xe0) | FCTRL_WRITE; - ct_cr_write_1(bst, bsh, BSHW_LC_FCTRL, pval); - ct_cr_write_1(bst, bsh, wd3s_cmd, WD3S_TFR_INFO); + ct_cr_write_1(chp, BSHW_LC_FCTRL, pval); + ct_cr_write_1(chp, wd3s_cmd, WD3S_TFR_INFO); } static int @@ -233,12 +248,13 @@ bshw_lc_smit_fstat(ct, wc, read) struct ct_softc *ct; int wc, read; { + struct ct_bus_access_handle *chp = &ct->sc_ch; u_int8_t stat; while (wc -- > 0) { - outb(0x5f, 0); - stat = bus_space_read_1(ct->sc_iot, ct->sc_ioh, cmd_port); + chp->ch_bus_weight(chp); + stat = ct_cmdp_read_1(chp); if (read == SCSI_LOW_READ) { if ((stat & SF_RDY) != 0) @@ -268,68 +284,85 @@ bshw_smit_xfer_stop(ct) struct targ_info *ti; struct sc_p *sp = &slp->sl_scp; u_int count; - u_char *s; bshw_lc_smit_stop(ct); - ti = slp->sl_nexus; + ti = slp->sl_Tnexus; if (ti == NULL) return; if (ti->ti_phase == PH_DATA) { - count = cthw_get_count(ct->sc_iot, ct->sc_ioh); - if (count < (u_int) sp->scp_datalen) + count = cthw_get_count(&ct->sc_ch); + if (count < bs->sc_sdatalen) { - sp->scp_data += (sp->scp_datalen - count); - sp->scp_datalen = count; - /* XXX: - * strict double checks! - * target => wd33c93c transfer counts - * wd33c93c => memory transfer counts - */ if (sp->scp_direction == SCSI_LOW_READ && - count != bs->sc_tdatalen) - { - s = "read count miss"; + count != bs->sc_edatalen) goto bad; - } - return; + + count = bs->sc_sdatalen - count; + if (count > (u_int) sp->scp_datalen) + goto bad; + + sp->scp_data += count; + sp->scp_datalen -= count; } - else if (count == (u_int) sp->scp_datalen) + else if (count > bs->sc_sdatalen) { - return; +bad: + printf("%s: smit_xfer_end: cnt error\n", slp->sl_xname); + slp->sl_error |= PDMAERR; } - - s = "strange count"; + scsi_low_data_finish(slp); } else - s = "extra smit interrupt"; - -bad: - printf("%s: smit_xfer_end: %s", slp->sl_xname, s); - slp->sl_error |= PDMAERR; + { + printf("%s: smit_xfer_end: phase miss\n", slp->sl_xname); + slp->sl_error |= PDMAERR; + } } -void +int bshw_smit_xfer_start(ct) struct ct_softc *ct; { struct scsi_low_softc *slp = &ct->sc_sclow; + struct ct_bus_access_handle *chp = &ct->sc_ch; struct bshw_softc *bs = ct->ct_hw; struct sc_p *sp = &slp->sl_scp; - struct targ_info *ti = slp->sl_nexus; + struct targ_info *ti = slp->sl_Tnexus; struct ct_targ_info *cti = (void *) ti; - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; - int datalen, count, wc = LC_SMIT_TIMEOUT * 1024 * 1024; + u_int datalen, count, io_control; + int wc; u_int8_t *data; - data = sp->scp_data; + io_control = bs->sc_io_control | bshw_io_control; + if ((io_control & BSHW_SMIT_BLOCK) != 0) + return EINVAL; + + if ((slp->sl_scp.scp_datalen % DEV_BSIZE) != 0) + return EINVAL; + datalen = sp->scp_datalen; + if (slp->sl_scp.scp_direction == SCSI_LOW_READ) + { + if ((io_control & BSHW_READ_INTERRUPT_DRIVEN) != 0 && + datalen > bshw_data_read_bytes) + datalen = bshw_data_read_bytes; + } + else + { + if ((io_control & BSHW_WRITE_INTERRUPT_DRIVEN) != 0 && + datalen > bshw_data_write_bytes) + datalen = bshw_data_write_bytes; + } + + bs->sc_sdatalen = datalen; + data = sp->scp_data; + wc = LC_SMIT_TIMEOUT * 1024 * 1024; - ct_cr_write_1(bst, bsh, wd3s_ctrl, ct->sc_creg | CR_DMA); - bshw_lc_smit_start(ct, sp->scp_datalen, sp->scp_direction); + ct_cr_write_1(chp, wd3s_ctrl, ct->sc_creg | CR_DMA); + bshw_lc_smit_start(ct, datalen, sp->scp_direction); if (sp->scp_direction == SCSI_LOW_READ) { @@ -339,14 +372,14 @@ bshw_smit_xfer_start(ct) break; count = (datalen > LC_FSZ ? LC_FSZ : datalen); - bus_space_read_region_4(ct->sc_memt, ct->sc_memh, + bus_space_read_region_4(chp->ch_memt, chp->ch_memh, LC_SMIT_OFFSET, (u_int32_t *) data, count >> 2); data += count; datalen -= count; } while (datalen > 0); - bs->sc_tdatalen = datalen; + bs->sc_edatalen = datalen; } else { @@ -365,7 +398,7 @@ bshw_smit_xfer_start(ct) } count = (datalen > LC_SFSZ ? LC_SFSZ : datalen); - bus_space_write_region_4(ct->sc_memt, ct->sc_memh, + bus_space_write_region_4(chp->ch_memt, chp->ch_memh, LC_SMIT_OFFSET, (u_int32_t *) data, count >> 2); data += count; datalen -= count; @@ -374,7 +407,7 @@ bshw_smit_xfer_start(ct) break; count = (datalen > LC_REST ? LC_REST : datalen); - bus_space_write_region_4(ct->sc_memt, ct->sc_memh, + bus_space_write_region_4(chp->ch_memt, chp->ch_memh, LC_SMIT_OFFSET + LC_SFSZ, (u_int32_t *) data, count >> 2); data += count; @@ -382,26 +415,33 @@ bshw_smit_xfer_start(ct) } while (datalen > 0); } + return 0; } /********************************************************* * DMA TRANSFER (BS) *********************************************************/ +static __inline void bshw_dma_write_1 \ + __P((struct ct_bus_access_handle *, bus_addr_t, u_int8_t)); static void bshw_dmastart __P((struct ct_softc *)); static void bshw_dmadone __P((struct ct_softc *)); -void +int bshw_dma_xfer_start(ct) struct ct_softc *ct; { struct scsi_low_softc *slp = &ct->sc_sclow; struct sc_p *sp = &slp->sl_scp; + struct ct_bus_access_handle *chp = &ct->sc_ch; struct bshw_softc *bs = ct->ct_hw; - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; vaddr_t va, endva, phys, nphys; + u_int io_control; + + io_control = bs->sc_io_control | bshw_io_control; + if ((io_control & BSHW_DMA_BLOCK) != 0 && sp->scp_datalen < 256) + return EINVAL; - ct_cr_write_1(bst, bsh, wd3s_ctrl, ct->sc_creg | CR_DMA); + ct_cr_write_1(chp, wd3s_ctrl, ct->sc_creg | CR_DMA); phys = vtophys((vaddr_t) sp->scp_data); if (phys >= bs->sc_minphys) { @@ -421,19 +461,17 @@ bshw_dma_xfer_start(ct) /* setup segaddr */ bs->sc_segaddr = (u_int8_t *) phys; /* setup seglen */ - endva = (vaddr_t)round_page((vaddr_t)(sp->scp_data + - sp->scp_datalen)); + endva = (vaddr_t) round_page((vaddr_t) sp->scp_data + sp->scp_datalen); for (va = (vaddr_t) sp->scp_data; ; phys = nphys) { - if ((va += PAGE_SIZE) >= endva) + if ((va += BSHW_PAGE_SIZE) >= endva) { bs->sc_seglen = sp->scp_datalen; break; } nphys = vtophys(va); - if (phys + PAGE_SIZE != nphys || - nphys >= bs->sc_minphys) + if (phys + BSHW_PAGE_SIZE != nphys || nphys >= bs->sc_minphys) { bs->sc_seglen = (u_int8_t *) trunc_page(va) - sp->scp_data; @@ -445,7 +483,9 @@ bshw_dma_xfer_start(ct) } bshw_dmastart(ct); - cthw_set_count(bst, bsh, bs->sc_seglen); + cthw_set_count(chp, bs->sc_seglen); + ct_cr_write_1(chp, wd3s_cmd, WD3S_TFR_INFO); + return 0; } void @@ -460,13 +500,13 @@ bshw_dma_xfer_stop(ct) bshw_dmadone(ct); - ti = slp->sl_nexus; + ti = slp->sl_Tnexus; if (ti == NULL) return; if (ti->ti_phase == PH_DATA) { - count = cthw_get_count(ct->sc_iot, ct->sc_ioh); + count = cthw_get_count(&ct->sc_ch); if (count < (u_int) bs->sc_seglen) { transbytes = bs->sc_seglen - count; @@ -474,31 +514,27 @@ bshw_dma_xfer_stop(ct) sp->scp_direction == SCSI_LOW_READ) bcopy(bs->sc_bufp, sp->scp_data, transbytes); - bs->sc_bufp = NULL; sp->scp_data += transbytes; sp->scp_datalen -= transbytes; - return; } - else if (count == (u_int) bs->sc_seglen) + else if (count > (u_int) bs->sc_seglen) { - bs->sc_bufp = NULL; - return; + printf("%s: port data %x != seglen %x\n", + slp->sl_xname, count, bs->sc_seglen); + slp->sl_error |= PDMAERR; } - printf("%s: port data %x != seglen %x\n", - slp->sl_xname, count, bs->sc_seglen); + scsi_low_data_finish(slp); } else { printf("%s: extra DMA interrupt\n", slp->sl_xname); + slp->sl_error |= PDMAERR; } - slp->sl_error |= PDMAERR; bs->sc_bufp = NULL; } -static int dmapageport[4] = { 0x27, 0x21, 0x23, 0x25 }; - /* common dma settings */ #undef DMA1_SMSK #define DMA1_SMSK (0x15) @@ -514,56 +550,64 @@ static int dmapageport[4] = { 0x27, 0x21, 0x23, 0x25 }; #define DMA37MD_READ 0x08 #define DMA37MD_SINGLE 0x40 +static bus_addr_t dmapageport[4] = { 0x27, 0x21, 0x23, 0x25 }; + +static __inline void +bshw_dma_write_1(chp, port, val) + struct ct_bus_access_handle *chp; + bus_addr_t port; + u_int8_t val; +{ + + CT_BUS_WEIGHT(chp); + outb(port, val); +} + static void bshw_dmastart(ct) struct ct_softc *ct; { struct scsi_low_softc *slp = &ct->sc_sclow; struct bshw_softc *bs = ct->ct_hw; - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; int chan = bs->sc_drq; - int waport; - u_int8_t *phys = bs->sc_segaddr; + bus_addr_t waport; + u_int8_t regv, *phys = bs->sc_segaddr; u_int nbytes = bs->sc_seglen; + /* flush cpu cache */ + (*bs->sc_dmasync_before) (ct); + /* * Program one of DMA channels 0..3. These are * byte mode channels. */ /* set dma channel mode, and reset address ff */ -#ifdef __FreeBSD__ - if (need_pre_dma_flush) - wbinvd(); -#else - if (slp->sl_scp.scp_direction == SCSI_LOW_READ) - cpu_cf_preRead(curcpu); - else - cpu_cf_preWrite(curcpu); -#endif if (slp->sl_scp.scp_direction == SCSI_LOW_READ) - outb(DMA1_MODE, DMA37MD_SINGLE | DMA37MD_WRITE | chan); + regv = DMA37MD_WRITE | DMA37MD_SINGLE | chan; else - outb(DMA1_MODE, DMA37MD_SINGLE | DMA37MD_READ | chan); - outb(DMA1_FFC, 0); + regv = DMA37MD_READ | DMA37MD_SINGLE | chan; + + bshw_dma_write_1(chp, DMA1_MODE, regv); + bshw_dma_write_1(chp, DMA1_FFC, 0); /* send start address */ waport = DMA1_CHN(chan); - outb(waport, (u_int) phys); - outb(waport, ((u_int) phys) >> 8); - outb(dmapageport[chan], ((u_int) phys) >> 16); + bshw_dma_write_1(chp, waport, (u_int) phys); + bshw_dma_write_1(chp, waport, ((u_int) phys) >> 8); + bshw_dma_write_1(chp, dmapageport[chan], ((u_int) phys) >> 16); /* send count */ - outb(waport + 2, --nbytes); - outb(waport + 2, nbytes >> 8); + bshw_dma_write_1(chp, waport + 2, --nbytes); + bshw_dma_write_1(chp, waport + 2, nbytes >> 8); /* vendor unique hook */ - if (bs->sc_hw->dma_start) - (*bs->sc_hw->dma_start)(ct); + if (bs->sc_hw->hw_dma_start) + (*bs->sc_hw->hw_dma_start)(ct); - outb(DMA1_SMSK, chan); - bus_space_write_1(bst, bsh, cmd_port, CMDP_DMES); + bshw_dma_write_1(chp, DMA1_SMSK, chan); + ct_cmdp_write_1(chp, CMDP_DMES); } static void @@ -571,25 +615,17 @@ bshw_dmadone(ct) struct ct_softc *ct; { struct bshw_softc *bs = ct->ct_hw; - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; - outb(DMA1_SMSK, (bs->sc_drq | DMA37SM_SET)); - bus_space_write_1(bst, bsh, cmd_port, CMDP_DMER); + bshw_dma_write_1(chp, DMA1_SMSK, (bs->sc_drq | DMA37SM_SET)); + ct_cmdp_write_1(chp, CMDP_DMER); /* vendor unique hook */ - if (bs->sc_hw->dma_stop) - (*bs->sc_hw->dma_stop)(ct); + if (bs->sc_hw->hw_dma_stop) + (*bs->sc_hw->hw_dma_stop) (ct); -#ifdef __FreeBSD__ - if (need_post_dma_flush) - invd(); -#else - if (slp->sl_scp.scp_direction == SCSI_LOW_READ) - cpu_cf_postRead(curcpu); - else - cpu_cf_postWrite(curcpu); -#endif + /* flush cpu cache */ + (*bs->sc_dmasync_after) (ct); } /********************************************** @@ -606,16 +642,15 @@ static int bshw_dma_init_texa(ct) struct ct_softc *ct; { - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; u_int8_t regval; - if ((regval = ct_cr_read_1(bst, bsh, 0x37)) & 0x08) + if ((regval = ct_cr_read_1(chp, 0x37)) & 0x08) return 0; - ct_cr_write_1(bst, bsh, 0x37, regval | 0x08); - regval = ct_cr_read_1(bst, bsh, 0x3f); - ct_cr_write_1(bst, bsh, 0x3f, regval | 0x08); + ct_cr_write_1(chp, 0x37, regval | 0x08); + regval = ct_cr_read_1(chp, 0x3f); + ct_cr_write_1(chp, 0x3f, regval | 0x08); return 1; } @@ -623,26 +658,25 @@ static int bshw_dma_init_sc98(ct) struct ct_softc *ct; { - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; - if (ct_cr_read_1(bst, bsh, 0x37) & 0x08) + if (ct_cr_read_1(chp, 0x37) & 0x08) return 0; /* If your card is SC98 with bios ver 1.01 or 1.02 under no PCI */ - ct_cr_write_1(bst, bsh, 0x37, 0x1a); - ct_cr_write_1(bst, bsh, 0x3f, 0x1a); + ct_cr_write_1(chp, 0x37, 0x1a); + ct_cr_write_1(chp, 0x3f, 0x1a); #if 0 /* only valid for IO */ - ct_cr_write_1(bst, bsh, 0x40, 0xf4); - ct_cr_write_1(bst, bsh, 0x41, 0x9); - ct_cr_write_1(bst, bsh, 0x43, 0xff); - ct_cr_write_1(bst, bsh, 0x46, 0x4e); - - ct_cr_write_1(bst, bsh, 0x48, 0xf4); - ct_cr_write_1(bst, bsh, 0x49, 0x9); - ct_cr_write_1(bst, bsh, 0x4b, 0xff); - ct_cr_write_1(bst, bsh, 0x4e, 0x4e); + ct_cr_write_1(chp, 0x40, 0xf4); + ct_cr_write_1(chp, 0x41, 0x9); + ct_cr_write_1(chp, 0x43, 0xff); + ct_cr_write_1(chp, 0x46, 0x4e); + + ct_cr_write_1(chp, 0x48, 0xf4); + ct_cr_write_1(chp, 0x49, 0x9); + ct_cr_write_1(chp, 0x4b, 0xff); + ct_cr_write_1(chp, 0x4e, 0x4e); #endif return 1; } @@ -651,44 +685,40 @@ static void bshw_dma_start_sc98(ct) struct ct_softc *ct; { - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; - ct_cr_write_1(bst, bsh, 0x73, 0x32); - ct_cr_write_1(bst, bsh, 0x74, 0x23); + ct_cr_write_1(chp, 0x73, 0x32); + ct_cr_write_1(chp, 0x74, 0x23); } static void bshw_dma_stop_sc98(ct) struct ct_softc *ct; { - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; + struct ct_bus_access_handle *chp = &ct->sc_ch; - ct_cr_write_1(bst, bsh, 0x73, 0x43); - ct_cr_write_1(bst, bsh, 0x74, 0x34); + ct_cr_write_1(chp, 0x73, 0x43); + ct_cr_write_1(chp, 0x74, 0x34); } static void bshw_dma_start_elecom(ct) struct ct_softc *ct; { - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; - u_int8_t tmp = ct_cr_read_1(bst, bsh, 0x4c); + struct ct_bus_access_handle *chp = &ct->sc_ch; + u_int8_t tmp = ct_cr_read_1(chp, 0x4c); - ct_cr_write_1(bst, bsh, 0x32, tmp & 0xdf); + ct_cr_write_1(chp, 0x32, tmp & 0xdf); } static void bshw_dma_stop_elecom(ct) struct ct_softc *ct; { - bus_space_tag_t bst = ct->sc_iot; - bus_space_handle_t bsh = ct->sc_ioh; - u_int8_t tmp = ct_cr_read_1(bst, bsh, 0x4c); + struct ct_bus_access_handle *chp = &ct->sc_ch; + u_int8_t tmp = ct_cr_read_1(chp, 0x4c); - ct_cr_write_1(bst, bsh, 0x32, tmp | 0x20); + ct_cr_write_1(chp, 0x32, tmp | 0x20); } static struct bshw bshw_generic = { |
