diff options
Diffstat (limited to 'sys/contrib/octeon-sdk/cvmx-spx0-defs.h')
| -rw-r--r-- | sys/contrib/octeon-sdk/cvmx-spx0-defs.h | 26 |
1 files changed, 11 insertions, 15 deletions
diff --git a/sys/contrib/octeon-sdk/cvmx-spx0-defs.h b/sys/contrib/octeon-sdk/cvmx-spx0-defs.h index ff5b5a4..596b6fe 100644 --- a/sys/contrib/octeon-sdk/cvmx-spx0-defs.h +++ b/sys/contrib/octeon-sdk/cvmx-spx0-defs.h @@ -1,5 +1,5 @@ /***********************license start*************** - * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights + * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights * reserved. * * @@ -15,7 +15,7 @@ * disclaimer in the documentation and/or other materials provided * with the distribution. - * * Neither the name of Cavium Networks nor the names of + * * Neither the name of Cavium Inc. nor the names of * its contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. @@ -26,7 +26,7 @@ * countries. * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" - * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR + * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM @@ -49,8 +49,8 @@ * <hr>$Revision$<hr> * */ -#ifndef __CVMX_SPX0_TYPEDEFS_H__ -#define __CVMX_SPX0_TYPEDEFS_H__ +#ifndef __CVMX_SPX0_DEFS_H__ +#define __CVMX_SPX0_DEFS_H__ #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_SPX0_PLL_BW_CTL CVMX_SPX0_PLL_BW_CTL_FUNC() @@ -78,12 +78,10 @@ static inline uint64_t CVMX_SPX0_PLL_SETTING_FUNC(void) /** * cvmx_spx0_pll_bw_ctl */ -union cvmx_spx0_pll_bw_ctl -{ +union cvmx_spx0_pll_bw_ctl { uint64_t u64; - struct cvmx_spx0_pll_bw_ctl_s - { -#if __BYTE_ORDER == __BIG_ENDIAN + struct cvmx_spx0_pll_bw_ctl_s { +#ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_5_63 : 59; uint64_t bw_ctl : 5; /**< Core PLL bandwidth control */ #else @@ -99,12 +97,10 @@ typedef union cvmx_spx0_pll_bw_ctl cvmx_spx0_pll_bw_ctl_t; /** * cvmx_spx0_pll_setting */ -union cvmx_spx0_pll_setting -{ +union cvmx_spx0_pll_setting { uint64_t u64; - struct cvmx_spx0_pll_setting_s - { -#if __BYTE_ORDER == __BIG_ENDIAN + struct cvmx_spx0_pll_setting_s { +#ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63 : 47; uint64_t setting : 17; /**< Core PLL setting */ #else |
