1 files changed, 12 insertions, 32 deletions
diff --git a/sys/arm/mv/orion/orion.c b/sys/arm/mv/orion/orion.c
index 8eb4908a..5ee3bac 100644
--- a/sys/arm/mv/orion/orion.c
+++ b/sys/arm/mv/orion/orion.c
@@ -41,10 +41,7 @@ __FBSDID("$FreeBSD$");
 #include <arm/mv/mvreg.h>
 #include <arm/mv/mvvar.h>
 
-#if 0
-#include <arm/mv/mv_pci.h>
 extern int platform_pci_get_irq(u_int bus, u_int slot, u_int func, u_int pin);
-#endif
 
 struct obio_device obio_devices[] = {
 	{ "ic", MV_IC_BASE, MV_IC_SIZE,
@@ -94,31 +91,26 @@ struct obio_device obio_devices[] = {
 		{ -1 }, { -1 },
 		CPU_PM_CTRL_NONE
 	},
-	{ "pcib", MV_PCIE_BASE, MV_PCIE_SIZE,
-		{ MV_INT_PEX0_ERR, -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-        },
-	{ "pcib", MV_PCI_BASE, MV_PCI_SIZE,
-		{ MV_INT_PCI_ERR, -1 },
-		{-1 },
-		CPU_PM_CTRL_NONE
-        },
 	{ NULL, 0, 0, { 0 } }
 };
 
-#if 0
-const struct mv_pci_info pci_info[] = {
-	{ 1,	MV_PCIE_IO_BASE, MV_PCIE_IO_SIZE,
-		MV_PCIE_MEM_BASE, MV_PCIE_MEM_SIZE,
+const struct obio_pci mv_pci_info[] = {
+	{ MV_TYPE_PCIE,
+		MV_PCIE_BASE,	MV_PCIE_SIZE,
+		MV_PCIE_IO_BASE, MV_PCIE_IO_SIZE,	4, 0x51,
+		MV_PCIE_MEM_BASE, MV_PCIE_MEM_SIZE,	4, 0x59,
 		NULL, MV_INT_PEX0
 	},
-	{ 0,	MV_PCI_IO_BASE, MV_PCI_IO_SIZE,
-		MV_PCI_MEM_BASE, MV_PCI_MEM_SIZE,
+
+	{ MV_TYPE_PCI,
+		MV_PCI_BASE, MV_PCI_SIZE,
+		MV_PCI_IO_BASE, MV_PCI_IO_SIZE,		3, 0x51,
+		MV_PCI_MEM_BASE, MV_PCI_MEM_SIZE,	3, 0x59,
 		platform_pci_get_irq, -1
 	},
+
+	{ 0, 0, 0 }
 };
-#endif
 
 struct resource_spec mv_gpio_spec[] = {
 	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
@@ -130,18 +122,6 @@ struct resource_spec mv_gpio_spec[] = {
 };
 
 const struct decode_win cpu_win_tbl[] = {
-	/* PCIE IO */
-	{ 4, 0x51, MV_PCIE_IO_PHYS_BASE, MV_PCIE_IO_SIZE, -1 },
-
-	/* PCI IO */
-	{ 3, 0x51, MV_PCI_IO_PHYS_BASE, MV_PCI_IO_SIZE, -1 },
-
-	/* PCIE MEM */
-	{ 4, 0x59, MV_PCIE_MEM_PHYS_BASE, MV_PCIE_MEM_SIZE, -1 },
-
-	/* PCI MEM */
-	{ 3, 0x59, MV_PCI_MEM_PHYS_BASE, MV_PCI_MEM_SIZE, -1 },
-
 	/* Device bus BOOT */
 	{ 1, 0x0f, MV_DEV_BOOT_PHYS_BASE, MV_DEV_BOOT_SIZE, -1 },