diff options
Diffstat (limited to 'sys/arm/allwinner/a20')
| -rw-r--r-- | sys/arm/allwinner/a20/a20_cpu_cfg.c | 136 | ||||
| -rw-r--r-- | sys/arm/allwinner/a20/a20_cpu_cfg.h | 67 | ||||
| -rw-r--r-- | sys/arm/allwinner/a20/files.a20 | 21 | ||||
| -rw-r--r-- | sys/arm/allwinner/a20/std.a20 | 26 |
4 files changed, 250 insertions, 0 deletions
diff --git a/sys/arm/allwinner/a20/a20_cpu_cfg.c b/sys/arm/allwinner/a20/a20_cpu_cfg.c new file mode 100644 index 0000000..6b6345c --- /dev/null +++ b/sys/arm/allwinner/a20/a20_cpu_cfg.c @@ -0,0 +1,136 @@ +/*- + * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* CPU configuration module for Allwinner A20 */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/malloc.h> +#include <sys/rman.h> +#include <sys/timeet.h> +#include <sys/timetc.h> +#include <sys/watchdog.h> +#include <machine/bus.h> +#include <machine/cpu.h> +#include <machine/frame.h> +#include <machine/intr.h> + +#include <dev/fdt/fdt_common.h> +#include <dev/ofw/openfirm.h> +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + +#include <machine/bus.h> +#include <machine/fdt.h> + +#include "a20_cpu_cfg.h" + +struct a20_cpu_cfg_softc { + struct resource *res; + bus_space_tag_t bst; + bus_space_handle_t bsh; +}; + +static struct a20_cpu_cfg_softc *a20_cpu_cfg_sc = NULL; + +#define cpu_cfg_read_4(sc, reg) \ + bus_space_read_4((sc)->bst, (sc)->bsh, (reg)) +#define cpu_cfg_write_4(sc, reg, val) \ + bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val)) + +static int +a20_cpu_cfg_probe(device_t dev) +{ + + if (ofw_bus_is_compatible(dev, "allwinner,sun7i-cpu-cfg")) { + device_set_desc(dev, "A20 CPU Configuration Module"); + return(BUS_PROBE_DEFAULT); + } + + return (ENXIO); +} + +static int +a20_cpu_cfg_attach(device_t dev) +{ + struct a20_cpu_cfg_softc *sc = device_get_softc(dev); + int rid = 0; + + if (a20_cpu_cfg_sc) + return (ENXIO); + + sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + if (!sc->res) { + device_printf(dev, "could not allocate resource\n"); + return (ENXIO); + } + + sc->bst = rman_get_bustag(sc->res); + sc->bsh = rman_get_bushandle(sc->res); + + a20_cpu_cfg_sc = sc; + + return (0); +} + +static device_method_t a20_cpu_cfg_methods[] = { + DEVMETHOD(device_probe, a20_cpu_cfg_probe), + DEVMETHOD(device_attach, a20_cpu_cfg_attach), + { 0, 0 } +}; + +static driver_t a20_cpu_cfg_driver = { + "a20_cpu_cfg", + a20_cpu_cfg_methods, + sizeof(struct a20_cpu_cfg_softc), +}; + +static devclass_t a20_cpu_cfg_devclass; + +DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, a20_cpu_cfg_devclass, 0, 0); + +uint64_t +a20_read_counter64(void) +{ + uint32_t lo, hi; + + /* Latch counter, wait for it to be ready to read. */ + cpu_cfg_write_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG, CNT64_RL_EN); + while (cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG) & CNT64_RL_EN) + continue; + + hi = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_HIGH_REG); + lo = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_LOW_REG); + + return (((uint64_t)hi << 32) | lo); +} + diff --git a/sys/arm/allwinner/a20/a20_cpu_cfg.h b/sys/arm/allwinner/a20/a20_cpu_cfg.h new file mode 100644 index 0000000..f218e6c --- /dev/null +++ b/sys/arm/allwinner/a20/a20_cpu_cfg.h @@ -0,0 +1,67 @@ +/*- + * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _A20_CPU_CFG_H_ +#define _A20_CPU_CFG_H_ + +#define CPU_CFG_BASE 0xe1c25c00 + +#define CPU0_RST_CTRL 0x0040 +#define CPU0_CTRL_REG 0x0044 +#define CPU0_STATUS_REG 0x0048 + +#define CPU1_RST_CTRL 0x0080 +#define CPU1_CTRL_REG 0x0084 +#define CPU1_STATUS_REG 0x0088 + +#define GENER_CTRL_REG 0x0184 + +#define EVENT_IN_REG 0x0190 +#define PRIVATE_REG 0x01a4 + +#define IDLE_CNT0_LOW_REG 0x0200 +#define IDLE_CNT0_HIGH_REG 0x0204 +#define IDLE_CNT0_CTRL_REG 0x0208 + +#define IDLE_CNT1_LOW_REG 0x0210 +#define IDLE_CNT1_HIGH_REG 0x0214 +#define IDLE_CNT1_CTRL_REG 0x0218 + +#define OSC24M_CNT64_CTRL_REG 0x0280 +#define OSC24M_CNT64_LOW_REG 0x0284 +#define OSC24M_CNT64_HIGH_REG 0x0288 + +#define LOSC_CNT64_CTRL_REG 0x0290 +#define LOSC_CNT64_LOW_REG 0x0294 +#define LOSC_CNT64_HIGH_REG 0x0298 + +#define CNT64_RL_EN 0x02 /* read latch enable */ + +uint64_t a20_read_counter64(void); + +#endif /* _A20_CPU_CFG_H_ */ diff --git a/sys/arm/allwinner/a20/files.a20 b/sys/arm/allwinner/a20/files.a20 new file mode 100644 index 0000000..c2188b6 --- /dev/null +++ b/sys/arm/allwinner/a20/files.a20 @@ -0,0 +1,21 @@ +# $FreeBSD$ +kern/kern_clocksource.c standard + +arm/arm/bus_space_asm_generic.S standard +arm/arm/bus_space_generic.c standard +arm/arm/cpufunc_asm_armv5.S standard +arm/arm/cpufunc_asm_arm10.S standard +arm/arm/cpufunc_asm_arm11.S standard +arm/arm/cpufunc_asm_armv7.S standard +arm/arm/irq_dispatch.S standard +arm/arm/gic.c standard + +arm/allwinner/a20/a20_cpu_cfg.c standard +arm/allwinner/a10_clk.c standard +arm/allwinner/a10_gpio.c optional gpio +arm/allwinner/a10_ehci.c optional ehci +arm/allwinner/a10_wdog.c standard +arm/allwinner/timer.c standard +arm/allwinner/bus_space.c standard +arm/allwinner/common.c standard +arm/allwinner/a10_machdep.c standard diff --git a/sys/arm/allwinner/a20/std.a20 b/sys/arm/allwinner/a20/std.a20 new file mode 100644 index 0000000..851308c --- /dev/null +++ b/sys/arm/allwinner/a20/std.a20 @@ -0,0 +1,26 @@ +# Allwinner A20 common options +#$FreeBSD$ + +cpu CPU_CORTEXA +machine arm armv6 +makeoption ARM_LITTLE_ENDIAN + +# Physical memory starts at 0x40200000. We assume images are loaded at +# 0x40200000, e.g. from u-boot with 'fatload mmc 0 0x40200000 kernel' +# +# +options PHYSADDR=0x40000000 + +makeoptions KERNPHYSADDR=0x40200000 +options KERNPHYSADDR=0x40200000 +makeoptions KERNVIRTADDR=0xc0200000 +options KERNVIRTADDR=0xc0200000 + +options STARTUP_PAGETABLE_ADDR=0x48000000 + +options ARM_L2_PIPT + +options IPI_IRQ_START=0 +options IPI_IRQ_END=15 + +files "../allwinner/a20/files.a20" |
