diff options
Diffstat (limited to 'sys/amd64/pci/pci_cfgreg.c')
| -rw-r--r-- | sys/amd64/pci/pci_cfgreg.c | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/sys/amd64/pci/pci_cfgreg.c b/sys/amd64/pci/pci_cfgreg.c index 2714ecb..90d9087 100644 --- a/sys/amd64/pci/pci_cfgreg.c +++ b/sys/amd64/pci/pci_cfgreg.c @@ -295,6 +295,13 @@ pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus) return (1); } +#define PCIE_VADDR(base, reg, bus, slot, func) \ + ((base) + \ + ((((bus) & 0xff) << 20) | \ + (((slot) & 0x1f) << 15) | \ + (((func) & 0x7) << 12) | \ + ((reg) & 0xfff))) + /* * AMD BIOS And Kernel Developer's Guides for CPU families starting with 10h * have a requirement that all accesses to the memory mapped PCI configuration @@ -302,18 +309,12 @@ pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus) * Since other vendors do not currently have any contradicting requirements * the AMD access pattern is applied universally. */ -#define PCIE_VADDR(base, reg, bus, slot, func) \ - ((base) + \ - ((((bus) & 0xff) << 20) | \ - (((slot) & 0x1f) << 15) | \ - (((func) & 0x7) << 12) | \ - ((reg) & 0xfff))) static int pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg, unsigned bytes) { - volatile vm_offset_t va; + vm_offset_t va; int data = -1; if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || @@ -324,16 +325,16 @@ pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg, switch (bytes) { case 4: - __asm __volatile("mov %1, %%eax" : "=a" (data) - : "m" (*(uint32_t *)va)); + __asm("movl %1, %0" : "=a" (data) + : "m" (*(volatile uint32_t *)va)); break; case 2: - __asm __volatile("movzwl %1, %%eax" : "=a" (data) - : "m" (*(uint16_t *)va)); + __asm("movzwl %1, %0" : "=a" (data) + : "m" (*(volatile uint16_t *)va)); break; case 1: - __asm __volatile("movzbl %1, %%eax" : "=a" (data) - : "m" (*(uint8_t *)va)); + __asm("movzbl %1, %0" : "=a" (data) + : "m" (*(volatile uint8_t *)va)); break; } @@ -344,7 +345,7 @@ static void pciereg_cfgwrite(int bus, unsigned slot, unsigned func, unsigned reg, int data, unsigned bytes) { - volatile vm_offset_t va; + vm_offset_t va; if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || func > PCI_FUNCMAX || reg > PCIE_REGMAX) @@ -354,16 +355,16 @@ pciereg_cfgwrite(int bus, unsigned slot, unsigned func, unsigned reg, int data, switch (bytes) { case 4: - __asm __volatile("mov %%eax, %0" : "=m" (*(uint32_t *)va) + __asm("movl %1, %0" : "=m" (*(volatile uint32_t *)va) : "a" (data)); break; case 2: - __asm __volatile("mov %%ax, %0" : "=m" (*(uint16_t *)va) - : "a" (data)); + __asm("movw %1, %0" : "=m" (*(volatile uint16_t *)va) + : "a" ((uint16_t)data)); break; case 1: - __asm __volatile("mov %%al, %0" : "=m" (*(uint8_t *)va) - : "a" (data)); + __asm("movb %1, %0" : "=m" (*(volatile uint8_t *)va) + : "a" ((uint8_t)data)); break; } } |
