diff options
Diffstat (limited to 'sys/amd64/isa/icu_vector.s')
| -rw-r--r-- | sys/amd64/isa/icu_vector.s | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/sys/amd64/isa/icu_vector.s b/sys/amd64/isa/icu_vector.s index 6b48737..3a42af4 100644 --- a/sys/amd64/isa/icu_vector.s +++ b/sys/amd64/isa/icu_vector.s @@ -61,8 +61,8 @@ IDTVEC(vec_name) ; \ mov $KPSEL,%ax ; \ mov %ax,%fs ; \ FAKE_MCOUNT((12+ACTUALLY_PUSHED)*4(%esp)) ; \ - movl PCPU(CURPROC),%ebx ; \ - incl P_INTR_NESTING_LEVEL(%ebx) ; \ + movl PCPU(CURTHREAD),%ebx ; \ + incl TD_INTR_NESTING_LEVEL(%ebx) ; \ pushl intr_unit + (irq_num) * 4 ; \ call *intr_handler + (irq_num) * 4 ; /* do the work ASAP */ \ enable_icus ; /* (re)enable ASAP (helps edge trigger?) */ \ @@ -70,7 +70,7 @@ IDTVEC(vec_name) ; \ incl cnt+V_INTR ; /* book-keeping can wait */ \ movl intr_countp + (irq_num) * 4,%eax ; \ incl (%eax) ; \ - decl P_INTR_NESTING_LEVEL(%ebx) ; \ + decl TD_INTR_NESTING_LEVEL(%ebx) ; \ MEXITCOUNT ; \ jmp doreti @@ -104,14 +104,14 @@ IDTVEC(vec_name) ; \ movb %al,imen + IRQ_BYTE(irq_num) ; \ outb %al,$icu+ICU_IMR_OFFSET ; \ enable_icus ; \ - movl PCPU(CURPROC),%ebx ; \ - incl P_INTR_NESTING_LEVEL(%ebx) ; \ + movl PCPU(CURTHREAD),%ebx ; \ + incl TD_INTR_NESTING_LEVEL(%ebx) ; \ __CONCAT(Xresume,irq_num): ; \ FAKE_MCOUNT(13*4(%esp)) ; /* XXX late to avoid double count */ \ pushl $irq_num; /* pass the IRQ */ \ call sched_ithd ; \ addl $4, %esp ; /* discard the parameter */ \ - decl P_INTR_NESTING_LEVEL(%ebx) ; \ + decl TD_INTR_NESTING_LEVEL(%ebx) ; \ MEXITCOUNT ; \ /* We could usually avoid the following jmp by inlining some of */ \ /* doreti, but it's probably better to use less cache. */ \ |
