diff options
Diffstat (limited to 'source/Plugins/Process/Utility')
70 files changed, 2674 insertions, 2897 deletions
diff --git a/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp b/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp index 4eff442..26de4b5 100644 --- a/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp +++ b/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp @@ -99,7 +99,7 @@ DynamicRegisterInfo::SetRegisterInfo(const StructuredData::Dictionary &dict, con return 0; } - // { 'name':'rcx' , 'bitsize' : 64, 'offset' : 16, 'encoding':'uint' , 'format':'hex' , 'set': 0, 'gcc' : 2, + // { 'name':'rcx' , 'bitsize' : 64, 'offset' : 16, 'encoding':'uint' , 'format':'hex' , 'set': 0, 'ehframe' : 2, // 'dwarf' : 2, 'generic':'arg4', 'alt-name':'arg4', }, RegisterInfo reg_info; std::vector<uint32_t> value_regs; @@ -325,8 +325,12 @@ DynamicRegisterInfo::SetRegisterInfo(const StructuredData::Dictionary &dict, con // Fill in the register numbers reg_info.kinds[lldb::eRegisterKindLLDB] = i; - reg_info.kinds[lldb::eRegisterKindGDB] = i; - reg_info_dict->GetValueForKeyAsInteger("gcc", reg_info.kinds[lldb::eRegisterKindGCC], LLDB_INVALID_REGNUM); + reg_info.kinds[lldb::eRegisterKindProcessPlugin] = i; + uint32_t eh_frame_regno = LLDB_INVALID_REGNUM; + reg_info_dict->GetValueForKeyAsInteger("gcc", eh_frame_regno, LLDB_INVALID_REGNUM); + if (eh_frame_regno == LLDB_INVALID_REGNUM) + reg_info_dict->GetValueForKeyAsInteger("ehframe", eh_frame_regno, LLDB_INVALID_REGNUM); + reg_info.kinds[lldb::eRegisterKindEHFrame] = eh_frame_regno; reg_info_dict->GetValueForKeyAsInteger("dwarf", reg_info.kinds[lldb::eRegisterKindDWARF], LLDB_INVALID_REGNUM); std::string generic_str; if (reg_info_dict->GetValueForKeyAsString("generic", generic_str)) @@ -703,12 +707,12 @@ DynamicRegisterInfo::Dump () const m_regs[i].byte_offset, m_regs[i].encoding, FormatManager::GetFormatAsCString (m_regs[i].format)); - if (m_regs[i].kinds[eRegisterKindGDB] != LLDB_INVALID_REGNUM) - s.Printf(", gdb = %3u", m_regs[i].kinds[eRegisterKindGDB]); + if (m_regs[i].kinds[eRegisterKindProcessPlugin] != LLDB_INVALID_REGNUM) + s.Printf(", process plugin = %3u", m_regs[i].kinds[eRegisterKindProcessPlugin]); if (m_regs[i].kinds[eRegisterKindDWARF] != LLDB_INVALID_REGNUM) s.Printf(", dwarf = %3u", m_regs[i].kinds[eRegisterKindDWARF]); - if (m_regs[i].kinds[eRegisterKindGCC] != LLDB_INVALID_REGNUM) - s.Printf(", gcc = %3u", m_regs[i].kinds[eRegisterKindGCC]); + if (m_regs[i].kinds[eRegisterKindEHFrame] != LLDB_INVALID_REGNUM) + s.Printf(", ehframe = %3u", m_regs[i].kinds[eRegisterKindEHFrame]); if (m_regs[i].kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM) s.Printf(", generic = %3u", m_regs[i].kinds[eRegisterKindGeneric]); if (m_regs[i].alt_name) diff --git a/source/Plugins/Process/Utility/FreeBSDSignals.cpp b/source/Plugins/Process/Utility/FreeBSDSignals.cpp index c143d36..e575e2c 100644 --- a/source/Plugins/Process/Utility/FreeBSDSignals.cpp +++ b/source/Plugins/Process/Utility/FreeBSDSignals.cpp @@ -26,70 +26,70 @@ FreeBSDSignals::Reset() { UnixSignals::Reset(); - // SIGNO NAME SHORT NAME SUPPRESS STOP NOTIFY DESCRIPTION - // ====== ============ ========== ======== ====== ====== =================================================== - AddSignal (32, "SIGTHR", "THR", false, true , true , "thread interrupt"); - AddSignal (33, "SIGLIBRT", "LIBRT", false, true , true , "reserved by real-time library"); - AddSignal (65, "SIGRTMIN", "RTMIN", false, true , true , "real time signal 0"); - AddSignal (66, "SIGRTMIN+1", "RTMIN+1", false, true , true , "real time signal 1"); - AddSignal (67, "SIGRTMIN+2", "RTMIN+2", false, true , true , "real time signal 2"); - AddSignal (68, "SIGRTMIN+3", "RTMIN+3", false, true , true , "real time signal 3"); - AddSignal (69, "SIGRTMIN+4", "RTMIN+4", false, true , true , "real time signal 4"); - AddSignal (70, "SIGRTMIN+5", "RTMIN+5", false, true , true , "real time signal 5"); - AddSignal (71, "SIGRTMIN+6", "RTMIN+6", false, true , true , "real time signal 6"); - AddSignal (72, "SIGRTMIN+7", "RTMIN+7", false, true , true , "real time signal 7"); - AddSignal (73, "SIGRTMIN+8", "RTMIN+8", false, true , true , "real time signal 8"); - AddSignal (74, "SIGRTMIN+9", "RTMIN+9", false, true , true , "real time signal 9"); - AddSignal (75, "SIGRTMIN+10", "RTMIN+10", false, true , true , "real time signal 10"); - AddSignal (76, "SIGRTMIN+11", "RTMIN+11", false, true , true , "real time signal 11"); - AddSignal (77, "SIGRTMIN+12", "RTMIN+12", false, true , true , "real time signal 12"); - AddSignal (78, "SIGRTMIN+13", "RTMIN+13", false, true , true , "real time signal 13"); - AddSignal (79, "SIGRTMIN+14", "RTMIN+14", false, true , true , "real time signal 14"); - AddSignal (80, "SIGRTMIN+15", "RTMIN+15", false, true , true , "real time signal 15"); - AddSignal (81, "SIGRTMIN+16", "RTMIN+16", false, true , true , "real time signal 16"); - AddSignal (82, "SIGRTMIN+17", "RTMIN+17", false, true , true , "real time signal 17"); - AddSignal (83, "SIGRTMIN+18", "RTMIN+18", false, true , true , "real time signal 18"); - AddSignal (84, "SIGRTMIN+19", "RTMIN+19", false, true , true , "real time signal 19"); - AddSignal (85, "SIGRTMIN+20", "RTMIN+20", false, true , true , "real time signal 20"); - AddSignal (86, "SIGRTMIN+21", "RTMIN+21", false, true , true , "real time signal 21"); - AddSignal (87, "SIGRTMIN+22", "RTMIN+22", false, true , true , "real time signal 22"); - AddSignal (88, "SIGRTMIN+23", "RTMIN+23", false, true , true , "real time signal 23"); - AddSignal (89, "SIGRTMIN+24", "RTMIN+24", false, true , true , "real time signal 24"); - AddSignal (90, "SIGRTMIN+25", "RTMIN+25", false, true , true , "real time signal 25"); - AddSignal (91, "SIGRTMIN+26", "RTMIN+26", false, true , true , "real time signal 26"); - AddSignal (92, "SIGRTMIN+27", "RTMIN+27", false, true , true , "real time signal 27"); - AddSignal (93, "SIGRTMIN+28", "RTMIN+28", false, true , true , "real time signal 28"); - AddSignal (94, "SIGRTMIN+29", "RTMIN+29", false, true , true , "real time signal 29"); - AddSignal (95, "SIGRTMIN+30", "RTMIN+30", false, true , true , "real time signal 30"); - AddSignal (96, "SIGRTMAX-30", "RTMAX-30", false, true , true , "real time signal 31"); - AddSignal (97, "SIGRTMAX-29", "RTMAX-29", false, true , true , "real time signal 32"); - AddSignal (98, "SIGRTMAX-28", "RTMAX-28", false, true , true , "real time signal 33"); - AddSignal (99, "SIGRTMAX-27", "RTMAX-27", false, true , true , "real time signal 34"); - AddSignal (100, "SIGRTMAX-26", "RTMAX-26", false, true , true , "real time signal 35"); - AddSignal (101, "SIGRTMAX-25", "RTMAX-25", false, true , true , "real time signal 36"); - AddSignal (102, "SIGRTMAX-24", "RTMAX-24", false, true , true , "real time signal 37"); - AddSignal (103, "SIGRTMAX-23", "RTMAX-23", false, true , true , "real time signal 38"); - AddSignal (104, "SIGRTMAX-22", "RTMAX-22", false, true , true , "real time signal 39"); - AddSignal (105, "SIGRTMAX-21", "RTMAX-21", false, true , true , "real time signal 40"); - AddSignal (106, "SIGRTMAX-20", "RTMAX-20", false, true , true , "real time signal 41"); - AddSignal (107, "SIGRTMAX-19", "RTMAX-19", false, true , true , "real time signal 42"); - AddSignal (108, "SIGRTMAX-18", "RTMAX-18", false, true , true , "real time signal 43"); - AddSignal (109, "SIGRTMAX-17", "RTMAX-17", false, true , true , "real time signal 44"); - AddSignal (110, "SIGRTMAX-16", "RTMAX-16", false, true , true , "real time signal 45"); - AddSignal (111, "SIGRTMAX-15", "RTMAX-15", false, true , true , "real time signal 46"); - AddSignal (112, "SIGRTMAX-14", "RTMAX-14", false, true , true , "real time signal 47"); - AddSignal (113, "SIGRTMAX-13", "RTMAX-13", false, true , true , "real time signal 48"); - AddSignal (114, "SIGRTMAX-12", "RTMAX-12", false, true , true , "real time signal 49"); - AddSignal (115, "SIGRTMAX-11", "RTMAX-11", false, true , true , "real time signal 50"); - AddSignal (116, "SIGRTMAX-10", "RTMAX-10", false, true , true , "real time signal 51"); - AddSignal (117, "SIGRTMAX-9", "RTMAX-9", false, true , true , "real time signal 52"); - AddSignal (118, "SIGRTMAX-8", "RTMAX-8", false, true , true , "real time signal 53"); - AddSignal (119, "SIGRTMAX-7", "RTMAX-7", false, true , true , "real time signal 54"); - AddSignal (120, "SIGRTMAX-6", "RTMAX-6", false, true , true , "real time signal 55"); - AddSignal (121, "SIGRTMAX-5", "RTMAX-5", false, true , true , "real time signal 56"); - AddSignal (122, "SIGRTMAX-4", "RTMAX-4", false, true , true , "real time signal 57"); - AddSignal (123, "SIGRTMAX-3", "RTMAX-3", false, true , true , "real time signal 58"); - AddSignal (124, "SIGRTMAX-2", "RTMAX-2", false, true , true , "real time signal 59"); - AddSignal (125, "SIGRTMAX-1", "RTMAX-1", false, true , true , "real time signal 60"); - AddSignal (126, "SIGRTMAX", "RTMAX", false, true , true , "real time signal 61"); + // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION + // ====== ============ ======== ====== ====== =================================================== + AddSignal (32, "SIGTHR", false, false, false, "thread interrupt"); + AddSignal (33, "SIGLIBRT", false, false, false, "reserved by real-time library"); + AddSignal (65, "SIGRTMIN", false, false, false, "real time signal 0"); + AddSignal (66, "SIGRTMIN+1", false, false, false, "real time signal 1"); + AddSignal (67, "SIGRTMIN+2", false, false, false, "real time signal 2"); + AddSignal (68, "SIGRTMIN+3", false, false, false, "real time signal 3"); + AddSignal (69, "SIGRTMIN+4", false, false, false, "real time signal 4"); + AddSignal (70, "SIGRTMIN+5", false, false, false, "real time signal 5"); + AddSignal (71, "SIGRTMIN+6", false, false, false, "real time signal 6"); + AddSignal (72, "SIGRTMIN+7", false, false, false, "real time signal 7"); + AddSignal (73, "SIGRTMIN+8", false, false, false, "real time signal 8"); + AddSignal (74, "SIGRTMIN+9", false, false, false, "real time signal 9"); + AddSignal (75, "SIGRTMIN+10", false, false, false, "real time signal 10"); + AddSignal (76, "SIGRTMIN+11", false, false, false, "real time signal 11"); + AddSignal (77, "SIGRTMIN+12", false, false, false, "real time signal 12"); + AddSignal (78, "SIGRTMIN+13", false, false, false, "real time signal 13"); + AddSignal (79, "SIGRTMIN+14", false, false, false, "real time signal 14"); + AddSignal (80, "SIGRTMIN+15", false, false, false, "real time signal 15"); + AddSignal (81, "SIGRTMIN+16", false, false, false, "real time signal 16"); + AddSignal (82, "SIGRTMIN+17", false, false, false, "real time signal 17"); + AddSignal (83, "SIGRTMIN+18", false, false, false, "real time signal 18"); + AddSignal (84, "SIGRTMIN+19", false, false, false, "real time signal 19"); + AddSignal (85, "SIGRTMIN+20", false, false, false, "real time signal 20"); + AddSignal (86, "SIGRTMIN+21", false, false, false, "real time signal 21"); + AddSignal (87, "SIGRTMIN+22", false, false, false, "real time signal 22"); + AddSignal (88, "SIGRTMIN+23", false, false, false, "real time signal 23"); + AddSignal (89, "SIGRTMIN+24", false, false, false, "real time signal 24"); + AddSignal (90, "SIGRTMIN+25", false, false, false, "real time signal 25"); + AddSignal (91, "SIGRTMIN+26", false, false, false, "real time signal 26"); + AddSignal (92, "SIGRTMIN+27", false, false, false, "real time signal 27"); + AddSignal (93, "SIGRTMIN+28", false, false, false, "real time signal 28"); + AddSignal (94, "SIGRTMIN+29", false, false, false, "real time signal 29"); + AddSignal (95, "SIGRTMIN+30", false, false, false, "real time signal 30"); + AddSignal (96, "SIGRTMAX-30", false, false, false, "real time signal 31"); + AddSignal (97, "SIGRTMAX-29", false, false, false, "real time signal 32"); + AddSignal (98, "SIGRTMAX-28", false, false, false, "real time signal 33"); + AddSignal (99, "SIGRTMAX-27", false, false, false, "real time signal 34"); + AddSignal (100, "SIGRTMAX-26", false, false, false, "real time signal 35"); + AddSignal (101, "SIGRTMAX-25", false, false, false, "real time signal 36"); + AddSignal (102, "SIGRTMAX-24", false, false, false, "real time signal 37"); + AddSignal (103, "SIGRTMAX-23", false, false, false, "real time signal 38"); + AddSignal (104, "SIGRTMAX-22", false, false, false, "real time signal 39"); + AddSignal (105, "SIGRTMAX-21", false, false, false, "real time signal 40"); + AddSignal (106, "SIGRTMAX-20", false, false, false, "real time signal 41"); + AddSignal (107, "SIGRTMAX-19", false, false, false, "real time signal 42"); + AddSignal (108, "SIGRTMAX-18", false, false, false, "real time signal 43"); + AddSignal (109, "SIGRTMAX-17", false, false, false, "real time signal 44"); + AddSignal (110, "SIGRTMAX-16", false, false, false, "real time signal 45"); + AddSignal (111, "SIGRTMAX-15", false, false, false, "real time signal 46"); + AddSignal (112, "SIGRTMAX-14", false, false, false, "real time signal 47"); + AddSignal (113, "SIGRTMAX-13", false, false, false, "real time signal 48"); + AddSignal (114, "SIGRTMAX-12", false, false, false, "real time signal 49"); + AddSignal (115, "SIGRTMAX-11", false, false, false, "real time signal 50"); + AddSignal (116, "SIGRTMAX-10", false, false, false, "real time signal 51"); + AddSignal (117, "SIGRTMAX-9", false, false, false, "real time signal 52"); + AddSignal (118, "SIGRTMAX-8", false, false, false, "real time signal 53"); + AddSignal (119, "SIGRTMAX-7", false, false, false, "real time signal 54"); + AddSignal (120, "SIGRTMAX-6", false, false, false, "real time signal 55"); + AddSignal (121, "SIGRTMAX-5", false, false, false, "real time signal 56"); + AddSignal (122, "SIGRTMAX-4", false, false, false, "real time signal 57"); + AddSignal (123, "SIGRTMAX-3", false, false, false, "real time signal 58"); + AddSignal (124, "SIGRTMAX-2", false, false, false, "real time signal 59"); + AddSignal (125, "SIGRTMAX-1", false, false, false, "real time signal 60"); + AddSignal (126, "SIGRTMAX", false, false, false, "real time signal 61"); } diff --git a/source/Plugins/Process/Utility/HistoryThread.h b/source/Plugins/Process/Utility/HistoryThread.h index 51173c6..e87f649 100644 --- a/source/Plugins/Process/Utility/HistoryThread.h +++ b/source/Plugins/Process/Utility/HistoryThread.h @@ -10,6 +10,10 @@ #ifndef liblldb_HistoryThread_h_ #define liblldb_HistoryThread_h_ +// C Includes +// C++ Includes +// Other libraries and framework includes +// Project includes #include "lldb/lldb-private.h" #include "lldb/Host/Mutex.h" #include "lldb/Core/Broadcaster.h" @@ -37,52 +41,55 @@ class HistoryThread : public lldb_private::Thread public: HistoryThread (lldb_private::Process &process, lldb::tid_t tid, std::vector<lldb::addr_t> pcs, uint32_t stop_id, bool stop_id_is_valid); - virtual ~HistoryThread (); + ~HistoryThread() override; - virtual lldb::RegisterContextSP - GetRegisterContext (); + lldb::RegisterContextSP + GetRegisterContext() override; - virtual lldb::RegisterContextSP - CreateRegisterContextForFrame (StackFrame *frame); + lldb::RegisterContextSP + CreateRegisterContextForFrame(StackFrame *frame) override; - virtual void - RefreshStateAfterStop() { } + void + RefreshStateAfterStop() override { } bool - CalculateStopInfo () { return false; } + CalculateStopInfo() override + { + return false; + } void - SetExtendedBacktraceToken (uint64_t token) + SetExtendedBacktraceToken(uint64_t token) override { m_extended_unwind_token = token; } uint64_t - GetExtendedBacktraceToken () + GetExtendedBacktraceToken() override { return m_extended_unwind_token; } const char * - GetQueueName () + GetQueueName() override { return m_queue_name.c_str(); } void - SetQueueName (const char *name) + SetQueueName(const char *name) override { m_queue_name = name; } lldb::queue_id_t - GetQueueID () + GetQueueID() override { return m_queue_id; } void - SetQueueID (lldb::queue_id_t queue) + SetQueueID(lldb::queue_id_t queue) override { m_queue_id = queue; } @@ -94,7 +101,7 @@ public: } uint32_t - GetExtendedBacktraceOriginatingIndexID (); + GetExtendedBacktraceOriginatingIndexID() override; void SetThreadName (const char *name) @@ -102,14 +109,14 @@ public: m_thread_name = name; } - virtual const char * - GetName () + const char * + GetName() override { return m_thread_name.c_str(); } - virtual void - SetName(const char *name) + void + SetName(const char *name) override { m_thread_name = name; } @@ -133,4 +140,4 @@ protected: } // namespace lldb_private -#endif // liblldb_HistoryThread_h_ +#endif // liblldb_HistoryThread_h_ diff --git a/source/Plugins/Process/Utility/HistoryUnwind.h b/source/Plugins/Process/Utility/HistoryUnwind.h index 733f93e..2cb78bc 100644 --- a/source/Plugins/Process/Utility/HistoryUnwind.h +++ b/source/Plugins/Process/Utility/HistoryUnwind.h @@ -10,8 +10,12 @@ #ifndef liblldb_HistoryUnwind_h_ #define liblldb_HistoryUnwind_h_ +// C Includes +// C++ Includes #include <vector> +// Other libraries and framework includes +// Project includes #include "lldb/lldb-private.h" #include "lldb/Host/Mutex.h" #include "lldb/Target/Unwind.h" @@ -23,21 +27,21 @@ class HistoryUnwind : public lldb_private::Unwind public: HistoryUnwind (Thread &thread, std::vector<lldb::addr_t> pcs, bool stop_id_is_valid); - virtual ~HistoryUnwind (); + ~HistoryUnwind() override; protected: void - DoClear(); + DoClear() override; lldb::RegisterContextSP - DoCreateRegisterContextForFrame (StackFrame *frame); + DoCreateRegisterContextForFrame(StackFrame *frame) override; bool - DoGetFrameInfoAtIndex (uint32_t frame_idx, - lldb::addr_t& cfa, - lldb::addr_t& pc); + DoGetFrameInfoAtIndex(uint32_t frame_idx, + lldb::addr_t& cfa, + lldb::addr_t& pc) override; uint32_t - DoGetFrameCount (); + DoGetFrameCount() override; private: @@ -47,4 +51,4 @@ private: } // namespace lldb_private -#endif // liblldb_HistoryUnwind_h_ +#endif // liblldb_HistoryUnwind_h_ diff --git a/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp b/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp index 3923c54..bd3978c 100644 --- a/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp +++ b/source/Plugins/Process/Utility/InferiorCallPOSIX.cpp @@ -93,7 +93,7 @@ lldb_private::InferiorCallMmap (Process *process, if (sc.GetAddressRange(range_scope, 0, use_inline_block_range, mmap_range)) { ClangASTContext *clang_ast_context = process->GetTarget().GetScratchClangASTContext(); - ClangASTType clang_void_ptr_type = clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType(); + CompilerType clang_void_ptr_type = clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType(); lldb::addr_t args[] = { addr, length, prot_arg, flags_arg, fd, offset }; lldb::ThreadPlanSP call_plan_sp (new ThreadPlanCallFunction (*thread, mmap_range.GetBaseAddress(), @@ -103,9 +103,6 @@ lldb_private::InferiorCallMmap (Process *process, if (call_plan_sp) { StreamFile error_strm; - // This plan is a utility plan, so set it to discard itself when done. - call_plan_sp->SetIsMasterPlan (true); - call_plan_sp->SetOkayToDiscard(true); StackFrame *frame = thread->GetStackFrameAtIndex (0).get(); if (frame) @@ -182,15 +179,12 @@ lldb_private::InferiorCallMunmap (Process *process, lldb::addr_t args[] = { addr, length }; lldb::ThreadPlanSP call_plan_sp (new ThreadPlanCallFunction (*thread, munmap_range.GetBaseAddress(), - ClangASTType(), + CompilerType(), args, options)); if (call_plan_sp) { StreamFile error_strm; - // This plan is a utility plan, so set it to discard itself when done. - call_plan_sp->SetIsMasterPlan (true); - call_plan_sp->SetOkayToDiscard(true); StackFrame *frame = thread->GetStackFrameAtIndex (0).get(); if (frame) @@ -235,7 +229,7 @@ lldb_private::InferiorCall (Process *process, options.SetTimeoutUsec(500000); ClangASTContext *clang_ast_context = process->GetTarget().GetScratchClangASTContext(); - ClangASTType clang_void_ptr_type = clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType(); + CompilerType clang_void_ptr_type = clang_ast_context->GetBasicType(eBasicTypeVoid).GetPointerType(); lldb::ThreadPlanSP call_plan_sp (new ThreadPlanCallFunction (*thread, *address, clang_void_ptr_type, @@ -244,9 +238,6 @@ lldb_private::InferiorCall (Process *process, if (call_plan_sp) { StreamString error_strm; - // This plan is a utility plan, so set it to discard itself when done. - call_plan_sp->SetIsMasterPlan (true); - call_plan_sp->SetOkayToDiscard(true); StackFrame *frame = thread->GetStackFrameAtIndex (0).get(); if (frame) diff --git a/source/Plugins/Process/Utility/LinuxSignals.cpp b/source/Plugins/Process/Utility/LinuxSignals.cpp index cd1fc81..5687577 100644 --- a/source/Plugins/Process/Utility/LinuxSignals.cpp +++ b/source/Plugins/Process/Utility/LinuxSignals.cpp @@ -24,72 +24,70 @@ void LinuxSignals::Reset() { m_signals.clear(); - - AddSignal (1, "SIGHUP", "HUP", false, true , true , "hangup"); - AddSignal (2, "SIGINT", "INT", true , true , true , "interrupt"); - AddSignal (3, "SIGQUIT", "QUIT", false, true , true , "quit"); - AddSignal (4, "SIGILL", "ILL", false, true , true , "illegal instruction"); - AddSignal (5, "SIGTRAP", "TRAP", true , true , true , "trace trap (not reset when caught)"); - AddSignal (6, "SIGABRT", "ABRT", false, true , true , "abort()"); - AddSignal (6, "SIGIOT", "IOT", false, true , true , "IOT trap"); - AddSignal (7, "SIGBUS", "BUS", false, true , true , "bus error"); - AddSignal (8, "SIGFPE", "FPE", false, true , true , "floating point exception"); - AddSignal (9, "SIGKILL", "KILL", false, true , true , "kill"); - AddSignal (10, "SIGUSR1", "USR1", false, true , true , "user defined signal 1"); - AddSignal (11, "SIGSEGV", "SEGV", false, true , true , "segmentation violation"); - AddSignal (12, "SIGUSR2", "USR2", false, true , true , "user defined signal 2"); - AddSignal (13, "SIGPIPE", "PIPE", false, true , true , "write to pipe with reading end closed"); - AddSignal (14, "SIGALRM", "ALRM", false, false, false, "alarm"); - AddSignal (15, "SIGTERM", "TERM", false, true , true , "termination requested"); - AddSignal (16, "SIGSTKFLT", "STKFLT", false, true , true , "stack fault"); - AddSignal (16, "SIGCLD", "CLD", false, false, true , "same as SIGCHLD"); - AddSignal (17, "SIGCHLD", "CHLD", false, false, true , "child status has changed"); - AddSignal (18, "SIGCONT", "CONT", false, true , true , "process continue"); - AddSignal (19, "SIGSTOP", "STOP", true , true , true , "process stop"); - AddSignal (20, "SIGTSTP", "TSTP", false, true , true , "tty stop"); - AddSignal (21, "SIGTTIN", "TTIN", false, true , true , "background tty read"); - AddSignal (22, "SIGTTOU", "TTOU", false, true , true , "background tty write"); - AddSignal (23, "SIGURG", "URG", false, true , true , "urgent data on socket"); - AddSignal (24, "SIGXCPU", "XCPU", false, true , true , "CPU resource exceeded"); - AddSignal (25, "SIGXFSZ", "XFSZ", false, true , true , "file size limit exceeded"); - AddSignal (26, "SIGVTALRM", "VTALRM", false, true , true , "virtual time alarm"); - AddSignal (27, "SIGPROF", "PROF", false, false, false, "profiling time alarm"); - AddSignal (28, "SIGWINCH", "WINCH", false, true , true , "window size changes"); - AddSignal (29, "SIGPOLL", "POLL", false, true , true , "pollable event"); - AddSignal (29, "SIGIO", "IO", false, true , true , "input/output ready"); - AddSignal (30, "SIGPWR", "PWR", false, true , true , "power failure"); - AddSignal (31, "SIGSYS", "SYS", false, true , true , "invalid system call"); - AddSignal (32, "SIG32", "SIG32", false, true , true , "threading library internal signal 1"); - AddSignal (33, "SIG33", "SIG33", false, true , true , "threading library internal signal 2"); - AddSignal (34, "SIGRTMIN", "RTMIN", false, true , true , "real time signal 0"); - AddSignal (35, "SIGRTMIN+1", "RTMIN+1", false, true , true , "real time signal 1"); - AddSignal (36, "SIGRTMIN+2", "RTMIN+2", false, true , true , "real time signal 2"); - AddSignal (37, "SIGRTMIN+3", "RTMIN+3", false, true , true , "real time signal 3"); - AddSignal (38, "SIGRTMIN+4", "RTMIN+4", false, true , true , "real time signal 4"); - AddSignal (39, "SIGRTMIN+5", "RTMIN+5", false, true , true , "real time signal 5"); - AddSignal (40, "SIGRTMIN+6", "RTMIN+6", false, true , true , "real time signal 6"); - AddSignal (41, "SIGRTMIN+7", "RTMIN+7", false, true , true , "real time signal 7"); - AddSignal (42, "SIGRTMIN+8", "RTMIN+8", false, true , true , "real time signal 8"); - AddSignal (43, "SIGRTMIN+9", "RTMIN+9", false, true , true , "real time signal 9"); - AddSignal (44, "SIGRTMIN+10", "RTMIN+10", false, true , true , "real time signal 10"); - AddSignal (45, "SIGRTMIN+11", "RTMIN+11", false, true , true , "real time signal 11"); - AddSignal (46, "SIGRTMIN+12", "RTMIN+12", false, true , true , "real time signal 12"); - AddSignal (47, "SIGRTMIN+13", "RTMIN+13", false, true , true , "real time signal 13"); - AddSignal (48, "SIGRTMIN+14", "RTMIN+14", false, true , true , "real time signal 14"); - AddSignal (49, "SIGRTMIN+15", "RTMIN+15", false, true , true , "real time signal 15"); - AddSignal (50, "SIGRTMAX-14", "RTMAX-14", false, true , true , "real time signal 16"); // switching to SIGRTMAX-xxx to match "kill -l" output - AddSignal (51, "SIGRTMAX-13", "RTMAX-13", false, true , true , "real time signal 17"); - AddSignal (52, "SIGRTMAX-12", "RTMAX-12", false, true , true , "real time signal 18"); - AddSignal (53, "SIGRTMAX-11", "RTMAX-11", false, true , true , "real time signal 19"); - AddSignal (54, "SIGRTMAX-10", "RTMAX-10", false, true , true , "real time signal 20"); - AddSignal (55, "SIGRTMAX-9", "RTMAX-9", false, true , true , "real time signal 21"); - AddSignal (56, "SIGRTMAX-8", "RTMAX-8", false, true , true , "real time signal 22"); - AddSignal (57, "SIGRTMAX-7", "RTMAX-7", false, true , true , "real time signal 23"); - AddSignal (58, "SIGRTMAX-6", "RTMAX-6", false, true , true , "real time signal 24"); - AddSignal (59, "SIGRTMAX-5", "RTMAX-5", false, true , true , "real time signal 25"); - AddSignal (60, "SIGRTMAX-4", "RTMAX-4", false, true , true , "real time signal 26"); - AddSignal (61, "SIGRTMAX-3", "RTMAX-3", false, true , true , "real time signal 27"); - AddSignal (62, "SIGRTMAX-2", "RTMAX-2", false, true , true , "real time signal 28"); - AddSignal (63, "SIGRTMAX-1", "RTMAX-1", false, true , true , "real time signal 29"); - AddSignal (64, "SIGRTMAX", "RTMAX", false, true , true , "real time signal 30"); + // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION ALIAS + // ===== =========== ======== ===== ====== ====================================== ====== + AddSignal (1, "SIGHUP", false, true , true , "hangup" ); + AddSignal (2, "SIGINT", true , true , true , "interrupt" ); + AddSignal (3, "SIGQUIT", false, true , true , "quit" ); + AddSignal (4, "SIGILL", false, true , true , "illegal instruction" ); + AddSignal (5, "SIGTRAP", true , true , true , "trace trap (not reset when caught)" ); + AddSignal (6, "SIGABRT", false, true , true , "abort()/IOT trap", "SIGIOT"); + AddSignal (7, "SIGBUS", false, true , true , "bus error" ); + AddSignal (8, "SIGFPE", false, true , true , "floating point exception" ); + AddSignal (9, "SIGKILL", false, true , true , "kill" ); + AddSignal (10, "SIGUSR1", false, true , true , "user defined signal 1" ); + AddSignal (11, "SIGSEGV", false, true , true , "segmentation violation" ); + AddSignal (12, "SIGUSR2", false, true , true , "user defined signal 2" ); + AddSignal (13, "SIGPIPE", false, true , true , "write to pipe with reading end closed" ); + AddSignal (14, "SIGALRM", false, false, false, "alarm" ); + AddSignal (15, "SIGTERM", false, true , true , "termination requested" ); + AddSignal (16, "SIGSTKFLT", false, true , true , "stack fault" ); + AddSignal (17, "SIGCHLD", false, false, true , "child status has changed", "SIGCLD"); + AddSignal (18, "SIGCONT", false, true , true , "process continue" ); + AddSignal (19, "SIGSTOP", true , true , true , "process stop" ); + AddSignal (20, "SIGTSTP", false, true , true , "tty stop" ); + AddSignal (21, "SIGTTIN", false, true , true , "background tty read" ); + AddSignal (22, "SIGTTOU", false, true , true , "background tty write" ); + AddSignal (23, "SIGURG", false, true , true , "urgent data on socket" ); + AddSignal (24, "SIGXCPU", false, true , true , "CPU resource exceeded" ); + AddSignal (25, "SIGXFSZ", false, true , true , "file size limit exceeded" ); + AddSignal (26, "SIGVTALRM", false, true , true , "virtual time alarm" ); + AddSignal (27, "SIGPROF", false, false, false, "profiling time alarm" ); + AddSignal (28, "SIGWINCH", false, true , true , "window size changes" ); + AddSignal (29, "SIGIO", false, true , true , "input/output ready/Pollable event", "SIGPOLL"); + AddSignal (30, "SIGPWR", false, true , true , "power failure" ); + AddSignal (31, "SIGSYS", false, true , true , "invalid system call" ); + AddSignal (32, "SIG32", false, false, false, "threading library internal signal 1" ); + AddSignal (33, "SIG33", false, false, false, "threading library internal signal 2" ); + AddSignal (34, "SIGRTMIN", false, false, false, "real time signal 0" ); + AddSignal (35, "SIGRTMIN+1", false, false, false, "real time signal 1" ); + AddSignal (36, "SIGRTMIN+2", false, false, false, "real time signal 2" ); + AddSignal (37, "SIGRTMIN+3", false, false, false, "real time signal 3" ); + AddSignal (38, "SIGRTMIN+4", false, false, false, "real time signal 4" ); + AddSignal (39, "SIGRTMIN+5", false, false, false, "real time signal 5" ); + AddSignal (40, "SIGRTMIN+6", false, false, false, "real time signal 6" ); + AddSignal (41, "SIGRTMIN+7", false, false, false, "real time signal 7" ); + AddSignal (42, "SIGRTMIN+8", false, false, false, "real time signal 8" ); + AddSignal (43, "SIGRTMIN+9", false, false, false, "real time signal 9" ); + AddSignal (44, "SIGRTMIN+10", false, false, false, "real time signal 10" ); + AddSignal (45, "SIGRTMIN+11", false, false, false, "real time signal 11" ); + AddSignal (46, "SIGRTMIN+12", false, false, false, "real time signal 12" ); + AddSignal (47, "SIGRTMIN+13", false, false, false, "real time signal 13" ); + AddSignal (48, "SIGRTMIN+14", false, false, false, "real time signal 14" ); + AddSignal (49, "SIGRTMIN+15", false, false, false, "real time signal 15" ); + AddSignal (50, "SIGRTMAX-14", false, false, false, "real time signal 16" ); // switching to SIGRTMAX-xxx to match "kill -l" output + AddSignal (51, "SIGRTMAX-13", false, false, false, "real time signal 17" ); + AddSignal (52, "SIGRTMAX-12", false, false, false, "real time signal 18" ); + AddSignal (53, "SIGRTMAX-11", false, false, false, "real time signal 19" ); + AddSignal (54, "SIGRTMAX-10", false, false, false, "real time signal 20" ); + AddSignal (55, "SIGRTMAX-9", false, false, false, "real time signal 21" ); + AddSignal (56, "SIGRTMAX-8", false, false, false, "real time signal 22" ); + AddSignal (57, "SIGRTMAX-7", false, false, false, "real time signal 23" ); + AddSignal (58, "SIGRTMAX-6", false, false, false, "real time signal 24" ); + AddSignal (59, "SIGRTMAX-5", false, false, false, "real time signal 25" ); + AddSignal (60, "SIGRTMAX-4", false, false, false, "real time signal 26" ); + AddSignal (61, "SIGRTMAX-3", false, false, false, "real time signal 27" ); + AddSignal (62, "SIGRTMAX-2", false, false, false, "real time signal 28" ); + AddSignal (63, "SIGRTMAX-1", false, false, false, "real time signal 29" ); + AddSignal (64, "SIGRTMAX", false, false, false, "real time signal 30" ); } diff --git a/source/Plugins/Process/Utility/MipsLinuxSignals.cpp b/source/Plugins/Process/Utility/MipsLinuxSignals.cpp index 1dc0be8..422fc9b 100644 --- a/source/Plugins/Process/Utility/MipsLinuxSignals.cpp +++ b/source/Plugins/Process/Utility/MipsLinuxSignals.cpp @@ -24,72 +24,70 @@ void MipsLinuxSignals::Reset() { m_signals.clear(); - - AddSignal (1, "SIGHUP", "HUP", false, true , true , "hangup"); - AddSignal (2, "SIGINT", "INT", true , true , true , "interrupt"); - AddSignal (3, "SIGQUIT", "QUIT", false, true , true , "quit"); - AddSignal (4, "SIGILL", "ILL", false, true , true , "illegal instruction"); - AddSignal (5, "SIGTRAP", "TRAP", true , true , true , "trace trap (not reset when caught)"); - AddSignal (6, "SIGABRT", "ABRT", false, true , true , "abort()"); - AddSignal (6, "SIGIOT", "IOT", false, true , true , "IOT trap"); - AddSignal (7, "SIGEMT", "EMT", false, true , true , "terminate process with core dump"); - AddSignal (8, "SIGFPE", "FPE", false, true , true , "floating point exception"); - AddSignal (9, "SIGKILL", "KILL", false, true , true , "kill"); - AddSignal (10, "SIGBUS", "BUS", false, true , true , "bus error"); - AddSignal (11, "SIGSEGV", "SEGV", false, true , true , "segmentation violation"); - AddSignal (12, "SIGSYS", "SYS", false, true , true , "invalid system call"); - AddSignal (13, "SIGPIPE", "PIPE", false, true , true , "write to pipe with reading end closed"); - AddSignal (14, "SIGALRM", "ALRM", false, false, false, "alarm"); - AddSignal (15, "SIGTERM", "TERM", false, true , true , "termination requested"); - AddSignal (16, "SIGUSR1", "USR1", false, true , true , "user defined signal 1"); - AddSignal (17, "SIGUSR2", "USR2", false, true , true , "user defined signal 2"); - AddSignal (18, "SIGCLD", "CLD", false, false, true , "same as SIGCHLD"); - AddSignal (18, "SIGCHLD", "CHLD", false, false, true , "child status has changed"); - AddSignal (19, "SIGPWR", "PWR", false, true , true , "power failure"); - AddSignal (20, "SIGWINCH", "WINCH", false, true , true , "window size changes"); - AddSignal (21, "SIGURG", "URG", false, true , true , "urgent data on socket"); - AddSignal (22, "SIGIO", "IO", false, true , true , "input/output ready"); - AddSignal (22, "SIGPOLL", "POLL", false, true , true , "pollable event"); - AddSignal (23, "SIGSTOP", "STOP", true , true , true , "process stop"); - AddSignal (24, "SIGTSTP", "TSTP", false, true , true , "tty stop"); - AddSignal (25, "SIGCONT", "CONT", false, true , true , "process continue"); - AddSignal (26, "SIGTTIN", "TTIN", false, true , true , "background tty read"); - AddSignal (27, "SIGTTOU", "TTOU", false, true , true , "background tty write"); - AddSignal (28, "SIGVTALRM", "VTALRM", false, true , true , "virtual time alarm"); - AddSignal (29, "SIGPROF", "PROF", false, false, false, "profiling time alarm"); - AddSignal (30, "SIGXCPU", "XCPU", false, true , true , "CPU resource exceeded"); - AddSignal (31, "SIGXFSZ", "XFSZ", false, true , true , "file size limit exceeded"); - AddSignal (32, "SIG32", "SIG32", false, true , true , "threading library internal signal 1"); - AddSignal (33, "SIG33", "SIG33", false, true , true , "threading library internal signal 2"); - AddSignal (34, "SIGRTMIN", "RTMIN", false, true , true , "real time signal 0"); - AddSignal (35, "SIGRTMIN+1", "RTMIN+1", false, true , true , "real time signal 1"); - AddSignal (36, "SIGRTMIN+2", "RTMIN+2", false, true , true , "real time signal 2"); - AddSignal (37, "SIGRTMIN+3", "RTMIN+3", false, true , true , "real time signal 3"); - AddSignal (38, "SIGRTMIN+4", "RTMIN+4", false, true , true , "real time signal 4"); - AddSignal (39, "SIGRTMIN+5", "RTMIN+5", false, true , true , "real time signal 5"); - AddSignal (40, "SIGRTMIN+6", "RTMIN+6", false, true , true , "real time signal 6"); - AddSignal (41, "SIGRTMIN+7", "RTMIN+7", false, true , true , "real time signal 7"); - AddSignal (42, "SIGRTMIN+8", "RTMIN+8", false, true , true , "real time signal 8"); - AddSignal (43, "SIGRTMIN+9", "RTMIN+9", false, true , true , "real time signal 9"); - AddSignal (44, "SIGRTMIN+10", "RTMIN+10", false, true , true , "real time signal 10"); - AddSignal (45, "SIGRTMIN+11", "RTMIN+11", false, true , true , "real time signal 11"); - AddSignal (46, "SIGRTMIN+12", "RTMIN+12", false, true , true , "real time signal 12"); - AddSignal (47, "SIGRTMIN+13", "RTMIN+13", false, true , true , "real time signal 13"); - AddSignal (48, "SIGRTMIN+14", "RTMIN+14", false, true , true , "real time signal 14"); - AddSignal (49, "SIGRTMIN+15", "RTMIN+15", false, true , true , "real time signal 15"); - AddSignal (50, "SIGRTMAX-14", "RTMAX-14", false, true , true , "real time signal 16"); // switching to SIGRTMAX-xxx to match "kill -l" output - AddSignal (51, "SIGRTMAX-13", "RTMAX-13", false, true , true , "real time signal 17"); - AddSignal (52, "SIGRTMAX-12", "RTMAX-12", false, true , true , "real time signal 18"); - AddSignal (53, "SIGRTMAX-11", "RTMAX-11", false, true , true , "real time signal 19"); - AddSignal (54, "SIGRTMAX-10", "RTMAX-10", false, true , true , "real time signal 20"); - AddSignal (55, "SIGRTMAX-9", "RTMAX-9", false, true , true , "real time signal 21"); - AddSignal (56, "SIGRTMAX-8", "RTMAX-8", false, true , true , "real time signal 22"); - AddSignal (57, "SIGRTMAX-7", "RTMAX-7", false, true , true , "real time signal 23"); - AddSignal (58, "SIGRTMAX-6", "RTMAX-6", false, true , true , "real time signal 24"); - AddSignal (59, "SIGRTMAX-5", "RTMAX-5", false, true , true , "real time signal 25"); - AddSignal (60, "SIGRTMAX-4", "RTMAX-4", false, true , true , "real time signal 26"); - AddSignal (61, "SIGRTMAX-3", "RTMAX-3", false, true , true , "real time signal 27"); - AddSignal (62, "SIGRTMAX-2", "RTMAX-2", false, true , true , "real time signal 28"); - AddSignal (63, "SIGRTMAX-1", "RTMAX-1", false, true , true , "real time signal 29"); - AddSignal (64, "SIGRTMAX", "RTMAX", false, true , true , "real time signal 30"); + // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION ALIAS + // ===== =========== ======== ===== ====== ====================================== ======== + AddSignal (1, "SIGHUP", false, true , true , "hangup" ); + AddSignal (2, "SIGINT", true , true , true , "interrupt" ); + AddSignal (3, "SIGQUIT", false, true , true , "quit" ); + AddSignal (4, "SIGILL", false, true , true , "illegal instruction" ); + AddSignal (5, "SIGTRAP", true , true , true , "trace trap (not reset when caught)" ); + AddSignal (6, "SIGABRT", false, true , true , "abort()/IOT trap", "SIGIOT"); + AddSignal (7, "SIGEMT", false, true , true , "terminate process with core dump" ); + AddSignal (8, "SIGFPE", false, true , true , "floating point exception" ); + AddSignal (9, "SIGKILL", false, true , true , "kill" ); + AddSignal (10, "SIGBUS", false, true , true , "bus error" ); + AddSignal (11, "SIGSEGV", false, true , true , "segmentation violation" ); + AddSignal (12, "SIGSYS", false, true , true , "invalid system call" ); + AddSignal (13, "SIGPIPE", false, true , true , "write to pipe with reading end closed" ); + AddSignal (14, "SIGALRM", false, false, false, "alarm" ); + AddSignal (15, "SIGTERM", false, true , true , "termination requested" ); + AddSignal (16, "SIGUSR1", false, true , true , "user defined signal 1" ); + AddSignal (17, "SIGUSR2", false, true , true , "user defined signal 2" ); + AddSignal (18, "SIGCHLD", false, false, true , "child status has changed", "SIGCLD"); + AddSignal (19, "SIGPWR", false, true , true , "power failure" ); + AddSignal (20, "SIGWINCH", false, true , true , "window size changes" ); + AddSignal (21, "SIGURG", false, true , true , "urgent data on socket" ); + AddSignal (22, "SIGIO", false, true , true , "input/output ready/Pollable event", "SIGPOLL"); + AddSignal (23, "SIGSTOP", true , true , true , "process stop" ); + AddSignal (24, "SIGTSTP", false, true , true , "tty stop" ); + AddSignal (25, "SIGCONT", false, true , true , "process continue" ); + AddSignal (26, "SIGTTIN", false, true , true , "background tty read" ); + AddSignal (27, "SIGTTOU", false, true , true , "background tty write" ); + AddSignal (28, "SIGVTALRM", false, true , true , "virtual time alarm" ); + AddSignal (29, "SIGPROF", false, false, false, "profiling time alarm" ); + AddSignal (30, "SIGXCPU", false, true , true , "CPU resource exceeded" ); + AddSignal (31, "SIGXFSZ", false, true , true , "file size limit exceeded" ); + AddSignal (32, "SIG32", false, false, false, "threading library internal signal 1" ); + AddSignal (33, "SIG33", false, false, false, "threading library internal signal 2" ); + AddSignal (34, "SIGRTMIN", false, false, false, "real time signal 0" ); + AddSignal (35, "SIGRTMIN+1", false, false, false, "real time signal 1" ); + AddSignal (36, "SIGRTMIN+2", false, false, false, "real time signal 2" ); + AddSignal (37, "SIGRTMIN+3", false, false, false, "real time signal 3" ); + AddSignal (38, "SIGRTMIN+4", false, false, false, "real time signal 4" ); + AddSignal (39, "SIGRTMIN+5", false, false, false, "real time signal 5" ); + AddSignal (40, "SIGRTMIN+6", false, false, false, "real time signal 6" ); + AddSignal (41, "SIGRTMIN+7", false, false, false, "real time signal 7" ); + AddSignal (42, "SIGRTMIN+8", false, false, false, "real time signal 8" ); + AddSignal (43, "SIGRTMIN+9", false, false, false, "real time signal 9" ); + AddSignal (44, "SIGRTMIN+10", false, false, false, "real time signal 10" ); + AddSignal (45, "SIGRTMIN+11", false, false, false, "real time signal 11" ); + AddSignal (46, "SIGRTMIN+12", false, false, false, "real time signal 12" ); + AddSignal (47, "SIGRTMIN+13", false, false, false, "real time signal 13" ); + AddSignal (48, "SIGRTMIN+14", false, false, false, "real time signal 14" ); + AddSignal (49, "SIGRTMIN+15", false, false, false, "real time signal 15" ); + AddSignal (50, "SIGRTMAX-14", false, false, false, "real time signal 16" ); // switching to SIGRTMAX-xxx to match "kill -l" output + AddSignal (51, "SIGRTMAX-13", false, false, false, "real time signal 17" ); + AddSignal (52, "SIGRTMAX-12", false, false, false, "real time signal 18" ); + AddSignal (53, "SIGRTMAX-11", false, false, false, "real time signal 19" ); + AddSignal (54, "SIGRTMAX-10", false, false, false, "real time signal 20" ); + AddSignal (55, "SIGRTMAX-9", false, false, false, "real time signal 21" ); + AddSignal (56, "SIGRTMAX-8", false, false, false, "real time signal 22" ); + AddSignal (57, "SIGRTMAX-7", false, false, false, "real time signal 23" ); + AddSignal (58, "SIGRTMAX-6", false, false, false, "real time signal 24" ); + AddSignal (59, "SIGRTMAX-5", false, false, false, "real time signal 25" ); + AddSignal (60, "SIGRTMAX-4", false, false, false, "real time signal 26" ); + AddSignal (61, "SIGRTMAX-3", false, false, false, "real time signal 27" ); + AddSignal (62, "SIGRTMAX-2", false, false, false, "real time signal 28" ); + AddSignal (63, "SIGRTMAX-1", false, false, false, "real time signal 29" ); + AddSignal (64, "SIGRTMAX", false, false, false, "real time signal 30" ); } diff --git a/source/Plugins/Process/Utility/NetBSDSignals.cpp b/source/Plugins/Process/Utility/NetBSDSignals.cpp new file mode 100644 index 0000000..5dce516 --- /dev/null +++ b/source/Plugins/Process/Utility/NetBSDSignals.cpp @@ -0,0 +1,34 @@ +//===-- NetBSDSignals.cpp --------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +// C Includes +// C++ Includes +// Other libraries and framework includes +// Project includes +#include "NetBSDSignals.h" + +using namespace lldb_private; + +NetBSDSignals::NetBSDSignals() + : UnixSignals() +{ + Reset(); +} + +void +NetBSDSignals::Reset() +{ + UnixSignals::Reset(); + // SIGNO NAME SUPPRESS STOP NOTIFY DESCRIPTION + // ====== ============ ======== ====== ====== =================================================== + AddSignal (32, "SIGPWR", false, true , true , "power fail/restart (not reset when caught)"); +#ifdef SIGRTMIN /* SIGRTMAX */ + /* Kernel only; not exposed to userland yet */ +#endif +} diff --git a/source/Plugins/Process/Utility/NetBSDSignals.h b/source/Plugins/Process/Utility/NetBSDSignals.h new file mode 100644 index 0000000..441402b --- /dev/null +++ b/source/Plugins/Process/Utility/NetBSDSignals.h @@ -0,0 +1,31 @@ +//===-- NetBSDSignals.h ----------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef liblldb_NetBSDSignals_H_ +#define liblldb_NetBSDSignals_H_ + +// Project includes +#include "lldb/Target/UnixSignals.h" + +namespace lldb_private { + +/// NetBSD specific set of Unix signals. +class NetBSDSignals : public UnixSignals +{ +public: + NetBSDSignals(); + +private: + void + Reset() override; +}; + +} // namespace lldb_private + +#endif // liblldb_NetBSDSignals_H_ diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp index 4138a6a..452fb47 100644 --- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp +++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp @@ -34,8 +34,8 @@ #endif // Project includes -#include "ARM_GCC_Registers.h" #include "ARM_DWARF_Registers.h" +#include "Utility/ARM_ehframe_Registers.h" #include "llvm/ADT/STLExtras.h" @@ -172,89 +172,69 @@ enum }; -RegisterContextDarwin_arm::RegisterContextDarwin_arm(Thread &thread, uint32_t concrete_frame_idx) : - RegisterContext(thread, concrete_frame_idx), - gpr(), - fpu(), - exc() -{ - uint32_t i; - for (i=0; i<kNumErrors; i++) - { - gpr_errs[i] = -1; - fpu_errs[i] = -1; - exc_errs[i] = -1; - } -} - -RegisterContextDarwin_arm::~RegisterContextDarwin_arm() -{ -} - - #define GPR_OFFSET(idx) ((idx) * 4) #define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextDarwin_arm::GPR)) #define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU)) #define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextDarwin_arm::DBG, reg) + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC))) -#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL +#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL #define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC)) static RegisterInfo g_register_infos[] = { // General purpose registers -// NAME ALT SZ OFFSET ENCODING FORMAT COMPILER DWARF GENERIC GDB LLDB NATIVE VALUE REGS INVALIDATE REGS +// NAME ALT SZ OFFSET ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB NATIVE VALUE REGS INVALIDATE REGS // ====== ======= == ============= ============= ============ =============== =============== ========================= ===================== ============= ========== =============== -{ "r0", NULL, 4, GPR_OFFSET(0), eEncodingUint, eFormatHex, { gcc_r0, dwarf_r0, LLDB_INVALID_REGNUM, gdb_arm_r0, gpr_r0 }, NULL, NULL}, -{ "r1", NULL, 4, GPR_OFFSET(1), eEncodingUint, eFormatHex, { gcc_r1, dwarf_r1, LLDB_INVALID_REGNUM, gdb_arm_r1, gpr_r1 }, NULL, NULL}, -{ "r2", NULL, 4, GPR_OFFSET(2), eEncodingUint, eFormatHex, { gcc_r2, dwarf_r2, LLDB_INVALID_REGNUM, gdb_arm_r2, gpr_r2 }, NULL, NULL}, -{ "r3", NULL, 4, GPR_OFFSET(3), eEncodingUint, eFormatHex, { gcc_r3, dwarf_r3, LLDB_INVALID_REGNUM, gdb_arm_r3, gpr_r3 }, NULL, NULL}, -{ "r4", NULL, 4, GPR_OFFSET(4), eEncodingUint, eFormatHex, { gcc_r4, dwarf_r4, LLDB_INVALID_REGNUM, gdb_arm_r4, gpr_r4 }, NULL, NULL}, -{ "r5", NULL, 4, GPR_OFFSET(5), eEncodingUint, eFormatHex, { gcc_r5, dwarf_r5, LLDB_INVALID_REGNUM, gdb_arm_r5, gpr_r5 }, NULL, NULL}, -{ "r6", NULL, 4, GPR_OFFSET(6), eEncodingUint, eFormatHex, { gcc_r6, dwarf_r6, LLDB_INVALID_REGNUM, gdb_arm_r6, gpr_r6 }, NULL, NULL}, -{ "r7", NULL, 4, GPR_OFFSET(7), eEncodingUint, eFormatHex, { gcc_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, gdb_arm_r7, gpr_r7 }, NULL, NULL}, -{ "r8", NULL, 4, GPR_OFFSET(8), eEncodingUint, eFormatHex, { gcc_r8, dwarf_r8, LLDB_INVALID_REGNUM, gdb_arm_r8, gpr_r8 }, NULL, NULL}, -{ "r9", NULL, 4, GPR_OFFSET(9), eEncodingUint, eFormatHex, { gcc_r9, dwarf_r9, LLDB_INVALID_REGNUM, gdb_arm_r9, gpr_r9 }, NULL, NULL}, -{ "r10", NULL, 4, GPR_OFFSET(10), eEncodingUint, eFormatHex, { gcc_r10, dwarf_r10, LLDB_INVALID_REGNUM, gdb_arm_r10, gpr_r10 }, NULL, NULL}, -{ "r11", NULL, 4, GPR_OFFSET(11), eEncodingUint, eFormatHex, { gcc_r11, dwarf_r11, LLDB_INVALID_REGNUM, gdb_arm_r11, gpr_r11 }, NULL, NULL}, -{ "r12", NULL, 4, GPR_OFFSET(12), eEncodingUint, eFormatHex, { gcc_r12, dwarf_r12, LLDB_INVALID_REGNUM, gdb_arm_r12, gpr_r12 }, NULL, NULL}, -{ "sp", "r13", 4, GPR_OFFSET(13), eEncodingUint, eFormatHex, { gcc_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, gdb_arm_sp, gpr_sp }, NULL, NULL}, -{ "lr", "r14", 4, GPR_OFFSET(14), eEncodingUint, eFormatHex, { gcc_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, gdb_arm_lr, gpr_lr }, NULL, NULL}, -{ "pc", "r15", 4, GPR_OFFSET(15), eEncodingUint, eFormatHex, { gcc_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, gdb_arm_pc, gpr_pc }, NULL, NULL}, -{ "cpsr", "psr", 4, GPR_OFFSET(16), eEncodingUint, eFormatHex, { gcc_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, gdb_arm_cpsr, gpr_cpsr }, NULL, NULL}, - -{ "s0", NULL, 4, FPU_OFFSET(0), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, gdb_arm_s0, fpu_s0 }, NULL, NULL}, -{ "s1", NULL, 4, FPU_OFFSET(1), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, gdb_arm_s1, fpu_s1 }, NULL, NULL}, -{ "s2", NULL, 4, FPU_OFFSET(2), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, gdb_arm_s2, fpu_s2 }, NULL, NULL}, -{ "s3", NULL, 4, FPU_OFFSET(3), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, gdb_arm_s3, fpu_s3 }, NULL, NULL}, -{ "s4", NULL, 4, FPU_OFFSET(4), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, gdb_arm_s4, fpu_s4 }, NULL, NULL}, -{ "s5", NULL, 4, FPU_OFFSET(5), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, gdb_arm_s5, fpu_s5 }, NULL, NULL}, -{ "s6", NULL, 4, FPU_OFFSET(6), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, gdb_arm_s6, fpu_s6 }, NULL, NULL}, -{ "s7", NULL, 4, FPU_OFFSET(7), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, gdb_arm_s7, fpu_s7 }, NULL, NULL}, -{ "s8", NULL, 4, FPU_OFFSET(8), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, gdb_arm_s8, fpu_s8 }, NULL, NULL}, -{ "s9", NULL, 4, FPU_OFFSET(9), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, gdb_arm_s9, fpu_s9 }, NULL, NULL}, -{ "s10", NULL, 4, FPU_OFFSET(10), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, gdb_arm_s10, fpu_s10 }, NULL, NULL}, -{ "s11", NULL, 4, FPU_OFFSET(11), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, gdb_arm_s11, fpu_s11 }, NULL, NULL}, -{ "s12", NULL, 4, FPU_OFFSET(12), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, gdb_arm_s12, fpu_s12 }, NULL, NULL}, -{ "s13", NULL, 4, FPU_OFFSET(13), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, gdb_arm_s13, fpu_s13 }, NULL, NULL}, -{ "s14", NULL, 4, FPU_OFFSET(14), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, gdb_arm_s14, fpu_s14 }, NULL, NULL}, -{ "s15", NULL, 4, FPU_OFFSET(15), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, gdb_arm_s15, fpu_s15 }, NULL, NULL}, -{ "s16", NULL, 4, FPU_OFFSET(16), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, gdb_arm_s16, fpu_s16 }, NULL, NULL}, -{ "s17", NULL, 4, FPU_OFFSET(17), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, gdb_arm_s17, fpu_s17 }, NULL, NULL}, -{ "s18", NULL, 4, FPU_OFFSET(18), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, gdb_arm_s18, fpu_s18 }, NULL, NULL}, -{ "s19", NULL, 4, FPU_OFFSET(19), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, gdb_arm_s19, fpu_s19 }, NULL, NULL}, -{ "s20", NULL, 4, FPU_OFFSET(20), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, gdb_arm_s20, fpu_s20 }, NULL, NULL}, -{ "s21", NULL, 4, FPU_OFFSET(21), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, gdb_arm_s21, fpu_s21 }, NULL, NULL}, -{ "s22", NULL, 4, FPU_OFFSET(22), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, gdb_arm_s22, fpu_s22 }, NULL, NULL}, -{ "s23", NULL, 4, FPU_OFFSET(23), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, gdb_arm_s23, fpu_s23 }, NULL, NULL}, -{ "s24", NULL, 4, FPU_OFFSET(24), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, gdb_arm_s24, fpu_s24 }, NULL, NULL}, -{ "s25", NULL, 4, FPU_OFFSET(25), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, gdb_arm_s25, fpu_s25 }, NULL, NULL}, -{ "s26", NULL, 4, FPU_OFFSET(26), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, gdb_arm_s26, fpu_s26 }, NULL, NULL}, -{ "s27", NULL, 4, FPU_OFFSET(27), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, gdb_arm_s27, fpu_s27 }, NULL, NULL}, -{ "s28", NULL, 4, FPU_OFFSET(28), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, gdb_arm_s28, fpu_s28 }, NULL, NULL}, -{ "s29", NULL, 4, FPU_OFFSET(29), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, gdb_arm_s29, fpu_s29 }, NULL, NULL}, -{ "s30", NULL, 4, FPU_OFFSET(30), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, gdb_arm_s30, fpu_s30 }, NULL, NULL}, -{ "s31", NULL, 4, FPU_OFFSET(31), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, gdb_arm_s31, fpu_s31 }, NULL, NULL}, -{ "fpscr", NULL, 4, FPU_OFFSET(32), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, gdb_arm_fpscr, fpu_fpscr }, NULL, NULL}, +{ "r0", NULL, 4, GPR_OFFSET(0), eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r0 }, NULL, NULL}, +{ "r1", NULL, 4, GPR_OFFSET(1), eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r1 }, NULL, NULL}, +{ "r2", NULL, 4, GPR_OFFSET(2), eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r2 }, NULL, NULL}, +{ "r3", NULL, 4, GPR_OFFSET(3), eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r3 }, NULL, NULL}, +{ "r4", NULL, 4, GPR_OFFSET(4), eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4 }, NULL, NULL}, +{ "r5", NULL, 4, GPR_OFFSET(5), eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5 }, NULL, NULL}, +{ "r6", NULL, 4, GPR_OFFSET(6), eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6 }, NULL, NULL}, +{ "r7", NULL, 4, GPR_OFFSET(7), eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM, gpr_r7 }, NULL, NULL}, +{ "r8", NULL, 4, GPR_OFFSET(8), eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8 }, NULL, NULL}, +{ "r9", NULL, 4, GPR_OFFSET(9), eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9 }, NULL, NULL}, +{ "r10", NULL, 4, GPR_OFFSET(10), eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r10 }, NULL, NULL}, +{ "r11", NULL, 4, GPR_OFFSET(11), eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r11 }, NULL, NULL}, +{ "r12", NULL, 4, GPR_OFFSET(12), eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r12 }, NULL, NULL}, +{ "sp", "r13", 4, GPR_OFFSET(13), eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM, gpr_sp }, NULL, NULL}, +{ "lr", "r14", 4, GPR_OFFSET(14), eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM, gpr_lr }, NULL, NULL}, +{ "pc", "r15", 4, GPR_OFFSET(15), eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM, gpr_pc }, NULL, NULL}, +{ "cpsr", "psr", 4, GPR_OFFSET(16), eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_cpsr }, NULL, NULL}, + +{ "s0", NULL, 4, FPU_OFFSET(0), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s0 }, NULL, NULL}, +{ "s1", NULL, 4, FPU_OFFSET(1), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s1 }, NULL, NULL}, +{ "s2", NULL, 4, FPU_OFFSET(2), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s2 }, NULL, NULL}, +{ "s3", NULL, 4, FPU_OFFSET(3), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s3 }, NULL, NULL}, +{ "s4", NULL, 4, FPU_OFFSET(4), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s4 }, NULL, NULL}, +{ "s5", NULL, 4, FPU_OFFSET(5), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s5 }, NULL, NULL}, +{ "s6", NULL, 4, FPU_OFFSET(6), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s6 }, NULL, NULL}, +{ "s7", NULL, 4, FPU_OFFSET(7), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s7 }, NULL, NULL}, +{ "s8", NULL, 4, FPU_OFFSET(8), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s8 }, NULL, NULL}, +{ "s9", NULL, 4, FPU_OFFSET(9), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s9 }, NULL, NULL}, +{ "s10", NULL, 4, FPU_OFFSET(10), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s10 }, NULL, NULL}, +{ "s11", NULL, 4, FPU_OFFSET(11), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s11 }, NULL, NULL}, +{ "s12", NULL, 4, FPU_OFFSET(12), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s12 }, NULL, NULL}, +{ "s13", NULL, 4, FPU_OFFSET(13), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s13 }, NULL, NULL}, +{ "s14", NULL, 4, FPU_OFFSET(14), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s14 }, NULL, NULL}, +{ "s15", NULL, 4, FPU_OFFSET(15), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s15 }, NULL, NULL}, +{ "s16", NULL, 4, FPU_OFFSET(16), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s16 }, NULL, NULL}, +{ "s17", NULL, 4, FPU_OFFSET(17), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s17 }, NULL, NULL}, +{ "s18", NULL, 4, FPU_OFFSET(18), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s18 }, NULL, NULL}, +{ "s19", NULL, 4, FPU_OFFSET(19), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s19 }, NULL, NULL}, +{ "s20", NULL, 4, FPU_OFFSET(20), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s20 }, NULL, NULL}, +{ "s21", NULL, 4, FPU_OFFSET(21), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s21 }, NULL, NULL}, +{ "s22", NULL, 4, FPU_OFFSET(22), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s22 }, NULL, NULL}, +{ "s23", NULL, 4, FPU_OFFSET(23), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s23 }, NULL, NULL}, +{ "s24", NULL, 4, FPU_OFFSET(24), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s24 }, NULL, NULL}, +{ "s25", NULL, 4, FPU_OFFSET(25), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s25 }, NULL, NULL}, +{ "s26", NULL, 4, FPU_OFFSET(26), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s26 }, NULL, NULL}, +{ "s27", NULL, 4, FPU_OFFSET(27), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s27 }, NULL, NULL}, +{ "s28", NULL, 4, FPU_OFFSET(28), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s28 }, NULL, NULL}, +{ "s29", NULL, 4, FPU_OFFSET(29), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s29 }, NULL, NULL}, +{ "s30", NULL, 4, FPU_OFFSET(30), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s30 }, NULL, NULL}, +{ "s31", NULL, 4, FPU_OFFSET(31), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s31 }, NULL, NULL}, +{ "fpscr", NULL, 4, FPU_OFFSET(32), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpscr }, NULL, NULL}, { "exception",NULL, 4, EXC_OFFSET(0), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception }, NULL, NULL}, { "fsr", NULL, 4, EXC_OFFSET(1), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_fsr }, NULL, NULL}, @@ -403,6 +383,26 @@ g_exc_regnums[] = static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos); +RegisterContextDarwin_arm::RegisterContextDarwin_arm(Thread &thread, uint32_t concrete_frame_idx) : + RegisterContext(thread, concrete_frame_idx), + gpr(), + fpu(), + exc() +{ + uint32_t i; + for (i=0; i<kNumErrors; i++) + { + gpr_errs[i] = -1; + fpu_errs[i] = -1; + exc_errs[i] = -1; + } +} + +RegisterContextDarwin_arm::~RegisterContextDarwin_arm() +{ +} + + void RegisterContextDarwin_arm::InvalidateAllRegisters () { @@ -940,27 +940,27 @@ RegisterContextDarwin_arm::ConvertRegisterKindToRegisterNumber (lldb::RegisterKi break; } } - else if (kind == eRegisterKindGCC) + else if (kind == eRegisterKindEHFrame) { switch (reg) { - case gcc_r0: return gpr_r0; - case gcc_r1: return gpr_r1; - case gcc_r2: return gpr_r2; - case gcc_r3: return gpr_r3; - case gcc_r4: return gpr_r4; - case gcc_r5: return gpr_r5; - case gcc_r6: return gpr_r6; - case gcc_r7: return gpr_r7; - case gcc_r8: return gpr_r8; - case gcc_r9: return gpr_r9; - case gcc_r10: return gpr_r10; - case gcc_r11: return gpr_r11; - case gcc_r12: return gpr_r12; - case gcc_sp: return gpr_sp; - case gcc_lr: return gpr_lr; - case gcc_pc: return gpr_pc; - case gcc_cpsr: return gpr_cpsr; + case ehframe_r0: return gpr_r0; + case ehframe_r1: return gpr_r1; + case ehframe_r2: return gpr_r2; + case ehframe_r3: return gpr_r3; + case ehframe_r4: return gpr_r4; + case ehframe_r5: return gpr_r5; + case ehframe_r6: return gpr_r6; + case ehframe_r7: return gpr_r7; + case ehframe_r8: return gpr_r8; + case ehframe_r9: return gpr_r9; + case ehframe_r10: return gpr_r10; + case ehframe_r11: return gpr_r11; + case ehframe_r12: return gpr_r12; + case ehframe_sp: return gpr_sp; + case ehframe_lr: return gpr_lr; + case ehframe_pc: return gpr_pc; + case ehframe_cpsr: return gpr_cpsr; } } else if (kind == eRegisterKindLLDB) diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h index 23134ef..f4d8225 100644 --- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h +++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.h @@ -51,61 +51,59 @@ class RegisterContextDarwin_arm : public lldb_private::RegisterContext { public: - RegisterContextDarwin_arm(lldb_private::Thread &thread, uint32_t concrete_frame_idx); - virtual - ~RegisterContextDarwin_arm(); + ~RegisterContextDarwin_arm() override; - virtual void - InvalidateAllRegisters (); + void + InvalidateAllRegisters() override; - virtual size_t - GetRegisterCount (); + size_t + GetRegisterCount() override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual size_t - GetRegisterSetCount (); + size_t + GetRegisterSetCount() override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t set); + const lldb_private::RegisterSet * + GetRegisterSet(size_t set) override; - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, - lldb_private::RegisterValue ®_value); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue ®_value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, - const lldb_private::RegisterValue ®_value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue ®_value) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; - virtual uint32_t - NumSupportedHardwareBreakpoints (); + uint32_t + NumSupportedHardwareBreakpoints() override; - virtual uint32_t - SetHardwareBreakpoint (lldb::addr_t addr, size_t size); + uint32_t + SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override; - virtual bool - ClearHardwareBreakpoint (uint32_t hw_idx); + bool + ClearHardwareBreakpoint(uint32_t hw_idx) override; - virtual uint32_t - NumSupportedHardwareWatchpoints (); + uint32_t + NumSupportedHardwareWatchpoints() override; - virtual uint32_t - SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write); + uint32_t + SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override; - virtual bool - ClearHardwareWatchpoint (uint32_t hw_index); + bool + ClearHardwareWatchpoint(uint32_t hw_index) override; struct GPR { @@ -113,7 +111,6 @@ public: uint32_t cpsr; // CPSR }; - struct QReg { uint8_t bytes[16]; @@ -163,7 +160,6 @@ public: LogDBGRegisters (lldb_private::Log *log, const DBG& dbg); protected: - enum { GPRRegSet = 1, // ARM_THREAD_STATE @@ -330,4 +326,4 @@ protected: GetRegisterInfos (); }; -#endif // liblldb_RegisterContextDarwin_arm_h_ +#endif // liblldb_RegisterContextDarwin_arm_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp index e08a873..7de042d 100644 --- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp +++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp @@ -36,31 +36,11 @@ #endif // Project includes -#include "ARM64_GCC_Registers.h" #include "ARM64_DWARF_Registers.h" using namespace lldb; using namespace lldb_private; -RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(Thread &thread, uint32_t concrete_frame_idx) : - RegisterContext(thread, concrete_frame_idx), - gpr(), - fpu(), - exc() -{ - uint32_t i; - for (i=0; i<kNumErrors; i++) - { - gpr_errs[i] = -1; - fpu_errs[i] = -1; - exc_errs[i] = -1; - } -} - -RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64() -{ -} - #define GPR_OFFSET(idx) ((idx) * 8) #define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::GPR, reg)) @@ -71,7 +51,7 @@ RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64() #define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::EXC, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU)) #define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::DBG, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC)) -#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL +#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL #define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC)) //----------------------------------------------------------------------------- @@ -173,6 +153,26 @@ g_exc_regnums[] = static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos_arm64); +RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(Thread &thread, uint32_t concrete_frame_idx) : + RegisterContext(thread, concrete_frame_idx), + gpr(), + fpu(), + exc() +{ + uint32_t i; + for (i=0; i<kNumErrors; i++) + { + gpr_errs[i] = -1; + fpu_errs[i] = -1; + exc_errs[i] = -1; + } +} + +RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64() +{ +} + + void RegisterContextDarwin_arm64::InvalidateAllRegisters () { @@ -488,7 +488,7 @@ RegisterContextDarwin_arm64::ReadRegister (const RegisterInfo *reg_info, Registe case fpu_v29: case fpu_v30: case fpu_v31: - value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size, lldb::endian::InlHostByteOrder()); + value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size, endian::InlHostByteOrder()); break; case fpu_fpsr: @@ -770,44 +770,44 @@ RegisterContextDarwin_arm64::ConvertRegisterKindToRegisterNumber (RegisterKind k break; } } - else if (kind == eRegisterKindGCC) + else if (kind == eRegisterKindEHFrame) { switch (reg) { - case arm64_gcc::x0: return gpr_x0; - case arm64_gcc::x1: return gpr_x1; - case arm64_gcc::x2: return gpr_x2; - case arm64_gcc::x3: return gpr_x3; - case arm64_gcc::x4: return gpr_x4; - case arm64_gcc::x5: return gpr_x5; - case arm64_gcc::x6: return gpr_x6; - case arm64_gcc::x7: return gpr_x7; - case arm64_gcc::x8: return gpr_x8; - case arm64_gcc::x9: return gpr_x9; - case arm64_gcc::x10: return gpr_x10; - case arm64_gcc::x11: return gpr_x11; - case arm64_gcc::x12: return gpr_x12; - case arm64_gcc::x13: return gpr_x13; - case arm64_gcc::x14: return gpr_x14; - case arm64_gcc::x15: return gpr_x15; - case arm64_gcc::x16: return gpr_x16; - case arm64_gcc::x17: return gpr_x17; - case arm64_gcc::x18: return gpr_x18; - case arm64_gcc::x19: return gpr_x19; - case arm64_gcc::x20: return gpr_x20; - case arm64_gcc::x21: return gpr_x21; - case arm64_gcc::x22: return gpr_x22; - case arm64_gcc::x23: return gpr_x23; - case arm64_gcc::x24: return gpr_x24; - case arm64_gcc::x25: return gpr_x25; - case arm64_gcc::x26: return gpr_x26; - case arm64_gcc::x27: return gpr_x27; - case arm64_gcc::x28: return gpr_x28; - case arm64_gcc::fp: return gpr_fp; - case arm64_gcc::sp: return gpr_sp; - case arm64_gcc::lr: return gpr_lr; - case arm64_gcc::pc: return gpr_pc; - case arm64_gcc::cpsr: return gpr_cpsr; + case arm64_ehframe::x0: return gpr_x0; + case arm64_ehframe::x1: return gpr_x1; + case arm64_ehframe::x2: return gpr_x2; + case arm64_ehframe::x3: return gpr_x3; + case arm64_ehframe::x4: return gpr_x4; + case arm64_ehframe::x5: return gpr_x5; + case arm64_ehframe::x6: return gpr_x6; + case arm64_ehframe::x7: return gpr_x7; + case arm64_ehframe::x8: return gpr_x8; + case arm64_ehframe::x9: return gpr_x9; + case arm64_ehframe::x10: return gpr_x10; + case arm64_ehframe::x11: return gpr_x11; + case arm64_ehframe::x12: return gpr_x12; + case arm64_ehframe::x13: return gpr_x13; + case arm64_ehframe::x14: return gpr_x14; + case arm64_ehframe::x15: return gpr_x15; + case arm64_ehframe::x16: return gpr_x16; + case arm64_ehframe::x17: return gpr_x17; + case arm64_ehframe::x18: return gpr_x18; + case arm64_ehframe::x19: return gpr_x19; + case arm64_ehframe::x20: return gpr_x20; + case arm64_ehframe::x21: return gpr_x21; + case arm64_ehframe::x22: return gpr_x22; + case arm64_ehframe::x23: return gpr_x23; + case arm64_ehframe::x24: return gpr_x24; + case arm64_ehframe::x25: return gpr_x25; + case arm64_ehframe::x26: return gpr_x26; + case arm64_ehframe::x27: return gpr_x27; + case arm64_ehframe::x28: return gpr_x28; + case arm64_ehframe::fp: return gpr_fp; + case arm64_ehframe::sp: return gpr_sp; + case arm64_ehframe::lr: return gpr_lr; + case arm64_ehframe::pc: return gpr_pc; + case arm64_ehframe::cpsr: return gpr_cpsr; } } else if (kind == eRegisterKindLLDB) diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h index aeac15e..b228c42 100644 --- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h +++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h @@ -32,52 +32,50 @@ class RegisterContextDarwin_arm64 : public lldb_private::RegisterContext { public: - RegisterContextDarwin_arm64(lldb_private::Thread &thread, uint32_t concrete_frame_idx); - virtual - ~RegisterContextDarwin_arm64(); + ~RegisterContextDarwin_arm64() override; - virtual void - InvalidateAllRegisters (); + void + InvalidateAllRegisters() override; - virtual size_t - GetRegisterCount (); + size_t + GetRegisterCount() override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual size_t - GetRegisterSetCount (); + size_t + GetRegisterSetCount() override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t set); + const lldb_private::RegisterSet * + GetRegisterSet(size_t set) override; - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, - lldb_private::RegisterValue ®_value); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue ®_value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, - const lldb_private::RegisterValue ®_value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue ®_value) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; - virtual uint32_t - NumSupportedHardwareWatchpoints (); + uint32_t + NumSupportedHardwareWatchpoints() override; - virtual uint32_t - SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write); + uint32_t + SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override; - virtual bool - ClearHardwareWatchpoint (uint32_t hw_index); + bool + ClearHardwareWatchpoint(uint32_t hw_index) override; // mirrors <mach/arm/thread_status.h> arm_thread_state64_t struct GPR @@ -90,7 +88,6 @@ public: uint32_t cpsr; // cpsr }; - struct VReg { uint8_t bytes[16]; @@ -126,7 +123,6 @@ public: LogDBGRegisters (lldb_private::Log *log, const DBG& dbg); protected: - enum { GPRRegSet = 6, // ARM_THREAD_STATE64 @@ -293,4 +289,4 @@ protected: GetRegisterInfos (); }; -#endif // liblldb_RegisterContextDarwin_arm64_h_ +#endif // liblldb_RegisterContextDarwin_arm64_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp index 08144bf..1b01c28 100644 --- a/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp +++ b/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp @@ -98,16 +98,16 @@ enum enum { - gcc_eax = 0, - gcc_ecx, - gcc_edx, - gcc_ebx, - gcc_ebp, - gcc_esp, - gcc_esi, - gcc_edi, - gcc_eip, - gcc_eflags + ehframe_eax = 0, + ehframe_ecx, + ehframe_edx, + ehframe_ebx, + ehframe_ebp, + ehframe_esp, + ehframe_esi, + ehframe_edi, + ehframe_eip, + ehframe_eflags }; enum @@ -140,79 +140,6 @@ enum dwarf_xmm7 }; -enum -{ - gdb_eax = 0, - gdb_ecx = 1, - gdb_edx = 2, - gdb_ebx = 3, - gdb_esp = 4, - gdb_ebp = 5, - gdb_esi = 6, - gdb_edi = 7, - gdb_eip = 8, - gdb_eflags = 9, - gdb_cs = 10, - gdb_ss = 11, - gdb_ds = 12, - gdb_es = 13, - gdb_fs = 14, - gdb_gs = 15, - gdb_stmm0 = 16, - gdb_stmm1 = 17, - gdb_stmm2 = 18, - gdb_stmm3 = 19, - gdb_stmm4 = 20, - gdb_stmm5 = 21, - gdb_stmm6 = 22, - gdb_stmm7 = 23, - gdb_fctrl = 24, gdb_fcw = gdb_fctrl, - gdb_fstat = 25, gdb_fsw = gdb_fstat, - gdb_ftag = 26, gdb_ftw = gdb_ftag, - gdb_fiseg = 27, gdb_fpu_cs = gdb_fiseg, - gdb_fioff = 28, gdb_ip = gdb_fioff, - gdb_foseg = 29, gdb_fpu_ds = gdb_foseg, - gdb_fooff = 30, gdb_dp = gdb_fooff, - gdb_fop = 31, - gdb_xmm0 = 32, - gdb_xmm1 = 33, - gdb_xmm2 = 34, - gdb_xmm3 = 35, - gdb_xmm4 = 36, - gdb_xmm5 = 37, - gdb_xmm6 = 38, - gdb_xmm7 = 39, - gdb_mxcsr = 40, - gdb_mm0 = 41, - gdb_mm1 = 42, - gdb_mm2 = 43, - gdb_mm3 = 44, - gdb_mm4 = 45, - gdb_mm5 = 46, - gdb_mm6 = 47, - gdb_mm7 = 48 -}; - -RegisterContextDarwin_i386::RegisterContextDarwin_i386 (Thread &thread, uint32_t concrete_frame_idx) : - RegisterContext(thread, concrete_frame_idx), - gpr(), - fpu(), - exc() -{ - uint32_t i; - for (i=0; i<kNumErrors; i++) - { - gpr_errs[i] = -1; - fpu_errs[i] = -1; - exc_errs[i] = -1; - } -} - -RegisterContextDarwin_i386::~RegisterContextDarwin_i386() -{ -} - - #define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::GPR, reg)) #define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::FPU, reg) + sizeof (RegisterContextDarwin_i386::GPR)) @@ -224,42 +151,42 @@ RegisterContextDarwin_i386::~RegisterContextDarwin_i386() // sizes and offsets. #define DEFINE_GPR(reg, alt) #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex #define DEFINE_FPU_UINT(reg) #reg, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg), FPU_OFFSET(reg), eEncodingUint, eFormatHex -#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_##reg##i, LLDB_INVALID_REGNUM, gdb_##reg##i, fpu_##reg##i }, NULL, NULL +#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_i386::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_##reg##i, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_##reg##i }, NULL, NULL #define DEFINE_EXC(reg) #reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *)NULL)->reg), EXC_OFFSET(reg), eEncodingUint, eFormatHex #define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU) + sizeof (RegisterContextDarwin_i386::EXC)) static RegisterInfo g_register_infos[] = { -// Macro auto defines most stuff GCC DWARF GENERIC GDB LLDB VALUE REGS INVALIDATE REGS +// Macro auto defines most stuff eh_frame DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS // =============================== ======================= =================== ========================= ================== ================= ========== =============== - { DEFINE_GPR(eax , NULL) , { gcc_eax , dwarf_eax , LLDB_INVALID_REGNUM , gdb_eax , gpr_eax }, NULL, NULL}, - { DEFINE_GPR(ebx , NULL) , { gcc_ebx , dwarf_ebx , LLDB_INVALID_REGNUM , gdb_ebx , gpr_ebx }, NULL, NULL}, - { DEFINE_GPR(ecx , NULL) , { gcc_ecx , dwarf_ecx , LLDB_INVALID_REGNUM , gdb_ecx , gpr_ecx }, NULL, NULL}, - { DEFINE_GPR(edx , NULL) , { gcc_edx , dwarf_edx , LLDB_INVALID_REGNUM , gdb_edx , gpr_edx }, NULL, NULL}, - { DEFINE_GPR(edi , NULL) , { gcc_edi , dwarf_edi , LLDB_INVALID_REGNUM , gdb_edi , gpr_edi }, NULL, NULL}, - { DEFINE_GPR(esi , NULL) , { gcc_esi , dwarf_esi , LLDB_INVALID_REGNUM , gdb_esi , gpr_esi }, NULL, NULL}, - { DEFINE_GPR(ebp , "fp") , { gcc_ebp , dwarf_ebp , LLDB_REGNUM_GENERIC_FP , gdb_ebp , gpr_ebp }, NULL, NULL}, - { DEFINE_GPR(esp , "sp") , { gcc_esp , dwarf_esp , LLDB_REGNUM_GENERIC_SP , gdb_esp , gpr_esp }, NULL, NULL}, - { DEFINE_GPR(ss , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_ss , gpr_ss }, NULL, NULL}, - { DEFINE_GPR(eflags , "flags") , { gcc_eflags , dwarf_eflags , LLDB_REGNUM_GENERIC_FLAGS , gdb_eflags , gpr_eflags }, NULL, NULL}, - { DEFINE_GPR(eip , "pc") , { gcc_eip , dwarf_eip , LLDB_REGNUM_GENERIC_PC , gdb_eip , gpr_eip }, NULL, NULL}, - { DEFINE_GPR(cs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_cs , gpr_cs }, NULL, NULL}, - { DEFINE_GPR(ds , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_ds , gpr_ds }, NULL, NULL}, - { DEFINE_GPR(es , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_es , gpr_es }, NULL, NULL}, - { DEFINE_GPR(fs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fs , gpr_fs }, NULL, NULL}, - { DEFINE_GPR(gs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_gs , gpr_gs }, NULL, NULL}, - - { DEFINE_FPU_UINT(fcw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fcw , fpu_fcw }, NULL, NULL}, - { DEFINE_FPU_UINT(fsw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fsw , fpu_fsw }, NULL, NULL}, - { DEFINE_FPU_UINT(ftw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_ftw , fpu_ftw }, NULL, NULL}, - { DEFINE_FPU_UINT(fop) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fop , fpu_fop }, NULL, NULL}, - { DEFINE_FPU_UINT(ip) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_ip , fpu_ip }, NULL, NULL}, - { DEFINE_FPU_UINT(cs) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_cs , fpu_cs }, NULL, NULL}, - { DEFINE_FPU_UINT(dp) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_dp , fpu_dp }, NULL, NULL}, - { DEFINE_FPU_UINT(ds) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_ds , fpu_ds }, NULL, NULL}, - { DEFINE_FPU_UINT(mxcsr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_mxcsr , fpu_mxcsr }, NULL, NULL}, - { DEFINE_FPU_UINT(mxcsrmask) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsrmask}, NULL, NULL}, + { DEFINE_GPR(eax , NULL) , { ehframe_eax , dwarf_eax , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_eax }, NULL, NULL}, + { DEFINE_GPR(ebx , NULL) , { ehframe_ebx , dwarf_ebx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ebx }, NULL, NULL}, + { DEFINE_GPR(ecx , NULL) , { ehframe_ecx , dwarf_ecx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ecx }, NULL, NULL}, + { DEFINE_GPR(edx , NULL) , { ehframe_edx , dwarf_edx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_edx }, NULL, NULL}, + { DEFINE_GPR(edi , NULL) , { ehframe_edi , dwarf_edi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_edi }, NULL, NULL}, + { DEFINE_GPR(esi , NULL) , { ehframe_esi , dwarf_esi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_esi }, NULL, NULL}, + { DEFINE_GPR(ebp , "fp") , { ehframe_ebp , dwarf_ebp , LLDB_REGNUM_GENERIC_FP , LLDB_INVALID_REGNUM, gpr_ebp }, NULL, NULL}, + { DEFINE_GPR(esp , "sp") , { ehframe_esp , dwarf_esp , LLDB_REGNUM_GENERIC_SP , LLDB_INVALID_REGNUM, gpr_esp }, NULL, NULL}, + { DEFINE_GPR(ss , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ss }, NULL, NULL}, + { DEFINE_GPR(eflags , "flags") , { ehframe_eflags , dwarf_eflags , LLDB_REGNUM_GENERIC_FLAGS , LLDB_INVALID_REGNUM, gpr_eflags }, NULL, NULL}, + { DEFINE_GPR(eip , "pc") , { ehframe_eip , dwarf_eip , LLDB_REGNUM_GENERIC_PC , LLDB_INVALID_REGNUM, gpr_eip }, NULL, NULL}, + { DEFINE_GPR(cs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_cs }, NULL, NULL}, + { DEFINE_GPR(ds , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_ds }, NULL, NULL}, + { DEFINE_GPR(es , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_es }, NULL, NULL}, + { DEFINE_GPR(fs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_fs }, NULL, NULL}, + { DEFINE_GPR(gs , NULL) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_gs }, NULL, NULL}, + + { DEFINE_FPU_UINT(fcw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fcw }, NULL, NULL}, + { DEFINE_FPU_UINT(fsw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fsw }, NULL, NULL}, + { DEFINE_FPU_UINT(ftw) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ftw }, NULL, NULL}, + { DEFINE_FPU_UINT(fop) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fop }, NULL, NULL}, + { DEFINE_FPU_UINT(ip) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ip }, NULL, NULL}, + { DEFINE_FPU_UINT(cs) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_cs }, NULL, NULL}, + { DEFINE_FPU_UINT(dp) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_dp }, NULL, NULL}, + { DEFINE_FPU_UINT(ds) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ds }, NULL, NULL}, + { DEFINE_FPU_UINT(mxcsr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsr }, NULL, NULL}, + { DEFINE_FPU_UINT(mxcsrmask) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsrmask}, NULL, NULL}, { DEFINE_FPU_VECT(stmm,0) }, { DEFINE_FPU_VECT(stmm,1) }, { DEFINE_FPU_VECT(stmm,2) }, @@ -277,13 +204,33 @@ static RegisterInfo g_register_infos[] = { DEFINE_FPU_VECT(xmm,6) }, { DEFINE_FPU_VECT(xmm,7) }, - { DEFINE_EXC(trapno) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_trapno }, NULL, NULL}, - { DEFINE_EXC(err) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_err }, NULL, NULL}, - { DEFINE_EXC(faultvaddr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_faultvaddr }, NULL, NULL} + { DEFINE_EXC(trapno) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_trapno }, NULL, NULL}, + { DEFINE_EXC(err) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_err }, NULL, NULL}, + { DEFINE_EXC(faultvaddr) , { LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, exc_faultvaddr }, NULL, NULL} }; static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos); +RegisterContextDarwin_i386::RegisterContextDarwin_i386 (Thread &thread, uint32_t concrete_frame_idx) : + RegisterContext(thread, concrete_frame_idx), + gpr(), + fpu(), + exc() +{ + uint32_t i; + for (i=0; i<kNumErrors; i++) + { + gpr_errs[i] = -1; + fpu_errs[i] = -1; + exc_errs[i] = -1; + } +} + +RegisterContextDarwin_i386::~RegisterContextDarwin_i386() +{ +} + + void RegisterContextDarwin_i386::InvalidateAllRegisters () { @@ -859,7 +806,7 @@ RegisterContextDarwin_i386::ConvertRegisterKindToRegisterNumber (lldb::RegisterK break; } } - else if (kind == eRegisterKindGCC || kind == eRegisterKindDWARF) + else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF) { switch (reg) { @@ -893,55 +840,6 @@ RegisterContextDarwin_i386::ConvertRegisterKindToRegisterNumber (lldb::RegisterK break; } } - else if (kind == eRegisterKindGDB) - { - switch (reg) - { - case gdb_eax : return gpr_eax; - case gdb_ebx : return gpr_ebx; - case gdb_ecx : return gpr_ecx; - case gdb_edx : return gpr_edx; - case gdb_esi : return gpr_esi; - case gdb_edi : return gpr_edi; - case gdb_ebp : return gpr_ebp; - case gdb_esp : return gpr_esp; - case gdb_eip : return gpr_eip; - case gdb_eflags : return gpr_eflags; - case gdb_cs : return gpr_cs; - case gdb_ss : return gpr_ss; - case gdb_ds : return gpr_ds; - case gdb_es : return gpr_es; - case gdb_fs : return gpr_fs; - case gdb_gs : return gpr_gs; - case gdb_stmm0 : return fpu_stmm0; - case gdb_stmm1 : return fpu_stmm1; - case gdb_stmm2 : return fpu_stmm2; - case gdb_stmm3 : return fpu_stmm3; - case gdb_stmm4 : return fpu_stmm4; - case gdb_stmm5 : return fpu_stmm5; - case gdb_stmm6 : return fpu_stmm6; - case gdb_stmm7 : return fpu_stmm7; - case gdb_fctrl : return fpu_fctrl; - case gdb_fstat : return fpu_fstat; - case gdb_ftag : return fpu_ftag; - case gdb_fiseg : return fpu_fiseg; - case gdb_fioff : return fpu_fioff; - case gdb_foseg : return fpu_foseg; - case gdb_fooff : return fpu_fooff; - case gdb_fop : return fpu_fop; - case gdb_xmm0 : return fpu_xmm0; - case gdb_xmm1 : return fpu_xmm1; - case gdb_xmm2 : return fpu_xmm2; - case gdb_xmm3 : return fpu_xmm3; - case gdb_xmm4 : return fpu_xmm4; - case gdb_xmm5 : return fpu_xmm5; - case gdb_xmm6 : return fpu_xmm6; - case gdb_xmm7 : return fpu_xmm7; - case gdb_mxcsr : return fpu_mxcsr; - default: - break; - } - } else if (kind == eRegisterKindLLDB) { return reg; diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h b/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h index 1d03feb..9568b03 100644 --- a/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h +++ b/source/Plugins/Process/Utility/RegisterContextDarwin_i386.h @@ -20,45 +20,45 @@ class RegisterContextDarwin_i386 : public lldb_private::RegisterContext { public: - RegisterContextDarwin_i386(lldb_private::Thread &thread, - uint32_t concrete_frame_idx); + uint32_t concrete_frame_idx); - virtual - ~RegisterContextDarwin_i386(); + ~RegisterContextDarwin_i386() override; - virtual void - InvalidateAllRegisters (); + void + InvalidateAllRegisters() override; - virtual size_t - GetRegisterCount (); + size_t + GetRegisterCount() override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual size_t - GetRegisterSetCount (); + size_t + GetRegisterSetCount() override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t set); + const lldb_private::RegisterSet * + GetRegisterSet(size_t set) override; - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue &value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue &value) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; - virtual bool - HardwareSingleStep (bool enable); + bool + HardwareSingleStep(bool enable) override; struct GPR { @@ -121,7 +121,6 @@ public: }; protected: - enum { GPRRegSet = 1, @@ -266,4 +265,4 @@ protected: GetRegisterInfos (); }; -#endif // liblldb_RegisterContextDarwin_i386_h_ +#endif // liblldb_RegisterContextDarwin_i386_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp index 54124d1..aee6e12 100644 --- a/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp +++ b/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp @@ -111,132 +111,52 @@ enum fpu_fooff = fpu_dp }; -enum gcc_dwarf_regnums -{ - gcc_dwarf_gpr_rax = 0, - gcc_dwarf_gpr_rdx, - gcc_dwarf_gpr_rcx, - gcc_dwarf_gpr_rbx, - gcc_dwarf_gpr_rsi, - gcc_dwarf_gpr_rdi, - gcc_dwarf_gpr_rbp, - gcc_dwarf_gpr_rsp, - gcc_dwarf_gpr_r8, - gcc_dwarf_gpr_r9, - gcc_dwarf_gpr_r10, - gcc_dwarf_gpr_r11, - gcc_dwarf_gpr_r12, - gcc_dwarf_gpr_r13, - gcc_dwarf_gpr_r14, - gcc_dwarf_gpr_r15, - gcc_dwarf_gpr_rip, - gcc_dwarf_fpu_xmm0, - gcc_dwarf_fpu_xmm1, - gcc_dwarf_fpu_xmm2, - gcc_dwarf_fpu_xmm3, - gcc_dwarf_fpu_xmm4, - gcc_dwarf_fpu_xmm5, - gcc_dwarf_fpu_xmm6, - gcc_dwarf_fpu_xmm7, - gcc_dwarf_fpu_xmm8, - gcc_dwarf_fpu_xmm9, - gcc_dwarf_fpu_xmm10, - gcc_dwarf_fpu_xmm11, - gcc_dwarf_fpu_xmm12, - gcc_dwarf_fpu_xmm13, - gcc_dwarf_fpu_xmm14, - gcc_dwarf_fpu_xmm15, - gcc_dwarf_fpu_stmm0, - gcc_dwarf_fpu_stmm1, - gcc_dwarf_fpu_stmm2, - gcc_dwarf_fpu_stmm3, - gcc_dwarf_fpu_stmm4, - gcc_dwarf_fpu_stmm5, - gcc_dwarf_fpu_stmm6, - gcc_dwarf_fpu_stmm7 - -}; +enum ehframe_dwarf_regnums +{ + ehframe_dwarf_gpr_rax = 0, + ehframe_dwarf_gpr_rdx, + ehframe_dwarf_gpr_rcx, + ehframe_dwarf_gpr_rbx, + ehframe_dwarf_gpr_rsi, + ehframe_dwarf_gpr_rdi, + ehframe_dwarf_gpr_rbp, + ehframe_dwarf_gpr_rsp, + ehframe_dwarf_gpr_r8, + ehframe_dwarf_gpr_r9, + ehframe_dwarf_gpr_r10, + ehframe_dwarf_gpr_r11, + ehframe_dwarf_gpr_r12, + ehframe_dwarf_gpr_r13, + ehframe_dwarf_gpr_r14, + ehframe_dwarf_gpr_r15, + ehframe_dwarf_gpr_rip, + ehframe_dwarf_fpu_xmm0, + ehframe_dwarf_fpu_xmm1, + ehframe_dwarf_fpu_xmm2, + ehframe_dwarf_fpu_xmm3, + ehframe_dwarf_fpu_xmm4, + ehframe_dwarf_fpu_xmm5, + ehframe_dwarf_fpu_xmm6, + ehframe_dwarf_fpu_xmm7, + ehframe_dwarf_fpu_xmm8, + ehframe_dwarf_fpu_xmm9, + ehframe_dwarf_fpu_xmm10, + ehframe_dwarf_fpu_xmm11, + ehframe_dwarf_fpu_xmm12, + ehframe_dwarf_fpu_xmm13, + ehframe_dwarf_fpu_xmm14, + ehframe_dwarf_fpu_xmm15, + ehframe_dwarf_fpu_stmm0, + ehframe_dwarf_fpu_stmm1, + ehframe_dwarf_fpu_stmm2, + ehframe_dwarf_fpu_stmm3, + ehframe_dwarf_fpu_stmm4, + ehframe_dwarf_fpu_stmm5, + ehframe_dwarf_fpu_stmm6, + ehframe_dwarf_fpu_stmm7 -enum gdb_regnums -{ - gdb_gpr_rax = 0, - gdb_gpr_rbx = 1, - gdb_gpr_rcx = 2, - gdb_gpr_rdx = 3, - gdb_gpr_rsi = 4, - gdb_gpr_rdi = 5, - gdb_gpr_rbp = 6, - gdb_gpr_rsp = 7, - gdb_gpr_r8 = 8, - gdb_gpr_r9 = 9, - gdb_gpr_r10 = 10, - gdb_gpr_r11 = 11, - gdb_gpr_r12 = 12, - gdb_gpr_r13 = 13, - gdb_gpr_r14 = 14, - gdb_gpr_r15 = 15, - gdb_gpr_rip = 16, - gdb_gpr_rflags = 17, - gdb_gpr_cs = 18, - gdb_gpr_ss = 19, - gdb_gpr_ds = 20, - gdb_gpr_es = 21, - gdb_gpr_fs = 22, - gdb_gpr_gs = 23, - gdb_fpu_stmm0 = 24, - gdb_fpu_stmm1 = 25, - gdb_fpu_stmm2 = 26, - gdb_fpu_stmm3 = 27, - gdb_fpu_stmm4 = 28, - gdb_fpu_stmm5 = 29, - gdb_fpu_stmm6 = 30, - gdb_fpu_stmm7 = 31, - gdb_fpu_fctrl = 32, gdb_fpu_fcw = gdb_fpu_fctrl, - gdb_fpu_fstat = 33, gdb_fpu_fsw = gdb_fpu_fstat, - gdb_fpu_ftag = 34, gdb_fpu_ftw = gdb_fpu_ftag, - gdb_fpu_fiseg = 35, gdb_fpu_cs = gdb_fpu_fiseg, - gdb_fpu_fioff = 36, gdb_fpu_ip = gdb_fpu_fioff, - gdb_fpu_foseg = 37, gdb_fpu_ds = gdb_fpu_foseg, - gdb_fpu_fooff = 38, gdb_fpu_dp = gdb_fpu_fooff, - gdb_fpu_fop = 39, - gdb_fpu_xmm0 = 40, - gdb_fpu_xmm1 = 41, - gdb_fpu_xmm2 = 42, - gdb_fpu_xmm3 = 43, - gdb_fpu_xmm4 = 44, - gdb_fpu_xmm5 = 45, - gdb_fpu_xmm6 = 46, - gdb_fpu_xmm7 = 47, - gdb_fpu_xmm8 = 48, - gdb_fpu_xmm9 = 49, - gdb_fpu_xmm10 = 50, - gdb_fpu_xmm11 = 51, - gdb_fpu_xmm12 = 52, - gdb_fpu_xmm13 = 53, - gdb_fpu_xmm14 = 54, - gdb_fpu_xmm15 = 55, - gdb_fpu_mxcsr = 56 }; -RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64 (Thread &thread, uint32_t concrete_frame_idx) : - RegisterContext (thread, concrete_frame_idx), - gpr(), - fpu(), - exc() -{ - uint32_t i; - for (i=0; i<kNumErrors; i++) - { - gpr_errs[i] = -1; - fpu_errs[i] = -1; - exc_errs[i] = -1; - } -} - -RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64() -{ -} - #define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::GPR, reg)) #define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::FPU, reg) + sizeof (RegisterContextDarwin_x86_64::GPR)) #define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_x86_64::EXC, reg) + sizeof (RegisterContextDarwin_x86_64::GPR) + sizeof (RegisterContextDarwin_x86_64::FPU)) @@ -247,7 +167,7 @@ RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64() // sizes and offsets. #define DEFINE_GPR(reg, alt) #reg, alt, sizeof(((RegisterContextDarwin_x86_64::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex #define DEFINE_FPU_UINT(reg) #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg), FPU_OFFSET(reg), eEncodingUint, eFormatHex -#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { gcc_dwarf_fpu_##reg##i, gcc_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, gdb_fpu_##reg##i, fpu_##reg##i }, NULL, NULL +#define DEFINE_FPU_VECT(reg, i) #reg#i, NULL, sizeof(((RegisterContextDarwin_x86_64::FPU *)NULL)->reg[i].bytes), FPU_OFFSET(reg[i]), eEncodingVector, eFormatVectorOfUInt8, { ehframe_dwarf_fpu_##reg##i, ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_##reg##i }, NULL, NULL #define DEFINE_EXC(reg) #reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *)NULL)->reg), EXC_OFFSET(reg), eEncodingUint, eFormatHex #define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_x86_64::GPR) + sizeof (RegisterContextDarwin_x86_64::FPU) + sizeof (RegisterContextDarwin_x86_64::EXC)) @@ -255,39 +175,39 @@ RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64() // General purpose registers for 64 bit static RegisterInfo g_register_infos[] = { -// Macro auto defines most stuff GCC DWARF GENERIC GDB LLDB VALUE REGS INVALIDATE REGS -// =============================== ====================== =================== ========================== ==================== =================== ========== =============== - { DEFINE_GPR (rax , NULL) , { gcc_dwarf_gpr_rax , gcc_dwarf_gpr_rax , LLDB_INVALID_REGNUM , gdb_gpr_rax , gpr_rax }, NULL, NULL}, - { DEFINE_GPR (rbx , NULL) , { gcc_dwarf_gpr_rbx , gcc_dwarf_gpr_rbx , LLDB_INVALID_REGNUM , gdb_gpr_rbx , gpr_rbx }, NULL, NULL}, - { DEFINE_GPR (rcx , NULL) , { gcc_dwarf_gpr_rcx , gcc_dwarf_gpr_rcx , LLDB_INVALID_REGNUM , gdb_gpr_rcx , gpr_rcx }, NULL, NULL}, - { DEFINE_GPR (rdx , NULL) , { gcc_dwarf_gpr_rdx , gcc_dwarf_gpr_rdx , LLDB_INVALID_REGNUM , gdb_gpr_rdx , gpr_rdx }, NULL, NULL}, - { DEFINE_GPR (rdi , NULL) , { gcc_dwarf_gpr_rdi , gcc_dwarf_gpr_rdi , LLDB_INVALID_REGNUM , gdb_gpr_rdi , gpr_rdi }, NULL, NULL}, - { DEFINE_GPR (rsi , NULL) , { gcc_dwarf_gpr_rsi , gcc_dwarf_gpr_rsi , LLDB_INVALID_REGNUM , gdb_gpr_rsi , gpr_rsi }, NULL, NULL}, - { DEFINE_GPR (rbp , "fp") , { gcc_dwarf_gpr_rbp , gcc_dwarf_gpr_rbp , LLDB_REGNUM_GENERIC_FP , gdb_gpr_rbp , gpr_rbp }, NULL, NULL}, - { DEFINE_GPR (rsp , "sp") , { gcc_dwarf_gpr_rsp , gcc_dwarf_gpr_rsp , LLDB_REGNUM_GENERIC_SP , gdb_gpr_rsp , gpr_rsp }, NULL, NULL}, - { DEFINE_GPR (r8 , NULL) , { gcc_dwarf_gpr_r8 , gcc_dwarf_gpr_r8 , LLDB_INVALID_REGNUM , gdb_gpr_r8 , gpr_r8 }, NULL, NULL}, - { DEFINE_GPR (r9 , NULL) , { gcc_dwarf_gpr_r9 , gcc_dwarf_gpr_r9 , LLDB_INVALID_REGNUM , gdb_gpr_r9 , gpr_r9 }, NULL, NULL}, - { DEFINE_GPR (r10 , NULL) , { gcc_dwarf_gpr_r10 , gcc_dwarf_gpr_r10 , LLDB_INVALID_REGNUM , gdb_gpr_r10 , gpr_r10 }, NULL, NULL}, - { DEFINE_GPR (r11 , NULL) , { gcc_dwarf_gpr_r11 , gcc_dwarf_gpr_r11 , LLDB_INVALID_REGNUM , gdb_gpr_r11 , gpr_r11 }, NULL, NULL}, - { DEFINE_GPR (r12 , NULL) , { gcc_dwarf_gpr_r12 , gcc_dwarf_gpr_r12 , LLDB_INVALID_REGNUM , gdb_gpr_r12 , gpr_r12 }, NULL, NULL}, - { DEFINE_GPR (r13 , NULL) , { gcc_dwarf_gpr_r13 , gcc_dwarf_gpr_r13 , LLDB_INVALID_REGNUM , gdb_gpr_r13 , gpr_r13 }, NULL, NULL}, - { DEFINE_GPR (r14 , NULL) , { gcc_dwarf_gpr_r14 , gcc_dwarf_gpr_r14 , LLDB_INVALID_REGNUM , gdb_gpr_r14 , gpr_r14 }, NULL, NULL}, - { DEFINE_GPR (r15 , NULL) , { gcc_dwarf_gpr_r15 , gcc_dwarf_gpr_r15 , LLDB_INVALID_REGNUM , gdb_gpr_r15 , gpr_r15 }, NULL, NULL}, - { DEFINE_GPR (rip , "pc") , { gcc_dwarf_gpr_rip , gcc_dwarf_gpr_rip , LLDB_REGNUM_GENERIC_PC , gdb_gpr_rip , gpr_rip }, NULL, NULL}, - { DEFINE_GPR (rflags, "flags") , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS, gdb_gpr_rflags , gpr_rflags }, NULL, NULL}, - { DEFINE_GPR (cs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_gpr_cs , gpr_cs }, NULL, NULL}, - { DEFINE_GPR (fs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_gpr_fs , gpr_fs }, NULL, NULL}, - { DEFINE_GPR (gs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_gpr_gs , gpr_gs }, NULL, NULL}, - - { DEFINE_FPU_UINT(fcw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_fcw , fpu_fcw }, NULL, NULL}, - { DEFINE_FPU_UINT(fsw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_fsw , fpu_fsw }, NULL, NULL}, - { DEFINE_FPU_UINT(ftw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_ftw , fpu_ftw }, NULL, NULL}, - { DEFINE_FPU_UINT(fop) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_fop , fpu_fop }, NULL, NULL}, - { DEFINE_FPU_UINT(ip) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_ip , fpu_ip }, NULL, NULL}, - { DEFINE_FPU_UINT(cs) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_cs , fpu_cs }, NULL, NULL}, - { DEFINE_FPU_UINT(dp) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_dp , fpu_dp }, NULL, NULL}, - { DEFINE_FPU_UINT(ds) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_ds , fpu_ds }, NULL, NULL}, - { DEFINE_FPU_UINT(mxcsr) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , gdb_fpu_mxcsr , fpu_mxcsr }, NULL, NULL}, +// Macro auto defines most stuff EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS +// =============================== ====================== =================== ========================== ==================== =================== ========== =============== + { DEFINE_GPR (rax , NULL) , { ehframe_dwarf_gpr_rax , ehframe_dwarf_gpr_rax , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rax }, NULL, NULL}, + { DEFINE_GPR (rbx , NULL) , { ehframe_dwarf_gpr_rbx , ehframe_dwarf_gpr_rbx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rbx }, NULL, NULL}, + { DEFINE_GPR (rcx , NULL) , { ehframe_dwarf_gpr_rcx , ehframe_dwarf_gpr_rcx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rcx }, NULL, NULL}, + { DEFINE_GPR (rdx , NULL) , { ehframe_dwarf_gpr_rdx , ehframe_dwarf_gpr_rdx , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rdx }, NULL, NULL}, + { DEFINE_GPR (rdi , NULL) , { ehframe_dwarf_gpr_rdi , ehframe_dwarf_gpr_rdi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rdi }, NULL, NULL}, + { DEFINE_GPR (rsi , NULL) , { ehframe_dwarf_gpr_rsi , ehframe_dwarf_gpr_rsi , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_rsi }, NULL, NULL}, + { DEFINE_GPR (rbp , "fp") , { ehframe_dwarf_gpr_rbp , ehframe_dwarf_gpr_rbp , LLDB_REGNUM_GENERIC_FP , LLDB_INVALID_REGNUM, gpr_rbp }, NULL, NULL}, + { DEFINE_GPR (rsp , "sp") , { ehframe_dwarf_gpr_rsp , ehframe_dwarf_gpr_rsp , LLDB_REGNUM_GENERIC_SP , LLDB_INVALID_REGNUM, gpr_rsp }, NULL, NULL}, + { DEFINE_GPR (r8 , NULL) , { ehframe_dwarf_gpr_r8 , ehframe_dwarf_gpr_r8 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r8 }, NULL, NULL}, + { DEFINE_GPR (r9 , NULL) , { ehframe_dwarf_gpr_r9 , ehframe_dwarf_gpr_r9 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r9 }, NULL, NULL}, + { DEFINE_GPR (r10 , NULL) , { ehframe_dwarf_gpr_r10 , ehframe_dwarf_gpr_r10 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r10 }, NULL, NULL}, + { DEFINE_GPR (r11 , NULL) , { ehframe_dwarf_gpr_r11 , ehframe_dwarf_gpr_r11 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r11 }, NULL, NULL}, + { DEFINE_GPR (r12 , NULL) , { ehframe_dwarf_gpr_r12 , ehframe_dwarf_gpr_r12 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r12 }, NULL, NULL}, + { DEFINE_GPR (r13 , NULL) , { ehframe_dwarf_gpr_r13 , ehframe_dwarf_gpr_r13 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r13 }, NULL, NULL}, + { DEFINE_GPR (r14 , NULL) , { ehframe_dwarf_gpr_r14 , ehframe_dwarf_gpr_r14 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r14 }, NULL, NULL}, + { DEFINE_GPR (r15 , NULL) , { ehframe_dwarf_gpr_r15 , ehframe_dwarf_gpr_r15 , LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_r15 }, NULL, NULL}, + { DEFINE_GPR (rip , "pc") , { ehframe_dwarf_gpr_rip , ehframe_dwarf_gpr_rip , LLDB_REGNUM_GENERIC_PC , LLDB_INVALID_REGNUM, gpr_rip }, NULL, NULL}, + { DEFINE_GPR (rflags, "flags") , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_rflags }, NULL, NULL}, + { DEFINE_GPR (cs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_cs }, NULL, NULL}, + { DEFINE_GPR (fs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_fs }, NULL, NULL}, + { DEFINE_GPR (gs , NULL) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, gpr_gs }, NULL, NULL}, + + { DEFINE_FPU_UINT(fcw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fcw }, NULL, NULL}, + { DEFINE_FPU_UINT(fsw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fsw }, NULL, NULL}, + { DEFINE_FPU_UINT(ftw) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ftw }, NULL, NULL}, + { DEFINE_FPU_UINT(fop) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_fop }, NULL, NULL}, + { DEFINE_FPU_UINT(ip) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ip }, NULL, NULL}, + { DEFINE_FPU_UINT(cs) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_cs }, NULL, NULL}, + { DEFINE_FPU_UINT(dp) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_dp }, NULL, NULL}, + { DEFINE_FPU_UINT(ds) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_ds }, NULL, NULL}, + { DEFINE_FPU_UINT(mxcsr) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsr }, NULL, NULL}, { DEFINE_FPU_UINT(mxcsrmask) , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM , LLDB_INVALID_REGNUM, fpu_mxcsrmask }, NULL, NULL}, { DEFINE_FPU_VECT(stmm,0) }, { DEFINE_FPU_VECT(stmm,1) }, @@ -321,6 +241,25 @@ static RegisterInfo g_register_infos[] = static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos); +RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64 (Thread &thread, uint32_t concrete_frame_idx) : + RegisterContext (thread, concrete_frame_idx), + gpr(), + fpu(), + exc() +{ + uint32_t i; + for (i=0; i<kNumErrors; i++) + { + gpr_errs[i] = -1; + fpu_errs[i] = -1; + exc_errs[i] = -1; + } +} + +RegisterContextDarwin_x86_64::~RegisterContextDarwin_x86_64() +{ +} + void RegisterContextDarwin_x86_64::InvalidateAllRegisters () @@ -687,7 +626,7 @@ RegisterContextDarwin_x86_64::ReadRegister (const RegisterInfo *reg_info, case fpu_stmm5: case fpu_stmm6: case fpu_stmm7: - value.SetBytes(fpu.stmm[reg - fpu_stmm0].bytes, reg_info->byte_size, lldb::endian::InlHostByteOrder()); + value.SetBytes(fpu.stmm[reg - fpu_stmm0].bytes, reg_info->byte_size, endian::InlHostByteOrder()); break; case fpu_xmm0: @@ -706,7 +645,7 @@ RegisterContextDarwin_x86_64::ReadRegister (const RegisterInfo *reg_info, case fpu_xmm13: case fpu_xmm14: case fpu_xmm15: - value.SetBytes(fpu.xmm[reg - fpu_xmm0].bytes, reg_info->byte_size, lldb::endian::InlHostByteOrder()); + value.SetBytes(fpu.xmm[reg - fpu_xmm0].bytes, reg_info->byte_size, endian::InlHostByteOrder()); break; case exc_trapno: @@ -919,116 +858,51 @@ RegisterContextDarwin_x86_64::ConvertRegisterKindToRegisterNumber (lldb::Registe break; } } - else if (kind == eRegisterKindGCC || kind == eRegisterKindDWARF) - { - switch (reg) - { - case gcc_dwarf_gpr_rax: return gpr_rax; - case gcc_dwarf_gpr_rdx: return gpr_rdx; - case gcc_dwarf_gpr_rcx: return gpr_rcx; - case gcc_dwarf_gpr_rbx: return gpr_rbx; - case gcc_dwarf_gpr_rsi: return gpr_rsi; - case gcc_dwarf_gpr_rdi: return gpr_rdi; - case gcc_dwarf_gpr_rbp: return gpr_rbp; - case gcc_dwarf_gpr_rsp: return gpr_rsp; - case gcc_dwarf_gpr_r8: return gpr_r8; - case gcc_dwarf_gpr_r9: return gpr_r9; - case gcc_dwarf_gpr_r10: return gpr_r10; - case gcc_dwarf_gpr_r11: return gpr_r11; - case gcc_dwarf_gpr_r12: return gpr_r12; - case gcc_dwarf_gpr_r13: return gpr_r13; - case gcc_dwarf_gpr_r14: return gpr_r14; - case gcc_dwarf_gpr_r15: return gpr_r15; - case gcc_dwarf_gpr_rip: return gpr_rip; - case gcc_dwarf_fpu_xmm0: return fpu_xmm0; - case gcc_dwarf_fpu_xmm1: return fpu_xmm1; - case gcc_dwarf_fpu_xmm2: return fpu_xmm2; - case gcc_dwarf_fpu_xmm3: return fpu_xmm3; - case gcc_dwarf_fpu_xmm4: return fpu_xmm4; - case gcc_dwarf_fpu_xmm5: return fpu_xmm5; - case gcc_dwarf_fpu_xmm6: return fpu_xmm6; - case gcc_dwarf_fpu_xmm7: return fpu_xmm7; - case gcc_dwarf_fpu_xmm8: return fpu_xmm8; - case gcc_dwarf_fpu_xmm9: return fpu_xmm9; - case gcc_dwarf_fpu_xmm10: return fpu_xmm10; - case gcc_dwarf_fpu_xmm11: return fpu_xmm11; - case gcc_dwarf_fpu_xmm12: return fpu_xmm12; - case gcc_dwarf_fpu_xmm13: return fpu_xmm13; - case gcc_dwarf_fpu_xmm14: return fpu_xmm14; - case gcc_dwarf_fpu_xmm15: return fpu_xmm15; - case gcc_dwarf_fpu_stmm0: return fpu_stmm0; - case gcc_dwarf_fpu_stmm1: return fpu_stmm1; - case gcc_dwarf_fpu_stmm2: return fpu_stmm2; - case gcc_dwarf_fpu_stmm3: return fpu_stmm3; - case gcc_dwarf_fpu_stmm4: return fpu_stmm4; - case gcc_dwarf_fpu_stmm5: return fpu_stmm5; - case gcc_dwarf_fpu_stmm6: return fpu_stmm6; - case gcc_dwarf_fpu_stmm7: return fpu_stmm7; - default: - break; - } - } - else if (kind == eRegisterKindGDB) + else if (kind == eRegisterKindEHFrame || kind == eRegisterKindDWARF) { switch (reg) { - case gdb_gpr_rax : return gpr_rax; - case gdb_gpr_rbx : return gpr_rbx; - case gdb_gpr_rcx : return gpr_rcx; - case gdb_gpr_rdx : return gpr_rdx; - case gdb_gpr_rsi : return gpr_rsi; - case gdb_gpr_rdi : return gpr_rdi; - case gdb_gpr_rbp : return gpr_rbp; - case gdb_gpr_rsp : return gpr_rsp; - case gdb_gpr_r8 : return gpr_r8; - case gdb_gpr_r9 : return gpr_r9; - case gdb_gpr_r10 : return gpr_r10; - case gdb_gpr_r11 : return gpr_r11; - case gdb_gpr_r12 : return gpr_r12; - case gdb_gpr_r13 : return gpr_r13; - case gdb_gpr_r14 : return gpr_r14; - case gdb_gpr_r15 : return gpr_r15; - case gdb_gpr_rip : return gpr_rip; - case gdb_gpr_rflags : return gpr_rflags; - case gdb_gpr_cs : return gpr_cs; - case gdb_gpr_ss : return gpr_gs; // HACK: For now for "ss", just copy what is in "gs" - case gdb_gpr_ds : return gpr_gs; // HACK: For now for "ds", just copy what is in "gs" - case gdb_gpr_es : return gpr_gs; // HACK: For now for "es", just copy what is in "gs" - case gdb_gpr_fs : return gpr_fs; - case gdb_gpr_gs : return gpr_gs; - case gdb_fpu_stmm0 : return fpu_stmm0; - case gdb_fpu_stmm1 : return fpu_stmm1; - case gdb_fpu_stmm2 : return fpu_stmm2; - case gdb_fpu_stmm3 : return fpu_stmm3; - case gdb_fpu_stmm4 : return fpu_stmm4; - case gdb_fpu_stmm5 : return fpu_stmm5; - case gdb_fpu_stmm6 : return fpu_stmm6; - case gdb_fpu_stmm7 : return fpu_stmm7; - case gdb_fpu_fctrl : return fpu_fctrl; - case gdb_fpu_fstat : return fpu_fstat; - case gdb_fpu_ftag : return fpu_ftag; - case gdb_fpu_fiseg : return fpu_fiseg; - case gdb_fpu_fioff : return fpu_fioff; - case gdb_fpu_foseg : return fpu_foseg; - case gdb_fpu_fooff : return fpu_fooff; - case gdb_fpu_fop : return fpu_fop; - case gdb_fpu_xmm0 : return fpu_xmm0; - case gdb_fpu_xmm1 : return fpu_xmm1; - case gdb_fpu_xmm2 : return fpu_xmm2; - case gdb_fpu_xmm3 : return fpu_xmm3; - case gdb_fpu_xmm4 : return fpu_xmm4; - case gdb_fpu_xmm5 : return fpu_xmm5; - case gdb_fpu_xmm6 : return fpu_xmm6; - case gdb_fpu_xmm7 : return fpu_xmm7; - case gdb_fpu_xmm8 : return fpu_xmm8; - case gdb_fpu_xmm9 : return fpu_xmm9; - case gdb_fpu_xmm10 : return fpu_xmm10; - case gdb_fpu_xmm11 : return fpu_xmm11; - case gdb_fpu_xmm12 : return fpu_xmm12; - case gdb_fpu_xmm13 : return fpu_xmm13; - case gdb_fpu_xmm14 : return fpu_xmm14; - case gdb_fpu_xmm15 : return fpu_xmm15; - case gdb_fpu_mxcsr : return fpu_mxcsr; + case ehframe_dwarf_gpr_rax: return gpr_rax; + case ehframe_dwarf_gpr_rdx: return gpr_rdx; + case ehframe_dwarf_gpr_rcx: return gpr_rcx; + case ehframe_dwarf_gpr_rbx: return gpr_rbx; + case ehframe_dwarf_gpr_rsi: return gpr_rsi; + case ehframe_dwarf_gpr_rdi: return gpr_rdi; + case ehframe_dwarf_gpr_rbp: return gpr_rbp; + case ehframe_dwarf_gpr_rsp: return gpr_rsp; + case ehframe_dwarf_gpr_r8: return gpr_r8; + case ehframe_dwarf_gpr_r9: return gpr_r9; + case ehframe_dwarf_gpr_r10: return gpr_r10; + case ehframe_dwarf_gpr_r11: return gpr_r11; + case ehframe_dwarf_gpr_r12: return gpr_r12; + case ehframe_dwarf_gpr_r13: return gpr_r13; + case ehframe_dwarf_gpr_r14: return gpr_r14; + case ehframe_dwarf_gpr_r15: return gpr_r15; + case ehframe_dwarf_gpr_rip: return gpr_rip; + case ehframe_dwarf_fpu_xmm0: return fpu_xmm0; + case ehframe_dwarf_fpu_xmm1: return fpu_xmm1; + case ehframe_dwarf_fpu_xmm2: return fpu_xmm2; + case ehframe_dwarf_fpu_xmm3: return fpu_xmm3; + case ehframe_dwarf_fpu_xmm4: return fpu_xmm4; + case ehframe_dwarf_fpu_xmm5: return fpu_xmm5; + case ehframe_dwarf_fpu_xmm6: return fpu_xmm6; + case ehframe_dwarf_fpu_xmm7: return fpu_xmm7; + case ehframe_dwarf_fpu_xmm8: return fpu_xmm8; + case ehframe_dwarf_fpu_xmm9: return fpu_xmm9; + case ehframe_dwarf_fpu_xmm10: return fpu_xmm10; + case ehframe_dwarf_fpu_xmm11: return fpu_xmm11; + case ehframe_dwarf_fpu_xmm12: return fpu_xmm12; + case ehframe_dwarf_fpu_xmm13: return fpu_xmm13; + case ehframe_dwarf_fpu_xmm14: return fpu_xmm14; + case ehframe_dwarf_fpu_xmm15: return fpu_xmm15; + case ehframe_dwarf_fpu_stmm0: return fpu_stmm0; + case ehframe_dwarf_fpu_stmm1: return fpu_stmm1; + case ehframe_dwarf_fpu_stmm2: return fpu_stmm2; + case ehframe_dwarf_fpu_stmm3: return fpu_stmm3; + case ehframe_dwarf_fpu_stmm4: return fpu_stmm4; + case ehframe_dwarf_fpu_stmm5: return fpu_stmm5; + case ehframe_dwarf_fpu_stmm6: return fpu_stmm6; + case ehframe_dwarf_fpu_stmm7: return fpu_stmm7; default: break; } diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h b/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h index 09e35e9..ed627e1 100644 --- a/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h +++ b/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.h @@ -23,41 +23,42 @@ public: RegisterContextDarwin_x86_64 (lldb_private::Thread &thread, uint32_t concrete_frame_idx); - virtual - ~RegisterContextDarwin_x86_64(); + ~RegisterContextDarwin_x86_64() override; - virtual void - InvalidateAllRegisters (); + void + InvalidateAllRegisters() override; - virtual size_t - GetRegisterCount (); + size_t + GetRegisterCount() override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual size_t - GetRegisterSetCount (); + size_t + GetRegisterSetCount() override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t set); + const lldb_private::RegisterSet * + GetRegisterSet(size_t set) override; - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue &value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue &value) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; - virtual bool - HardwareSingleStep (bool enable); + bool + HardwareSingleStep(bool enable) override; struct GPR { @@ -268,7 +269,6 @@ protected: static const lldb_private::RegisterInfo * GetRegisterInfos (); - }; -#endif // liblldb_RegisterContextDarwin_x86_64_h_ +#endif // liblldb_RegisterContextDarwin_x86_64_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextDummy.cpp b/source/Plugins/Process/Utility/RegisterContextDummy.cpp index 329b0a7..0859e4e 100644 --- a/source/Plugins/Process/Utility/RegisterContextDummy.cpp +++ b/source/Plugins/Process/Utility/RegisterContextDummy.cpp @@ -51,10 +51,10 @@ RegisterContext (thread, concrete_frame_idx) m_pc_reg_info.format = eFormatPointer; m_pc_reg_info.invalidate_regs = NULL; m_pc_reg_info.value_regs = NULL; - m_pc_reg_info.kinds[eRegisterKindGCC] = LLDB_INVALID_REGNUM; + m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM; m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM; m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC; - m_pc_reg_info.kinds[eRegisterKindGDB] = LLDB_INVALID_REGNUM; + m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM; m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM; } diff --git a/source/Plugins/Process/Utility/RegisterContextDummy.h b/source/Plugins/Process/Utility/RegisterContextDummy.h index ddf4667..9f6a8dc 100644 --- a/source/Plugins/Process/Utility/RegisterContextDummy.h +++ b/source/Plugins/Process/Utility/RegisterContextDummy.h @@ -10,8 +10,12 @@ #ifndef lldb_RegisterContextDummy_h_ #define lldb_RegisterContextDummy_h_ +// C Includes +// C++ Includes #include <vector> +// Other libraries and framework includes +// Project includes #include "lldb/lldb-private.h" #include "lldb/Target/RegisterContext.h" #include "lldb/Symbol/SymbolContext.h" @@ -25,42 +29,39 @@ public: RegisterContextDummy (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size); - /// - // pure virtual functions from the base class that we must implement - /// + ~RegisterContextDummy() override; - virtual - ~RegisterContextDummy (); + void + InvalidateAllRegisters() override; - virtual void - InvalidateAllRegisters (); + size_t + GetRegisterCount() override; - virtual size_t - GetRegisterCount (); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + size_t + GetRegisterSetCount() override; - virtual size_t - GetRegisterSetCount (); + const lldb_private::RegisterSet * + GetRegisterSet(size_t reg_set) override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t reg_set); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue &value) override; - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue &value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); - - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; private: //------------------------------------------------------------------ @@ -72,6 +73,7 @@ private: DISALLOW_COPY_AND_ASSIGN (RegisterContextDummy); }; + } // namespace lldb_private -#endif // lldb_RegisterContextDummy_h_ +#endif // lldb_RegisterContextDummy_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp index 8005a63..a507dad 100644 --- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp +++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp @@ -23,6 +23,7 @@ using namespace lldb_private; // http://svnweb.freebsd.org/base/head/sys/arm/include/reg.h #define GPR_OFFSET(idx) ((idx) * 4) #define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR)) +#define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::FPU, fpscr) + sizeof (RegisterContextFreeBSD_arm::GPR)) #define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU)) #define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::DBG, reg) + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC))) diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h index c4287e9..f2d9364 100644 --- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h +++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.h @@ -12,7 +12,6 @@ #include "lldb/lldb-private.h" #include "lldb/Target/RegisterContext.h" -#include "RegisterContextPOSIX.h" #include "RegisterInfoInterface.h" class RegisterContextFreeBSD_arm diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h index 249027a..cfdae4d 100644 --- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h +++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h @@ -10,7 +10,7 @@ #ifndef liblldb_RegisterContextFreeBSD_arm64_H_ #define liblldb_RegisterContextFreeBSD_arm64_H_ -#include "RegisterContextPOSIX.h" +#include "RegisterInfoInterface.h" class RegisterContextFreeBSD_arm64: public lldb_private::RegisterInfoInterface diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h index 62792c0..9527fc03 100644 --- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h +++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.h @@ -10,7 +10,7 @@ #ifndef liblldb_RegisterContextFreeBSD_i386_H_ #define liblldb_RegisterContextFreeBSD_i386_H_ -#include "RegisterContextPOSIX.h" +#include "RegisterInfoInterface.h" class RegisterContextFreeBSD_i386 : public lldb_private::RegisterInfoInterface diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h index f9a3ce0..5c042af 100644 --- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h +++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h @@ -10,7 +10,7 @@ #ifndef liblldb_RegisterContextFreeBSD_mips64_H_ #define liblldb_RegisterContextFreeBSD_mips64_H_ -#include "RegisterContextPOSIX.h" +#include "RegisterInfoInterface.h" class RegisterContextFreeBSD_mips64: public lldb_private::RegisterInfoInterface diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h index b907fe9..930683f8 100644 --- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h +++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h @@ -7,17 +7,21 @@ // //===----------------------------------------------------------------------===// -#ifndef liblldb_RegisterContextFreeBSD_powerpc_H_ -#define liblldb_RegisterContextFreeBSD_powerpc_H_ +#ifndef liblldb_RegisterContextFreeBSD_powerpc_h_ +#define liblldb_RegisterContextFreeBSD_powerpc_h_ -#include "RegisterContextPOSIX.h" +// C Includes +// C++ Includes +// Other libraries and framework includes +// Project includes +#include "RegisterInfoInterface.h" class RegisterContextFreeBSD_powerpc: public lldb_private::RegisterInfoInterface { public: RegisterContextFreeBSD_powerpc(const lldb_private::ArchSpec &target_arch); - virtual ~RegisterContextFreeBSD_powerpc(); + ~RegisterContextFreeBSD_powerpc() override; size_t GetGPRSize() const override; @@ -34,7 +38,7 @@ class RegisterContextFreeBSD_powerpc32: { public: RegisterContextFreeBSD_powerpc32(const lldb_private::ArchSpec &target_arch); - virtual ~RegisterContextFreeBSD_powerpc32(); + ~RegisterContextFreeBSD_powerpc32() override; size_t GetGPRSize() const override; @@ -51,7 +55,7 @@ class RegisterContextFreeBSD_powerpc64: { public: RegisterContextFreeBSD_powerpc64(const lldb_private::ArchSpec &target_arch); - virtual ~RegisterContextFreeBSD_powerpc64(); + ~RegisterContextFreeBSD_powerpc64() override; size_t GetGPRSize() const override; @@ -63,4 +67,4 @@ public: GetRegisterCount() const override; }; -#endif +#endif // liblldb_RegisterContextFreeBSD_powerpc_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h b/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h index 21fbdb4..e739fa5 100644 --- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h +++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h @@ -10,7 +10,7 @@ #ifndef liblldb_RegisterContextFreeBSD_x86_64_H_ #define liblldb_RegisterContextFreeBSD_x86_64_H_ -#include "RegisterContextPOSIX.h" +#include "RegisterInfoInterface.h" class RegisterContextFreeBSD_x86_64: public lldb_private::RegisterInfoInterface diff --git a/source/Plugins/Process/Utility/RegisterContextHistory.cpp b/source/Plugins/Process/Utility/RegisterContextHistory.cpp index 3c37010..9d21813 100644 --- a/source/Plugins/Process/Utility/RegisterContextHistory.cpp +++ b/source/Plugins/Process/Utility/RegisterContextHistory.cpp @@ -52,10 +52,10 @@ RegisterContext (thread, concrete_frame_idx), m_pc_reg_info.format = eFormatPointer; m_pc_reg_info.invalidate_regs = NULL; m_pc_reg_info.value_regs = NULL; - m_pc_reg_info.kinds[eRegisterKindGCC] = LLDB_INVALID_REGNUM; + m_pc_reg_info.kinds[eRegisterKindEHFrame] = LLDB_INVALID_REGNUM; m_pc_reg_info.kinds[eRegisterKindDWARF] = LLDB_INVALID_REGNUM; m_pc_reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC; - m_pc_reg_info.kinds[eRegisterKindGDB] = LLDB_INVALID_REGNUM; + m_pc_reg_info.kinds[eRegisterKindProcessPlugin] = LLDB_INVALID_REGNUM; m_pc_reg_info.kinds[eRegisterKindLLDB] = LLDB_INVALID_REGNUM; } diff --git a/source/Plugins/Process/Utility/RegisterContextHistory.h b/source/Plugins/Process/Utility/RegisterContextHistory.h index 04842c6..3f44a1f 100644 --- a/source/Plugins/Process/Utility/RegisterContextHistory.h +++ b/source/Plugins/Process/Utility/RegisterContextHistory.h @@ -10,8 +10,12 @@ #ifndef lldb_RegisterContextHistory_h_ #define lldb_RegisterContextHistory_h_ +// C Includes +// C++ Includes #include <vector> +// Other libraries and framework includes +// Project includes #include "lldb/lldb-private.h" #include "lldb/Target/RegisterContext.h" #include "lldb/Symbol/SymbolContext.h" @@ -25,42 +29,39 @@ public: RegisterContextHistory (Thread &thread, uint32_t concrete_frame_idx, uint32_t address_byte_size, lldb::addr_t pc_value); - /// - // pure virtual functions from the base class that we must implement - /// + ~RegisterContextHistory() override; - virtual - ~RegisterContextHistory (); + void + InvalidateAllRegisters() override; - virtual void - InvalidateAllRegisters (); + size_t + GetRegisterCount() override; - virtual size_t - GetRegisterCount (); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + size_t + GetRegisterSetCount() override; - virtual size_t - GetRegisterSetCount (); + const lldb_private::RegisterSet * + GetRegisterSet(size_t reg_set) override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t reg_set); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue &value) override; - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue &value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); - - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; private: //------------------------------------------------------------------ @@ -76,4 +77,4 @@ private: }; } // namespace lldb_private -#endif // lldb_RegisterContextHistory_h_ +#endif // lldb_RegisterContextHistory_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextLLDB.cpp b/source/Plugins/Process/Utility/RegisterContextLLDB.cpp index 37b007c..278a1d5 100644 --- a/source/Plugins/Process/Utility/RegisterContextLLDB.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLLDB.cpp @@ -17,6 +17,7 @@ #include "lldb/Core/RegisterValue.h" #include "lldb/Core/Value.h" #include "lldb/Expression/DWARFExpression.h" +#include "lldb/Symbol/ArmUnwindInfo.h" #include "lldb/Symbol/DWARFCallFrameInfo.h" #include "lldb/Symbol/FuncUnwinders.h" #include "lldb/Symbol/Function.h" @@ -634,28 +635,30 @@ bool RegisterContextLLDB::CheckIfLoopingStack () { // If we have a bad stack setup, we can get the same CFA value multiple times -- or even - // more devious, we can actually oscillate between two CFA values. Detect that here and + // more devious, we can actually oscillate between two CFA values. Detect that here and // break out to avoid a possible infinite loop in lldb trying to unwind the stack. - addr_t next_frame_cfa; - addr_t next_next_frame_cfa = LLDB_INVALID_ADDRESS; - if (GetNextFrame().get() && GetNextFrame()->GetCFA(next_frame_cfa)) + // To detect when we have the same CFA value multiple times, we compare the CFA of the current + // frame with the 2nd next frame because in some specail case (e.g. signal hanlders, hand + // written assembly without ABI compiance) we can have 2 frames with the same CFA (in theory we + // can have arbitrary number of frames with the same CFA, but more then 2 is very very unlikely) + + RegisterContextLLDB::SharedPtr next_frame = GetNextFrame(); + if (next_frame) { - if (next_frame_cfa == m_cfa) + RegisterContextLLDB::SharedPtr next_next_frame = next_frame->GetNextFrame(); + addr_t next_next_frame_cfa = LLDB_INVALID_ADDRESS; + if (next_next_frame && next_next_frame->GetCFA(next_next_frame_cfa)) { - // We have a loop in the stack unwind - return true; - } - if (GetNextFrame()->GetNextFrame().get() && GetNextFrame()->GetNextFrame()->GetCFA(next_next_frame_cfa) - && next_next_frame_cfa == m_cfa) - { - // We have a loop in the stack unwind - return true; + if (next_next_frame_cfa == m_cfa) + { + // We have a loop in the stack unwind + return true; + } } } return false; } - bool RegisterContextLLDB::IsFrameZero () const { @@ -792,24 +795,38 @@ RegisterContextLLDB::GetFullUnwindPlanForFrame () func_unwinders_sp = pc_module_sp->GetObjectFile()->GetUnwindTable().GetFuncUnwindersContainingAddress (m_current_pc, m_sym_ctx); } - // No FuncUnwinders available for this pc (i.e. a stripped function symbol and -fomit-frame-pointer). - // Try using the eh_frame information relative to the current PC, - // and finally fall back on the architectural default unwind. + // No FuncUnwinders available for this pc (stripped function symbols, lldb could not augment its + // function table with another source, like LC_FUNCTION_STARTS or eh_frame in ObjectFileMachO). + // See if eh_frame or the .ARM.exidx tables have unwind information for this address, else fall + // back to the architectural default unwind. if (!func_unwinders_sp) { - DWARFCallFrameInfo *eh_frame = pc_module_sp && pc_module_sp->GetObjectFile() ? - pc_module_sp->GetObjectFile()->GetUnwindTable().GetEHFrameInfo() : nullptr; - m_frame_type = eNormalFrame; - if (eh_frame && m_current_pc.IsValid()) + + if (!pc_module_sp || !pc_module_sp->GetObjectFile() || !m_current_pc.IsValid()) + return arch_default_unwind_plan_sp; + + // Even with -fomit-frame-pointer, we can try eh_frame to get back on track. + DWARFCallFrameInfo *eh_frame = pc_module_sp->GetObjectFile()->GetUnwindTable().GetEHFrameInfo(); + if (eh_frame) { unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric)); - // Even with -fomit-frame-pointer, we can try eh_frame to get back on track. if (eh_frame->GetUnwindPlan (m_current_pc, *unwind_plan_sp)) return unwind_plan_sp; else unwind_plan_sp.reset(); } + + ArmUnwindInfo *arm_exidx = pc_module_sp->GetObjectFile()->GetUnwindTable().GetArmUnwindInfo(); + if (arm_exidx) + { + unwind_plan_sp.reset (new UnwindPlan (lldb::eRegisterKindGeneric)); + if (arm_exidx->GetUnwindPlan (exe_ctx.GetTargetRef(), m_current_pc, *unwind_plan_sp)) + return unwind_plan_sp; + else + unwind_plan_sp.reset(); + } + return arch_default_unwind_plan_sp; } @@ -864,12 +881,12 @@ RegisterContextLLDB::GetFullUnwindPlanForFrame () // then the architecture default plan and for hand written assembly code it is often // written in a way that it valid at all location what helps in the most common // cases when the instruction emulation fails. - UnwindPlanSP eh_frame_unwind_plan = func_unwinders_sp->GetEHFrameUnwindPlan (process->GetTarget(), m_current_offset_backed_up_one); - if (eh_frame_unwind_plan && - eh_frame_unwind_plan.get() != unwind_plan_sp.get() && - eh_frame_unwind_plan->GetSourceName() != unwind_plan_sp->GetSourceName()) + UnwindPlanSP call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one); + if (call_site_unwind_plan && + call_site_unwind_plan.get() != unwind_plan_sp.get() && + call_site_unwind_plan->GetSourceName() != unwind_plan_sp->GetSourceName()) { - m_fallback_unwind_plan_sp = eh_frame_unwind_plan; + m_fallback_unwind_plan_sp = call_site_unwind_plan; } else { @@ -909,12 +926,12 @@ RegisterContextLLDB::GetFullUnwindPlanForFrame () // more reliable even on non call sites then the architecture default plan and for hand // written assembly code it is often written in a way that it valid at all location what // helps in the most common cases when the instruction emulation fails. - UnwindPlanSP eh_frame_unwind_plan = func_unwinders_sp->GetEHFrameUnwindPlan (process->GetTarget(), m_current_offset_backed_up_one); - if (eh_frame_unwind_plan && - eh_frame_unwind_plan.get() != unwind_plan_sp.get() && - eh_frame_unwind_plan->GetSourceName() != unwind_plan_sp->GetSourceName()) + UnwindPlanSP call_site_unwind_plan = func_unwinders_sp->GetUnwindPlanAtCallSite(process->GetTarget(), m_current_offset_backed_up_one); + if (call_site_unwind_plan && + call_site_unwind_plan.get() != unwind_plan_sp.get() && + call_site_unwind_plan->GetSourceName() != unwind_plan_sp->GetSourceName()) { - m_fallback_unwind_plan_sp = eh_frame_unwind_plan; + m_fallback_unwind_plan_sp = call_site_unwind_plan; } else { @@ -1488,7 +1505,11 @@ RegisterContextLLDB::SavedLocationForRegister (uint32_t lldb_regnum, lldb_privat unwindplan_regloc.GetDWARFExpressionLength(), process->GetByteOrder(), process->GetAddressByteSize()); ModuleSP opcode_ctx; - DWARFExpression dwarfexpr (opcode_ctx, dwarfdata, 0, unwindplan_regloc.GetDWARFExpressionLength()); + DWARFExpression dwarfexpr (opcode_ctx, + dwarfdata, + nullptr, + 0, + unwindplan_regloc.GetDWARFExpressionLength()); dwarfexpr.SetRegisterKind (unwindplan_registerkind); Value result; Error error; @@ -1784,7 +1805,11 @@ RegisterContextLLDB::ReadCFAValueForRow (lldb::RegisterKind row_register_kind, row->GetCFAValue().GetDWARFExpressionLength(), process->GetByteOrder(), process->GetAddressByteSize()); ModuleSP opcode_ctx; - DWARFExpression dwarfexpr (opcode_ctx, dwarfdata, 0, row->GetCFAValue().GetDWARFExpressionLength()); + DWARFExpression dwarfexpr (opcode_ctx, + dwarfdata, + nullptr, + 0, + row->GetCFAValue().GetDWARFExpressionLength()); dwarfexpr.SetRegisterKind (row_register_kind); Value result; Error error; diff --git a/source/Plugins/Process/Utility/RegisterContextLLDB.h b/source/Plugins/Process/Utility/RegisterContextLLDB.h index 5f94a97..68dca3d 100644 --- a/source/Plugins/Process/Utility/RegisterContextLLDB.h +++ b/source/Plugins/Process/Utility/RegisterContextLLDB.h @@ -10,8 +10,12 @@ #ifndef lldb_RegisterContextLLDB_h_ #define lldb_RegisterContextLLDB_h_ +// C Includes +// C++ Includes #include <vector> +// Other libraries and framework includes +// Project includes #include "lldb/lldb-private.h" #include "lldb/Target/RegisterContext.h" #include "lldb/Symbol/UnwindPlan.h" @@ -33,42 +37,39 @@ public: lldb_private::SymbolContext& sym_ctx, uint32_t frame_number, lldb_private::UnwindLLDB& unwind_lldb); - /// - // pure virtual functions from the base class that we must implement - /// - - virtual - ~RegisterContextLLDB () { } + ~RegisterContextLLDB() override = default; - virtual void - InvalidateAllRegisters (); + void + InvalidateAllRegisters() override; - virtual size_t - GetRegisterCount (); + size_t + GetRegisterCount() override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual size_t - GetRegisterSetCount (); + size_t + GetRegisterSetCount() override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t reg_set); + const lldb_private::RegisterSet * + GetRegisterSet(size_t reg_set) override; - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue &value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue &value) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; bool IsValid () const; @@ -99,7 +100,6 @@ private: // UnwindLLDB needs to pass around references to RegisterLocations friend class UnwindLLDB; - // Returns true if we have an unwind loop -- the same stack frame unwinding // multiple times. bool @@ -130,7 +130,6 @@ private: bool IsSkipFrame () const; - //------------------------------------------------------------------ /// Determines if a SymbolContext is a trap handler or not /// @@ -221,7 +220,6 @@ private: bool IsUnwindPlanValidForCurrentPC(lldb::UnwindPlanSP unwind_plan_sp, int &valid_pc_offset); - lldb_private::Thread& m_thread; /// @@ -269,4 +267,4 @@ private: } // namespace lldb_private -#endif // lldb_RegisterContextLLDB_h_ +#endif // lldb_RegisterContextLLDB_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp index e7784b1..f8d97aa 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp @@ -22,6 +22,7 @@ using namespace lldb_private; // Based on RegisterContextDarwin_arm.cpp #define GPR_OFFSET(idx) ((idx) * 4) #define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR)) +#define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextLinux_arm::FPU, fpscr) + sizeof (RegisterContextLinux_arm::GPR)) #define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU)) #define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextLinux_arm::DBG, reg) + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC))) diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_arm.h b/source/Plugins/Process/Utility/RegisterContextLinux_arm.h index 7087eb4..c3d41f6 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_arm.h +++ b/source/Plugins/Process/Utility/RegisterContextLinux_arm.h @@ -12,7 +12,6 @@ #include "lldb/lldb-private.h" #include "lldb/Target/RegisterContext.h" -#include "RegisterContextPOSIX.h" #include "RegisterInfoInterface.h" class RegisterContextLinux_arm diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp index 8c23e39..a4ab083 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp @@ -21,7 +21,7 @@ #define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::GPR, reg)) #define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextLinux_arm64::GPR)) -#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::FPU, reg)) +#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::FPU, reg) + sizeof (RegisterContextLinux_arm64::GPR)) #define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::EXC, reg) + sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU)) #define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::DBG, reg) + sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU) + sizeof (RegisterContextLinux_arm64::EXC)) diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h b/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h index a9a5a09..3de94b8 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h +++ b/source/Plugins/Process/Utility/RegisterContextLinux_arm64.h @@ -12,7 +12,6 @@ #include "lldb/lldb-private.h" #include "lldb/Target/RegisterContext.h" -#include "RegisterContextPOSIX.h" #include "RegisterInfoInterface.h" class RegisterContextLinux_arm64 diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp index 4f6bbc8..e39beef 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp @@ -26,7 +26,7 @@ struct GPR uint32_t es; uint32_t fs; uint32_t gs; - uint32_t orig_ax; + uint32_t orig_eax; uint32_t eip; uint32_t cs; uint32_t eflags; @@ -38,7 +38,8 @@ struct FPR_i386 { uint16_t fctrl; // FPU Control Word (fcw) uint16_t fstat; // FPU Status Word (fsw) - uint16_t ftag; // FPU Tag Word (ftw) + uint8_t ftag; // FPU Tag Word (ftw) + uint8_t reserved_1; // Reserved uint16_t fop; // Last Instruction Opcode (fop) union { @@ -98,6 +99,9 @@ struct UserArea RegisterContextLinux_i386::RegisterContextLinux_i386(const ArchSpec &target_arch) : RegisterInfoInterface(target_arch) { + RegisterInfo orig_ax = { "orig_eax", NULL, sizeof(((GPR*)NULL)->orig_eax), (LLVM_EXTENSION offsetof(GPR, orig_eax)), eEncodingUint, \ + eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL }; + d_register_infos.push_back(orig_ax); } size_t @@ -131,3 +135,9 @@ RegisterContextLinux_i386::GetUserRegisterCount () const { return static_cast<uint32_t> (k_num_user_registers_i386); } + +const std::vector<lldb_private::RegisterInfo> * +RegisterContextLinux_i386::GetDynamicRegisterInfoP() const +{ + return &d_register_infos; +} diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_i386.h b/source/Plugins/Process/Utility/RegisterContextLinux_i386.h index cb71d79..6c4768f 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_i386.h +++ b/source/Plugins/Process/Utility/RegisterContextLinux_i386.h @@ -10,7 +10,7 @@ #ifndef liblldb_RegisterContextLinux_i386_H_ #define liblldb_RegisterContextLinux_i386_H_ -#include "RegisterContextPOSIX.h" +#include "RegisterInfoInterface.h" class RegisterContextLinux_i386 : public lldb_private::RegisterInfoInterface @@ -29,6 +29,12 @@ public: uint32_t GetUserRegisterCount () const override; + + const std::vector<lldb_private::RegisterInfo> * + GetDynamicRegisterInfoP() const override; + +private: + std::vector<lldb_private::RegisterInfo> d_register_infos; }; #endif diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp index 4d58b85..1b22810 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp @@ -10,7 +10,7 @@ #include <vector> #include <stddef.h> -// For GDB, GCC and DWARF Register numbers +// For eh_frame and DWARF Register numbers #include "RegisterContextLinux_mips.h" // Internal codes for mips registers @@ -29,8 +29,17 @@ using namespace lldb; #include "RegisterInfos_mips.h" #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT -RegisterContextLinux_mips::RegisterContextLinux_mips(const ArchSpec &target_arch) : - RegisterInfoInterface(target_arch) +uint32_t +GetUserRegisterInfoCount (bool msa_present) +{ + if (msa_present) + return static_cast<uint32_t> (k_num_user_registers_mips); + return static_cast<uint32_t> (k_num_user_registers_mips - k_num_msa_registers_mips); +} + +RegisterContextLinux_mips::RegisterContextLinux_mips(const ArchSpec &target_arch, bool msa_present) : + RegisterInfoInterface(target_arch), + m_user_register_count (GetUserRegisterInfoCount (msa_present)) { } @@ -63,5 +72,5 @@ RegisterContextLinux_mips::GetRegisterCount () const uint32_t RegisterContextLinux_mips::GetUserRegisterCount () const { - return static_cast<uint32_t> (k_num_user_registers_mips); + return static_cast<uint32_t> (m_user_register_count); } diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_mips.h b/source/Plugins/Process/Utility/RegisterContextLinux_mips.h index bcc2d00..c0bd5ad4 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_mips.h +++ b/source/Plugins/Process/Utility/RegisterContextLinux_mips.h @@ -17,7 +17,7 @@ class RegisterContextLinux_mips : public lldb_private::RegisterInfoInterface { public: - RegisterContextLinux_mips(const lldb_private::ArchSpec &target_arch); + RegisterContextLinux_mips(const lldb_private::ArchSpec &target_arch, bool msa_present = true); size_t GetGPRSize() const override; @@ -30,6 +30,9 @@ public: uint32_t GetUserRegisterCount () const override; + +private: + uint32_t m_user_register_count; }; #endif diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp index 7f512f8..f2871e3 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp @@ -12,7 +12,7 @@ #include <vector> #include <stddef.h> -// For GDB, GCC and DWARF Register numbers +// For eh_frame and DWARF Register numbers #include "RegisterContextLinux_mips64.h" // For GP and FP buffers @@ -75,27 +75,31 @@ GetRegisterInfoCount (const ArchSpec &target_arch) } uint32_t -GetUserRegisterInfoCount (const ArchSpec &target_arch) +GetUserRegisterInfoCount (const ArchSpec &target_arch, bool msa_present) { switch (target_arch.GetMachine()) { case llvm::Triple::mips: case llvm::Triple::mipsel: - return static_cast<uint32_t> (k_num_user_registers_mips); + if (msa_present) + return static_cast<uint32_t> (k_num_user_registers_mips); + return static_cast<uint32_t> (k_num_user_registers_mips - k_num_msa_registers_mips); case llvm::Triple::mips64el: case llvm::Triple::mips64: - return static_cast<uint32_t> (k_num_user_registers_mips64); + if (msa_present) + return static_cast<uint32_t> (k_num_user_registers_mips64); + return static_cast<uint32_t> (k_num_user_registers_mips64 - k_num_msa_registers_mips64); default: assert(false && "Unhandled target architecture."); return 0; } } -RegisterContextLinux_mips64::RegisterContextLinux_mips64(const ArchSpec &target_arch) : +RegisterContextLinux_mips64::RegisterContextLinux_mips64(const ArchSpec &target_arch, bool msa_present) : lldb_private::RegisterInfoInterface(target_arch), m_register_info_p (GetRegisterInfoPtr (target_arch)), m_register_info_count (GetRegisterInfoCount (target_arch)), - m_user_register_count (GetUserRegisterInfoCount (target_arch)) + m_user_register_count (GetUserRegisterInfoCount (target_arch, msa_present)) { } diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h b/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h index 86c662c..843328c 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h +++ b/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h @@ -19,7 +19,7 @@ class RegisterContextLinux_mips64 : public lldb_private::RegisterInfoInterface { public: - RegisterContextLinux_mips64(const lldb_private::ArchSpec &target_arch); + RegisterContextLinux_mips64(const lldb_private::ArchSpec &target_arch, bool msa_present = true); size_t GetGPRSize() const override; diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp index c0993b4..78afe72 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp @@ -32,7 +32,7 @@ typedef struct _GPR uint64_t rdx; uint64_t rsi; uint64_t rdi; - uint64_t orig_ax; + uint64_t orig_rax; uint64_t rip; uint64_t cs; uint64_t rflags; @@ -171,6 +171,9 @@ RegisterContextLinux_x86_64::RegisterContextLinux_x86_64(const ArchSpec &target_ m_register_info_count (GetRegisterInfoCount (target_arch)), m_user_register_count (GetUserRegisterInfoCount (target_arch)) { + RegisterInfo orig_ax = { "orig_rax", NULL, sizeof(((GPR*)NULL)->orig_rax), (LLVM_EXTENSION offsetof(GPR, orig_rax)), eEncodingUint, \ + eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL }; + d_register_infos.push_back(orig_ax); } size_t @@ -179,6 +182,12 @@ RegisterContextLinux_x86_64::GetGPRSize() const return sizeof(GPR); } +const std::vector<lldb_private::RegisterInfo> * +RegisterContextLinux_x86_64::GetDynamicRegisterInfoP() const +{ + return &d_register_infos; +} + const RegisterInfo * RegisterContextLinux_x86_64::GetRegisterInfo() const { diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h b/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h index 0cdfae9..ed0b7de 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h +++ b/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.h @@ -10,7 +10,7 @@ #ifndef liblldb_RegisterContextLinux_x86_64_H_ #define liblldb_RegisterContextLinux_x86_64_H_ -#include "RegisterContextPOSIX.h" +#include "RegisterInfoInterface.h" class RegisterContextLinux_x86_64 : public lldb_private::RegisterInfoInterface @@ -30,10 +30,15 @@ public: uint32_t GetUserRegisterCount () const override; + const std::vector<lldb_private::RegisterInfo> * + GetDynamicRegisterInfoP() const override; + private: const lldb_private::RegisterInfo *m_register_info_p; uint32_t m_register_info_count; uint32_t m_user_register_count; + std::vector<lldb_private::RegisterInfo> d_register_infos; + }; #endif diff --git a/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h b/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h index 505b8d4..0ddadbe 100644 --- a/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h +++ b/source/Plugins/Process/Utility/RegisterContextMacOSXFrameBackchain.h @@ -22,56 +22,49 @@ class RegisterContextMacOSXFrameBackchain : public lldb_private::RegisterContext { public: - //------------------------------------------------------------------ - // Constructors and Destructors - //------------------------------------------------------------------ RegisterContextMacOSXFrameBackchain (lldb_private::Thread &thread, uint32_t concrete_frame_idx, const UnwindMacOSXFrameBackchain::Cursor &cursor); - virtual - ~RegisterContextMacOSXFrameBackchain (); + ~RegisterContextMacOSXFrameBackchain() override; - //------------------------------------------------------------------ - // Subclasses must override these functions - //------------------------------------------------------------------ - virtual void - InvalidateAllRegisters (); + void + InvalidateAllRegisters() override; - virtual size_t - GetRegisterCount (); + size_t + GetRegisterCount() override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual size_t - GetRegisterSetCount (); + size_t + GetRegisterSetCount() override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t reg_set); + const lldb_private::RegisterSet * + GetRegisterSet(size_t reg_set) override; - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue &value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue &value) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; private: UnwindMacOSXFrameBackchain::Cursor m_cursor; bool m_cursor_is_valid; - //------------------------------------------------------------------ - // For RegisterContextMacOSXFrameBackchain only - //------------------------------------------------------------------ + DISALLOW_COPY_AND_ASSIGN (RegisterContextMacOSXFrameBackchain); }; -#endif // lldb_RegisterContextMacOSXFrameBackchain_h_ +#endif // lldb_RegisterContextMacOSXFrameBackchain_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextMemory.h b/source/Plugins/Process/Utility/RegisterContextMemory.h index 9d97dfa..d61aba9 100644 --- a/source/Plugins/Process/Utility/RegisterContextMemory.h +++ b/source/Plugins/Process/Utility/RegisterContextMemory.h @@ -25,39 +25,31 @@ class DynamicRegisterInfo; class RegisterContextMemory : public lldb_private::RegisterContext { public: - //------------------------------------------------------------------ - // Constructors and Destructors - //------------------------------------------------------------------ RegisterContextMemory (lldb_private::Thread &thread, uint32_t concrete_frame_idx, DynamicRegisterInfo ®_info, lldb::addr_t reg_data_addr); - virtual - ~RegisterContextMemory (); + ~RegisterContextMemory() override; - //------------------------------------------------------------------ - // Subclasses must override these functions - //------------------------------------------------------------------ - virtual void - InvalidateAllRegisters (); + void + InvalidateAllRegisters() override; - virtual size_t - GetRegisterCount (); + size_t + GetRegisterCount() override; - virtual const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + const lldb_private::RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual size_t - GetRegisterSetCount (); + size_t + GetRegisterSetCount() override; - virtual const lldb_private::RegisterSet * - GetRegisterSet (size_t reg_set); + const lldb_private::RegisterSet * + GetRegisterSet(size_t reg_set) override; - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; - //------------------------------------------------------------------ // If all of the thread register are in a contiguous buffer in // memory, then the default ReadRegister/WriteRegister and @@ -66,24 +58,24 @@ public: // class and modify the read/write functions as needed. //------------------------------------------------------------------ - virtual bool - ReadRegister (const lldb_private::RegisterInfo *reg_info, - lldb_private::RegisterValue ®_value); + bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue ®_value) override; - virtual bool - WriteRegister (const lldb_private::RegisterInfo *reg_info, - const lldb_private::RegisterValue ®_value); + bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue ®_value) override; - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; void SetAllRegisterData (const lldb::DataBufferSP &data_sp); + protected: - void SetAllRegisterValid (bool b); @@ -93,10 +85,7 @@ protected: lldb::addr_t m_reg_data_addr; // If this is valid, then we have a register context that is stored in memmory private: - //------------------------------------------------------------------ - // For RegisterContextMemory only - //------------------------------------------------------------------ DISALLOW_COPY_AND_ASSIGN (RegisterContextMemory); }; -#endif // lldb_RegisterContextMemory_h_ +#endif // lldb_RegisterContextMemory_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextPOSIX.h b/source/Plugins/Process/Utility/RegisterContextPOSIX.h deleted file mode 100644 index 6ddd9cf..0000000 --- a/source/Plugins/Process/Utility/RegisterContextPOSIX.h +++ /dev/null @@ -1,79 +0,0 @@ -//===-- RegisterContextPOSIX.h --------------------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// - -#ifndef liblldb_RegisterContextPOSIX_H_ -#define liblldb_RegisterContextPOSIX_H_ - -// C Includes -// C++ Includes -// Other libraries and framework includes -#include "lldb/Core/ArchSpec.h" -#include "lldb/Target/RegisterContext.h" -#include "RegisterInfoInterface.h" - -//------------------------------------------------------------------------------ -/// @class POSIXBreakpointProtocol -/// -/// @brief Extends RegisterClass with a few virtual operations useful on POSIX. -class POSIXBreakpointProtocol -{ -public: - POSIXBreakpointProtocol() - { m_watchpoints_initialized = false; } - virtual ~POSIXBreakpointProtocol() {} - - /// Updates the register state of the associated thread after hitting a - /// breakpoint (if that make sense for the architecture). Default - /// implementation simply returns true for architectures which do not - /// require any update. - /// - /// @return - /// True if the operation succeeded and false otherwise. - virtual bool UpdateAfterBreakpoint() = 0; - - /// Determines the index in lldb's register file given a kernel byte offset. - virtual unsigned - GetRegisterIndexFromOffset(unsigned offset) = 0; - - // Checks to see if a watchpoint specified by hw_index caused the inferior - // to stop. - virtual bool - IsWatchpointHit (uint32_t hw_index) = 0; - - // Resets any watchpoints that have been hit. - virtual bool - ClearWatchpointHits () = 0; - - // Returns the watchpoint address associated with a watchpoint hardware - // index. - virtual lldb::addr_t - GetWatchpointAddress (uint32_t hw_index) = 0; - - virtual bool - IsWatchpointVacant (uint32_t hw_index) = 0; - - virtual bool - SetHardwareWatchpointWithIndex (lldb::addr_t addr, size_t size, - bool read, bool write, - uint32_t hw_index) = 0; - - // From lldb_private::RegisterContext - virtual uint32_t - NumSupportedHardwareWatchpoints () = 0; - - // Force m_watchpoints_initialized to TRUE - void - ForceWatchpointsInitialized () {m_watchpoints_initialized = true;} - -protected: - bool m_watchpoints_initialized; -}; - -#endif // #ifndef liblldb_RegisterContextPOSIX_H_ - diff --git a/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp b/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp index d306f86..029a0e73 100644 --- a/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp +++ b/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp @@ -88,6 +88,54 @@ static const uint32_t g_fpu_regnums_arm[] = fpu_s30_arm, fpu_s31_arm, fpu_fpscr_arm, + fpu_d0_arm, + fpu_d1_arm, + fpu_d2_arm, + fpu_d3_arm, + fpu_d4_arm, + fpu_d5_arm, + fpu_d6_arm, + fpu_d7_arm, + fpu_d8_arm, + fpu_d9_arm, + fpu_d10_arm, + fpu_d11_arm, + fpu_d12_arm, + fpu_d13_arm, + fpu_d14_arm, + fpu_d15_arm, + fpu_d16_arm, + fpu_d17_arm, + fpu_d18_arm, + fpu_d19_arm, + fpu_d20_arm, + fpu_d21_arm, + fpu_d22_arm, + fpu_d23_arm, + fpu_d24_arm, + fpu_d25_arm, + fpu_d26_arm, + fpu_d27_arm, + fpu_d28_arm, + fpu_d29_arm, + fpu_d30_arm, + fpu_d31_arm, + fpu_q0_arm, + fpu_q1_arm, + fpu_q2_arm, + fpu_q3_arm, + fpu_q4_arm, + fpu_q5_arm, + fpu_q6_arm, + fpu_q7_arm, + fpu_q8_arm, + fpu_q9_arm, + fpu_q10_arm, + fpu_q11_arm, + fpu_q12_arm, + fpu_q13_arm, + fpu_q14_arm, + fpu_q15_arm, LLDB_INVALID_REGNUM // register sets need to end with this flag }; diff --git a/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h b/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h index a3a2926..fbbcb94 100644 --- a/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h +++ b/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h @@ -1,4 +1,4 @@ -//===-- RegisterContextPOSIX_arm.h ----------------------------*- C++ -*-===// +//===-- RegisterContextPOSIX_arm.h ------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -7,12 +7,17 @@ // //===----------------------------------------------------------------------===// -#ifndef liblldb_RegisterContextPOSIX_arm_H_ -#define liblldb_RegisterContextPOSIX_arm_H_ +#ifndef liblldb_RegisterContextPOSIX_arm_h_ +#define liblldb_RegisterContextPOSIX_arm_h_ +// C Includes +// C++ Includes +// Other libraries and framework includes +// Project includes #include "lldb/Core/Log.h" +#include "lldb/Target/RegisterContext.h" +#include "RegisterInfoInterface.h" #include "lldb-arm-register-enums.h" -#include "RegisterContextPOSIX.h" class ProcessMonitor; @@ -24,16 +29,16 @@ public: uint32_t concrete_frame_idx, lldb_private::RegisterInfoInterface *register_info); - ~RegisterContextPOSIX_arm(); + ~RegisterContextPOSIX_arm() override; void Invalidate(); void - InvalidateAllRegisters(); + InvalidateAllRegisters() override; size_t - GetRegisterCount(); + GetRegisterCount() override; virtual size_t GetGPRSize(); @@ -45,19 +50,19 @@ public: GetRegisterOffset(unsigned reg); const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex(size_t reg); + GetRegisterInfoAtIndex(size_t reg) override; size_t - GetRegisterSetCount(); + GetRegisterSetCount() override; const lldb_private::RegisterSet * - GetRegisterSet(size_t set); + GetRegisterSet(size_t set) override; const char * GetRegisterName(unsigned reg); uint32_t - ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num); + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; protected: struct RegInfo @@ -117,5 +122,4 @@ protected: virtual bool WriteFPR() = 0; }; -#endif // #ifndef liblldb_RegisterContextPOSIX_arm_H_ - +#endif // liblldb_RegisterContextPOSIX_arm_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h b/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h index 29e7a7d..225d4f2 100644 --- a/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h +++ b/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h @@ -7,12 +7,17 @@ // //===----------------------------------------------------------------------===// -#ifndef liblldb_RegisterContextPOSIX_arm64_H_ -#define liblldb_RegisterContextPOSIX_arm64_H_ +#ifndef liblldb_RegisterContextPOSIX_arm64_h_ +#define liblldb_RegisterContextPOSIX_arm64_h_ +// C Includes +// C++ Includes +// Other libraries and framework includes +// Project includes #include "lldb/Core/Log.h" +#include "lldb/Target/RegisterContext.h" +#include "RegisterInfoInterface.h" #include "lldb-arm64-register-enums.h" -#include "RegisterContextPOSIX.h" class ProcessMonitor; @@ -24,16 +29,16 @@ public: uint32_t concrete_frame_idx, lldb_private::RegisterInfoInterface *register_info); - ~RegisterContextPOSIX_arm64(); + ~RegisterContextPOSIX_arm64() override; void Invalidate(); void - InvalidateAllRegisters(); + InvalidateAllRegisters() override; size_t - GetRegisterCount(); + GetRegisterCount() override; virtual size_t GetGPRSize(); @@ -45,19 +50,19 @@ public: GetRegisterOffset(unsigned reg); const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex(size_t reg); + GetRegisterInfoAtIndex(size_t reg) override; size_t - GetRegisterSetCount(); + GetRegisterSetCount() override; const lldb_private::RegisterSet * - GetRegisterSet(size_t set); + GetRegisterSet(size_t set) override; const char * GetRegisterName(unsigned reg); uint32_t - ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num); + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; protected: struct RegInfo @@ -116,4 +121,4 @@ protected: virtual bool WriteFPR() = 0; }; -#endif // #ifndef liblldb_RegisterContextPOSIX_arm64_H_ +#endif // liblldb_RegisterContextPOSIX_arm64_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h b/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h index 612a034..07552d8 100644 --- a/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h +++ b/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h @@ -7,11 +7,16 @@ // //===----------------------------------------------------------------------===// -#ifndef liblldb_RegisterContextPOSIX_mips64_H_ -#define liblldb_RegisterContextPOSIX_mips64_H_ +#ifndef liblldb_RegisterContextPOSIX_mips64_h_ +#define liblldb_RegisterContextPOSIX_mips64_h_ +// C Includes +// C++ Includes +// Other libraries and framework includes +// Project includes #include "lldb/Core/Log.h" -#include "RegisterContextPOSIX.h" +#include "lldb/Target/RegisterContext.h" +#include "RegisterInfoInterface.h" #include "RegisterContext_mips.h" #include "lldb-mips-freebsd-register-enums.h" @@ -27,16 +32,16 @@ public: uint32_t concrete_frame_idx, lldb_private::RegisterInfoInterface *register_info); - ~RegisterContextPOSIX_mips64(); + ~RegisterContextPOSIX_mips64() override; void Invalidate(); void - InvalidateAllRegisters(); + InvalidateAllRegisters() override; size_t - GetRegisterCount(); + GetRegisterCount() override; virtual size_t GetGPRSize(); @@ -48,19 +53,19 @@ public: GetRegisterOffset(unsigned reg); const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex(size_t reg); + GetRegisterInfoAtIndex(size_t reg) override; size_t - GetRegisterSetCount(); + GetRegisterSetCount() override; const lldb_private::RegisterSet * - GetRegisterSet(size_t set); + GetRegisterSet(size_t set) override; const char * GetRegisterName(unsigned reg); uint32_t - ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num); + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; protected: uint64_t m_gpr_mips64[k_num_gpr_registers_mips64]; // general purpose registers. @@ -87,4 +92,4 @@ protected: virtual bool WriteFPR() = 0; }; -#endif // #ifndef liblldb_RegisterContextPOSIX_mips64_H_ +#endif // liblldb_RegisterContextPOSIX_mips64_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h b/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h index c7a2451..4168e46 100644 --- a/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h +++ b/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h @@ -1,4 +1,4 @@ -//===-- RegisterContextPOSIX_powerpc.h ---------------------------*- C++ -*-===// +//===-- RegisterContextPOSIX_powerpc.h --------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -7,11 +7,16 @@ // //===----------------------------------------------------------------------===// -#ifndef liblldb_RegisterContextPOSIX_powerpc_H_ -#define liblldb_RegisterContextPOSIX_powerpc_H_ +#ifndef liblldb_RegisterContextPOSIX_powerpc_h_ +#define liblldb_RegisterContextPOSIX_powerpc_h_ +// C Includes +// C++ Includes +// Other libraries and framework includes +// Project includes #include "lldb/Core/Log.h" -#include "RegisterContextPOSIX.h" +#include "lldb/Target/RegisterContext.h" +#include "RegisterInfoInterface.h" #include "RegisterContext_powerpc.h" class ProcessMonitor; @@ -148,16 +153,16 @@ public: uint32_t concrete_frame_idx, lldb_private::RegisterInfoInterface *register_info); - ~RegisterContextPOSIX_powerpc(); + ~RegisterContextPOSIX_powerpc() override; void Invalidate(); void - InvalidateAllRegisters(); + InvalidateAllRegisters() override; size_t - GetRegisterCount(); + GetRegisterCount() override; virtual size_t GetGPRSize(); @@ -169,19 +174,19 @@ public: GetRegisterOffset(unsigned reg); const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex(size_t reg); + GetRegisterInfoAtIndex(size_t reg) override; size_t - GetRegisterSetCount(); + GetRegisterSetCount() override; const lldb_private::RegisterSet * - GetRegisterSet(size_t set); + GetRegisterSet(size_t set) override; const char * GetRegisterName(unsigned reg); uint32_t - ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num); + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; protected: uint64_t m_gpr_powerpc[k_num_gpr_registers_powerpc]; // general purpose registers. @@ -215,4 +220,4 @@ protected: virtual bool WriteVMX() = 0; }; -#endif // #ifndef liblldb_RegisterContextPOSIX_powerpc_H_ +#endif // liblldb_RegisterContextPOSIX_powerpc_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h b/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h index 0eec1d9..b470825 100644 --- a/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h +++ b/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h @@ -7,13 +7,18 @@ // //===----------------------------------------------------------------------===// -#ifndef liblldb_RegisterContextPOSIX_x86_H_ -#define liblldb_RegisterContextPOSIX_x86_H_ +#ifndef liblldb_RegisterContextPOSIX_x86_h_ +#define liblldb_RegisterContextPOSIX_x86_h_ +// C Includes +// C++ Includes +// Other libraries and framework includes +// Project includes #include "lldb/Core/Log.h" -#include "lldb-x86-register-enums.h" -#include "RegisterContextPOSIX.h" +#include "lldb/Target/RegisterContext.h" +#include "RegisterInfoInterface.h" #include "RegisterContext_x86.h" +#include "lldb-x86-register-enums.h" class ProcessMonitor; @@ -25,16 +30,16 @@ public: uint32_t concrete_frame_idx, lldb_private::RegisterInfoInterface *register_info); - ~RegisterContextPOSIX_x86(); + ~RegisterContextPOSIX_x86() override; void Invalidate(); void - InvalidateAllRegisters(); + InvalidateAllRegisters() override; size_t - GetRegisterCount(); + GetRegisterCount() override; virtual size_t GetGPRSize(); @@ -46,19 +51,19 @@ public: GetRegisterOffset(unsigned reg); const lldb_private::RegisterInfo * - GetRegisterInfoAtIndex(size_t reg); + GetRegisterInfoAtIndex(size_t reg) override; size_t - GetRegisterSetCount(); + GetRegisterSetCount() override; const lldb_private::RegisterSet * - GetRegisterSet(size_t set); + GetRegisterSet(size_t set) override; const char * GetRegisterName(unsigned reg); uint32_t - ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num); + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; //--------------------------------------------------------------------------- // Note: prefer kernel definitions over user-land @@ -186,4 +191,4 @@ protected: virtual bool WriteFPR() = 0; }; -#endif // #ifndef liblldb_RegisterContextPOSIX_x86_H_ +#endif // liblldb_RegisterContextPOSIX_x86_h_ diff --git a/source/Plugins/Process/Utility/RegisterContextThreadMemory.h b/source/Plugins/Process/Utility/RegisterContextThreadMemory.h index 161ef04..b4680de 100644 --- a/source/Plugins/Process/Utility/RegisterContextThreadMemory.h +++ b/source/Plugins/Process/Utility/RegisterContextThreadMemory.h @@ -10,8 +10,12 @@ #ifndef lldb_RegisterContextThreadMemory_h_ #define lldb_RegisterContextThreadMemory_h_ +// C Includes +// C++ Includes #include <vector> +// Other libraries and framework includes +// Project includes #include "lldb/lldb-private.h" #include "lldb/Target/RegisterContext.h" #include "lldb/Symbol/SymbolContext.h" @@ -24,30 +28,28 @@ public: RegisterContextThreadMemory (Thread &thread, lldb::addr_t register_data_addr); - virtual ~RegisterContextThreadMemory(); - //------------------------------------------------------------------ - // Subclasses must override these functions - //------------------------------------------------------------------ - virtual void - InvalidateAllRegisters (); + ~RegisterContextThreadMemory() override; + + void + InvalidateAllRegisters() override; - virtual size_t - GetRegisterCount (); + size_t + GetRegisterCount() override; - virtual const RegisterInfo * - GetRegisterInfoAtIndex (size_t reg); + const RegisterInfo * + GetRegisterInfoAtIndex(size_t reg) override; - virtual size_t - GetRegisterSetCount (); + size_t + GetRegisterSetCount() override; - virtual const RegisterSet * - GetRegisterSet (size_t reg_set); + const RegisterSet * + GetRegisterSet(size_t reg_set) override; - virtual bool - ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value); + bool + ReadRegister(const RegisterInfo *reg_info, RegisterValue ®_value) override; - virtual bool - WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value); + bool + WriteRegister(const RegisterInfo *reg_info, const RegisterValue ®_value) override; // These two functions are used to implement "push" and "pop" of register states. They are used primarily // for expression evaluation, where we need to push a new state (storing the old one in data_sp) and then @@ -56,48 +58,50 @@ public: // may mean e.g. interrupting a thread that is sitting in a kernel trap. That is a somewhat disruptive operation, // so these API's should only be used when this behavior is needed. - virtual bool - ReadAllRegisterValues (lldb::DataBufferSP &data_sp); + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - virtual bool - WriteAllRegisterValues (const lldb::DataBufferSP &data_sp); + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; bool CopyFromRegisterContext (lldb::RegisterContextSP context); - virtual uint32_t - ConvertRegisterKindToRegisterNumber (lldb::RegisterKind kind, uint32_t num); - - //------------------------------------------------------------------ - // Subclasses can override these functions if desired - //------------------------------------------------------------------ - virtual uint32_t - NumSupportedHardwareBreakpoints (); - - virtual uint32_t - SetHardwareBreakpoint (lldb::addr_t addr, size_t size); + uint32_t + ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override; - virtual bool - ClearHardwareBreakpoint (uint32_t hw_idx); + uint32_t + NumSupportedHardwareBreakpoints() override; - virtual uint32_t - NumSupportedHardwareWatchpoints (); + uint32_t + SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override; - virtual uint32_t - SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write); - - virtual bool - ClearHardwareWatchpoint (uint32_t hw_index); + bool + ClearHardwareBreakpoint(uint32_t hw_idx) override; - virtual bool - HardwareSingleStep (bool enable); + uint32_t + NumSupportedHardwareWatchpoints() override; - virtual Error - ReadRegisterValueFromMemory (const lldb_private::RegisterInfo *reg_info, lldb::addr_t src_addr, uint32_t src_len, RegisterValue ®_value); + uint32_t + SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read, bool write) override; - virtual Error - WriteRegisterValueToMemory (const lldb_private::RegisterInfo *reg_info, lldb::addr_t dst_addr, uint32_t dst_len, const RegisterValue ®_value); + bool + ClearHardwareWatchpoint(uint32_t hw_index) override; + bool + HardwareSingleStep(bool enable) override; + + Error + ReadRegisterValueFromMemory(const lldb_private::RegisterInfo *reg_info, + lldb::addr_t src_addr, + uint32_t src_len, + RegisterValue ®_value) override; + + Error + WriteRegisterValueToMemory(const lldb_private::RegisterInfo *reg_info, + lldb::addr_t dst_addr, uint32_t dst_len, + const RegisterValue ®_value) override; + protected: void UpdateRegisterContext (); @@ -106,9 +110,11 @@ protected: lldb::RegisterContextSP m_reg_ctx_sp; lldb::addr_t m_register_data_addr; uint32_t m_stop_id; + private: DISALLOW_COPY_AND_ASSIGN (RegisterContextThreadMemory); }; + } // namespace lldb_private -#endif // lldb_RegisterContextThreadMemory_h_ +#endif // lldb_RegisterContextThreadMemory_h_ diff --git a/source/Plugins/Process/Utility/RegisterContext_mips.h b/source/Plugins/Process/Utility/RegisterContext_mips.h index de2b4d6..3603227 100644 --- a/source/Plugins/Process/Utility/RegisterContext_mips.h +++ b/source/Plugins/Process/Utility/RegisterContext_mips.h @@ -15,455 +15,228 @@ enum { // GP Registers - gcc_dwarf_zero_mips = 0, - gcc_dwarf_r1_mips, - gcc_dwarf_r2_mips, - gcc_dwarf_r3_mips, - gcc_dwarf_r4_mips, - gcc_dwarf_r5_mips, - gcc_dwarf_r6_mips, - gcc_dwarf_r7_mips, - gcc_dwarf_r8_mips, - gcc_dwarf_r9_mips, - gcc_dwarf_r10_mips, - gcc_dwarf_r11_mips, - gcc_dwarf_r12_mips, - gcc_dwarf_r13_mips, - gcc_dwarf_r14_mips, - gcc_dwarf_r15_mips, - gcc_dwarf_r16_mips, - gcc_dwarf_r17_mips, - gcc_dwarf_r18_mips, - gcc_dwarf_r19_mips, - gcc_dwarf_r20_mips, - gcc_dwarf_r21_mips, - gcc_dwarf_r22_mips, - gcc_dwarf_r23_mips, - gcc_dwarf_r24_mips, - gcc_dwarf_r25_mips, - gcc_dwarf_r26_mips, - gcc_dwarf_r27_mips, - gcc_dwarf_gp_mips, - gcc_dwarf_sp_mips, - gcc_dwarf_r30_mips, - gcc_dwarf_ra_mips, - gcc_dwarf_sr_mips, - gcc_dwarf_lo_mips, - gcc_dwarf_hi_mips, - gcc_dwarf_bad_mips, - gcc_dwarf_cause_mips, - gcc_dwarf_pc_mips, - gcc_dwarf_f0_mips, - gcc_dwarf_f1_mips, - gcc_dwarf_f2_mips, - gcc_dwarf_f3_mips, - gcc_dwarf_f4_mips, - gcc_dwarf_f5_mips, - gcc_dwarf_f6_mips, - gcc_dwarf_f7_mips, - gcc_dwarf_f8_mips, - gcc_dwarf_f9_mips, - gcc_dwarf_f10_mips, - gcc_dwarf_f11_mips, - gcc_dwarf_f12_mips, - gcc_dwarf_f13_mips, - gcc_dwarf_f14_mips, - gcc_dwarf_f15_mips, - gcc_dwarf_f16_mips, - gcc_dwarf_f17_mips, - gcc_dwarf_f18_mips, - gcc_dwarf_f19_mips, - gcc_dwarf_f20_mips, - gcc_dwarf_f21_mips, - gcc_dwarf_f22_mips, - gcc_dwarf_f23_mips, - gcc_dwarf_f24_mips, - gcc_dwarf_f25_mips, - gcc_dwarf_f26_mips, - gcc_dwarf_f27_mips, - gcc_dwarf_f28_mips, - gcc_dwarf_f29_mips, - gcc_dwarf_f30_mips, - gcc_dwarf_f31_mips, - gcc_dwarf_fcsr_mips, - gcc_dwarf_fir_mips, - gcc_dwarf_w0_mips, - gcc_dwarf_w1_mips, - gcc_dwarf_w2_mips, - gcc_dwarf_w3_mips, - gcc_dwarf_w4_mips, - gcc_dwarf_w5_mips, - gcc_dwarf_w6_mips, - gcc_dwarf_w7_mips, - gcc_dwarf_w8_mips, - gcc_dwarf_w9_mips, - gcc_dwarf_w10_mips, - gcc_dwarf_w11_mips, - gcc_dwarf_w12_mips, - gcc_dwarf_w13_mips, - gcc_dwarf_w14_mips, - gcc_dwarf_w15_mips, - gcc_dwarf_w16_mips, - gcc_dwarf_w17_mips, - gcc_dwarf_w18_mips, - gcc_dwarf_w19_mips, - gcc_dwarf_w20_mips, - gcc_dwarf_w21_mips, - gcc_dwarf_w22_mips, - gcc_dwarf_w23_mips, - gcc_dwarf_w24_mips, - gcc_dwarf_w25_mips, - gcc_dwarf_w26_mips, - gcc_dwarf_w27_mips, - gcc_dwarf_w28_mips, - gcc_dwarf_w29_mips, - gcc_dwarf_w30_mips, - gcc_dwarf_w31_mips, - gcc_dwarf_mcsr_mips, - gcc_dwarf_mir_mips, - gcc_dwarf_config5_mips, - gcc_dwarf_ic_mips, - gcc_dwarf_dummy_mips + dwarf_zero_mips = 0, + dwarf_r1_mips, + dwarf_r2_mips, + dwarf_r3_mips, + dwarf_r4_mips, + dwarf_r5_mips, + dwarf_r6_mips, + dwarf_r7_mips, + dwarf_r8_mips, + dwarf_r9_mips, + dwarf_r10_mips, + dwarf_r11_mips, + dwarf_r12_mips, + dwarf_r13_mips, + dwarf_r14_mips, + dwarf_r15_mips, + dwarf_r16_mips, + dwarf_r17_mips, + dwarf_r18_mips, + dwarf_r19_mips, + dwarf_r20_mips, + dwarf_r21_mips, + dwarf_r22_mips, + dwarf_r23_mips, + dwarf_r24_mips, + dwarf_r25_mips, + dwarf_r26_mips, + dwarf_r27_mips, + dwarf_gp_mips, + dwarf_sp_mips, + dwarf_r30_mips, + dwarf_ra_mips, + dwarf_sr_mips, + dwarf_lo_mips, + dwarf_hi_mips, + dwarf_bad_mips, + dwarf_cause_mips, + dwarf_pc_mips, + dwarf_f0_mips, + dwarf_f1_mips, + dwarf_f2_mips, + dwarf_f3_mips, + dwarf_f4_mips, + dwarf_f5_mips, + dwarf_f6_mips, + dwarf_f7_mips, + dwarf_f8_mips, + dwarf_f9_mips, + dwarf_f10_mips, + dwarf_f11_mips, + dwarf_f12_mips, + dwarf_f13_mips, + dwarf_f14_mips, + dwarf_f15_mips, + dwarf_f16_mips, + dwarf_f17_mips, + dwarf_f18_mips, + dwarf_f19_mips, + dwarf_f20_mips, + dwarf_f21_mips, + dwarf_f22_mips, + dwarf_f23_mips, + dwarf_f24_mips, + dwarf_f25_mips, + dwarf_f26_mips, + dwarf_f27_mips, + dwarf_f28_mips, + dwarf_f29_mips, + dwarf_f30_mips, + dwarf_f31_mips, + dwarf_fcsr_mips, + dwarf_fir_mips, + dwarf_w0_mips, + dwarf_w1_mips, + dwarf_w2_mips, + dwarf_w3_mips, + dwarf_w4_mips, + dwarf_w5_mips, + dwarf_w6_mips, + dwarf_w7_mips, + dwarf_w8_mips, + dwarf_w9_mips, + dwarf_w10_mips, + dwarf_w11_mips, + dwarf_w12_mips, + dwarf_w13_mips, + dwarf_w14_mips, + dwarf_w15_mips, + dwarf_w16_mips, + dwarf_w17_mips, + dwarf_w18_mips, + dwarf_w19_mips, + dwarf_w20_mips, + dwarf_w21_mips, + dwarf_w22_mips, + dwarf_w23_mips, + dwarf_w24_mips, + dwarf_w25_mips, + dwarf_w26_mips, + dwarf_w27_mips, + dwarf_w28_mips, + dwarf_w29_mips, + dwarf_w30_mips, + dwarf_w31_mips, + dwarf_mcsr_mips, + dwarf_mir_mips, + dwarf_config5_mips, + dwarf_ic_mips, + dwarf_dummy_mips }; enum { - gcc_dwarf_zero_mips64 = 0, - gcc_dwarf_r1_mips64, - gcc_dwarf_r2_mips64, - gcc_dwarf_r3_mips64, - gcc_dwarf_r4_mips64, - gcc_dwarf_r5_mips64, - gcc_dwarf_r6_mips64, - gcc_dwarf_r7_mips64, - gcc_dwarf_r8_mips64, - gcc_dwarf_r9_mips64, - gcc_dwarf_r10_mips64, - gcc_dwarf_r11_mips64, - gcc_dwarf_r12_mips64, - gcc_dwarf_r13_mips64, - gcc_dwarf_r14_mips64, - gcc_dwarf_r15_mips64, - gcc_dwarf_r16_mips64, - gcc_dwarf_r17_mips64, - gcc_dwarf_r18_mips64, - gcc_dwarf_r19_mips64, - gcc_dwarf_r20_mips64, - gcc_dwarf_r21_mips64, - gcc_dwarf_r22_mips64, - gcc_dwarf_r23_mips64, - gcc_dwarf_r24_mips64, - gcc_dwarf_r25_mips64, - gcc_dwarf_r26_mips64, - gcc_dwarf_r27_mips64, - gcc_dwarf_gp_mips64, - gcc_dwarf_sp_mips64, - gcc_dwarf_r30_mips64, - gcc_dwarf_ra_mips64, - gcc_dwarf_sr_mips64, - gcc_dwarf_lo_mips64, - gcc_dwarf_hi_mips64, - gcc_dwarf_bad_mips64, - gcc_dwarf_cause_mips64, - gcc_dwarf_pc_mips64, - gcc_dwarf_f0_mips64, - gcc_dwarf_f1_mips64, - gcc_dwarf_f2_mips64, - gcc_dwarf_f3_mips64, - gcc_dwarf_f4_mips64, - gcc_dwarf_f5_mips64, - gcc_dwarf_f6_mips64, - gcc_dwarf_f7_mips64, - gcc_dwarf_f8_mips64, - gcc_dwarf_f9_mips64, - gcc_dwarf_f10_mips64, - gcc_dwarf_f11_mips64, - gcc_dwarf_f12_mips64, - gcc_dwarf_f13_mips64, - gcc_dwarf_f14_mips64, - gcc_dwarf_f15_mips64, - gcc_dwarf_f16_mips64, - gcc_dwarf_f17_mips64, - gcc_dwarf_f18_mips64, - gcc_dwarf_f19_mips64, - gcc_dwarf_f20_mips64, - gcc_dwarf_f21_mips64, - gcc_dwarf_f22_mips64, - gcc_dwarf_f23_mips64, - gcc_dwarf_f24_mips64, - gcc_dwarf_f25_mips64, - gcc_dwarf_f26_mips64, - gcc_dwarf_f27_mips64, - gcc_dwarf_f28_mips64, - gcc_dwarf_f29_mips64, - gcc_dwarf_f30_mips64, - gcc_dwarf_f31_mips64, - gcc_dwarf_fcsr_mips64, - gcc_dwarf_fir_mips64, - gcc_dwarf_ic_mips64, - gcc_dwarf_dummy_mips64, - gcc_dwarf_w0_mips64, - gcc_dwarf_w1_mips64, - gcc_dwarf_w2_mips64, - gcc_dwarf_w3_mips64, - gcc_dwarf_w4_mips64, - gcc_dwarf_w5_mips64, - gcc_dwarf_w6_mips64, - gcc_dwarf_w7_mips64, - gcc_dwarf_w8_mips64, - gcc_dwarf_w9_mips64, - gcc_dwarf_w10_mips64, - gcc_dwarf_w11_mips64, - gcc_dwarf_w12_mips64, - gcc_dwarf_w13_mips64, - gcc_dwarf_w14_mips64, - gcc_dwarf_w15_mips64, - gcc_dwarf_w16_mips64, - gcc_dwarf_w17_mips64, - gcc_dwarf_w18_mips64, - gcc_dwarf_w19_mips64, - gcc_dwarf_w20_mips64, - gcc_dwarf_w21_mips64, - gcc_dwarf_w22_mips64, - gcc_dwarf_w23_mips64, - gcc_dwarf_w24_mips64, - gcc_dwarf_w25_mips64, - gcc_dwarf_w26_mips64, - gcc_dwarf_w27_mips64, - gcc_dwarf_w28_mips64, - gcc_dwarf_w29_mips64, - gcc_dwarf_w30_mips64, - gcc_dwarf_w31_mips64, - gcc_dwarf_mcsr_mips64, - gcc_dwarf_mir_mips64, - gcc_dwarf_config5_mips64, -}; - -// GDB Register numbers (eRegisterKindGDB) -enum -{ - gdb_zero_mips = 0, - gdb_r1_mips, - gdb_r2_mips, - gdb_r3_mips, - gdb_r4_mips, - gdb_r5_mips, - gdb_r6_mips, - gdb_r7_mips, - gdb_r8_mips, - gdb_r9_mips, - gdb_r10_mips, - gdb_r11_mips, - gdb_r12_mips, - gdb_r13_mips, - gdb_r14_mips, - gdb_r15_mips, - gdb_r16_mips, - gdb_r17_mips, - gdb_r18_mips, - gdb_r19_mips, - gdb_r20_mips, - gdb_r21_mips, - gdb_r22_mips, - gdb_r23_mips, - gdb_r24_mips, - gdb_r25_mips, - gdb_r26_mips, - gdb_r27_mips, - gdb_gp_mips, - gdb_sp_mips, - gdb_r30_mips, - gdb_ra_mips, - gdb_sr_mips, - gdb_lo_mips, - gdb_hi_mips, - gdb_bad_mips, - gdb_cause_mips, - gdb_pc_mips, - gdb_f0_mips, - gdb_f1_mips, - gdb_f2_mips, - gdb_f3_mips, - gdb_f4_mips, - gdb_f5_mips, - gdb_f6_mips, - gdb_f7_mips, - gdb_f8_mips, - gdb_f9_mips, - gdb_f10_mips, - gdb_f11_mips, - gdb_f12_mips, - gdb_f13_mips, - gdb_f14_mips, - gdb_f15_mips, - gdb_f16_mips, - gdb_f17_mips, - gdb_f18_mips, - gdb_f19_mips, - gdb_f20_mips, - gdb_f21_mips, - gdb_f22_mips, - gdb_f23_mips, - gdb_f24_mips, - gdb_f25_mips, - gdb_f26_mips, - gdb_f27_mips, - gdb_f28_mips, - gdb_f29_mips, - gdb_f30_mips, - gdb_f31_mips, - gdb_fcsr_mips, - gdb_fir_mips, - gdb_w0_mips, - gdb_w1_mips, - gdb_w2_mips, - gdb_w3_mips, - gdb_w4_mips, - gdb_w5_mips, - gdb_w6_mips, - gdb_w7_mips, - gdb_w8_mips, - gdb_w9_mips, - gdb_w10_mips, - gdb_w11_mips, - gdb_w12_mips, - gdb_w13_mips, - gdb_w14_mips, - gdb_w15_mips, - gdb_w16_mips, - gdb_w17_mips, - gdb_w18_mips, - gdb_w19_mips, - gdb_w20_mips, - gdb_w21_mips, - gdb_w22_mips, - gdb_w23_mips, - gdb_w24_mips, - gdb_w25_mips, - gdb_w26_mips, - gdb_w27_mips, - gdb_w28_mips, - gdb_w29_mips, - gdb_w30_mips, - gdb_w31_mips, - gdb_mcsr_mips, - gdb_mir_mips, - gdb_config5_mips, - gdb_ic_mips, - gdb_dummy_mips -}; - -enum -{ - gdb_zero_mips64 = 0, - gdb_r1_mips64, - gdb_r2_mips64, - gdb_r3_mips64, - gdb_r4_mips64, - gdb_r5_mips64, - gdb_r6_mips64, - gdb_r7_mips64, - gdb_r8_mips64, - gdb_r9_mips64, - gdb_r10_mips64, - gdb_r11_mips64, - gdb_r12_mips64, - gdb_r13_mips64, - gdb_r14_mips64, - gdb_r15_mips64, - gdb_r16_mips64, - gdb_r17_mips64, - gdb_r18_mips64, - gdb_r19_mips64, - gdb_r20_mips64, - gdb_r21_mips64, - gdb_r22_mips64, - gdb_r23_mips64, - gdb_r24_mips64, - gdb_r25_mips64, - gdb_r26_mips64, - gdb_r27_mips64, - gdb_gp_mips64, - gdb_sp_mips64, - gdb_r30_mips64, - gdb_ra_mips64, - gdb_sr_mips64, - gdb_lo_mips64, - gdb_hi_mips64, - gdb_bad_mips64, - gdb_cause_mips64, - gdb_pc_mips64, - gdb_f0_mips64, - gdb_f1_mips64, - gdb_f2_mips64, - gdb_f3_mips64, - gdb_f4_mips64, - gdb_f5_mips64, - gdb_f6_mips64, - gdb_f7_mips64, - gdb_f8_mips64, - gdb_f9_mips64, - gdb_f10_mips64, - gdb_f11_mips64, - gdb_f12_mips64, - gdb_f13_mips64, - gdb_f14_mips64, - gdb_f15_mips64, - gdb_f16_mips64, - gdb_f17_mips64, - gdb_f18_mips64, - gdb_f19_mips64, - gdb_f20_mips64, - gdb_f21_mips64, - gdb_f22_mips64, - gdb_f23_mips64, - gdb_f24_mips64, - gdb_f25_mips64, - gdb_f26_mips64, - gdb_f27_mips64, - gdb_f28_mips64, - gdb_f29_mips64, - gdb_f30_mips64, - gdb_f31_mips64, - gdb_fcsr_mips64, - gdb_fir_mips64, - gdb_ic_mips64, - gdb_dummy_mips64, - gdb_w0_mips64, - gdb_w1_mips64, - gdb_w2_mips64, - gdb_w3_mips64, - gdb_w4_mips64, - gdb_w5_mips64, - gdb_w6_mips64, - gdb_w7_mips64, - gdb_w8_mips64, - gdb_w9_mips64, - gdb_w10_mips64, - gdb_w11_mips64, - gdb_w12_mips64, - gdb_w13_mips64, - gdb_w14_mips64, - gdb_w15_mips64, - gdb_w16_mips64, - gdb_w17_mips64, - gdb_w18_mips64, - gdb_w19_mips64, - gdb_w20_mips64, - gdb_w21_mips64, - gdb_w22_mips64, - gdb_w23_mips64, - gdb_w24_mips64, - gdb_w25_mips64, - gdb_w26_mips64, - gdb_w27_mips64, - gdb_w28_mips64, - gdb_w29_mips64, - gdb_w30_mips64, - gdb_w31_mips64, - gdb_mcsr_mips64, - gdb_mir_mips64, - gdb_config5_mips64, + dwarf_zero_mips64 = 0, + dwarf_r1_mips64, + dwarf_r2_mips64, + dwarf_r3_mips64, + dwarf_r4_mips64, + dwarf_r5_mips64, + dwarf_r6_mips64, + dwarf_r7_mips64, + dwarf_r8_mips64, + dwarf_r9_mips64, + dwarf_r10_mips64, + dwarf_r11_mips64, + dwarf_r12_mips64, + dwarf_r13_mips64, + dwarf_r14_mips64, + dwarf_r15_mips64, + dwarf_r16_mips64, + dwarf_r17_mips64, + dwarf_r18_mips64, + dwarf_r19_mips64, + dwarf_r20_mips64, + dwarf_r21_mips64, + dwarf_r22_mips64, + dwarf_r23_mips64, + dwarf_r24_mips64, + dwarf_r25_mips64, + dwarf_r26_mips64, + dwarf_r27_mips64, + dwarf_gp_mips64, + dwarf_sp_mips64, + dwarf_r30_mips64, + dwarf_ra_mips64, + dwarf_sr_mips64, + dwarf_lo_mips64, + dwarf_hi_mips64, + dwarf_bad_mips64, + dwarf_cause_mips64, + dwarf_pc_mips64, + dwarf_f0_mips64, + dwarf_f1_mips64, + dwarf_f2_mips64, + dwarf_f3_mips64, + dwarf_f4_mips64, + dwarf_f5_mips64, + dwarf_f6_mips64, + dwarf_f7_mips64, + dwarf_f8_mips64, + dwarf_f9_mips64, + dwarf_f10_mips64, + dwarf_f11_mips64, + dwarf_f12_mips64, + dwarf_f13_mips64, + dwarf_f14_mips64, + dwarf_f15_mips64, + dwarf_f16_mips64, + dwarf_f17_mips64, + dwarf_f18_mips64, + dwarf_f19_mips64, + dwarf_f20_mips64, + dwarf_f21_mips64, + dwarf_f22_mips64, + dwarf_f23_mips64, + dwarf_f24_mips64, + dwarf_f25_mips64, + dwarf_f26_mips64, + dwarf_f27_mips64, + dwarf_f28_mips64, + dwarf_f29_mips64, + dwarf_f30_mips64, + dwarf_f31_mips64, + dwarf_fcsr_mips64, + dwarf_fir_mips64, + dwarf_ic_mips64, + dwarf_dummy_mips64, + dwarf_w0_mips64, + dwarf_w1_mips64, + dwarf_w2_mips64, + dwarf_w3_mips64, + dwarf_w4_mips64, + dwarf_w5_mips64, + dwarf_w6_mips64, + dwarf_w7_mips64, + dwarf_w8_mips64, + dwarf_w9_mips64, + dwarf_w10_mips64, + dwarf_w11_mips64, + dwarf_w12_mips64, + dwarf_w13_mips64, + dwarf_w14_mips64, + dwarf_w15_mips64, + dwarf_w16_mips64, + dwarf_w17_mips64, + dwarf_w18_mips64, + dwarf_w19_mips64, + dwarf_w20_mips64, + dwarf_w21_mips64, + dwarf_w22_mips64, + dwarf_w23_mips64, + dwarf_w24_mips64, + dwarf_w25_mips64, + dwarf_w26_mips64, + dwarf_w27_mips64, + dwarf_w28_mips64, + dwarf_w29_mips64, + dwarf_w30_mips64, + dwarf_w31_mips64, + dwarf_mcsr_mips64, + dwarf_mir_mips64, + dwarf_config5_mips64, }; struct IOVEC_mips diff --git a/source/Plugins/Process/Utility/RegisterContext_powerpc.h b/source/Plugins/Process/Utility/RegisterContext_powerpc.h index 7438b88..2e3053c 100644 --- a/source/Plugins/Process/Utility/RegisterContext_powerpc.h +++ b/source/Plugins/Process/Utility/RegisterContext_powerpc.h @@ -10,223 +10,114 @@ #ifndef liblldb_RegisterContext_powerpc_H_ #define liblldb_RegisterContext_powerpc_H_ -// GCC and DWARF Register numbers (eRegisterKindGCC & eRegisterKindDWARF) +// eh_frame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF) enum { - gcc_dwarf_r0_powerpc = 0, - gcc_dwarf_r1_powerpc, - gcc_dwarf_r2_powerpc, - gcc_dwarf_r3_powerpc, - gcc_dwarf_r4_powerpc, - gcc_dwarf_r5_powerpc, - gcc_dwarf_r6_powerpc, - gcc_dwarf_r7_powerpc, - gcc_dwarf_r8_powerpc, - gcc_dwarf_r9_powerpc, - gcc_dwarf_r10_powerpc, - gcc_dwarf_r11_powerpc, - gcc_dwarf_r12_powerpc, - gcc_dwarf_r13_powerpc, - gcc_dwarf_r14_powerpc, - gcc_dwarf_r15_powerpc, - gcc_dwarf_r16_powerpc, - gcc_dwarf_r17_powerpc, - gcc_dwarf_r18_powerpc, - gcc_dwarf_r19_powerpc, - gcc_dwarf_r20_powerpc, - gcc_dwarf_r21_powerpc, - gcc_dwarf_r22_powerpc, - gcc_dwarf_r23_powerpc, - gcc_dwarf_r24_powerpc, - gcc_dwarf_r25_powerpc, - gcc_dwarf_r26_powerpc, - gcc_dwarf_r27_powerpc, - gcc_dwarf_r28_powerpc, - gcc_dwarf_r29_powerpc, - gcc_dwarf_r30_powerpc, - gcc_dwarf_r31_powerpc, - gcc_dwarf_f0_powerpc, - gcc_dwarf_f1_powerpc, - gcc_dwarf_f2_powerpc, - gcc_dwarf_f3_powerpc, - gcc_dwarf_f4_powerpc, - gcc_dwarf_f5_powerpc, - gcc_dwarf_f6_powerpc, - gcc_dwarf_f7_powerpc, - gcc_dwarf_f8_powerpc, - gcc_dwarf_f9_powerpc, - gcc_dwarf_f10_powerpc, - gcc_dwarf_f11_powerpc, - gcc_dwarf_f12_powerpc, - gcc_dwarf_f13_powerpc, - gcc_dwarf_f14_powerpc, - gcc_dwarf_f15_powerpc, - gcc_dwarf_f16_powerpc, - gcc_dwarf_f17_powerpc, - gcc_dwarf_f18_powerpc, - gcc_dwarf_f19_powerpc, - gcc_dwarf_f20_powerpc, - gcc_dwarf_f21_powerpc, - gcc_dwarf_f22_powerpc, - gcc_dwarf_f23_powerpc, - gcc_dwarf_f24_powerpc, - gcc_dwarf_f25_powerpc, - gcc_dwarf_f26_powerpc, - gcc_dwarf_f27_powerpc, - gcc_dwarf_f28_powerpc, - gcc_dwarf_f29_powerpc, - gcc_dwarf_f30_powerpc, - gcc_dwarf_f31_powerpc, - gcc_dwarf_cr_powerpc, - gcc_dwarf_fpscr_powerpc, - gcc_dwarf_msr_powerpc, - gcc_dwarf_vscr_powerpc, - gcc_dwarf_xer_powerpc = 101, - gcc_dwarf_lr_powerpc = 108, - gcc_dwarf_ctr_powerpc, - gcc_dwarf_pc_powerpc, - gcc_dwarf_vrsave_powerpc = 356, - gcc_dwarf_v0_powerpc = 1124, - gcc_dwarf_v1_powerpc, - gcc_dwarf_v2_powerpc, - gcc_dwarf_v3_powerpc, - gcc_dwarf_v4_powerpc, - gcc_dwarf_v5_powerpc, - gcc_dwarf_v6_powerpc, - gcc_dwarf_v7_powerpc, - gcc_dwarf_v8_powerpc, - gcc_dwarf_v9_powerpc, - gcc_dwarf_v10_powerpc, - gcc_dwarf_v11_powerpc, - gcc_dwarf_v12_powerpc, - gcc_dwarf_v13_powerpc, - gcc_dwarf_v14_powerpc, - gcc_dwarf_v15_powerpc, - gcc_dwarf_v16_powerpc, - gcc_dwarf_v17_powerpc, - gcc_dwarf_v18_powerpc, - gcc_dwarf_v19_powerpc, - gcc_dwarf_v20_powerpc, - gcc_dwarf_v21_powerpc, - gcc_dwarf_v22_powerpc, - gcc_dwarf_v23_powerpc, - gcc_dwarf_v24_powerpc, - gcc_dwarf_v25_powerpc, - gcc_dwarf_v26_powerpc, - gcc_dwarf_v27_powerpc, - gcc_dwarf_v28_powerpc, - gcc_dwarf_v29_powerpc, - gcc_dwarf_v30_powerpc, - gcc_dwarf_v31_powerpc, -}; - -// GDB Register numbers (eRegisterKindGDB) -enum -{ - gdb_r0_powerpc = 0, - gdb_r1_powerpc, - gdb_r2_powerpc, - gdb_r3_powerpc, - gdb_r4_powerpc, - gdb_r5_powerpc, - gdb_r6_powerpc, - gdb_r7_powerpc, - gdb_r8_powerpc, - gdb_r9_powerpc, - gdb_r10_powerpc, - gdb_r11_powerpc, - gdb_r12_powerpc, - gdb_r13_powerpc, - gdb_r14_powerpc, - gdb_r15_powerpc, - gdb_r16_powerpc, - gdb_r17_powerpc, - gdb_r18_powerpc, - gdb_r19_powerpc, - gdb_r20_powerpc, - gdb_r21_powerpc, - gdb_r22_powerpc, - gdb_r23_powerpc, - gdb_r24_powerpc, - gdb_r25_powerpc, - gdb_r26_powerpc, - gdb_r27_powerpc, - gdb_r28_powerpc, - gdb_r29_powerpc, - gdb_r30_powerpc, - gdb_r31_powerpc, - gdb_f0_powerpc, - gdb_f1_powerpc, - gdb_f2_powerpc, - gdb_f3_powerpc, - gdb_f4_powerpc, - gdb_f5_powerpc, - gdb_f6_powerpc, - gdb_f7_powerpc, - gdb_f8_powerpc, - gdb_f9_powerpc, - gdb_f10_powerpc, - gdb_f11_powerpc, - gdb_f12_powerpc, - gdb_f13_powerpc, - gdb_f14_powerpc, - gdb_f15_powerpc, - gdb_f16_powerpc, - gdb_f17_powerpc, - gdb_f18_powerpc, - gdb_f19_powerpc, - gdb_f20_powerpc, - gdb_f21_powerpc, - gdb_f22_powerpc, - gdb_f23_powerpc, - gdb_f24_powerpc, - gdb_f25_powerpc, - gdb_f26_powerpc, - gdb_f27_powerpc, - gdb_f28_powerpc, - gdb_f29_powerpc, - gdb_f30_powerpc, - gdb_f31_powerpc, - gdb_pc_powerpc, - gdb_cr_powerpc = 66, - gdb_lr_powerpc, - gdb_ctr_powerpc, - gdb_xer_powerpc, - gdb_fpscr_powerpc, - gdb_v0_powerpc = 106, - gdb_v1_powerpc, - gdb_v2_powerpc, - gdb_v3_powerpc, - gdb_v4_powerpc, - gdb_v5_powerpc, - gdb_v6_powerpc, - gdb_v7_powerpc, - gdb_v8_powerpc, - gdb_v9_powerpc, - gdb_v10_powerpc, - gdb_v11_powerpc, - gdb_v12_powerpc, - gdb_v13_powerpc, - gdb_v14_powerpc, - gdb_v15_powerpc, - gdb_v16_powerpc, - gdb_v17_powerpc, - gdb_v18_powerpc, - gdb_v19_powerpc, - gdb_v20_powerpc, - gdb_v21_powerpc, - gdb_v22_powerpc, - gdb_v23_powerpc, - gdb_v24_powerpc, - gdb_v25_powerpc, - gdb_v26_powerpc, - gdb_v27_powerpc, - gdb_v28_powerpc, - gdb_v29_powerpc, - gdb_v30_powerpc, - gdb_v31_powerpc, - gdb_vscr_powerpc, - gdb_vrsave_powerpc, + dwarf_r0_powerpc = 0, + dwarf_r1_powerpc, + dwarf_r2_powerpc, + dwarf_r3_powerpc, + dwarf_r4_powerpc, + dwarf_r5_powerpc, + dwarf_r6_powerpc, + dwarf_r7_powerpc, + dwarf_r8_powerpc, + dwarf_r9_powerpc, + dwarf_r10_powerpc, + dwarf_r11_powerpc, + dwarf_r12_powerpc, + dwarf_r13_powerpc, + dwarf_r14_powerpc, + dwarf_r15_powerpc, + dwarf_r16_powerpc, + dwarf_r17_powerpc, + dwarf_r18_powerpc, + dwarf_r19_powerpc, + dwarf_r20_powerpc, + dwarf_r21_powerpc, + dwarf_r22_powerpc, + dwarf_r23_powerpc, + dwarf_r24_powerpc, + dwarf_r25_powerpc, + dwarf_r26_powerpc, + dwarf_r27_powerpc, + dwarf_r28_powerpc, + dwarf_r29_powerpc, + dwarf_r30_powerpc, + dwarf_r31_powerpc, + dwarf_f0_powerpc, + dwarf_f1_powerpc, + dwarf_f2_powerpc, + dwarf_f3_powerpc, + dwarf_f4_powerpc, + dwarf_f5_powerpc, + dwarf_f6_powerpc, + dwarf_f7_powerpc, + dwarf_f8_powerpc, + dwarf_f9_powerpc, + dwarf_f10_powerpc, + dwarf_f11_powerpc, + dwarf_f12_powerpc, + dwarf_f13_powerpc, + dwarf_f14_powerpc, + dwarf_f15_powerpc, + dwarf_f16_powerpc, + dwarf_f17_powerpc, + dwarf_f18_powerpc, + dwarf_f19_powerpc, + dwarf_f20_powerpc, + dwarf_f21_powerpc, + dwarf_f22_powerpc, + dwarf_f23_powerpc, + dwarf_f24_powerpc, + dwarf_f25_powerpc, + dwarf_f26_powerpc, + dwarf_f27_powerpc, + dwarf_f28_powerpc, + dwarf_f29_powerpc, + dwarf_f30_powerpc, + dwarf_f31_powerpc, + dwarf_cr_powerpc, + dwarf_fpscr_powerpc, + dwarf_msr_powerpc, + dwarf_vscr_powerpc, + dwarf_xer_powerpc = 101, + dwarf_lr_powerpc = 108, + dwarf_ctr_powerpc, + dwarf_pc_powerpc, + dwarf_vrsave_powerpc = 356, + dwarf_v0_powerpc = 1124, + dwarf_v1_powerpc, + dwarf_v2_powerpc, + dwarf_v3_powerpc, + dwarf_v4_powerpc, + dwarf_v5_powerpc, + dwarf_v6_powerpc, + dwarf_v7_powerpc, + dwarf_v8_powerpc, + dwarf_v9_powerpc, + dwarf_v10_powerpc, + dwarf_v11_powerpc, + dwarf_v12_powerpc, + dwarf_v13_powerpc, + dwarf_v14_powerpc, + dwarf_v15_powerpc, + dwarf_v16_powerpc, + dwarf_v17_powerpc, + dwarf_v18_powerpc, + dwarf_v19_powerpc, + dwarf_v20_powerpc, + dwarf_v21_powerpc, + dwarf_v22_powerpc, + dwarf_v23_powerpc, + dwarf_v24_powerpc, + dwarf_v25_powerpc, + dwarf_v26_powerpc, + dwarf_v27_powerpc, + dwarf_v28_powerpc, + dwarf_v29_powerpc, + dwarf_v30_powerpc, + dwarf_v31_powerpc, }; #endif // liblldb_RegisterContext_powerpc_H_ diff --git a/source/Plugins/Process/Utility/RegisterContext_x86.h b/source/Plugins/Process/Utility/RegisterContext_x86.h index 6b3f6fb..252f125 100644 --- a/source/Plugins/Process/Utility/RegisterContext_x86.h +++ b/source/Plugins/Process/Utility/RegisterContext_x86.h @@ -11,67 +11,56 @@ #define liblldb_RegisterContext_x86_H_ //--------------------------------------------------------------------------- -// i386 gcc, dwarf, gdb enums +// i386 ehframe, dwarf regnums //--------------------------------------------------------------------------- -// Register numbers seen in eh_frame (eRegisterKindGCC) +// Register numbers seen in eh_frame (eRegisterKindEHFrame) on i386 systems (non-Darwin) // -// From Jason Molenda: "gcc registers" is the register numbering used in the eh_frame -// CFI. The only registers that are described in eh_frame CFI are those that are -// preserved across function calls aka callee-saved aka non-volatile. And none -// of the floating point registers on x86 are preserved across function calls. -// -// The only reason there is a "gcc register" and a "dwarf register" is because of a -// mistake years and years ago with i386 where they got esp and ebp -// backwards when they emitted the eh_frame instructions. Once there were -// binaries In The Wild using the reversed numbering, we had to stick with it -// forever. enum { - // 2nd parameter in DwarfRegNum() is regnum for exception handling on x86-32. - // See http://llvm.org/docs/WritingAnLLVMBackend.html#defining-a-register - gcc_eax_i386 = 0, - gcc_ecx_i386, - gcc_edx_i386, - gcc_ebx_i386, + ehframe_eax_i386 = 0, + ehframe_ecx_i386, + ehframe_edx_i386, + ehframe_ebx_i386, // on Darwin esp & ebp are reversed in the eh_frame section for i386 (versus dwarf's reg numbering). // To be specific: // i386+darwin eh_frame: 4 is ebp, 5 is esp // i386+everyone else eh_frame: 4 is esp, 5 is ebp // i386 dwarf: 4 is esp, 5 is ebp - // lldb will get the darwin-specific eh_frame reg numberings from debugserver instead of here so we - // only encode the 4 == esp, 5 == ebp numbers in this generic header. - gcc_esp_i386, - gcc_ebp_i386, - gcc_esi_i386, - gcc_edi_i386, - gcc_eip_i386, - gcc_eflags_i386, - gcc_st0_i386 = 12, - gcc_st1_i386, - gcc_st2_i386, - gcc_st3_i386, - gcc_st4_i386, - gcc_st5_i386, - gcc_st6_i386, - gcc_st7_i386, - gcc_xmm0_i386 = 21, - gcc_xmm1_i386, - gcc_xmm2_i386, - gcc_xmm3_i386, - gcc_xmm4_i386, - gcc_xmm5_i386, - gcc_xmm6_i386, - gcc_xmm7_i386, - gcc_mm0_i386 = 29, - gcc_mm1_i386, - gcc_mm2_i386, - gcc_mm3_i386, - gcc_mm4_i386, - gcc_mm5_i386, - gcc_mm6_i386, - gcc_mm7_i386, + // lldb will get the darwin-specific eh_frame reg numberings from debugserver, or the ABI, so we + // only encode the generally correct 4 == esp, 5 == ebp numbers in this generic header. + + ehframe_esp_i386, + ehframe_ebp_i386, + ehframe_esi_i386, + ehframe_edi_i386, + ehframe_eip_i386, + ehframe_eflags_i386, + ehframe_st0_i386 = 12, + ehframe_st1_i386, + ehframe_st2_i386, + ehframe_st3_i386, + ehframe_st4_i386, + ehframe_st5_i386, + ehframe_st6_i386, + ehframe_st7_i386, + ehframe_xmm0_i386 = 21, + ehframe_xmm1_i386, + ehframe_xmm2_i386, + ehframe_xmm3_i386, + ehframe_xmm4_i386, + ehframe_xmm5_i386, + ehframe_xmm6_i386, + ehframe_xmm7_i386, + ehframe_mm0_i386 = 29, + ehframe_mm1_i386, + ehframe_mm2_i386, + ehframe_mm3_i386, + ehframe_mm4_i386, + ehframe_mm5_i386, + ehframe_mm6_i386, + ehframe_mm7_i386, }; // DWARF register numbers (eRegisterKindDWARF) @@ -130,258 +119,109 @@ enum // then differentiate based on size of the register. }; -// Register numbers GDB uses (eRegisterKindGDB) -// -// From Jason Molenda: The "gdb numbers" are what you would see in the stabs debug format. -enum -{ - gdb_eax_i386, - gdb_ecx_i386, - gdb_edx_i386, - gdb_ebx_i386, - gdb_esp_i386, - gdb_ebp_i386, - gdb_esi_i386, - gdb_edi_i386, - gdb_eip_i386, - gdb_eflags_i386, - gdb_cs_i386, - gdb_ss_i386, - gdb_ds_i386, - gdb_es_i386, - gdb_fs_i386, - gdb_gs_i386, - gdb_st0_i386 = 16, - gdb_st1_i386, - gdb_st2_i386, - gdb_st3_i386, - gdb_st4_i386, - gdb_st5_i386, - gdb_st6_i386, - gdb_st7_i386, - gdb_fctrl_i386, // FPU Control Word - gdb_fstat_i386, // FPU Status Word - gdb_ftag_i386, // FPU Tag Word - gdb_fiseg_i386, // FPU IP Selector - gdb_fioff_i386, // FPU IP Offset - gdb_foseg_i386, // FPU Operand Pointer Selector - gdb_fooff_i386, // FPU Operand Pointer Offset - gdb_fop_i386, // Last Instruction Opcode - gdb_xmm0_i386 = 32, - gdb_xmm1_i386, - gdb_xmm2_i386, - gdb_xmm3_i386, - gdb_xmm4_i386, - gdb_xmm5_i386, - gdb_xmm6_i386, - gdb_xmm7_i386, - gdb_mxcsr_i386 = 40, - gdb_ymm0h_i386, - gdb_ymm1h_i386, - gdb_ymm2h_i386, - gdb_ymm3h_i386, - gdb_ymm4h_i386, - gdb_ymm5h_i386, - gdb_ymm6h_i386, - gdb_ymm7h_i386, - gdb_mm0_i386, - gdb_mm1_i386, - gdb_mm2_i386, - gdb_mm3_i386, - gdb_mm4_i386, - gdb_mm5_i386, - gdb_mm6_i386, - gdb_mm7_i386, -}; - //--------------------------------------------------------------------------- -// AMD x86_64, AMD64, Intel EM64T, or Intel 64 gcc, dwarf, gdb enums +// AMD x86_64, AMD64, Intel EM64T, or Intel 64 ehframe, dwarf regnums //--------------------------------------------------------------------------- -// GCC and DWARF Register numbers (eRegisterKindGCC & eRegisterKindDWARF) +// EHFrame and DWARF Register numbers (eRegisterKindEHFrame & eRegisterKindDWARF) // This is the spec I used (as opposed to x86-64-abi-0.99.pdf): // http://software.intel.com/sites/default/files/article/402129/mpx-linux64-abi.pdf enum { // GP Registers - gcc_dwarf_rax_x86_64 = 0, - gcc_dwarf_rdx_x86_64, - gcc_dwarf_rcx_x86_64, - gcc_dwarf_rbx_x86_64, - gcc_dwarf_rsi_x86_64, - gcc_dwarf_rdi_x86_64, - gcc_dwarf_rbp_x86_64, - gcc_dwarf_rsp_x86_64, + dwarf_rax_x86_64 = 0, + dwarf_rdx_x86_64, + dwarf_rcx_x86_64, + dwarf_rbx_x86_64, + dwarf_rsi_x86_64, + dwarf_rdi_x86_64, + dwarf_rbp_x86_64, + dwarf_rsp_x86_64, // Extended GP Registers - gcc_dwarf_r8_x86_64 = 8, - gcc_dwarf_r9_x86_64, - gcc_dwarf_r10_x86_64, - gcc_dwarf_r11_x86_64, - gcc_dwarf_r12_x86_64, - gcc_dwarf_r13_x86_64, - gcc_dwarf_r14_x86_64, - gcc_dwarf_r15_x86_64, + dwarf_r8_x86_64 = 8, + dwarf_r9_x86_64, + dwarf_r10_x86_64, + dwarf_r11_x86_64, + dwarf_r12_x86_64, + dwarf_r13_x86_64, + dwarf_r14_x86_64, + dwarf_r15_x86_64, // Return Address (RA) mapped to RIP - gcc_dwarf_rip_x86_64 = 16, + dwarf_rip_x86_64 = 16, // SSE Vector Registers - gcc_dwarf_xmm0_x86_64 = 17, - gcc_dwarf_xmm1_x86_64, - gcc_dwarf_xmm2_x86_64, - gcc_dwarf_xmm3_x86_64, - gcc_dwarf_xmm4_x86_64, - gcc_dwarf_xmm5_x86_64, - gcc_dwarf_xmm6_x86_64, - gcc_dwarf_xmm7_x86_64, - gcc_dwarf_xmm8_x86_64, - gcc_dwarf_xmm9_x86_64, - gcc_dwarf_xmm10_x86_64, - gcc_dwarf_xmm11_x86_64, - gcc_dwarf_xmm12_x86_64, - gcc_dwarf_xmm13_x86_64, - gcc_dwarf_xmm14_x86_64, - gcc_dwarf_xmm15_x86_64, + dwarf_xmm0_x86_64 = 17, + dwarf_xmm1_x86_64, + dwarf_xmm2_x86_64, + dwarf_xmm3_x86_64, + dwarf_xmm4_x86_64, + dwarf_xmm5_x86_64, + dwarf_xmm6_x86_64, + dwarf_xmm7_x86_64, + dwarf_xmm8_x86_64, + dwarf_xmm9_x86_64, + dwarf_xmm10_x86_64, + dwarf_xmm11_x86_64, + dwarf_xmm12_x86_64, + dwarf_xmm13_x86_64, + dwarf_xmm14_x86_64, + dwarf_xmm15_x86_64, // Floating Point Registers - gcc_dwarf_st0_x86_64 = 33, - gcc_dwarf_st1_x86_64, - gcc_dwarf_st2_x86_64, - gcc_dwarf_st3_x86_64, - gcc_dwarf_st4_x86_64, - gcc_dwarf_st5_x86_64, - gcc_dwarf_st6_x86_64, - gcc_dwarf_st7_x86_64, + dwarf_st0_x86_64 = 33, + dwarf_st1_x86_64, + dwarf_st2_x86_64, + dwarf_st3_x86_64, + dwarf_st4_x86_64, + dwarf_st5_x86_64, + dwarf_st6_x86_64, + dwarf_st7_x86_64, // MMX Registers - gcc_dwarf_mm0_x86_64 = 41, - gcc_dwarf_mm1_x86_64, - gcc_dwarf_mm2_x86_64, - gcc_dwarf_mm3_x86_64, - gcc_dwarf_mm4_x86_64, - gcc_dwarf_mm5_x86_64, - gcc_dwarf_mm6_x86_64, - gcc_dwarf_mm7_x86_64, + dwarf_mm0_x86_64 = 41, + dwarf_mm1_x86_64, + dwarf_mm2_x86_64, + dwarf_mm3_x86_64, + dwarf_mm4_x86_64, + dwarf_mm5_x86_64, + dwarf_mm6_x86_64, + dwarf_mm7_x86_64, // Control and Status Flags Register - gcc_dwarf_rflags_x86_64 = 49, + dwarf_rflags_x86_64 = 49, // selector registers - gcc_dwarf_es_x86_64 = 50, - gcc_dwarf_cs_x86_64, - gcc_dwarf_ss_x86_64, - gcc_dwarf_ds_x86_64, - gcc_dwarf_fs_x86_64, - gcc_dwarf_gs_x86_64, + dwarf_es_x86_64 = 50, + dwarf_cs_x86_64, + dwarf_ss_x86_64, + dwarf_ds_x86_64, + dwarf_fs_x86_64, + dwarf_gs_x86_64, // Floating point control registers - gcc_dwarf_mxcsr_x86_64 = 64, // Media Control and Status - gcc_dwarf_fctrl_x86_64, // x87 control word - gcc_dwarf_fstat_x86_64, // x87 status word + dwarf_mxcsr_x86_64 = 64, // Media Control and Status + dwarf_fctrl_x86_64, // x87 control word + dwarf_fstat_x86_64, // x87 status word // Upper Vector Registers - gcc_dwarf_ymm0h_x86_64 = 67, - gcc_dwarf_ymm1h_x86_64, - gcc_dwarf_ymm2h_x86_64, - gcc_dwarf_ymm3h_x86_64, - gcc_dwarf_ymm4h_x86_64, - gcc_dwarf_ymm5h_x86_64, - gcc_dwarf_ymm6h_x86_64, - gcc_dwarf_ymm7h_x86_64, - gcc_dwarf_ymm8h_x86_64, - gcc_dwarf_ymm9h_x86_64, - gcc_dwarf_ymm10h_x86_64, - gcc_dwarf_ymm11h_x86_64, - gcc_dwarf_ymm12h_x86_64, - gcc_dwarf_ymm13h_x86_64, - gcc_dwarf_ymm14h_x86_64, - gcc_dwarf_ymm15h_x86_64, + dwarf_ymm0h_x86_64 = 67, + dwarf_ymm1h_x86_64, + dwarf_ymm2h_x86_64, + dwarf_ymm3h_x86_64, + dwarf_ymm4h_x86_64, + dwarf_ymm5h_x86_64, + dwarf_ymm6h_x86_64, + dwarf_ymm7h_x86_64, + dwarf_ymm8h_x86_64, + dwarf_ymm9h_x86_64, + dwarf_ymm10h_x86_64, + dwarf_ymm11h_x86_64, + dwarf_ymm12h_x86_64, + dwarf_ymm13h_x86_64, + dwarf_ymm14h_x86_64, + dwarf_ymm15h_x86_64, // AVX2 Vector Mask Registers - // gcc_dwarf_k0_x86_64 = 118, - // gcc_dwarf_k1_x86_64, - // gcc_dwarf_k2_x86_64, - // gcc_dwarf_k3_x86_64, - // gcc_dwarf_k4_x86_64, - // gcc_dwarf_k5_x86_64, - // gcc_dwarf_k6_x86_64, - // gcc_dwarf_k7_x86_64, -}; - -// GDB Register numbers (eRegisterKindGDB) -enum -{ - // GP Registers - gdb_rax_x86_64 = 0, - gdb_rbx_x86_64, - gdb_rcx_x86_64, - gdb_rdx_x86_64, - gdb_rsi_x86_64, - gdb_rdi_x86_64, - gdb_rbp_x86_64, - gdb_rsp_x86_64, - // Extended GP Registers - gdb_r8_x86_64, - gdb_r9_x86_64, - gdb_r10_x86_64, - gdb_r11_x86_64, - gdb_r12_x86_64, - gdb_r13_x86_64, - gdb_r14_x86_64, - gdb_r15_x86_64, - // Return Address (RA) mapped to RIP - gdb_rip_x86_64, - // Control and Status Flags Register - gdb_rflags_x86_64, - gdb_cs_x86_64, - gdb_ss_x86_64, - gdb_ds_x86_64, - gdb_es_x86_64, - gdb_fs_x86_64, - gdb_gs_x86_64, - // Floating Point Registers - gdb_st0_x86_64, - gdb_st1_x86_64, - gdb_st2_x86_64, - gdb_st3_x86_64, - gdb_st4_x86_64, - gdb_st5_x86_64, - gdb_st6_x86_64, - gdb_st7_x86_64, - gdb_fctrl_x86_64, - gdb_fstat_x86_64, - gdb_ftag_x86_64, - gdb_fiseg_x86_64, - gdb_fioff_x86_64, - gdb_foseg_x86_64, - gdb_fooff_x86_64, - gdb_fop_x86_64, - // SSE Vector Registers - gdb_xmm0_x86_64 = 40, - gdb_xmm1_x86_64, - gdb_xmm2_x86_64, - gdb_xmm3_x86_64, - gdb_xmm4_x86_64, - gdb_xmm5_x86_64, - gdb_xmm6_x86_64, - gdb_xmm7_x86_64, - gdb_xmm8_x86_64, - gdb_xmm9_x86_64, - gdb_xmm10_x86_64, - gdb_xmm11_x86_64, - gdb_xmm12_x86_64, - gdb_xmm13_x86_64, - gdb_xmm14_x86_64, - gdb_xmm15_x86_64, - // Floating point control registers - gdb_mxcsr_x86_64 = 56, - gdb_ymm0h_x86_64, - gdb_ymm1h_x86_64, - gdb_ymm2h_x86_64, - gdb_ymm3h_x86_64, - gdb_ymm4h_x86_64, - gdb_ymm5h_x86_64, - gdb_ymm6h_x86_64, - gdb_ymm7h_x86_64, - gdb_ymm8h_x86_64, - gdb_ymm9h_x86_64, - gdb_ymm10h_x86_64, - gdb_ymm11h_x86_64, - gdb_ymm12h_x86_64, - gdb_ymm13h_x86_64, - gdb_ymm14h_x86_64, - gdb_ymm15h_x86_64 + // dwarf_k0_x86_64 = 118, + // dwarf_k1_x86_64, + // dwarf_k2_x86_64, + // dwarf_k3_x86_64, + // dwarf_k4_x86_64, + // dwarf_k5_x86_64, + // dwarf_k6_x86_64, + // dwarf_k7_x86_64, }; //--------------------------------------------------------------------------- @@ -404,7 +244,8 @@ struct FXSAVE { uint16_t fctrl; // FPU Control Word (fcw) uint16_t fstat; // FPU Status Word (fsw) - uint16_t ftag; // FPU Tag Word (ftw) + uint8_t ftag; // FPU Tag Word (ftw) + uint8_t reserved_1; // Reserved uint16_t fop; // Last Instruction Opcode (fop) union { diff --git a/source/Plugins/Process/Utility/RegisterInfoInterface.h b/source/Plugins/Process/Utility/RegisterInfoInterface.h index 94cb5cc..801885d 100644 --- a/source/Plugins/Process/Utility/RegisterInfoInterface.h +++ b/source/Plugins/Process/Utility/RegisterInfoInterface.h @@ -10,6 +10,8 @@ #ifndef lldb_RegisterInfoInterface_h #define lldb_RegisterInfoInterface_h +#include <vector> + #include "lldb/Core/ArchSpec.h" namespace lldb_private @@ -50,6 +52,26 @@ namespace lldb_private GetTargetArchitecture() const { return m_target_arch; } + virtual const lldb_private::RegisterInfo * + GetDynamicRegisterInfo(const char *reg_name) const + { + const std::vector <lldb_private::RegisterInfo> * d_register_infos = GetDynamicRegisterInfoP(); + if(d_register_infos != nullptr) + { + std::vector <lldb_private::RegisterInfo> ::const_iterator pos = d_register_infos->begin(); + for(; pos < d_register_infos->end() ; pos++) + { + if(::strcmp(reg_name, pos->name) == 0) + return(d_register_infos->data() + (pos - d_register_infos->begin()) ); + } + } + return nullptr; + } + + virtual const std::vector<lldb_private::RegisterInfo> * + GetDynamicRegisterInfoP() const + { return nullptr; } + public: // FIXME make private. lldb_private::ArchSpec m_target_arch; diff --git a/source/Plugins/Process/Utility/RegisterInfos_arm.h b/source/Plugins/Process/Utility/RegisterInfos_arm.h index 3d144d6..0345772 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_arm.h +++ b/source/Plugins/Process/Utility/RegisterInfos_arm.h @@ -1,21 +1,25 @@ -//===-- RegisterInfos_arm.h ----------------------------------*- C++ -*-===// +//===-- RegisterInfos_arm.h -------------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===---------------------------------------------------------------------===// +//===----------------------------------------------------------------------===// #ifdef DECLARE_REGISTER_INFOS_ARM_STRUCT +// C Includes #include <stddef.h> +// C++ Includes +// Other libraries and framework includes +// Project includes #include "lldb/lldb-private.h" #include "lldb/lldb-defines.h" #include "lldb/lldb-enumerations.h" -#include "Utility/ARM_GCC_Registers.h" +#include "Utility/ARM_ehframe_Registers.h" #include "Utility/ARM_DWARF_Registers.h" using namespace lldb; @@ -25,17 +29,16 @@ using namespace lldb_private; #error GPR_OFFSET must be defined before including this header file #endif - #ifndef FPU_OFFSET #error FPU_OFFSET must be defined before including this header file #endif -#ifndef EXC_OFFSET -#error EXC_OFFSET_NAME must be defined before including this header file +#ifndef FPSCR_OFFSET +#error FPSCR_OFFSET must be defined before including this header file #endif -#ifndef DBG_OFFSET -#error DBG_OFFSET_NAME must be defined before including this header file +#ifndef EXC_OFFSET +#error EXC_OFFSET_NAME must be defined before including this header file #endif #ifndef DEFINE_DBG @@ -96,6 +99,56 @@ enum fpu_s31, fpu_fpscr, + fpu_d0, + fpu_d1, + fpu_d2, + fpu_d3, + fpu_d4, + fpu_d5, + fpu_d6, + fpu_d7, + fpu_d8, + fpu_d9, + fpu_d10, + fpu_d11, + fpu_d12, + fpu_d13, + fpu_d14, + fpu_d15, + fpu_d16, + fpu_d17, + fpu_d18, + fpu_d19, + fpu_d20, + fpu_d21, + fpu_d22, + fpu_d23, + fpu_d24, + fpu_d25, + fpu_d26, + fpu_d27, + fpu_d28, + fpu_d29, + fpu_d30, + fpu_d31, + + fpu_q0, + fpu_q1, + fpu_q2, + fpu_q3, + fpu_q4, + fpu_q5, + fpu_q6, + fpu_q7, + fpu_q8, + fpu_q9, + fpu_q10, + fpu_q11, + fpu_q12, + fpu_q13, + fpu_q14, + fpu_q15, + exc_exception, exc_fsr, exc_far, @@ -171,65 +224,214 @@ enum k_num_registers }; +static uint32_t g_s0_invalidates[] = { fpu_d0, fpu_q0, LLDB_INVALID_REGNUM }; +static uint32_t g_s1_invalidates[] = { fpu_d0, fpu_q0, LLDB_INVALID_REGNUM }; +static uint32_t g_s2_invalidates[] = { fpu_d1, fpu_q0, LLDB_INVALID_REGNUM }; +static uint32_t g_s3_invalidates[] = { fpu_d1, fpu_q0, LLDB_INVALID_REGNUM }; +static uint32_t g_s4_invalidates[] = { fpu_d2, fpu_q1, LLDB_INVALID_REGNUM }; +static uint32_t g_s5_invalidates[] = { fpu_d2, fpu_q1, LLDB_INVALID_REGNUM }; +static uint32_t g_s6_invalidates[] = { fpu_d3, fpu_q1, LLDB_INVALID_REGNUM }; +static uint32_t g_s7_invalidates[] = { fpu_d3, fpu_q1, LLDB_INVALID_REGNUM }; +static uint32_t g_s8_invalidates[] = { fpu_d4, fpu_q2, LLDB_INVALID_REGNUM }; +static uint32_t g_s9_invalidates[] = { fpu_d4, fpu_q2, LLDB_INVALID_REGNUM }; +static uint32_t g_s10_invalidates[] = { fpu_d5, fpu_q2, LLDB_INVALID_REGNUM }; +static uint32_t g_s11_invalidates[] = { fpu_d5, fpu_q2, LLDB_INVALID_REGNUM }; +static uint32_t g_s12_invalidates[] = { fpu_d6, fpu_q3, LLDB_INVALID_REGNUM }; +static uint32_t g_s13_invalidates[] = { fpu_d6, fpu_q3, LLDB_INVALID_REGNUM }; +static uint32_t g_s14_invalidates[] = { fpu_d7, fpu_q3, LLDB_INVALID_REGNUM }; +static uint32_t g_s15_invalidates[] = { fpu_d7, fpu_q3, LLDB_INVALID_REGNUM }; +static uint32_t g_s16_invalidates[] = { fpu_d8, fpu_q4, LLDB_INVALID_REGNUM }; +static uint32_t g_s17_invalidates[] = { fpu_d8, fpu_q4, LLDB_INVALID_REGNUM }; +static uint32_t g_s18_invalidates[] = { fpu_d9, fpu_q4, LLDB_INVALID_REGNUM }; +static uint32_t g_s19_invalidates[] = { fpu_d9, fpu_q4, LLDB_INVALID_REGNUM }; +static uint32_t g_s20_invalidates[] = { fpu_d10, fpu_q5, LLDB_INVALID_REGNUM }; +static uint32_t g_s21_invalidates[] = { fpu_d10, fpu_q5, LLDB_INVALID_REGNUM }; +static uint32_t g_s22_invalidates[] = { fpu_d11, fpu_q5, LLDB_INVALID_REGNUM }; +static uint32_t g_s23_invalidates[] = { fpu_d11, fpu_q5, LLDB_INVALID_REGNUM }; +static uint32_t g_s24_invalidates[] = { fpu_d12, fpu_q6, LLDB_INVALID_REGNUM }; +static uint32_t g_s25_invalidates[] = { fpu_d12, fpu_q6, LLDB_INVALID_REGNUM }; +static uint32_t g_s26_invalidates[] = { fpu_d13, fpu_q6, LLDB_INVALID_REGNUM }; +static uint32_t g_s27_invalidates[] = { fpu_d13, fpu_q6, LLDB_INVALID_REGNUM }; +static uint32_t g_s28_invalidates[] = { fpu_d14, fpu_q7, LLDB_INVALID_REGNUM }; +static uint32_t g_s29_invalidates[] = { fpu_d14, fpu_q7, LLDB_INVALID_REGNUM }; +static uint32_t g_s30_invalidates[] = { fpu_d15, fpu_q7, LLDB_INVALID_REGNUM }; +static uint32_t g_s31_invalidates[] = { fpu_d15, fpu_q7, LLDB_INVALID_REGNUM }; + +static uint32_t g_d0_contains[] = { fpu_s0, fpu_s1, LLDB_INVALID_REGNUM }; +static uint32_t g_d1_contains[] = { fpu_s2, fpu_s3, LLDB_INVALID_REGNUM }; +static uint32_t g_d2_contains[] = { fpu_s4, fpu_s5, LLDB_INVALID_REGNUM }; +static uint32_t g_d3_contains[] = { fpu_s6, fpu_s7, LLDB_INVALID_REGNUM }; +static uint32_t g_d4_contains[] = { fpu_s8, fpu_s9, LLDB_INVALID_REGNUM }; +static uint32_t g_d5_contains[] = { fpu_s10, fpu_s11, LLDB_INVALID_REGNUM }; +static uint32_t g_d6_contains[] = { fpu_s12, fpu_s13, LLDB_INVALID_REGNUM }; +static uint32_t g_d7_contains[] = { fpu_s14, fpu_s15, LLDB_INVALID_REGNUM }; +static uint32_t g_d8_contains[] = { fpu_s16, fpu_s17, LLDB_INVALID_REGNUM }; +static uint32_t g_d9_contains[] = { fpu_s18, fpu_s19, LLDB_INVALID_REGNUM }; +static uint32_t g_d10_contains[] = { fpu_s20, fpu_s21, LLDB_INVALID_REGNUM }; +static uint32_t g_d11_contains[] = { fpu_s22, fpu_s23, LLDB_INVALID_REGNUM }; +static uint32_t g_d12_contains[] = { fpu_s24, fpu_s25, LLDB_INVALID_REGNUM }; +static uint32_t g_d13_contains[] = { fpu_s26, fpu_s27, LLDB_INVALID_REGNUM }; +static uint32_t g_d14_contains[] = { fpu_s28, fpu_s29, LLDB_INVALID_REGNUM }; +static uint32_t g_d15_contains[] = { fpu_s30, fpu_s31, LLDB_INVALID_REGNUM }; + +static uint32_t g_d0_invalidates[] = { fpu_q0, LLDB_INVALID_REGNUM }; +static uint32_t g_d1_invalidates[] = { fpu_q0, LLDB_INVALID_REGNUM }; +static uint32_t g_d2_invalidates[] = { fpu_q1, LLDB_INVALID_REGNUM }; +static uint32_t g_d3_invalidates[] = { fpu_q1, LLDB_INVALID_REGNUM }; +static uint32_t g_d4_invalidates[] = { fpu_q2, LLDB_INVALID_REGNUM }; +static uint32_t g_d5_invalidates[] = { fpu_q2, LLDB_INVALID_REGNUM }; +static uint32_t g_d6_invalidates[] = { fpu_q3, LLDB_INVALID_REGNUM }; +static uint32_t g_d7_invalidates[] = { fpu_q3, LLDB_INVALID_REGNUM }; +static uint32_t g_d8_invalidates[] = { fpu_q4, LLDB_INVALID_REGNUM }; +static uint32_t g_d9_invalidates[] = { fpu_q4, LLDB_INVALID_REGNUM }; +static uint32_t g_d10_invalidates[] = { fpu_q5, LLDB_INVALID_REGNUM }; +static uint32_t g_d11_invalidates[] = { fpu_q5, LLDB_INVALID_REGNUM }; +static uint32_t g_d12_invalidates[] = { fpu_q6, LLDB_INVALID_REGNUM }; +static uint32_t g_d13_invalidates[] = { fpu_q6, LLDB_INVALID_REGNUM }; +static uint32_t g_d14_invalidates[] = { fpu_q7, LLDB_INVALID_REGNUM }; +static uint32_t g_d15_invalidates[] = { fpu_q7, LLDB_INVALID_REGNUM }; +static uint32_t g_d16_invalidates[] = { fpu_q8, LLDB_INVALID_REGNUM }; +static uint32_t g_d17_invalidates[] = { fpu_q8, LLDB_INVALID_REGNUM }; +static uint32_t g_d18_invalidates[] = { fpu_q9, LLDB_INVALID_REGNUM }; +static uint32_t g_d19_invalidates[] = { fpu_q9, LLDB_INVALID_REGNUM }; +static uint32_t g_d20_invalidates[] = { fpu_q10, LLDB_INVALID_REGNUM }; +static uint32_t g_d21_invalidates[] = { fpu_q10, LLDB_INVALID_REGNUM }; +static uint32_t g_d22_invalidates[] = { fpu_q11, LLDB_INVALID_REGNUM }; +static uint32_t g_d23_invalidates[] = { fpu_q11, LLDB_INVALID_REGNUM }; +static uint32_t g_d24_invalidates[] = { fpu_q12, LLDB_INVALID_REGNUM }; +static uint32_t g_d25_invalidates[] = { fpu_q12, LLDB_INVALID_REGNUM }; +static uint32_t g_d26_invalidates[] = { fpu_q13, LLDB_INVALID_REGNUM }; +static uint32_t g_d27_invalidates[] = { fpu_q13, LLDB_INVALID_REGNUM }; +static uint32_t g_d28_invalidates[] = { fpu_q14, LLDB_INVALID_REGNUM }; +static uint32_t g_d29_invalidates[] = { fpu_q14, LLDB_INVALID_REGNUM }; +static uint32_t g_d30_invalidates[] = { fpu_q15, LLDB_INVALID_REGNUM }; +static uint32_t g_d31_invalidates[] = { fpu_q15, LLDB_INVALID_REGNUM }; + +static uint32_t g_q0_contains[] = { fpu_d0, fpu_d1, fpu_s0, fpu_s1, fpu_s2, fpu_s3, LLDB_INVALID_REGNUM }; +static uint32_t g_q1_contains[] = { fpu_d2, fpu_d3, fpu_s4, fpu_s5, fpu_s6, fpu_s7, LLDB_INVALID_REGNUM }; +static uint32_t g_q2_contains[] = { fpu_d4, fpu_d5, fpu_s8, fpu_s9, fpu_s10, fpu_s11, LLDB_INVALID_REGNUM }; +static uint32_t g_q3_contains[] = { fpu_d6, fpu_d7, fpu_s12, fpu_s13, fpu_s14, fpu_s15, LLDB_INVALID_REGNUM }; +static uint32_t g_q4_contains[] = { fpu_d8, fpu_d9, fpu_s16, fpu_s17, fpu_s18, fpu_s19, LLDB_INVALID_REGNUM }; +static uint32_t g_q5_contains[] = { fpu_d10, fpu_d11, fpu_s20, fpu_s21, fpu_s22, fpu_s23, LLDB_INVALID_REGNUM }; +static uint32_t g_q6_contains[] = { fpu_d12, fpu_d13, fpu_s24, fpu_s25, fpu_s26, fpu_s27, LLDB_INVALID_REGNUM }; +static uint32_t g_q7_contains[] = { fpu_d14, fpu_d15, fpu_s28, fpu_s29, fpu_s30, fpu_s31, LLDB_INVALID_REGNUM }; +static uint32_t g_q8_contains[] = { fpu_d16, fpu_d17, LLDB_INVALID_REGNUM }; +static uint32_t g_q9_contains[] = { fpu_d18, fpu_d19, LLDB_INVALID_REGNUM }; +static uint32_t g_q10_contains[] = { fpu_d20, fpu_d21, LLDB_INVALID_REGNUM }; +static uint32_t g_q11_contains[] = { fpu_d22, fpu_d23, LLDB_INVALID_REGNUM }; +static uint32_t g_q12_contains[] = { fpu_d24, fpu_d25, LLDB_INVALID_REGNUM }; +static uint32_t g_q13_contains[] = { fpu_d26, fpu_d27, LLDB_INVALID_REGNUM }; +static uint32_t g_q14_contains[] = { fpu_d28, fpu_d29, LLDB_INVALID_REGNUM }; +static uint32_t g_q15_contains[] = { fpu_d30, fpu_d31, LLDB_INVALID_REGNUM }; + static RegisterInfo g_register_infos_arm[] = { -// General purpose registers -// NAME ALT SZ OFFSET ENCODING FORMAT COMPILER DWARF GENERIC GDB LLDB NATIVE VALUE REGS INVALIDATE REGS -// ====== ======= == ============= ============= ============ =============== =============== ========================= ===================== ============= ========== =============== -{ "r0", NULL, 4, GPR_OFFSET(0), eEncodingUint, eFormatHex, { gcc_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1, gdb_arm_r0, gpr_r0 }, NULL, NULL}, -{ "r1", NULL, 4, GPR_OFFSET(1), eEncodingUint, eFormatHex, { gcc_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2, gdb_arm_r1, gpr_r1 }, NULL, NULL}, -{ "r2", NULL, 4, GPR_OFFSET(2), eEncodingUint, eFormatHex, { gcc_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3, gdb_arm_r2, gpr_r2 }, NULL, NULL}, -{ "r3", NULL, 4, GPR_OFFSET(3), eEncodingUint, eFormatHex, { gcc_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4, gdb_arm_r3, gpr_r3 }, NULL, NULL}, -{ "r4", NULL, 4, GPR_OFFSET(4), eEncodingUint, eFormatHex, { gcc_r4, dwarf_r4, LLDB_INVALID_REGNUM, gdb_arm_r4, gpr_r4 }, NULL, NULL}, -{ "r5", NULL, 4, GPR_OFFSET(5), eEncodingUint, eFormatHex, { gcc_r5, dwarf_r5, LLDB_INVALID_REGNUM, gdb_arm_r5, gpr_r5 }, NULL, NULL}, -{ "r6", NULL, 4, GPR_OFFSET(6), eEncodingUint, eFormatHex, { gcc_r6, dwarf_r6, LLDB_INVALID_REGNUM, gdb_arm_r6, gpr_r6 }, NULL, NULL}, -{ "r7", NULL, 4, GPR_OFFSET(7), eEncodingUint, eFormatHex, { gcc_r7, dwarf_r7, LLDB_INVALID_REGNUM, gdb_arm_r7, gpr_r7 }, NULL, NULL}, -{ "r8", NULL, 4, GPR_OFFSET(8), eEncodingUint, eFormatHex, { gcc_r8, dwarf_r8, LLDB_INVALID_REGNUM, gdb_arm_r8, gpr_r8 }, NULL, NULL}, -{ "r9", NULL, 4, GPR_OFFSET(9), eEncodingUint, eFormatHex, { gcc_r9, dwarf_r9, LLDB_INVALID_REGNUM, gdb_arm_r9, gpr_r9 }, NULL, NULL}, -{ "r10", NULL, 4, GPR_OFFSET(10), eEncodingUint, eFormatHex, { gcc_r10, dwarf_r10, LLDB_INVALID_REGNUM, gdb_arm_r10, gpr_r10 }, NULL, NULL}, -{ "r11", NULL, 4, GPR_OFFSET(11), eEncodingUint, eFormatHex, { gcc_r11, dwarf_r11, LLDB_REGNUM_GENERIC_FP, gdb_arm_r11, gpr_r11 }, NULL, NULL}, -{ "r12", NULL, 4, GPR_OFFSET(12), eEncodingUint, eFormatHex, { gcc_r12, dwarf_r12, LLDB_INVALID_REGNUM, gdb_arm_r12, gpr_r12 }, NULL, NULL}, -{ "sp", "r13", 4, GPR_OFFSET(13), eEncodingUint, eFormatHex, { gcc_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, gdb_arm_sp, gpr_sp }, NULL, NULL}, -{ "lr", "r14", 4, GPR_OFFSET(14), eEncodingUint, eFormatHex, { gcc_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, gdb_arm_lr, gpr_lr }, NULL, NULL}, -{ "pc", "r15", 4, GPR_OFFSET(15), eEncodingUint, eFormatHex, { gcc_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, gdb_arm_pc, gpr_pc }, NULL, NULL}, -{ "cpsr", "psr", 4, GPR_OFFSET(16), eEncodingUint, eFormatHex, { gcc_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, gdb_arm_cpsr, gpr_cpsr }, NULL, NULL}, - -{ "s0", NULL, 4, FPU_OFFSET(0), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, gdb_arm_s0, fpu_s0 }, NULL, NULL}, -{ "s1", NULL, 4, FPU_OFFSET(1), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, gdb_arm_s1, fpu_s1 }, NULL, NULL}, -{ "s2", NULL, 4, FPU_OFFSET(2), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, gdb_arm_s2, fpu_s2 }, NULL, NULL}, -{ "s3", NULL, 4, FPU_OFFSET(3), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, gdb_arm_s3, fpu_s3 }, NULL, NULL}, -{ "s4", NULL, 4, FPU_OFFSET(4), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, gdb_arm_s4, fpu_s4 }, NULL, NULL}, -{ "s5", NULL, 4, FPU_OFFSET(5), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, gdb_arm_s5, fpu_s5 }, NULL, NULL}, -{ "s6", NULL, 4, FPU_OFFSET(6), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, gdb_arm_s6, fpu_s6 }, NULL, NULL}, -{ "s7", NULL, 4, FPU_OFFSET(7), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, gdb_arm_s7, fpu_s7 }, NULL, NULL}, -{ "s8", NULL, 4, FPU_OFFSET(8), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, gdb_arm_s8, fpu_s8 }, NULL, NULL}, -{ "s9", NULL, 4, FPU_OFFSET(9), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, gdb_arm_s9, fpu_s9 }, NULL, NULL}, -{ "s10", NULL, 4, FPU_OFFSET(10), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, gdb_arm_s10, fpu_s10 }, NULL, NULL}, -{ "s11", NULL, 4, FPU_OFFSET(11), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, gdb_arm_s11, fpu_s11 }, NULL, NULL}, -{ "s12", NULL, 4, FPU_OFFSET(12), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, gdb_arm_s12, fpu_s12 }, NULL, NULL}, -{ "s13", NULL, 4, FPU_OFFSET(13), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, gdb_arm_s13, fpu_s13 }, NULL, NULL}, -{ "s14", NULL, 4, FPU_OFFSET(14), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, gdb_arm_s14, fpu_s14 }, NULL, NULL}, -{ "s15", NULL, 4, FPU_OFFSET(15), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, gdb_arm_s15, fpu_s15 }, NULL, NULL}, -{ "s16", NULL, 4, FPU_OFFSET(16), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, gdb_arm_s16, fpu_s16 }, NULL, NULL}, -{ "s17", NULL, 4, FPU_OFFSET(17), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, gdb_arm_s17, fpu_s17 }, NULL, NULL}, -{ "s18", NULL, 4, FPU_OFFSET(18), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, gdb_arm_s18, fpu_s18 }, NULL, NULL}, -{ "s19", NULL, 4, FPU_OFFSET(19), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, gdb_arm_s19, fpu_s19 }, NULL, NULL}, -{ "s20", NULL, 4, FPU_OFFSET(20), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, gdb_arm_s20, fpu_s20 }, NULL, NULL}, -{ "s21", NULL, 4, FPU_OFFSET(21), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, gdb_arm_s21, fpu_s21 }, NULL, NULL}, -{ "s22", NULL, 4, FPU_OFFSET(22), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, gdb_arm_s22, fpu_s22 }, NULL, NULL}, -{ "s23", NULL, 4, FPU_OFFSET(23), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, gdb_arm_s23, fpu_s23 }, NULL, NULL}, -{ "s24", NULL, 4, FPU_OFFSET(24), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, gdb_arm_s24, fpu_s24 }, NULL, NULL}, -{ "s25", NULL, 4, FPU_OFFSET(25), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, gdb_arm_s25, fpu_s25 }, NULL, NULL}, -{ "s26", NULL, 4, FPU_OFFSET(26), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, gdb_arm_s26, fpu_s26 }, NULL, NULL}, -{ "s27", NULL, 4, FPU_OFFSET(27), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, gdb_arm_s27, fpu_s27 }, NULL, NULL}, -{ "s28", NULL, 4, FPU_OFFSET(28), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, gdb_arm_s28, fpu_s28 }, NULL, NULL}, -{ "s29", NULL, 4, FPU_OFFSET(29), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, gdb_arm_s29, fpu_s29 }, NULL, NULL}, -{ "s30", NULL, 4, FPU_OFFSET(30), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, gdb_arm_s30, fpu_s30 }, NULL, NULL}, -{ "s31", NULL, 4, FPU_OFFSET(31), eEncodingIEEE754,eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, gdb_arm_s31, fpu_s31 }, NULL, NULL}, -{ "fpscr", NULL, 4, FPU_OFFSET(32), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, gdb_arm_fpscr, fpu_fpscr }, NULL, NULL}, - -{ "exception",NULL, 4, EXC_OFFSET(0), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception }, NULL, NULL}, -{ "fsr", NULL, 4, EXC_OFFSET(1), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_fsr }, NULL, NULL}, -{ "far", NULL, 4, EXC_OFFSET(2), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_far }, NULL, NULL}, +// NAME ALT SZ OFFSET ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB NATIVE VALUE REGS INVALIDATE REGS +// =========== ======= == ============== ================ ==================== =================== =================== ========================== =================== ============= ============== ================= +{ "r0", nullptr, 4, GPR_OFFSET(0), eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM, gpr_r0 }, nullptr, nullptr }, +{ "r1", nullptr, 4, GPR_OFFSET(1), eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM, gpr_r1 }, nullptr, nullptr }, +{ "r2", nullptr, 4, GPR_OFFSET(2), eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM, gpr_r2 }, nullptr, nullptr }, +{ "r3", nullptr, 4, GPR_OFFSET(3), eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM, gpr_r3 }, nullptr, nullptr }, +{ "r4", nullptr, 4, GPR_OFFSET(4), eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4 }, nullptr, nullptr }, +{ "r5", nullptr, 4, GPR_OFFSET(5), eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5 }, nullptr, nullptr }, +{ "r6", nullptr, 4, GPR_OFFSET(6), eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6 }, nullptr, nullptr }, +{ "r7", nullptr, 4, GPR_OFFSET(7), eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r7 }, nullptr, nullptr }, +{ "r8", nullptr, 4, GPR_OFFSET(8), eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8 }, nullptr, nullptr }, +{ "r9", nullptr, 4, GPR_OFFSET(9), eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9 }, nullptr, nullptr }, +{ "r10", nullptr, 4, GPR_OFFSET(10), eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r10 }, nullptr, nullptr }, +{ "r11", nullptr, 4, GPR_OFFSET(11), eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM, gpr_r11 }, nullptr, nullptr }, +{ "r12", nullptr, 4, GPR_OFFSET(12), eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r12 }, nullptr, nullptr }, +{ "sp", "r13", 4, GPR_OFFSET(13), eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM, gpr_sp }, nullptr, nullptr }, +{ "lr", "r14", 4, GPR_OFFSET(14), eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM, gpr_lr }, nullptr, nullptr }, +{ "pc", "r15", 4, GPR_OFFSET(15), eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM, gpr_pc }, nullptr, nullptr }, +{ "cpsr", "psr", 4, GPR_OFFSET(16), eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_cpsr }, nullptr, nullptr }, + +{ "s0", nullptr, 4, FPU_OFFSET(0), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s0 }, nullptr, g_s0_invalidates }, +{ "s1", nullptr, 4, FPU_OFFSET(1), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s1 }, nullptr, g_s1_invalidates }, +{ "s2", nullptr, 4, FPU_OFFSET(2), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s2 }, nullptr, g_s2_invalidates }, +{ "s3", nullptr, 4, FPU_OFFSET(3), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s3 }, nullptr, g_s3_invalidates }, +{ "s4", nullptr, 4, FPU_OFFSET(4), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s4 }, nullptr, g_s4_invalidates }, +{ "s5", nullptr, 4, FPU_OFFSET(5), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s5 }, nullptr, g_s5_invalidates }, +{ "s6", nullptr, 4, FPU_OFFSET(6), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s6 }, nullptr, g_s6_invalidates }, +{ "s7", nullptr, 4, FPU_OFFSET(7), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s7 }, nullptr, g_s7_invalidates }, +{ "s8", nullptr, 4, FPU_OFFSET(8), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s8 }, nullptr, g_s8_invalidates }, +{ "s9", nullptr, 4, FPU_OFFSET(9), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s9 }, nullptr, g_s9_invalidates }, +{ "s10", nullptr, 4, FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s10 }, nullptr, g_s10_invalidates }, +{ "s11", nullptr, 4, FPU_OFFSET(11), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s11 }, nullptr, g_s11_invalidates }, +{ "s12", nullptr, 4, FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s12 }, nullptr, g_s12_invalidates }, +{ "s13", nullptr, 4, FPU_OFFSET(13), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s13 }, nullptr, g_s13_invalidates }, +{ "s14", nullptr, 4, FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s14 }, nullptr, g_s14_invalidates }, +{ "s15", nullptr, 4, FPU_OFFSET(15), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s15 }, nullptr, g_s15_invalidates }, +{ "s16", nullptr, 4, FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s16 }, nullptr, g_s16_invalidates }, +{ "s17", nullptr, 4, FPU_OFFSET(17), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s17 }, nullptr, g_s17_invalidates }, +{ "s18", nullptr, 4, FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s18 }, nullptr, g_s18_invalidates }, +{ "s19", nullptr, 4, FPU_OFFSET(19), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s19 }, nullptr, g_s19_invalidates }, +{ "s20", nullptr, 4, FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s20 }, nullptr, g_s20_invalidates }, +{ "s21", nullptr, 4, FPU_OFFSET(21), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s21 }, nullptr, g_s21_invalidates }, +{ "s22", nullptr, 4, FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s22 }, nullptr, g_s22_invalidates }, +{ "s23", nullptr, 4, FPU_OFFSET(23), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s23 }, nullptr, g_s23_invalidates }, +{ "s24", nullptr, 4, FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s24 }, nullptr, g_s24_invalidates }, +{ "s25", nullptr, 4, FPU_OFFSET(25), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s25 }, nullptr, g_s25_invalidates }, +{ "s26", nullptr, 4, FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s26 }, nullptr, g_s26_invalidates }, +{ "s27", nullptr, 4, FPU_OFFSET(27), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s27 }, nullptr, g_s27_invalidates }, +{ "s28", nullptr, 4, FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s28 }, nullptr, g_s28_invalidates }, +{ "s29", nullptr, 4, FPU_OFFSET(29), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s29 }, nullptr, g_s29_invalidates }, +{ "s30", nullptr, 4, FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s30 }, nullptr, g_s30_invalidates }, +{ "s31", nullptr, 4, FPU_OFFSET(31), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_s31 }, nullptr, g_s31_invalidates }, +{ "fpscr", nullptr, 4, FPSCR_OFFSET, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpscr }, nullptr, nullptr }, + +{ "d0", nullptr, 8, FPU_OFFSET(0), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d0 }, g_d0_contains, g_d0_invalidates }, +{ "d1", nullptr, 8, FPU_OFFSET(2), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d1 }, g_d1_contains, g_d1_invalidates }, +{ "d2", nullptr, 8, FPU_OFFSET(4), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d2 }, g_d2_contains, g_d2_invalidates }, +{ "d3", nullptr, 8, FPU_OFFSET(6), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d3 }, g_d3_contains, g_d3_invalidates }, +{ "d4", nullptr, 8, FPU_OFFSET(8), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d4 }, g_d4_contains, g_d4_invalidates }, +{ "d5", nullptr, 8, FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d5 }, g_d5_contains, g_d5_invalidates }, +{ "d6", nullptr, 8, FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d6 }, g_d6_contains, g_d6_invalidates }, +{ "d7", nullptr, 8, FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d7 }, g_d7_contains, g_d7_invalidates }, +{ "d8", nullptr, 8, FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d8 }, g_d8_contains, g_d8_invalidates }, +{ "d9", nullptr, 8, FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d9 }, g_d9_contains, g_d9_invalidates }, +{ "d10", nullptr, 8, FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d10 }, g_d10_contains, g_d10_invalidates }, +{ "d11", nullptr, 8, FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d11 }, g_d11_contains, g_d11_invalidates }, +{ "d12", nullptr, 8, FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d12 }, g_d12_contains, g_d12_invalidates }, +{ "d13", nullptr, 8, FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d13 }, g_d13_contains, g_d13_invalidates }, +{ "d14", nullptr, 8, FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d14 }, g_d14_contains, g_d14_invalidates }, +{ "d15", nullptr, 8, FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d15 }, g_d15_contains, g_d15_invalidates }, +{ "d16", nullptr, 8, FPU_OFFSET(32), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d16 }, nullptr, g_d16_invalidates }, +{ "d17", nullptr, 8, FPU_OFFSET(34), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d17 }, nullptr, g_d17_invalidates }, +{ "d18", nullptr, 8, FPU_OFFSET(36), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d18 }, nullptr, g_d18_invalidates }, +{ "d19", nullptr, 8, FPU_OFFSET(38), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d19 }, nullptr, g_d19_invalidates }, +{ "d20", nullptr, 8, FPU_OFFSET(40), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d20 }, nullptr, g_d20_invalidates }, +{ "d21", nullptr, 8, FPU_OFFSET(42), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d21 }, nullptr, g_d21_invalidates }, +{ "d22", nullptr, 8, FPU_OFFSET(44), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d22 }, nullptr, g_d22_invalidates }, +{ "d23", nullptr, 8, FPU_OFFSET(46), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d23 }, nullptr, g_d23_invalidates }, +{ "d24", nullptr, 8, FPU_OFFSET(48), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d24 }, nullptr, g_d24_invalidates }, +{ "d25", nullptr, 8, FPU_OFFSET(50), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d25 }, nullptr, g_d25_invalidates }, +{ "d26", nullptr, 8, FPU_OFFSET(52), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d26 }, nullptr, g_d26_invalidates }, +{ "d27", nullptr, 8, FPU_OFFSET(54), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d27 }, nullptr, g_d27_invalidates }, +{ "d28", nullptr, 8, FPU_OFFSET(56), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d28 }, nullptr, g_d28_invalidates }, +{ "d29", nullptr, 8, FPU_OFFSET(58), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d29 }, nullptr, g_d29_invalidates }, +{ "d30", nullptr, 8, FPU_OFFSET(60), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d30 }, nullptr, g_d30_invalidates }, +{ "d31", nullptr, 8, FPU_OFFSET(62), eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_d31 }, nullptr, g_d31_invalidates }, + +{ "q0", nullptr, 16, FPU_OFFSET(0), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q0 }, g_q0_contains, nullptr, }, +{ "q1", nullptr, 16, FPU_OFFSET(4), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q1 }, g_q1_contains, nullptr, }, +{ "q2", nullptr, 16, FPU_OFFSET(8), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q2 }, g_q2_contains, nullptr, }, +{ "q3", nullptr, 16, FPU_OFFSET(12), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q3 }, g_q3_contains, nullptr, }, +{ "q4", nullptr, 16, FPU_OFFSET(16), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q4 }, g_q4_contains, nullptr, }, +{ "q5", nullptr, 16, FPU_OFFSET(20), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q5 }, g_q5_contains, nullptr, }, +{ "q6", nullptr, 16, FPU_OFFSET(24), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q6 }, g_q6_contains, nullptr, }, +{ "q7", nullptr, 16, FPU_OFFSET(28), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q7 }, g_q7_contains, nullptr, }, +{ "q8", nullptr, 16, FPU_OFFSET(32), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q8 }, g_q8_contains, nullptr, }, +{ "q9", nullptr, 16, FPU_OFFSET(36), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q9 }, g_q9_contains, nullptr, }, +{ "q10", nullptr, 16, FPU_OFFSET(40), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q10 }, g_q10_contains, nullptr, }, +{ "q11", nullptr, 16, FPU_OFFSET(44), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q11 }, g_q11_contains, nullptr, }, +{ "q12", nullptr, 16, FPU_OFFSET(48), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q12 }, g_q12_contains, nullptr, }, +{ "q13", nullptr, 16, FPU_OFFSET(52), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q13 }, g_q13_contains, nullptr, }, +{ "q14", nullptr, 16, FPU_OFFSET(56), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q14 }, g_q14_contains, nullptr, }, +{ "q15", nullptr, 16, FPU_OFFSET(60), eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_q15 }, g_q15_contains, nullptr, }, + +{ "exception", nullptr, 4, EXC_OFFSET(0), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception }, nullptr, nullptr }, +{ "fsr", nullptr, 4, EXC_OFFSET(1), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_fsr }, nullptr, nullptr }, +{ "far", nullptr, 4, EXC_OFFSET(2), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_far }, nullptr, nullptr }, { DEFINE_DBG (bvr, 0) }, { DEFINE_DBG (bvr, 1) }, diff --git a/source/Plugins/Process/Utility/RegisterInfos_arm64.h b/source/Plugins/Process/Utility/RegisterInfos_arm64.h index 0255a3b..7153211 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_arm64.h +++ b/source/Plugins/Process/Utility/RegisterInfos_arm64.h @@ -1,22 +1,26 @@ -//===-- RegisterInfos_arm64.h ----------------------------------*- C++ -*-===// +//===-- RegisterInfos_arm64.h -----------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===---------------------------------------------------------------------===// +//===----------------------------------------------------------------------===// #ifdef DECLARE_REGISTER_INFOS_ARM64_STRUCT +// C Includes #include <stddef.h> +// C++ Includes +// Other libraries and framework includes +// Project includes #include "lldb/lldb-private.h" #include "lldb/lldb-defines.h" #include "lldb/lldb-enumerations.h" -#include "Utility/ARM64_GCC_Registers.h" #include "Utility/ARM64_DWARF_Registers.h" +#include "Utility/ARM64_ehframe_Registers.h" #ifndef GPR_OFFSET #error GPR_OFFSET must be defined before including this header file @@ -196,84 +200,84 @@ enum static lldb_private::RegisterInfo g_register_infos_arm64[] = { // General purpose registers -// NAME ALT SZ OFFSET ENCODING FORMAT COMPILER DWARF GENERIC GDB LLDB NATIVE VALUE REGS INVALIDATE REGS -// ====== ======= == ============= ============= ============ =============== =============== ========================= ===================== ============= ========== =============== -{ "x0", NULL, 8, GPR_OFFSET(0), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x0, arm64_dwarf::x0, LLDB_REGNUM_GENERIC_ARG1, arm64_gcc::x0, gpr_x0 }, NULL, NULL}, -{ "x1", NULL, 8, GPR_OFFSET(1), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x1, arm64_dwarf::x1, LLDB_REGNUM_GENERIC_ARG2, arm64_gcc::x1, gpr_x1 }, NULL, NULL}, -{ "x2", NULL, 8, GPR_OFFSET(2), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x2, arm64_dwarf::x2, LLDB_REGNUM_GENERIC_ARG3, arm64_gcc::x2, gpr_x2 }, NULL, NULL}, -{ "x3", NULL, 8, GPR_OFFSET(3), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x3, arm64_dwarf::x3, LLDB_REGNUM_GENERIC_ARG4, arm64_gcc::x3, gpr_x3 }, NULL, NULL}, -{ "x4", NULL, 8, GPR_OFFSET(4), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x4, arm64_dwarf::x4, LLDB_REGNUM_GENERIC_ARG5, arm64_gcc::x4, gpr_x4 }, NULL, NULL}, -{ "x5", NULL, 8, GPR_OFFSET(5), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x5, arm64_dwarf::x5, LLDB_REGNUM_GENERIC_ARG6, arm64_gcc::x5, gpr_x5 }, NULL, NULL}, -{ "x6", NULL, 8, GPR_OFFSET(6), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x6, arm64_dwarf::x6, LLDB_REGNUM_GENERIC_ARG7, arm64_gcc::x6, gpr_x6 }, NULL, NULL}, -{ "x7", NULL, 8, GPR_OFFSET(7), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x7, arm64_dwarf::x7, LLDB_REGNUM_GENERIC_ARG8, arm64_gcc::x7, gpr_x7 }, NULL, NULL}, -{ "x8", NULL, 8, GPR_OFFSET(8), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x8, arm64_dwarf::x8, LLDB_INVALID_REGNUM, arm64_gcc::x8, gpr_x8 }, NULL, NULL}, -{ "x9", NULL, 8, GPR_OFFSET(9), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x9, arm64_dwarf::x9, LLDB_INVALID_REGNUM, arm64_gcc::x9, gpr_x9 }, NULL, NULL}, -{ "x10", NULL, 8, GPR_OFFSET(10), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x10, arm64_dwarf::x10, LLDB_INVALID_REGNUM, arm64_gcc::x10, gpr_x10 }, NULL, NULL}, -{ "x11", NULL, 8, GPR_OFFSET(11), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x11, arm64_dwarf::x11, LLDB_INVALID_REGNUM, arm64_gcc::x11, gpr_x11 }, NULL, NULL}, -{ "x12", NULL, 8, GPR_OFFSET(12), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x12, arm64_dwarf::x12, LLDB_INVALID_REGNUM, arm64_gcc::x12, gpr_x12 }, NULL, NULL}, -{ "x13", NULL, 8, GPR_OFFSET(13), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x13, arm64_dwarf::x13, LLDB_INVALID_REGNUM, arm64_gcc::x13, gpr_x13 }, NULL, NULL}, -{ "x14", NULL, 8, GPR_OFFSET(14), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x14, arm64_dwarf::x14, LLDB_INVALID_REGNUM, arm64_gcc::x14, gpr_x14 }, NULL, NULL}, -{ "x15", NULL, 8, GPR_OFFSET(15), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x15, arm64_dwarf::x15, LLDB_INVALID_REGNUM, arm64_gcc::x15, gpr_x15 }, NULL, NULL}, -{ "x16", NULL, 8, GPR_OFFSET(16), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x16, arm64_dwarf::x16, LLDB_INVALID_REGNUM, arm64_gcc::x16, gpr_x16 }, NULL, NULL}, -{ "x17", NULL, 8, GPR_OFFSET(17), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x17, arm64_dwarf::x17, LLDB_INVALID_REGNUM, arm64_gcc::x17, gpr_x17 }, NULL, NULL}, -{ "x18", NULL, 8, GPR_OFFSET(18), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x18, arm64_dwarf::x18, LLDB_INVALID_REGNUM, arm64_gcc::x18, gpr_x18 }, NULL, NULL}, -{ "x19", NULL, 8, GPR_OFFSET(19), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x19, arm64_dwarf::x19, LLDB_INVALID_REGNUM, arm64_gcc::x19, gpr_x19 }, NULL, NULL}, -{ "x20", NULL, 8, GPR_OFFSET(20), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x20, arm64_dwarf::x20, LLDB_INVALID_REGNUM, arm64_gcc::x20, gpr_x20 }, NULL, NULL}, -{ "x21", NULL, 8, GPR_OFFSET(21), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x21, arm64_dwarf::x21, LLDB_INVALID_REGNUM, arm64_gcc::x21, gpr_x21 }, NULL, NULL}, -{ "x22", NULL, 8, GPR_OFFSET(22), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x22, arm64_dwarf::x22, LLDB_INVALID_REGNUM, arm64_gcc::x22, gpr_x22 }, NULL, NULL}, -{ "x23", NULL, 8, GPR_OFFSET(23), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x23, arm64_dwarf::x23, LLDB_INVALID_REGNUM, arm64_gcc::x23, gpr_x23 }, NULL, NULL}, -{ "x24", NULL, 8, GPR_OFFSET(24), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x24, arm64_dwarf::x24, LLDB_INVALID_REGNUM, arm64_gcc::x24, gpr_x24 }, NULL, NULL}, -{ "x25", NULL, 8, GPR_OFFSET(25), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x25, arm64_dwarf::x25, LLDB_INVALID_REGNUM, arm64_gcc::x25, gpr_x25 }, NULL, NULL}, -{ "x26", NULL, 8, GPR_OFFSET(26), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x26, arm64_dwarf::x26, LLDB_INVALID_REGNUM, arm64_gcc::x26, gpr_x26 }, NULL, NULL}, -{ "x27", NULL, 8, GPR_OFFSET(27), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x27, arm64_dwarf::x27, LLDB_INVALID_REGNUM, arm64_gcc::x27, gpr_x27 }, NULL, NULL}, -{ "x28", NULL, 8, GPR_OFFSET(28), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::x28, arm64_dwarf::x28, LLDB_INVALID_REGNUM, arm64_gcc::x28, gpr_x28 }, NULL, NULL}, +// NAME ALT SZ OFFSET ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB NATIVE VALUE REGS INVALIDATE REGS +// ====== ======= == ============= ============= ============ =============== =============== ========================= ===================== ============= ========== =============== +{ "x0", nullptr, 8, GPR_OFFSET(0), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x0, arm64_dwarf::x0, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM, gpr_x0 }, nullptr, nullptr}, +{ "x1", nullptr, 8, GPR_OFFSET(1), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x1, arm64_dwarf::x1, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM, gpr_x1 }, nullptr, nullptr}, +{ "x2", nullptr, 8, GPR_OFFSET(2), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x2, arm64_dwarf::x2, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM, gpr_x2 }, nullptr, nullptr}, +{ "x3", nullptr, 8, GPR_OFFSET(3), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x3, arm64_dwarf::x3, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM, gpr_x3 }, nullptr, nullptr}, +{ "x4", nullptr, 8, GPR_OFFSET(4), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x4, arm64_dwarf::x4, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM, gpr_x4 }, nullptr, nullptr}, +{ "x5", nullptr, 8, GPR_OFFSET(5), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x5, arm64_dwarf::x5, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM, gpr_x5 }, nullptr, nullptr}, +{ "x6", nullptr, 8, GPR_OFFSET(6), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x6, arm64_dwarf::x6, LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM, gpr_x6 }, nullptr, nullptr}, +{ "x7", nullptr, 8, GPR_OFFSET(7), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x7, arm64_dwarf::x7, LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM, gpr_x7 }, nullptr, nullptr}, +{ "x8", nullptr, 8, GPR_OFFSET(8), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x8, arm64_dwarf::x8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x8 }, nullptr, nullptr}, +{ "x9", nullptr, 8, GPR_OFFSET(9), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x9, arm64_dwarf::x9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x9 }, nullptr, nullptr}, +{ "x10", nullptr, 8, GPR_OFFSET(10), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x10, arm64_dwarf::x10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x10 }, nullptr, nullptr}, +{ "x11", nullptr, 8, GPR_OFFSET(11), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x11, arm64_dwarf::x11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x11 }, nullptr, nullptr}, +{ "x12", nullptr, 8, GPR_OFFSET(12), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x12, arm64_dwarf::x12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x12 }, nullptr, nullptr}, +{ "x13", nullptr, 8, GPR_OFFSET(13), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x13, arm64_dwarf::x13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x13 }, nullptr, nullptr}, +{ "x14", nullptr, 8, GPR_OFFSET(14), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x14, arm64_dwarf::x14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x14 }, nullptr, nullptr}, +{ "x15", nullptr, 8, GPR_OFFSET(15), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x15, arm64_dwarf::x15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x15 }, nullptr, nullptr}, +{ "x16", nullptr, 8, GPR_OFFSET(16), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x16, arm64_dwarf::x16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x16 }, nullptr, nullptr}, +{ "x17", nullptr, 8, GPR_OFFSET(17), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x17, arm64_dwarf::x17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x17 }, nullptr, nullptr}, +{ "x18", nullptr, 8, GPR_OFFSET(18), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x18, arm64_dwarf::x18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x18 }, nullptr, nullptr}, +{ "x19", nullptr, 8, GPR_OFFSET(19), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x19, arm64_dwarf::x19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x19 }, nullptr, nullptr}, +{ "x20", nullptr, 8, GPR_OFFSET(20), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x20, arm64_dwarf::x20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x20 }, nullptr, nullptr}, +{ "x21", nullptr, 8, GPR_OFFSET(21), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x21, arm64_dwarf::x21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x21 }, nullptr, nullptr}, +{ "x22", nullptr, 8, GPR_OFFSET(22), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x22, arm64_dwarf::x22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x22 }, nullptr, nullptr}, +{ "x23", nullptr, 8, GPR_OFFSET(23), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x23, arm64_dwarf::x23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x23 }, nullptr, nullptr}, +{ "x24", nullptr, 8, GPR_OFFSET(24), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x24, arm64_dwarf::x24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x24 }, nullptr, nullptr}, +{ "x25", nullptr, 8, GPR_OFFSET(25), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x25, arm64_dwarf::x25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x25 }, nullptr, nullptr}, +{ "x26", nullptr, 8, GPR_OFFSET(26), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x26, arm64_dwarf::x26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x26 }, nullptr, nullptr}, +{ "x27", nullptr, 8, GPR_OFFSET(27), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x27, arm64_dwarf::x27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x27 }, nullptr, nullptr}, +{ "x28", nullptr, 8, GPR_OFFSET(28), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::x28, arm64_dwarf::x28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_x28 }, nullptr, nullptr}, -{ "fp", "x29", 8, GPR_OFFSET(29), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::fp, arm64_dwarf::fp, LLDB_REGNUM_GENERIC_FP, arm64_gcc::fp, gpr_fp }, NULL, NULL}, -{ "lr", "x30", 8, GPR_OFFSET(30), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::lr, arm64_dwarf::lr, LLDB_REGNUM_GENERIC_RA, arm64_gcc::lr, gpr_lr }, NULL, NULL}, -{ "sp", "x31", 8, GPR_OFFSET(31), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::sp, arm64_dwarf::sp, LLDB_REGNUM_GENERIC_SP, arm64_gcc::sp, gpr_sp }, NULL, NULL}, -{ "pc", NULL, 8, GPR_OFFSET(32), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::pc, arm64_dwarf::pc, LLDB_REGNUM_GENERIC_PC, arm64_gcc::pc, gpr_pc }, NULL, NULL}, +{ "fp", "x29", 8, GPR_OFFSET(29), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::fp, arm64_dwarf::fp, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM, gpr_fp }, nullptr, nullptr}, +{ "lr", "x30", 8, GPR_OFFSET(30), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::lr, arm64_dwarf::lr, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM, gpr_lr }, nullptr, nullptr}, +{ "sp", "x31", 8, GPR_OFFSET(31), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::sp, arm64_dwarf::sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM, gpr_sp }, nullptr, nullptr}, +{ "pc", nullptr, 8, GPR_OFFSET(32), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::pc, arm64_dwarf::pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM, gpr_pc }, nullptr, nullptr}, -{ "cpsr", NULL, 4, GPR_OFFSET_NAME(cpsr), lldb::eEncodingUint, lldb::eFormatHex, { arm64_gcc::cpsr, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, arm64_gcc::cpsr, gpr_cpsr }, NULL, NULL}, +{ "cpsr", nullptr, 4, GPR_OFFSET_NAME(cpsr), lldb::eEncodingUint, lldb::eFormatHex, { arm64_ehframe::cpsr, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM, gpr_cpsr }, nullptr, nullptr}, -{ "v0", NULL, 16, FPU_OFFSET(0), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v0, LLDB_INVALID_REGNUM, arm64_gcc::v0, fpu_v0 }, NULL, NULL}, -{ "v1", NULL, 16, FPU_OFFSET(1), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v1, LLDB_INVALID_REGNUM, arm64_gcc::v1, fpu_v1 }, NULL, NULL}, -{ "v2", NULL, 16, FPU_OFFSET(2), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v2, LLDB_INVALID_REGNUM, arm64_gcc::v2, fpu_v2 }, NULL, NULL}, -{ "v3", NULL, 16, FPU_OFFSET(3), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v3, LLDB_INVALID_REGNUM, arm64_gcc::v3, fpu_v3 }, NULL, NULL}, -{ "v4", NULL, 16, FPU_OFFSET(4), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v4, LLDB_INVALID_REGNUM, arm64_gcc::v4, fpu_v4 }, NULL, NULL}, -{ "v5", NULL, 16, FPU_OFFSET(5), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v5, LLDB_INVALID_REGNUM, arm64_gcc::v5, fpu_v5 }, NULL, NULL}, -{ "v6", NULL, 16, FPU_OFFSET(6), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v6, LLDB_INVALID_REGNUM, arm64_gcc::v6, fpu_v6 }, NULL, NULL}, -{ "v7", NULL, 16, FPU_OFFSET(7), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v7, LLDB_INVALID_REGNUM, arm64_gcc::v7, fpu_v7 }, NULL, NULL}, -{ "v8", NULL, 16, FPU_OFFSET(8), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v8, LLDB_INVALID_REGNUM, arm64_gcc::v8, fpu_v8 }, NULL, NULL}, -{ "v9", NULL, 16, FPU_OFFSET(9), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v9, LLDB_INVALID_REGNUM, arm64_gcc::v9, fpu_v9 }, NULL, NULL}, -{ "v10", NULL, 16, FPU_OFFSET(10), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v10, LLDB_INVALID_REGNUM, arm64_gcc::v10, fpu_v10 }, NULL, NULL}, -{ "v11", NULL, 16, FPU_OFFSET(11), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v11, LLDB_INVALID_REGNUM, arm64_gcc::v11, fpu_v11 }, NULL, NULL}, -{ "v12", NULL, 16, FPU_OFFSET(12), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v12, LLDB_INVALID_REGNUM, arm64_gcc::v12, fpu_v12 }, NULL, NULL}, -{ "v13", NULL, 16, FPU_OFFSET(13), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v13, LLDB_INVALID_REGNUM, arm64_gcc::v13, fpu_v13 }, NULL, NULL}, -{ "v14", NULL, 16, FPU_OFFSET(14), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v14, LLDB_INVALID_REGNUM, arm64_gcc::v14, fpu_v14 }, NULL, NULL}, -{ "v15", NULL, 16, FPU_OFFSET(15), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v15, LLDB_INVALID_REGNUM, arm64_gcc::v15, fpu_v15 }, NULL, NULL}, -{ "v16", NULL, 16, FPU_OFFSET(16), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v16, LLDB_INVALID_REGNUM, arm64_gcc::v16, fpu_v16 }, NULL, NULL}, -{ "v17", NULL, 16, FPU_OFFSET(17), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v17, LLDB_INVALID_REGNUM, arm64_gcc::v17, fpu_v17 }, NULL, NULL}, -{ "v18", NULL, 16, FPU_OFFSET(18), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v18, LLDB_INVALID_REGNUM, arm64_gcc::v18, fpu_v18 }, NULL, NULL}, -{ "v19", NULL, 16, FPU_OFFSET(19), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v19, LLDB_INVALID_REGNUM, arm64_gcc::v19, fpu_v19 }, NULL, NULL}, -{ "v20", NULL, 16, FPU_OFFSET(20), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v20, LLDB_INVALID_REGNUM, arm64_gcc::v20, fpu_v20 }, NULL, NULL}, -{ "v21", NULL, 16, FPU_OFFSET(21), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v21, LLDB_INVALID_REGNUM, arm64_gcc::v21, fpu_v21 }, NULL, NULL}, -{ "v22", NULL, 16, FPU_OFFSET(22), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v22, LLDB_INVALID_REGNUM, arm64_gcc::v22, fpu_v22 }, NULL, NULL}, -{ "v23", NULL, 16, FPU_OFFSET(23), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v23, LLDB_INVALID_REGNUM, arm64_gcc::v23, fpu_v23 }, NULL, NULL}, -{ "v24", NULL, 16, FPU_OFFSET(24), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v24, LLDB_INVALID_REGNUM, arm64_gcc::v24, fpu_v24 }, NULL, NULL}, -{ "v25", NULL, 16, FPU_OFFSET(25), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v25, LLDB_INVALID_REGNUM, arm64_gcc::v25, fpu_v25 }, NULL, NULL}, -{ "v26", NULL, 16, FPU_OFFSET(26), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v26, LLDB_INVALID_REGNUM, arm64_gcc::v26, fpu_v26 }, NULL, NULL}, -{ "v27", NULL, 16, FPU_OFFSET(27), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v27, LLDB_INVALID_REGNUM, arm64_gcc::v27, fpu_v27 }, NULL, NULL}, -{ "v28", NULL, 16, FPU_OFFSET(28), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v28, LLDB_INVALID_REGNUM, arm64_gcc::v28, fpu_v28 }, NULL, NULL}, -{ "v29", NULL, 16, FPU_OFFSET(29), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v29, LLDB_INVALID_REGNUM, arm64_gcc::v29, fpu_v29 }, NULL, NULL}, -{ "v30", NULL, 16, FPU_OFFSET(30), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v30, LLDB_INVALID_REGNUM, arm64_gcc::v30, fpu_v30 }, NULL, NULL}, -{ "v31", NULL, 16, FPU_OFFSET(31), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v31, LLDB_INVALID_REGNUM, arm64_gcc::v31, fpu_v31 }, NULL, NULL}, +{ "v0", nullptr, 16, FPU_OFFSET(0), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v0 }, nullptr, nullptr}, +{ "v1", nullptr, 16, FPU_OFFSET(1), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v1 }, nullptr, nullptr}, +{ "v2", nullptr, 16, FPU_OFFSET(2), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v2 }, nullptr, nullptr}, +{ "v3", nullptr, 16, FPU_OFFSET(3), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v3 }, nullptr, nullptr}, +{ "v4", nullptr, 16, FPU_OFFSET(4), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v4 }, nullptr, nullptr}, +{ "v5", nullptr, 16, FPU_OFFSET(5), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v5 }, nullptr, nullptr}, +{ "v6", nullptr, 16, FPU_OFFSET(6), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v6 }, nullptr, nullptr}, +{ "v7", nullptr, 16, FPU_OFFSET(7), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v7 }, nullptr, nullptr}, +{ "v8", nullptr, 16, FPU_OFFSET(8), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v8 }, nullptr, nullptr}, +{ "v9", nullptr, 16, FPU_OFFSET(9), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v9 }, nullptr, nullptr}, +{ "v10", nullptr, 16, FPU_OFFSET(10), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v10 }, nullptr, nullptr}, +{ "v11", nullptr, 16, FPU_OFFSET(11), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v11 }, nullptr, nullptr}, +{ "v12", nullptr, 16, FPU_OFFSET(12), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v12 }, nullptr, nullptr}, +{ "v13", nullptr, 16, FPU_OFFSET(13), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v13 }, nullptr, nullptr}, +{ "v14", nullptr, 16, FPU_OFFSET(14), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v14 }, nullptr, nullptr}, +{ "v15", nullptr, 16, FPU_OFFSET(15), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v15 }, nullptr, nullptr}, +{ "v16", nullptr, 16, FPU_OFFSET(16), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v16 }, nullptr, nullptr}, +{ "v17", nullptr, 16, FPU_OFFSET(17), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v17 }, nullptr, nullptr}, +{ "v18", nullptr, 16, FPU_OFFSET(18), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v18 }, nullptr, nullptr}, +{ "v19", nullptr, 16, FPU_OFFSET(19), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v19 }, nullptr, nullptr}, +{ "v20", nullptr, 16, FPU_OFFSET(20), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v20 }, nullptr, nullptr}, +{ "v21", nullptr, 16, FPU_OFFSET(21), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v21 }, nullptr, nullptr}, +{ "v22", nullptr, 16, FPU_OFFSET(22), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v22 }, nullptr, nullptr}, +{ "v23", nullptr, 16, FPU_OFFSET(23), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v23 }, nullptr, nullptr}, +{ "v24", nullptr, 16, FPU_OFFSET(24), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v24 }, nullptr, nullptr}, +{ "v25", nullptr, 16, FPU_OFFSET(25), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v25 }, nullptr, nullptr}, +{ "v26", nullptr, 16, FPU_OFFSET(26), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v26 }, nullptr, nullptr}, +{ "v27", nullptr, 16, FPU_OFFSET(27), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v27 }, nullptr, nullptr}, +{ "v28", nullptr, 16, FPU_OFFSET(28), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v28 }, nullptr, nullptr}, +{ "v29", nullptr, 16, FPU_OFFSET(29), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v29, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v29 }, nullptr, nullptr}, +{ "v30", nullptr, 16, FPU_OFFSET(30), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v30, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v30 }, nullptr, nullptr}, +{ "v31", nullptr, 16, FPU_OFFSET(31), lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, arm64_dwarf::v31, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_v31 }, nullptr, nullptr}, -{ "fpsr", NULL, 4, FPU_OFFSET_NAME(fpsr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpsr }, NULL, NULL}, -{ "fpcr", NULL, 4, FPU_OFFSET_NAME(fpcr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpcr }, NULL, NULL}, +{ "fpsr", nullptr, 4, FPU_OFFSET_NAME(fpsr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpsr }, nullptr, nullptr}, +{ "fpcr", nullptr, 4, FPU_OFFSET_NAME(fpcr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpu_fpcr }, nullptr, nullptr}, -{ "far", NULL, 8, EXC_OFFSET_NAME(far), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_far }, NULL, NULL}, -{ "esr", NULL, 4, EXC_OFFSET_NAME(esr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_esr }, NULL, NULL}, -{ "exception",NULL, 4, EXC_OFFSET_NAME(exception), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception }, NULL, NULL}, +{ "far", nullptr, 8, EXC_OFFSET_NAME(far), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_far }, nullptr, nullptr}, +{ "esr", nullptr, 4, EXC_OFFSET_NAME(esr), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_esr }, nullptr, nullptr}, +{ "exception",nullptr, 4, EXC_OFFSET_NAME(exception), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, exc_exception }, nullptr, nullptr}, { DEFINE_DBG (bvr, 0) }, { DEFINE_DBG (bvr, 1) }, diff --git a/source/Plugins/Process/Utility/RegisterInfos_i386.h b/source/Plugins/Process/Utility/RegisterInfos_i386.h index 6982536..904ec4d 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_i386.h +++ b/source/Plugins/Process/Utility/RegisterInfos_i386.h @@ -1,15 +1,21 @@ -//===-- RegisterInfos_i386.h -----------------------------------*- C++ -*-===// +//===-- RegisterInfos_i386.h ------------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===---------------------------------------------------------------------===// -#include "llvm/Support/Compiler.h" +//===----------------------------------------------------------------------===// +// C Includes #include <stddef.h> +// C++ Includes +// Other libraries and framework includes +#include "llvm/Support/Compiler.h" + +// Project includes + #ifdef DECLARE_REGISTER_INFOS_I386_STRUCT // Computes the offset of the given GPR in the user data area. @@ -52,31 +58,31 @@ { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \ eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_i386 }, NULL, NULL } -// RegisterKind: GCC, DWARF, Generic, GDB, LLDB +// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB #define DEFINE_FP_ST(reg, i) \ { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ eEncodingVector, eFormatVectorOfUInt8, \ - { gcc_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, gdb_st##i##_i386, lldb_st##i##_i386 }, \ + { ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_i386 }, \ NULL, NULL } #define DEFINE_FP_MM(reg, i) \ { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ eEncodingUint, eFormatHex, \ - { gcc_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, gdb_mm##i##_i386, lldb_mm##i##_i386 }, \ + { ehframe_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_i386 }, \ NULL, NULL } #define DEFINE_XMM(reg, i) \ { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \ eEncodingVector, eFormatVectorOfUInt8, \ - { gcc_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, gdb_##reg##i##_i386, lldb_##reg##i##_i386}, \ + { ehframe_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386}, \ NULL, NULL } // I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then differentiate based on register size. #define DEFINE_YMM(reg, i) \ { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i), \ eEncodingVector, eFormatVectorOfUInt8, \ - { LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, LLDB_INVALID_REGNUM, gdb_##reg##i##h_i386, lldb_##reg##i##_i386 }, \ + { LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \ NULL, NULL } #define DEFINE_DR(reg, i) \ @@ -98,22 +104,22 @@ static RegisterInfo g_register_infos_i386[] = { // General purpose registers. - DEFINE_GPR(eax, NULL, gcc_eax_i386, dwarf_eax_i386, LLDB_INVALID_REGNUM, gdb_eax_i386), - DEFINE_GPR(ebx, NULL, gcc_ebx_i386, dwarf_ebx_i386, LLDB_INVALID_REGNUM, gdb_ebx_i386), - DEFINE_GPR(ecx, NULL, gcc_ecx_i386, dwarf_ecx_i386, LLDB_INVALID_REGNUM, gdb_ecx_i386), - DEFINE_GPR(edx, NULL, gcc_edx_i386, dwarf_edx_i386, LLDB_INVALID_REGNUM, gdb_edx_i386), - DEFINE_GPR(edi, NULL, gcc_edi_i386, dwarf_edi_i386, LLDB_INVALID_REGNUM, gdb_edi_i386), - DEFINE_GPR(esi, NULL, gcc_esi_i386, dwarf_esi_i386, LLDB_INVALID_REGNUM, gdb_esi_i386), - DEFINE_GPR(ebp, "fp", gcc_ebp_i386, dwarf_ebp_i386, LLDB_REGNUM_GENERIC_FP, gdb_ebp_i386), - DEFINE_GPR(esp, "sp", gcc_esp_i386, dwarf_esp_i386, LLDB_REGNUM_GENERIC_SP, gdb_esp_i386), - DEFINE_GPR(eip, "pc", gcc_eip_i386, dwarf_eip_i386, LLDB_REGNUM_GENERIC_PC, gdb_eip_i386), - DEFINE_GPR(eflags, "flags", gcc_eflags_i386, dwarf_eflags_i386, LLDB_REGNUM_GENERIC_FLAGS, gdb_eflags_i386), - DEFINE_GPR(cs, NULL, LLDB_INVALID_REGNUM, dwarf_cs_i386, LLDB_INVALID_REGNUM, gdb_cs_i386), - DEFINE_GPR(fs, NULL, LLDB_INVALID_REGNUM, dwarf_fs_i386, LLDB_INVALID_REGNUM, gdb_fs_i386), - DEFINE_GPR(gs, NULL, LLDB_INVALID_REGNUM, dwarf_gs_i386, LLDB_INVALID_REGNUM, gdb_gs_i386), - DEFINE_GPR(ss, NULL, LLDB_INVALID_REGNUM, dwarf_ss_i386, LLDB_INVALID_REGNUM, gdb_ss_i386), - DEFINE_GPR(ds, NULL, LLDB_INVALID_REGNUM, dwarf_ds_i386, LLDB_INVALID_REGNUM, gdb_ds_i386), - DEFINE_GPR(es, NULL, LLDB_INVALID_REGNUM, dwarf_es_i386, LLDB_INVALID_REGNUM, gdb_es_i386), + DEFINE_GPR(eax, nullptr, ehframe_eax_i386, dwarf_eax_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(ebx, nullptr, ehframe_ebx_i386, dwarf_ebx_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(ecx, nullptr, ehframe_ecx_i386, dwarf_ecx_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(edx, nullptr, ehframe_edx_i386, dwarf_edx_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(edi, nullptr, ehframe_edi_i386, dwarf_edi_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(esi, nullptr, ehframe_esi_i386, dwarf_esi_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(ebp, "fp", ehframe_ebp_i386, dwarf_ebp_i386, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), + DEFINE_GPR(esp, "sp", ehframe_esp_i386, dwarf_esp_i386, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), + DEFINE_GPR(eip, "pc", ehframe_eip_i386, dwarf_eip_i386, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), + DEFINE_GPR(eflags, "flags", ehframe_eflags_i386, dwarf_eflags_i386, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), + DEFINE_GPR(cs, nullptr, LLDB_INVALID_REGNUM, dwarf_cs_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(fs, nullptr, LLDB_INVALID_REGNUM, dwarf_fs_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(gs, nullptr, LLDB_INVALID_REGNUM, dwarf_gs_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(ss, nullptr, LLDB_INVALID_REGNUM, dwarf_ss_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(ds, nullptr, LLDB_INVALID_REGNUM, dwarf_ds_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(es, nullptr, LLDB_INVALID_REGNUM, dwarf_es_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_GPR_PSEUDO_16(ax, eax), DEFINE_GPR_PSEUDO_16(bx, ebx), @@ -133,15 +139,15 @@ g_register_infos_i386[] = DEFINE_GPR_PSEUDO_8L(dl, edx), // i387 Floating point registers. - DEFINE_FPR(fctrl, fctrl, LLDB_INVALID_REGNUM, dwarf_fctrl_i386, LLDB_INVALID_REGNUM, gdb_fctrl_i386), - DEFINE_FPR(fstat, fstat, LLDB_INVALID_REGNUM, dwarf_fstat_i386, LLDB_INVALID_REGNUM, gdb_fstat_i386), - DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ftag_i386), - DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fop_i386), - DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fiseg_i386), - DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fioff_i386), - DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_foseg_i386), - DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fooff_i386), - DEFINE_FPR(mxcsr, mxcsr, LLDB_INVALID_REGNUM, dwarf_mxcsr_i386, LLDB_INVALID_REGNUM, gdb_mxcsr_i386), + DEFINE_FPR(fctrl, fctrl, LLDB_INVALID_REGNUM, dwarf_fctrl_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fstat, fstat, LLDB_INVALID_REGNUM, dwarf_fstat_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(mxcsr, mxcsr, LLDB_INVALID_REGNUM, dwarf_mxcsr_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), // FP registers. @@ -192,6 +198,7 @@ g_register_infos_i386[] = DEFINE_DR(dr, 6), DEFINE_DR(dr, 7) }; + static_assert((sizeof(g_register_infos_i386) / sizeof(g_register_infos_i386[0])) == k_num_registers_i386, "g_register_infos_x86_64 has wrong number of register infos"); diff --git a/source/Plugins/Process/Utility/RegisterInfos_mips.h b/source/Plugins/Process/Utility/RegisterInfos_mips.h index 83ce6f0..eef27f0 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_mips.h +++ b/source/Plugins/Process/Utility/RegisterInfos_mips.h @@ -6,10 +6,16 @@ // License. See LICENSE.TXT for details. // //===---------------------------------------------------------------------===// -#include "llvm/Support/Compiler.h" +// C Includes #include <stddef.h> +// C++ Includes +// Other libraries and framework includes +#include "llvm/Support/Compiler.h" + +// Project includes + #ifdef DECLARE_REGISTER_INFOS_MIPS_STRUCT // Computes the offset of the given GPR in the user data area. @@ -44,123 +50,124 @@ { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint, \ eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL } -// RegisterKind: GCC, DWARF, Generic, GDB, LLDB +// RegisterKind: EH_Frame, DWARF, Generic, Procss Plugin, LLDB static RegisterInfo g_register_infos_mips[] = { - DEFINE_GPR (zero, "zero", gcc_dwarf_zero_mips, gcc_dwarf_zero_mips, LLDB_INVALID_REGNUM, gdb_zero_mips), - DEFINE_GPR (r1, "at", gcc_dwarf_r1_mips, gcc_dwarf_r1_mips, LLDB_INVALID_REGNUM, gdb_r1_mips), - DEFINE_GPR (r2, NULL, gcc_dwarf_r2_mips, gcc_dwarf_r2_mips, LLDB_INVALID_REGNUM, gdb_r2_mips), - DEFINE_GPR (r3, NULL, gcc_dwarf_r3_mips, gcc_dwarf_r3_mips, LLDB_INVALID_REGNUM, gdb_r3_mips), - DEFINE_GPR (r4, NULL, gcc_dwarf_r4_mips, gcc_dwarf_r4_mips, LLDB_REGNUM_GENERIC_ARG1, gdb_r4_mips), - DEFINE_GPR (r5, NULL, gcc_dwarf_r5_mips, gcc_dwarf_r5_mips, LLDB_REGNUM_GENERIC_ARG2, gdb_r5_mips), - DEFINE_GPR (r6, NULL, gcc_dwarf_r6_mips, gcc_dwarf_r6_mips, LLDB_REGNUM_GENERIC_ARG3, gdb_r6_mips), - DEFINE_GPR (r7, NULL, gcc_dwarf_r7_mips, gcc_dwarf_r7_mips, LLDB_REGNUM_GENERIC_ARG4, gdb_r7_mips), - DEFINE_GPR (r8, NULL, gcc_dwarf_r8_mips, gcc_dwarf_r8_mips, LLDB_INVALID_REGNUM, gdb_r8_mips), - DEFINE_GPR (r9, NULL, gcc_dwarf_r9_mips, gcc_dwarf_r9_mips, LLDB_INVALID_REGNUM, gdb_r9_mips), - DEFINE_GPR (r10, NULL, gcc_dwarf_r10_mips, gcc_dwarf_r10_mips, LLDB_INVALID_REGNUM, gdb_r10_mips), - DEFINE_GPR (r11, NULL, gcc_dwarf_r11_mips, gcc_dwarf_r11_mips, LLDB_INVALID_REGNUM, gdb_r11_mips), - DEFINE_GPR (r12, NULL, gcc_dwarf_r12_mips, gcc_dwarf_r12_mips, LLDB_INVALID_REGNUM, gdb_r12_mips), - DEFINE_GPR (r13, NULL, gcc_dwarf_r13_mips, gcc_dwarf_r13_mips, LLDB_INVALID_REGNUM, gdb_r13_mips), - DEFINE_GPR (r14, NULL, gcc_dwarf_r14_mips, gcc_dwarf_r14_mips, LLDB_INVALID_REGNUM, gdb_r14_mips), - DEFINE_GPR (r15, NULL, gcc_dwarf_r15_mips, gcc_dwarf_r15_mips, LLDB_INVALID_REGNUM, gdb_r15_mips), - DEFINE_GPR (r16, NULL, gcc_dwarf_r16_mips, gcc_dwarf_r16_mips, LLDB_INVALID_REGNUM, gdb_r16_mips), - DEFINE_GPR (r17, NULL, gcc_dwarf_r17_mips, gcc_dwarf_r17_mips, LLDB_INVALID_REGNUM, gdb_r17_mips), - DEFINE_GPR (r18, NULL, gcc_dwarf_r18_mips, gcc_dwarf_r18_mips, LLDB_INVALID_REGNUM, gdb_r18_mips), - DEFINE_GPR (r19, NULL, gcc_dwarf_r19_mips, gcc_dwarf_r19_mips, LLDB_INVALID_REGNUM, gdb_r19_mips), - DEFINE_GPR (r20, NULL, gcc_dwarf_r20_mips, gcc_dwarf_r20_mips, LLDB_INVALID_REGNUM, gdb_r20_mips), - DEFINE_GPR (r21, NULL, gcc_dwarf_r21_mips, gcc_dwarf_r21_mips, LLDB_INVALID_REGNUM, gdb_r21_mips), - DEFINE_GPR (r22, NULL, gcc_dwarf_r22_mips, gcc_dwarf_r22_mips, LLDB_INVALID_REGNUM, gdb_r22_mips), - DEFINE_GPR (r23, NULL, gcc_dwarf_r23_mips, gcc_dwarf_r23_mips, LLDB_INVALID_REGNUM, gdb_r23_mips), - DEFINE_GPR (r24, NULL, gcc_dwarf_r24_mips, gcc_dwarf_r24_mips, LLDB_INVALID_REGNUM, gdb_r24_mips), - DEFINE_GPR (r25, NULL, gcc_dwarf_r25_mips, gcc_dwarf_r25_mips, LLDB_INVALID_REGNUM, gdb_r25_mips), - DEFINE_GPR (r26, NULL, gcc_dwarf_r26_mips, gcc_dwarf_r26_mips, LLDB_INVALID_REGNUM, gdb_r26_mips), - DEFINE_GPR (r27, NULL, gcc_dwarf_r27_mips, gcc_dwarf_r27_mips, LLDB_INVALID_REGNUM, gdb_r27_mips), - DEFINE_GPR (gp, "gp", gcc_dwarf_gp_mips, gcc_dwarf_gp_mips, LLDB_INVALID_REGNUM, gdb_gp_mips), - DEFINE_GPR (sp, "sp", gcc_dwarf_sp_mips, gcc_dwarf_sp_mips, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips), - DEFINE_GPR (r30, "fp", gcc_dwarf_r30_mips, gcc_dwarf_r30_mips, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips), - DEFINE_GPR (ra, "ra", gcc_dwarf_ra_mips, gcc_dwarf_ra_mips, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips), - DEFINE_GPR (sr, "status", gcc_dwarf_sr_mips, gcc_dwarf_sr_mips, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), - DEFINE_GPR (mullo, NULL, gcc_dwarf_lo_mips, gcc_dwarf_lo_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (mulhi, NULL, gcc_dwarf_hi_mips, gcc_dwarf_hi_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (badvaddr, NULL, gcc_dwarf_bad_mips, gcc_dwarf_bad_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (cause, NULL, gcc_dwarf_cause_mips, gcc_dwarf_cause_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (pc, NULL, gcc_dwarf_pc_mips, gcc_dwarf_pc_mips, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), - DEFINE_GPR (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f0, NULL, gcc_dwarf_f0_mips, gcc_dwarf_f0_mips, LLDB_INVALID_REGNUM, gdb_f0_mips), - DEFINE_FPR (f1, NULL, gcc_dwarf_f1_mips, gcc_dwarf_f1_mips, LLDB_INVALID_REGNUM, gdb_f1_mips), - DEFINE_FPR (f2, NULL, gcc_dwarf_f2_mips, gcc_dwarf_f2_mips, LLDB_INVALID_REGNUM, gdb_f2_mips), - DEFINE_FPR (f3, NULL, gcc_dwarf_f3_mips, gcc_dwarf_f3_mips, LLDB_INVALID_REGNUM, gdb_f3_mips), - DEFINE_FPR (f4, NULL, gcc_dwarf_f4_mips, gcc_dwarf_f4_mips, LLDB_INVALID_REGNUM, gdb_f4_mips), - DEFINE_FPR (f5, NULL, gcc_dwarf_f5_mips, gcc_dwarf_f5_mips, LLDB_INVALID_REGNUM, gdb_f5_mips), - DEFINE_FPR (f6, NULL, gcc_dwarf_f6_mips, gcc_dwarf_f6_mips, LLDB_INVALID_REGNUM, gdb_f6_mips), - DEFINE_FPR (f7, NULL, gcc_dwarf_f7_mips, gcc_dwarf_f7_mips, LLDB_INVALID_REGNUM, gdb_f7_mips), - DEFINE_FPR (f8, NULL, gcc_dwarf_f8_mips, gcc_dwarf_f8_mips, LLDB_INVALID_REGNUM, gdb_f8_mips), - DEFINE_FPR (f9, NULL, gcc_dwarf_f9_mips, gcc_dwarf_f9_mips, LLDB_INVALID_REGNUM, gdb_f9_mips), - DEFINE_FPR (f10, NULL, gcc_dwarf_f10_mips, gcc_dwarf_f10_mips, LLDB_INVALID_REGNUM, gdb_f10_mips), - DEFINE_FPR (f11, NULL, gcc_dwarf_f11_mips, gcc_dwarf_f11_mips, LLDB_INVALID_REGNUM, gdb_f11_mips), - DEFINE_FPR (f12, NULL, gcc_dwarf_f12_mips, gcc_dwarf_f12_mips, LLDB_INVALID_REGNUM, gdb_f12_mips), - DEFINE_FPR (f13, NULL, gcc_dwarf_f13_mips, gcc_dwarf_f13_mips, LLDB_INVALID_REGNUM, gdb_f13_mips), - DEFINE_FPR (f14, NULL, gcc_dwarf_f14_mips, gcc_dwarf_f14_mips, LLDB_INVALID_REGNUM, gdb_f14_mips), - DEFINE_FPR (f15, NULL, gcc_dwarf_f15_mips, gcc_dwarf_f15_mips, LLDB_INVALID_REGNUM, gdb_f15_mips), - DEFINE_FPR (f16, NULL, gcc_dwarf_f16_mips, gcc_dwarf_f16_mips, LLDB_INVALID_REGNUM, gdb_f16_mips), - DEFINE_FPR (f17, NULL, gcc_dwarf_f17_mips, gcc_dwarf_f17_mips, LLDB_INVALID_REGNUM, gdb_f17_mips), - DEFINE_FPR (f18, NULL, gcc_dwarf_f18_mips, gcc_dwarf_f18_mips, LLDB_INVALID_REGNUM, gdb_f18_mips), - DEFINE_FPR (f19, NULL, gcc_dwarf_f19_mips, gcc_dwarf_f19_mips, LLDB_INVALID_REGNUM, gdb_f19_mips), - DEFINE_FPR (f20, NULL, gcc_dwarf_f20_mips, gcc_dwarf_f20_mips, LLDB_INVALID_REGNUM, gdb_f20_mips), - DEFINE_FPR (f21, NULL, gcc_dwarf_f21_mips, gcc_dwarf_f21_mips, LLDB_INVALID_REGNUM, gdb_f21_mips), - DEFINE_FPR (f22, NULL, gcc_dwarf_f22_mips, gcc_dwarf_f22_mips, LLDB_INVALID_REGNUM, gdb_f22_mips), - DEFINE_FPR (f23, NULL, gcc_dwarf_f23_mips, gcc_dwarf_f23_mips, LLDB_INVALID_REGNUM, gdb_f23_mips), - DEFINE_FPR (f24, NULL, gcc_dwarf_f24_mips, gcc_dwarf_f24_mips, LLDB_INVALID_REGNUM, gdb_f24_mips), - DEFINE_FPR (f25, NULL, gcc_dwarf_f25_mips, gcc_dwarf_f25_mips, LLDB_INVALID_REGNUM, gdb_f25_mips), - DEFINE_FPR (f26, NULL, gcc_dwarf_f26_mips, gcc_dwarf_f26_mips, LLDB_INVALID_REGNUM, gdb_f26_mips), - DEFINE_FPR (f27, NULL, gcc_dwarf_f27_mips, gcc_dwarf_f27_mips, LLDB_INVALID_REGNUM, gdb_f27_mips), - DEFINE_FPR (f28, NULL, gcc_dwarf_f28_mips, gcc_dwarf_f28_mips, LLDB_INVALID_REGNUM, gdb_f28_mips), - DEFINE_FPR (f29, NULL, gcc_dwarf_f29_mips, gcc_dwarf_f29_mips, LLDB_INVALID_REGNUM, gdb_f29_mips), - DEFINE_FPR (f30, NULL, gcc_dwarf_f30_mips, gcc_dwarf_f30_mips, LLDB_INVALID_REGNUM, gdb_f30_mips), - DEFINE_FPR (f31, NULL, gcc_dwarf_f31_mips, gcc_dwarf_f31_mips, LLDB_INVALID_REGNUM, gdb_f31_mips), - DEFINE_FPR (fcsr, NULL, gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM, gdb_fcsr_mips), - DEFINE_FPR (fir, NULL, gcc_dwarf_fir_mips, gcc_dwarf_fir_mips, LLDB_INVALID_REGNUM, gdb_fir_mips), - DEFINE_FPR (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, gdb_config5_mips), - DEFINE_MSA (w0, NULL, gcc_dwarf_w0_mips, gcc_dwarf_w0_mips, LLDB_INVALID_REGNUM, gdb_w0_mips), - DEFINE_MSA (w1, NULL, gcc_dwarf_w1_mips, gcc_dwarf_w1_mips, LLDB_INVALID_REGNUM, gdb_w1_mips), - DEFINE_MSA (w2, NULL, gcc_dwarf_w2_mips, gcc_dwarf_w2_mips, LLDB_INVALID_REGNUM, gdb_w2_mips), - DEFINE_MSA (w3, NULL, gcc_dwarf_w3_mips, gcc_dwarf_w3_mips, LLDB_INVALID_REGNUM, gdb_w3_mips), - DEFINE_MSA (w4, NULL, gcc_dwarf_w4_mips, gcc_dwarf_w4_mips, LLDB_INVALID_REGNUM, gdb_w4_mips), - DEFINE_MSA (w5, NULL, gcc_dwarf_w5_mips, gcc_dwarf_w5_mips, LLDB_INVALID_REGNUM, gdb_w5_mips), - DEFINE_MSA (w6, NULL, gcc_dwarf_w6_mips, gcc_dwarf_w6_mips, LLDB_INVALID_REGNUM, gdb_w6_mips), - DEFINE_MSA (w7, NULL, gcc_dwarf_w7_mips, gcc_dwarf_w7_mips, LLDB_INVALID_REGNUM, gdb_w7_mips), - DEFINE_MSA (w8, NULL, gcc_dwarf_w8_mips, gcc_dwarf_w8_mips, LLDB_INVALID_REGNUM, gdb_w8_mips), - DEFINE_MSA (w9, NULL, gcc_dwarf_w9_mips, gcc_dwarf_w9_mips, LLDB_INVALID_REGNUM, gdb_w9_mips), - DEFINE_MSA (w10, NULL, gcc_dwarf_w10_mips, gcc_dwarf_w10_mips, LLDB_INVALID_REGNUM, gdb_w10_mips), - DEFINE_MSA (w11, NULL, gcc_dwarf_w11_mips, gcc_dwarf_w11_mips, LLDB_INVALID_REGNUM, gdb_w11_mips), - DEFINE_MSA (w12, NULL, gcc_dwarf_w12_mips, gcc_dwarf_w12_mips, LLDB_INVALID_REGNUM, gdb_w12_mips), - DEFINE_MSA (w13, NULL, gcc_dwarf_w13_mips, gcc_dwarf_w13_mips, LLDB_INVALID_REGNUM, gdb_w13_mips), - DEFINE_MSA (w14, NULL, gcc_dwarf_w14_mips, gcc_dwarf_w14_mips, LLDB_INVALID_REGNUM, gdb_w14_mips), - DEFINE_MSA (w15, NULL, gcc_dwarf_w15_mips, gcc_dwarf_w15_mips, LLDB_INVALID_REGNUM, gdb_w15_mips), - DEFINE_MSA (w16, NULL, gcc_dwarf_w16_mips, gcc_dwarf_w16_mips, LLDB_INVALID_REGNUM, gdb_w16_mips), - DEFINE_MSA (w17, NULL, gcc_dwarf_w17_mips, gcc_dwarf_w17_mips, LLDB_INVALID_REGNUM, gdb_w17_mips), - DEFINE_MSA (w18, NULL, gcc_dwarf_w18_mips, gcc_dwarf_w18_mips, LLDB_INVALID_REGNUM, gdb_w18_mips), - DEFINE_MSA (w19, NULL, gcc_dwarf_w19_mips, gcc_dwarf_w19_mips, LLDB_INVALID_REGNUM, gdb_w19_mips), - DEFINE_MSA (w20, NULL, gcc_dwarf_w10_mips, gcc_dwarf_w20_mips, LLDB_INVALID_REGNUM, gdb_w20_mips), - DEFINE_MSA (w21, NULL, gcc_dwarf_w21_mips, gcc_dwarf_w21_mips, LLDB_INVALID_REGNUM, gdb_w21_mips), - DEFINE_MSA (w22, NULL, gcc_dwarf_w22_mips, gcc_dwarf_w22_mips, LLDB_INVALID_REGNUM, gdb_w22_mips), - DEFINE_MSA (w23, NULL, gcc_dwarf_w23_mips, gcc_dwarf_w23_mips, LLDB_INVALID_REGNUM, gdb_w23_mips), - DEFINE_MSA (w24, NULL, gcc_dwarf_w24_mips, gcc_dwarf_w24_mips, LLDB_INVALID_REGNUM, gdb_w24_mips), - DEFINE_MSA (w25, NULL, gcc_dwarf_w25_mips, gcc_dwarf_w25_mips, LLDB_INVALID_REGNUM, gdb_w25_mips), - DEFINE_MSA (w26, NULL, gcc_dwarf_w26_mips, gcc_dwarf_w26_mips, LLDB_INVALID_REGNUM, gdb_w26_mips), - DEFINE_MSA (w27, NULL, gcc_dwarf_w27_mips, gcc_dwarf_w27_mips, LLDB_INVALID_REGNUM, gdb_w27_mips), - DEFINE_MSA (w28, NULL, gcc_dwarf_w28_mips, gcc_dwarf_w28_mips, LLDB_INVALID_REGNUM, gdb_w28_mips), - DEFINE_MSA (w29, NULL, gcc_dwarf_w29_mips, gcc_dwarf_w29_mips, LLDB_INVALID_REGNUM, gdb_w29_mips), - DEFINE_MSA (w30, NULL, gcc_dwarf_w30_mips, gcc_dwarf_w30_mips, LLDB_INVALID_REGNUM, gdb_w30_mips), - DEFINE_MSA (w31, NULL, gcc_dwarf_w31_mips, gcc_dwarf_w31_mips, LLDB_INVALID_REGNUM, gdb_w31_mips), - DEFINE_MSA_INFO (mcsr, NULL, gcc_dwarf_mcsr_mips, gcc_dwarf_mcsr_mips, LLDB_INVALID_REGNUM, gdb_mcsr_mips), - DEFINE_MSA_INFO (mir, NULL, gcc_dwarf_mir_mips, gcc_dwarf_mir_mips, LLDB_INVALID_REGNUM, gdb_mir_mips), - DEFINE_MSA_INFO (fcsr, NULL, gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM, gdb_fcsr_mips), - DEFINE_MSA_INFO (fir, NULL, gcc_dwarf_fir_mips, gcc_dwarf_fir_mips, LLDB_INVALID_REGNUM, gdb_fir_mips), - DEFINE_MSA_INFO (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, gdb_config5_mips) + DEFINE_GPR (zero, "zero", dwarf_zero_mips, dwarf_zero_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r1, "at", dwarf_r1_mips, dwarf_r1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r2, nullptr, dwarf_r2_mips, dwarf_r2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r3, nullptr, dwarf_r3_mips, dwarf_r3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r4, nullptr, dwarf_r4_mips, dwarf_r4_mips, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), + DEFINE_GPR (r5, nullptr, dwarf_r5_mips, dwarf_r5_mips, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), + DEFINE_GPR (r6, nullptr, dwarf_r6_mips, dwarf_r6_mips, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), + DEFINE_GPR (r7, nullptr, dwarf_r7_mips, dwarf_r7_mips, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), + DEFINE_GPR (r8, nullptr, dwarf_r8_mips, dwarf_r8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r9, nullptr, dwarf_r9_mips, dwarf_r9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r10, nullptr, dwarf_r10_mips, dwarf_r10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r11, nullptr, dwarf_r11_mips, dwarf_r11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r12, nullptr, dwarf_r12_mips, dwarf_r12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r13, nullptr, dwarf_r13_mips, dwarf_r13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r14, nullptr, dwarf_r14_mips, dwarf_r14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r15, nullptr, dwarf_r15_mips, dwarf_r15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r16, nullptr, dwarf_r16_mips, dwarf_r16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r17, nullptr, dwarf_r17_mips, dwarf_r17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r18, nullptr, dwarf_r18_mips, dwarf_r18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r19, nullptr, dwarf_r19_mips, dwarf_r19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r20, nullptr, dwarf_r20_mips, dwarf_r20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r21, nullptr, dwarf_r21_mips, dwarf_r21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r22, nullptr, dwarf_r22_mips, dwarf_r22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r23, nullptr, dwarf_r23_mips, dwarf_r23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r24, nullptr, dwarf_r24_mips, dwarf_r24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r25, nullptr, dwarf_r25_mips, dwarf_r25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r26, nullptr, dwarf_r26_mips, dwarf_r26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (r27, nullptr, dwarf_r27_mips, dwarf_r27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (gp, "gp", dwarf_gp_mips, dwarf_gp_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (sp, "sp", dwarf_sp_mips, dwarf_sp_mips, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), + DEFINE_GPR (r30, "fp", dwarf_r30_mips, dwarf_r30_mips, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), + DEFINE_GPR (ra, "ra", dwarf_ra_mips, dwarf_ra_mips, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM), + DEFINE_GPR (sr, "status", dwarf_sr_mips, dwarf_sr_mips, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), + DEFINE_GPR (mullo, nullptr, dwarf_lo_mips, dwarf_lo_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (mulhi, nullptr, dwarf_hi_mips, dwarf_hi_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (badvaddr, nullptr, dwarf_bad_mips, dwarf_bad_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (cause, nullptr, dwarf_cause_mips, dwarf_cause_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR (pc, nullptr, dwarf_pc_mips, dwarf_pc_mips, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), + DEFINE_GPR (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f0, nullptr, dwarf_f0_mips, dwarf_f0_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f1, nullptr, dwarf_f1_mips, dwarf_f1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f2, nullptr, dwarf_f2_mips, dwarf_f2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f3, nullptr, dwarf_f3_mips, dwarf_f3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f4, nullptr, dwarf_f4_mips, dwarf_f4_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f5, nullptr, dwarf_f5_mips, dwarf_f5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f6, nullptr, dwarf_f6_mips, dwarf_f6_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f7, nullptr, dwarf_f7_mips, dwarf_f7_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f8, nullptr, dwarf_f8_mips, dwarf_f8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f9, nullptr, dwarf_f9_mips, dwarf_f9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f10, nullptr, dwarf_f10_mips, dwarf_f10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f11, nullptr, dwarf_f11_mips, dwarf_f11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f12, nullptr, dwarf_f12_mips, dwarf_f12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f13, nullptr, dwarf_f13_mips, dwarf_f13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f14, nullptr, dwarf_f14_mips, dwarf_f14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f15, nullptr, dwarf_f15_mips, dwarf_f15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f16, nullptr, dwarf_f16_mips, dwarf_f16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f17, nullptr, dwarf_f17_mips, dwarf_f17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f18, nullptr, dwarf_f18_mips, dwarf_f18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f19, nullptr, dwarf_f19_mips, dwarf_f19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f20, nullptr, dwarf_f20_mips, dwarf_f20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f21, nullptr, dwarf_f21_mips, dwarf_f21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f22, nullptr, dwarf_f22_mips, dwarf_f22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f23, nullptr, dwarf_f23_mips, dwarf_f23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f24, nullptr, dwarf_f24_mips, dwarf_f24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f25, nullptr, dwarf_f25_mips, dwarf_f25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f26, nullptr, dwarf_f26_mips, dwarf_f26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f27, nullptr, dwarf_f27_mips, dwarf_f27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f28, nullptr, dwarf_f28_mips, dwarf_f28_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f29, nullptr, dwarf_f29_mips, dwarf_f29_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f30, nullptr, dwarf_f30_mips, dwarf_f30_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f31, nullptr, dwarf_f31_mips, dwarf_f31_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w0, nullptr, dwarf_w0_mips, dwarf_w0_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w1, nullptr, dwarf_w1_mips, dwarf_w1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w2, nullptr, dwarf_w2_mips, dwarf_w2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w3, nullptr, dwarf_w3_mips, dwarf_w3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w4, nullptr, dwarf_w4_mips, dwarf_w4_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w5, nullptr, dwarf_w5_mips, dwarf_w5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w6, nullptr, dwarf_w6_mips, dwarf_w6_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w7, nullptr, dwarf_w7_mips, dwarf_w7_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w8, nullptr, dwarf_w8_mips, dwarf_w8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w9, nullptr, dwarf_w9_mips, dwarf_w9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w10, nullptr, dwarf_w10_mips, dwarf_w10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w11, nullptr, dwarf_w11_mips, dwarf_w11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w12, nullptr, dwarf_w12_mips, dwarf_w12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w13, nullptr, dwarf_w13_mips, dwarf_w13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w14, nullptr, dwarf_w14_mips, dwarf_w14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w15, nullptr, dwarf_w15_mips, dwarf_w15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w16, nullptr, dwarf_w16_mips, dwarf_w16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w17, nullptr, dwarf_w17_mips, dwarf_w17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w18, nullptr, dwarf_w18_mips, dwarf_w18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w19, nullptr, dwarf_w19_mips, dwarf_w19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w20, nullptr, dwarf_w10_mips, dwarf_w20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w21, nullptr, dwarf_w21_mips, dwarf_w21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w22, nullptr, dwarf_w22_mips, dwarf_w22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w23, nullptr, dwarf_w23_mips, dwarf_w23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w24, nullptr, dwarf_w24_mips, dwarf_w24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w25, nullptr, dwarf_w25_mips, dwarf_w25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w26, nullptr, dwarf_w26_mips, dwarf_w26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w27, nullptr, dwarf_w27_mips, dwarf_w27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w28, nullptr, dwarf_w28_mips, dwarf_w28_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w29, nullptr, dwarf_w29_mips, dwarf_w29_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w30, nullptr, dwarf_w30_mips, dwarf_w30_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w31, nullptr, dwarf_w31_mips, dwarf_w31_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (mcsr, nullptr, dwarf_mcsr_mips, dwarf_mcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (mir, nullptr, dwarf_mir_mips, dwarf_mir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM) }; + static_assert((sizeof(g_register_infos_mips) / sizeof(g_register_infos_mips[0])) == k_num_registers_mips, "g_register_infos_mips has wrong number of register infos"); diff --git a/source/Plugins/Process/Utility/RegisterInfos_mips64.h b/source/Plugins/Process/Utility/RegisterInfos_mips64.h index 101842e..45853d7 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_mips64.h +++ b/source/Plugins/Process/Utility/RegisterInfos_mips64.h @@ -1,15 +1,21 @@ -//===-- RegisterInfos_mips64.h ---------------------------------*- C++ -*-===// +//===-- RegisterInfos_mips64.h ----------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===---------------------------------------------------------------------===// -#include "llvm/Support/Compiler.h" +//===----------------------------------------------------------------------===// +// C Includes #include <stddef.h> +// C++ Includes +// Other libraries and framework includes +#include "llvm/Support/Compiler.h" + +// Project includes + #ifdef DECLARE_REGISTER_INFOS_MIPS64_STRUCT // Computes the offset of the given GPR in the user data area. @@ -32,7 +38,7 @@ (LLVM_EXTENSION offsetof(UserArea, msa) + \ LLVM_EXTENSION offsetof(MSA_linux_mips, regname)) -// RegisterKind: GCC, DWARF, Generic, GDB, LLDB +// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB // Note that the size and offset will be updated by platform-specific classes. #ifdef LINUX_MIPS64 @@ -64,161 +70,160 @@ static RegisterInfo g_register_infos_mips64[] = { - // General purpose registers. GCC, DWARF, Generic, GDB + // General purpose registers. EH_Frame, DWARF, Generic, Process Plugin #ifndef LINUX_MIPS64 - DEFINE_GPR(zero, "r0", gcc_dwarf_zero_mips64, gcc_dwarf_zero_mips64, LLDB_INVALID_REGNUM, gdb_zero_mips64), - DEFINE_GPR(r1, NULL, gcc_dwarf_r1_mips64, gcc_dwarf_r1_mips64, LLDB_INVALID_REGNUM, gdb_r1_mips64), - DEFINE_GPR(r2, NULL, gcc_dwarf_r2_mips64, gcc_dwarf_r2_mips64, LLDB_INVALID_REGNUM, gdb_r2_mips64), - DEFINE_GPR(r3, NULL, gcc_dwarf_r3_mips64, gcc_dwarf_r3_mips64, LLDB_INVALID_REGNUM, gdb_r3_mips64), - DEFINE_GPR(r4, NULL, gcc_dwarf_r4_mips64, gcc_dwarf_r4_mips64, LLDB_REGNUM_GENERIC_ARG1, gdb_r4_mips64), - DEFINE_GPR(r5, NULL, gcc_dwarf_r5_mips64, gcc_dwarf_r5_mips64, LLDB_REGNUM_GENERIC_ARG2, gdb_r5_mips64), - DEFINE_GPR(r6, NULL, gcc_dwarf_r6_mips64, gcc_dwarf_r6_mips64, LLDB_REGNUM_GENERIC_ARG3, gdb_r6_mips64), - DEFINE_GPR(r7, NULL, gcc_dwarf_r7_mips64, gcc_dwarf_r7_mips64, LLDB_REGNUM_GENERIC_ARG4, gdb_r7_mips64), - DEFINE_GPR(r8, NULL, gcc_dwarf_r8_mips64, gcc_dwarf_r8_mips64, LLDB_REGNUM_GENERIC_ARG5, gdb_r8_mips64), - DEFINE_GPR(r9, NULL, gcc_dwarf_r9_mips64, gcc_dwarf_r9_mips64, LLDB_REGNUM_GENERIC_ARG6, gdb_r9_mips64), - DEFINE_GPR(r10, NULL, gcc_dwarf_r10_mips64, gcc_dwarf_r10_mips64, LLDB_REGNUM_GENERIC_ARG7, gdb_r10_mips64), - DEFINE_GPR(r11, NULL, gcc_dwarf_r11_mips64, gcc_dwarf_r11_mips64, LLDB_REGNUM_GENERIC_ARG8, gdb_r11_mips64), - DEFINE_GPR(r12, NULL, gcc_dwarf_r12_mips64, gcc_dwarf_r12_mips64, LLDB_INVALID_REGNUM, gdb_r12_mips64), - DEFINE_GPR(r13, NULL, gcc_dwarf_r13_mips64, gcc_dwarf_r13_mips64, LLDB_INVALID_REGNUM, gdb_r13_mips64), - DEFINE_GPR(r14, NULL, gcc_dwarf_r14_mips64, gcc_dwarf_r14_mips64, LLDB_INVALID_REGNUM, gdb_r14_mips64), - DEFINE_GPR(r15, NULL, gcc_dwarf_r15_mips64, gcc_dwarf_r15_mips64, LLDB_INVALID_REGNUM, gdb_r15_mips64), - DEFINE_GPR(r16, NULL, gcc_dwarf_r16_mips64, gcc_dwarf_r16_mips64, LLDB_INVALID_REGNUM, gdb_r16_mips64), - DEFINE_GPR(r17, NULL, gcc_dwarf_r17_mips64, gcc_dwarf_r17_mips64, LLDB_INVALID_REGNUM, gdb_r17_mips64), - DEFINE_GPR(r18, NULL, gcc_dwarf_r18_mips64, gcc_dwarf_r18_mips64, LLDB_INVALID_REGNUM, gdb_r18_mips64), - DEFINE_GPR(r19, NULL, gcc_dwarf_r19_mips64, gcc_dwarf_r19_mips64, LLDB_INVALID_REGNUM, gdb_r19_mips64), - DEFINE_GPR(r20, NULL, gcc_dwarf_r20_mips64, gcc_dwarf_r20_mips64, LLDB_INVALID_REGNUM, gdb_r20_mips64), - DEFINE_GPR(r21, NULL, gcc_dwarf_r21_mips64, gcc_dwarf_r21_mips64, LLDB_INVALID_REGNUM, gdb_r21_mips64), - DEFINE_GPR(r22, NULL, gcc_dwarf_r22_mips64, gcc_dwarf_r22_mips64, LLDB_INVALID_REGNUM, gdb_r22_mips64), - DEFINE_GPR(r23, NULL, gcc_dwarf_r23_mips64, gcc_dwarf_r23_mips64, LLDB_INVALID_REGNUM, gdb_r23_mips64), - DEFINE_GPR(r24, NULL, gcc_dwarf_r24_mips64, gcc_dwarf_r24_mips64, LLDB_INVALID_REGNUM, gdb_r24_mips64), - DEFINE_GPR(r25, NULL, gcc_dwarf_r25_mips64, gcc_dwarf_r25_mips64, LLDB_INVALID_REGNUM, gdb_r25_mips64), - DEFINE_GPR(r26, NULL, gcc_dwarf_r26_mips64, gcc_dwarf_r26_mips64, LLDB_INVALID_REGNUM, gdb_r26_mips64), - DEFINE_GPR(r27, NULL, gcc_dwarf_r27_mips64, gcc_dwarf_r27_mips64, LLDB_INVALID_REGNUM, gdb_r27_mips64), - DEFINE_GPR(gp, "r28", gcc_dwarf_gp_mips64, gcc_dwarf_gp_mips64, LLDB_INVALID_REGNUM, gdb_gp_mips64), - DEFINE_GPR(sp, "r29", gcc_dwarf_sp_mips64, gcc_dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips64), - DEFINE_GPR(r30, NULL, gcc_dwarf_r30_mips64, gcc_dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips64), - DEFINE_GPR(ra, "r31", gcc_dwarf_ra_mips64, gcc_dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips64), - DEFINE_GPR(sr, NULL, gcc_dwarf_sr_mips64, gcc_dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), - DEFINE_GPR(mullo, NULL, gcc_dwarf_lo_mips64, gcc_dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(mulhi, NULL, gcc_dwarf_hi_mips64, gcc_dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(badvaddr, NULL, gcc_dwarf_bad_mips64, gcc_dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(cause, NULL, gcc_dwarf_cause_mips64, gcc_dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(pc, "pc", gcc_dwarf_pc_mips64, gcc_dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), - DEFINE_GPR(ic, NULL, gcc_dwarf_ic_mips64, gcc_dwarf_ic_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(dummy, NULL, gcc_dwarf_dummy_mips64, gcc_dwarf_dummy_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), + DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), + DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), + DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), + DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM), + DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM), + DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64, LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM), + DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64, LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM), + DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), + DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), + DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM), + DEFINE_GPR(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), + DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), + DEFINE_GPR(ic, nullptr, dwarf_ic_mips64, dwarf_ic_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(dummy, nullptr, dwarf_dummy_mips64, dwarf_dummy_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), #else - - DEFINE_GPR(zero, "r0", gcc_dwarf_zero_mips64, gcc_dwarf_zero_mips64, LLDB_INVALID_REGNUM, gdb_zero_mips64), - DEFINE_GPR(r1, NULL, gcc_dwarf_r1_mips64, gcc_dwarf_r1_mips64, LLDB_INVALID_REGNUM, gdb_r1_mips64), - DEFINE_GPR(r2, NULL, gcc_dwarf_r2_mips64, gcc_dwarf_r2_mips64, LLDB_INVALID_REGNUM, gdb_r2_mips64), - DEFINE_GPR(r3, NULL, gcc_dwarf_r3_mips64, gcc_dwarf_r3_mips64, LLDB_INVALID_REGNUM, gdb_r3_mips64), - DEFINE_GPR(r4, NULL, gcc_dwarf_r4_mips64, gcc_dwarf_r4_mips64, LLDB_REGNUM_GENERIC_ARG1, gdb_r4_mips64), - DEFINE_GPR(r5, NULL, gcc_dwarf_r5_mips64, gcc_dwarf_r5_mips64, LLDB_REGNUM_GENERIC_ARG2, gdb_r5_mips64), - DEFINE_GPR(r6, NULL, gcc_dwarf_r6_mips64, gcc_dwarf_r6_mips64, LLDB_REGNUM_GENERIC_ARG3, gdb_r6_mips64), - DEFINE_GPR(r7, NULL, gcc_dwarf_r7_mips64, gcc_dwarf_r7_mips64, LLDB_REGNUM_GENERIC_ARG4, gdb_r7_mips64), - DEFINE_GPR(r8, NULL, gcc_dwarf_r8_mips64, gcc_dwarf_r8_mips64, LLDB_REGNUM_GENERIC_ARG5, gdb_r8_mips64), - DEFINE_GPR(r9, NULL, gcc_dwarf_r9_mips64, gcc_dwarf_r9_mips64, LLDB_REGNUM_GENERIC_ARG6, gdb_r9_mips64), - DEFINE_GPR(r10, NULL, gcc_dwarf_r10_mips64, gcc_dwarf_r10_mips64, LLDB_REGNUM_GENERIC_ARG7, gdb_r10_mips64), - DEFINE_GPR(r11, NULL, gcc_dwarf_r11_mips64, gcc_dwarf_r11_mips64, LLDB_REGNUM_GENERIC_ARG8, gdb_r11_mips64), - DEFINE_GPR(r12, NULL, gcc_dwarf_r12_mips64, gcc_dwarf_r12_mips64, LLDB_INVALID_REGNUM, gdb_r12_mips64), - DEFINE_GPR(r13, NULL, gcc_dwarf_r13_mips64, gcc_dwarf_r13_mips64, LLDB_INVALID_REGNUM, gdb_r13_mips64), - DEFINE_GPR(r14, NULL, gcc_dwarf_r14_mips64, gcc_dwarf_r14_mips64, LLDB_INVALID_REGNUM, gdb_r14_mips64), - DEFINE_GPR(r15, NULL, gcc_dwarf_r15_mips64, gcc_dwarf_r15_mips64, LLDB_INVALID_REGNUM, gdb_r15_mips64), - DEFINE_GPR(r16, NULL, gcc_dwarf_r16_mips64, gcc_dwarf_r16_mips64, LLDB_INVALID_REGNUM, gdb_r16_mips64), - DEFINE_GPR(r17, NULL, gcc_dwarf_r17_mips64, gcc_dwarf_r17_mips64, LLDB_INVALID_REGNUM, gdb_r17_mips64), - DEFINE_GPR(r18, NULL, gcc_dwarf_r18_mips64, gcc_dwarf_r18_mips64, LLDB_INVALID_REGNUM, gdb_r18_mips64), - DEFINE_GPR(r19, NULL, gcc_dwarf_r19_mips64, gcc_dwarf_r19_mips64, LLDB_INVALID_REGNUM, gdb_r19_mips64), - DEFINE_GPR(r20, NULL, gcc_dwarf_r20_mips64, gcc_dwarf_r20_mips64, LLDB_INVALID_REGNUM, gdb_r20_mips64), - DEFINE_GPR(r21, NULL, gcc_dwarf_r21_mips64, gcc_dwarf_r21_mips64, LLDB_INVALID_REGNUM, gdb_r21_mips64), - DEFINE_GPR(r22, NULL, gcc_dwarf_r22_mips64, gcc_dwarf_r22_mips64, LLDB_INVALID_REGNUM, gdb_r22_mips64), - DEFINE_GPR(r23, NULL, gcc_dwarf_r23_mips64, gcc_dwarf_r23_mips64, LLDB_INVALID_REGNUM, gdb_r23_mips64), - DEFINE_GPR(r24, NULL, gcc_dwarf_r24_mips64, gcc_dwarf_r24_mips64, LLDB_INVALID_REGNUM, gdb_r24_mips64), - DEFINE_GPR(r25, NULL, gcc_dwarf_r25_mips64, gcc_dwarf_r25_mips64, LLDB_INVALID_REGNUM, gdb_r25_mips64), - DEFINE_GPR(r26, NULL, gcc_dwarf_r26_mips64, gcc_dwarf_r26_mips64, LLDB_INVALID_REGNUM, gdb_r26_mips64), - DEFINE_GPR(r27, NULL, gcc_dwarf_r27_mips64, gcc_dwarf_r27_mips64, LLDB_INVALID_REGNUM, gdb_r27_mips64), - DEFINE_GPR(gp, "r28", gcc_dwarf_gp_mips64, gcc_dwarf_gp_mips64, LLDB_INVALID_REGNUM, gdb_gp_mips64), - DEFINE_GPR(sp, "r29", gcc_dwarf_sp_mips64, gcc_dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips64), - DEFINE_GPR(r30, NULL, gcc_dwarf_r30_mips64, gcc_dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips64), - DEFINE_GPR(ra, "r31", gcc_dwarf_ra_mips64, gcc_dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips64), - DEFINE_GPR_INFO(sr, NULL, gcc_dwarf_sr_mips64, gcc_dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), - DEFINE_GPR(mullo, NULL, gcc_dwarf_lo_mips64, gcc_dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(mulhi, NULL, gcc_dwarf_hi_mips64, gcc_dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(badvaddr, NULL, gcc_dwarf_bad_mips64, gcc_dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR_INFO(cause, NULL, gcc_dwarf_cause_mips64, gcc_dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(pc, "pc", gcc_dwarf_pc_mips64, gcc_dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), - DEFINE_GPR_INFO(config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f0, NULL, gcc_dwarf_f0_mips64, gcc_dwarf_f0_mips64, LLDB_INVALID_REGNUM, gdb_f0_mips64), - DEFINE_FPR (f1, NULL, gcc_dwarf_f1_mips64, gcc_dwarf_f1_mips64, LLDB_INVALID_REGNUM, gdb_f1_mips64), - DEFINE_FPR (f2, NULL, gcc_dwarf_f2_mips64, gcc_dwarf_f2_mips64, LLDB_INVALID_REGNUM, gdb_f2_mips64), - DEFINE_FPR (f3, NULL, gcc_dwarf_f3_mips64, gcc_dwarf_f3_mips64, LLDB_INVALID_REGNUM, gdb_f3_mips64), - DEFINE_FPR (f4, NULL, gcc_dwarf_f4_mips64, gcc_dwarf_f4_mips64, LLDB_INVALID_REGNUM, gdb_f4_mips64), - DEFINE_FPR (f5, NULL, gcc_dwarf_f5_mips64, gcc_dwarf_f5_mips64, LLDB_INVALID_REGNUM, gdb_f5_mips64), - DEFINE_FPR (f6, NULL, gcc_dwarf_f6_mips64, gcc_dwarf_f6_mips64, LLDB_INVALID_REGNUM, gdb_f6_mips64), - DEFINE_FPR (f7, NULL, gcc_dwarf_f7_mips64, gcc_dwarf_f7_mips64, LLDB_INVALID_REGNUM, gdb_f7_mips64), - DEFINE_FPR (f8, NULL, gcc_dwarf_f8_mips64, gcc_dwarf_f8_mips64, LLDB_INVALID_REGNUM, gdb_f8_mips64), - DEFINE_FPR (f9, NULL, gcc_dwarf_f9_mips64, gcc_dwarf_f9_mips64, LLDB_INVALID_REGNUM, gdb_f9_mips64), - DEFINE_FPR (f10, NULL, gcc_dwarf_f10_mips64, gcc_dwarf_f10_mips64, LLDB_INVALID_REGNUM, gdb_f10_mips64), - DEFINE_FPR (f11, NULL, gcc_dwarf_f11_mips64, gcc_dwarf_f11_mips64, LLDB_INVALID_REGNUM, gdb_f11_mips64), - DEFINE_FPR (f12, NULL, gcc_dwarf_f12_mips64, gcc_dwarf_f12_mips64, LLDB_INVALID_REGNUM, gdb_f12_mips64), - DEFINE_FPR (f13, NULL, gcc_dwarf_f13_mips64, gcc_dwarf_f13_mips64, LLDB_INVALID_REGNUM, gdb_f13_mips64), - DEFINE_FPR (f14, NULL, gcc_dwarf_f14_mips64, gcc_dwarf_f14_mips64, LLDB_INVALID_REGNUM, gdb_f14_mips64), - DEFINE_FPR (f15, NULL, gcc_dwarf_f15_mips64, gcc_dwarf_f15_mips64, LLDB_INVALID_REGNUM, gdb_f15_mips64), - DEFINE_FPR (f16, NULL, gcc_dwarf_f16_mips64, gcc_dwarf_f16_mips64, LLDB_INVALID_REGNUM, gdb_f16_mips64), - DEFINE_FPR (f17, NULL, gcc_dwarf_f17_mips64, gcc_dwarf_f17_mips64, LLDB_INVALID_REGNUM, gdb_f17_mips64), - DEFINE_FPR (f18, NULL, gcc_dwarf_f18_mips64, gcc_dwarf_f18_mips64, LLDB_INVALID_REGNUM, gdb_f18_mips64), - DEFINE_FPR (f19, NULL, gcc_dwarf_f19_mips64, gcc_dwarf_f19_mips64, LLDB_INVALID_REGNUM, gdb_f19_mips64), - DEFINE_FPR (f20, NULL, gcc_dwarf_f20_mips64, gcc_dwarf_f20_mips64, LLDB_INVALID_REGNUM, gdb_f20_mips64), - DEFINE_FPR (f21, NULL, gcc_dwarf_f21_mips64, gcc_dwarf_f21_mips64, LLDB_INVALID_REGNUM, gdb_f21_mips64), - DEFINE_FPR (f22, NULL, gcc_dwarf_f22_mips64, gcc_dwarf_f22_mips64, LLDB_INVALID_REGNUM, gdb_f22_mips64), - DEFINE_FPR (f23, NULL, gcc_dwarf_f23_mips64, gcc_dwarf_f23_mips64, LLDB_INVALID_REGNUM, gdb_f23_mips64), - DEFINE_FPR (f24, NULL, gcc_dwarf_f24_mips64, gcc_dwarf_f24_mips64, LLDB_INVALID_REGNUM, gdb_f24_mips64), - DEFINE_FPR (f25, NULL, gcc_dwarf_f25_mips64, gcc_dwarf_f25_mips64, LLDB_INVALID_REGNUM, gdb_f25_mips64), - DEFINE_FPR (f26, NULL, gcc_dwarf_f26_mips64, gcc_dwarf_f26_mips64, LLDB_INVALID_REGNUM, gdb_f26_mips64), - DEFINE_FPR (f27, NULL, gcc_dwarf_f27_mips64, gcc_dwarf_f27_mips64, LLDB_INVALID_REGNUM, gdb_f27_mips64), - DEFINE_FPR (f28, NULL, gcc_dwarf_f28_mips64, gcc_dwarf_f28_mips64, LLDB_INVALID_REGNUM, gdb_f28_mips64), - DEFINE_FPR (f29, NULL, gcc_dwarf_f29_mips64, gcc_dwarf_f29_mips64, LLDB_INVALID_REGNUM, gdb_f29_mips64), - DEFINE_FPR (f30, NULL, gcc_dwarf_f30_mips64, gcc_dwarf_f30_mips64, LLDB_INVALID_REGNUM, gdb_f30_mips64), - DEFINE_FPR (f31, NULL, gcc_dwarf_f31_mips64, gcc_dwarf_f31_mips64, LLDB_INVALID_REGNUM, gdb_f31_mips64), - DEFINE_FPR (fcsr, NULL, gcc_dwarf_fcsr_mips64, gcc_dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, gdb_fcsr_mips64), - DEFINE_FPR (fir, NULL, gcc_dwarf_fir_mips64, gcc_dwarf_fir_mips64, LLDB_INVALID_REGNUM, gdb_fir_mips64), - DEFINE_FPR (config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, gdb_config5_mips64), - DEFINE_MSA (w0, NULL, gcc_dwarf_w0_mips64, gcc_dwarf_w0_mips64, LLDB_INVALID_REGNUM, gdb_w0_mips64), - DEFINE_MSA (w1, NULL, gcc_dwarf_w1_mips64, gcc_dwarf_w1_mips64, LLDB_INVALID_REGNUM, gdb_w1_mips64), - DEFINE_MSA (w2, NULL, gcc_dwarf_w2_mips64, gcc_dwarf_w2_mips64, LLDB_INVALID_REGNUM, gdb_w2_mips64), - DEFINE_MSA (w3, NULL, gcc_dwarf_w3_mips64, gcc_dwarf_w3_mips64, LLDB_INVALID_REGNUM, gdb_w3_mips64), - DEFINE_MSA (w4, NULL, gcc_dwarf_w4_mips64, gcc_dwarf_w4_mips64, LLDB_INVALID_REGNUM, gdb_w4_mips64), - DEFINE_MSA (w5, NULL, gcc_dwarf_w5_mips64, gcc_dwarf_w5_mips64, LLDB_INVALID_REGNUM, gdb_w5_mips64), - DEFINE_MSA (w6, NULL, gcc_dwarf_w6_mips64, gcc_dwarf_w6_mips64, LLDB_INVALID_REGNUM, gdb_w6_mips64), - DEFINE_MSA (w7, NULL, gcc_dwarf_w7_mips64, gcc_dwarf_w7_mips64, LLDB_INVALID_REGNUM, gdb_w7_mips64), - DEFINE_MSA (w8, NULL, gcc_dwarf_w8_mips64, gcc_dwarf_w8_mips64, LLDB_INVALID_REGNUM, gdb_w8_mips64), - DEFINE_MSA (w9, NULL, gcc_dwarf_w9_mips64, gcc_dwarf_w9_mips64, LLDB_INVALID_REGNUM, gdb_w9_mips64), - DEFINE_MSA (w10, NULL, gcc_dwarf_w10_mips64, gcc_dwarf_w10_mips64, LLDB_INVALID_REGNUM, gdb_w10_mips64), - DEFINE_MSA (w11, NULL, gcc_dwarf_w11_mips64, gcc_dwarf_w11_mips64, LLDB_INVALID_REGNUM, gdb_w11_mips64), - DEFINE_MSA (w12, NULL, gcc_dwarf_w12_mips64, gcc_dwarf_w12_mips64, LLDB_INVALID_REGNUM, gdb_w12_mips64), - DEFINE_MSA (w13, NULL, gcc_dwarf_w13_mips64, gcc_dwarf_w13_mips64, LLDB_INVALID_REGNUM, gdb_w13_mips64), - DEFINE_MSA (w14, NULL, gcc_dwarf_w14_mips64, gcc_dwarf_w14_mips64, LLDB_INVALID_REGNUM, gdb_w14_mips64), - DEFINE_MSA (w15, NULL, gcc_dwarf_w15_mips64, gcc_dwarf_w15_mips64, LLDB_INVALID_REGNUM, gdb_w15_mips64), - DEFINE_MSA (w16, NULL, gcc_dwarf_w16_mips64, gcc_dwarf_w16_mips64, LLDB_INVALID_REGNUM, gdb_w16_mips64), - DEFINE_MSA (w17, NULL, gcc_dwarf_w17_mips64, gcc_dwarf_w17_mips64, LLDB_INVALID_REGNUM, gdb_w17_mips64), - DEFINE_MSA (w18, NULL, gcc_dwarf_w18_mips64, gcc_dwarf_w18_mips64, LLDB_INVALID_REGNUM, gdb_w18_mips64), - DEFINE_MSA (w19, NULL, gcc_dwarf_w19_mips64, gcc_dwarf_w19_mips64, LLDB_INVALID_REGNUM, gdb_w19_mips64), - DEFINE_MSA (w20, NULL, gcc_dwarf_w10_mips64, gcc_dwarf_w20_mips64, LLDB_INVALID_REGNUM, gdb_w20_mips64), - DEFINE_MSA (w21, NULL, gcc_dwarf_w21_mips64, gcc_dwarf_w21_mips64, LLDB_INVALID_REGNUM, gdb_w21_mips64), - DEFINE_MSA (w22, NULL, gcc_dwarf_w22_mips64, gcc_dwarf_w22_mips64, LLDB_INVALID_REGNUM, gdb_w22_mips64), - DEFINE_MSA (w23, NULL, gcc_dwarf_w23_mips64, gcc_dwarf_w23_mips64, LLDB_INVALID_REGNUM, gdb_w23_mips64), - DEFINE_MSA (w24, NULL, gcc_dwarf_w24_mips64, gcc_dwarf_w24_mips64, LLDB_INVALID_REGNUM, gdb_w24_mips64), - DEFINE_MSA (w25, NULL, gcc_dwarf_w25_mips64, gcc_dwarf_w25_mips64, LLDB_INVALID_REGNUM, gdb_w25_mips64), - DEFINE_MSA (w26, NULL, gcc_dwarf_w26_mips64, gcc_dwarf_w26_mips64, LLDB_INVALID_REGNUM, gdb_w26_mips64), - DEFINE_MSA (w27, NULL, gcc_dwarf_w27_mips64, gcc_dwarf_w27_mips64, LLDB_INVALID_REGNUM, gdb_w27_mips64), - DEFINE_MSA (w28, NULL, gcc_dwarf_w28_mips64, gcc_dwarf_w28_mips64, LLDB_INVALID_REGNUM, gdb_w28_mips64), - DEFINE_MSA (w29, NULL, gcc_dwarf_w29_mips64, gcc_dwarf_w29_mips64, LLDB_INVALID_REGNUM, gdb_w29_mips64), - DEFINE_MSA (w30, NULL, gcc_dwarf_w30_mips64, gcc_dwarf_w30_mips64, LLDB_INVALID_REGNUM, gdb_w30_mips64), - DEFINE_MSA (w31, NULL, gcc_dwarf_w31_mips64, gcc_dwarf_w31_mips64, LLDB_INVALID_REGNUM, gdb_w31_mips64), - DEFINE_MSA_INFO (mcsr, NULL, gcc_dwarf_mcsr_mips64, gcc_dwarf_mcsr_mips64, LLDB_INVALID_REGNUM, gdb_mcsr_mips64), - DEFINE_MSA_INFO (mir, NULL, gcc_dwarf_mir_mips64, gcc_dwarf_mir_mips64, LLDB_INVALID_REGNUM, gdb_mir_mips64), - DEFINE_MSA_INFO (fcsr, NULL, gcc_dwarf_fcsr_mips64, gcc_dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, gdb_fcsr_mips64), - DEFINE_MSA_INFO (fir, NULL, gcc_dwarf_fir_mips64, gcc_dwarf_fir_mips64, LLDB_INVALID_REGNUM, gdb_fir_mips64), - DEFINE_MSA_INFO (config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, gdb_config5_mips64) + DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), + DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), + DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), + DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), + DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM), + DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM), + DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64, LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM), + DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64, LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM), + DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), + DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), + DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM), + DEFINE_GPR_INFO(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), + DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR_INFO(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), + DEFINE_GPR_INFO(config5, nullptr, dwarf_config5_mips64, dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f0, nullptr, dwarf_f0_mips64, dwarf_f0_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f1, nullptr, dwarf_f1_mips64, dwarf_f1_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f2, nullptr, dwarf_f2_mips64, dwarf_f2_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f3, nullptr, dwarf_f3_mips64, dwarf_f3_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f4, nullptr, dwarf_f4_mips64, dwarf_f4_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f5, nullptr, dwarf_f5_mips64, dwarf_f5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f6, nullptr, dwarf_f6_mips64, dwarf_f6_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f7, nullptr, dwarf_f7_mips64, dwarf_f7_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f8, nullptr, dwarf_f8_mips64, dwarf_f8_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f9, nullptr, dwarf_f9_mips64, dwarf_f9_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f10, nullptr, dwarf_f10_mips64, dwarf_f10_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f11, nullptr, dwarf_f11_mips64, dwarf_f11_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f12, nullptr, dwarf_f12_mips64, dwarf_f12_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f13, nullptr, dwarf_f13_mips64, dwarf_f13_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f14, nullptr, dwarf_f14_mips64, dwarf_f14_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f15, nullptr, dwarf_f15_mips64, dwarf_f15_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f16, nullptr, dwarf_f16_mips64, dwarf_f16_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f17, nullptr, dwarf_f17_mips64, dwarf_f17_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f18, nullptr, dwarf_f18_mips64, dwarf_f18_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f19, nullptr, dwarf_f19_mips64, dwarf_f19_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f20, nullptr, dwarf_f20_mips64, dwarf_f20_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f21, nullptr, dwarf_f21_mips64, dwarf_f21_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f22, nullptr, dwarf_f22_mips64, dwarf_f22_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f23, nullptr, dwarf_f23_mips64, dwarf_f23_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f24, nullptr, dwarf_f24_mips64, dwarf_f24_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f25, nullptr, dwarf_f25_mips64, dwarf_f25_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f26, nullptr, dwarf_f26_mips64, dwarf_f26_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f27, nullptr, dwarf_f27_mips64, dwarf_f27_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f28, nullptr, dwarf_f28_mips64, dwarf_f28_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f29, nullptr, dwarf_f29_mips64, dwarf_f29_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f30, nullptr, dwarf_f30_mips64, dwarf_f30_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f31, nullptr, dwarf_f31_mips64, dwarf_f31_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (config5, nullptr, dwarf_config5_mips64, dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w0, nullptr, dwarf_w0_mips64, dwarf_w0_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w1, nullptr, dwarf_w1_mips64, dwarf_w1_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w2, nullptr, dwarf_w2_mips64, dwarf_w2_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w3, nullptr, dwarf_w3_mips64, dwarf_w3_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w4, nullptr, dwarf_w4_mips64, dwarf_w4_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w5, nullptr, dwarf_w5_mips64, dwarf_w5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w6, nullptr, dwarf_w6_mips64, dwarf_w6_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w7, nullptr, dwarf_w7_mips64, dwarf_w7_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w8, nullptr, dwarf_w8_mips64, dwarf_w8_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w9, nullptr, dwarf_w9_mips64, dwarf_w9_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w10, nullptr, dwarf_w10_mips64, dwarf_w10_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w11, nullptr, dwarf_w11_mips64, dwarf_w11_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w12, nullptr, dwarf_w12_mips64, dwarf_w12_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w13, nullptr, dwarf_w13_mips64, dwarf_w13_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w14, nullptr, dwarf_w14_mips64, dwarf_w14_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w15, nullptr, dwarf_w15_mips64, dwarf_w15_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w16, nullptr, dwarf_w16_mips64, dwarf_w16_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w17, nullptr, dwarf_w17_mips64, dwarf_w17_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w18, nullptr, dwarf_w18_mips64, dwarf_w18_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w19, nullptr, dwarf_w19_mips64, dwarf_w19_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w20, nullptr, dwarf_w10_mips64, dwarf_w20_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w21, nullptr, dwarf_w21_mips64, dwarf_w21_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w22, nullptr, dwarf_w22_mips64, dwarf_w22_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w23, nullptr, dwarf_w23_mips64, dwarf_w23_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w24, nullptr, dwarf_w24_mips64, dwarf_w24_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w25, nullptr, dwarf_w25_mips64, dwarf_w25_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w26, nullptr, dwarf_w26_mips64, dwarf_w26_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w27, nullptr, dwarf_w27_mips64, dwarf_w27_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w28, nullptr, dwarf_w28_mips64, dwarf_w28_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w29, nullptr, dwarf_w29_mips64, dwarf_w29_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w30, nullptr, dwarf_w30_mips64, dwarf_w30_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA (w31, nullptr, dwarf_w31_mips64, dwarf_w31_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (mcsr, nullptr, dwarf_mcsr_mips64, dwarf_mcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (mir, nullptr, dwarf_mir_mips64, dwarf_mir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_MSA_INFO (config5, nullptr, dwarf_config5_mips64, dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM) #endif }; diff --git a/source/Plugins/Process/Utility/RegisterInfos_powerpc.h b/source/Plugins/Process/Utility/RegisterInfos_powerpc.h index fe145e9..95347ae 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_powerpc.h +++ b/source/Plugins/Process/Utility/RegisterInfos_powerpc.h @@ -24,15 +24,15 @@ // Note that the size and offset will be updated by platform-specific classes. #define DEFINE_GPR(reg, alt, lldb_kind) \ { #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, \ - eFormatHex, { gcc_dwarf_##reg##_powerpc, gcc_dwarf_##reg##_powerpc, lldb_kind, gdb_##reg##_powerpc, gpr_##reg##_powerpc }, NULL, NULL } + eFormatHex, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, gpr_##reg##_powerpc }, NULL, NULL } #define DEFINE_FPR(reg, lldb_kind) \ { #reg, NULL, 8, FPR_OFFSET(reg), eEncodingIEEE754, \ - eFormatFloat, { gcc_dwarf_##reg##_powerpc, gcc_dwarf_##reg##_powerpc, lldb_kind, gdb_##reg##_powerpc, fpr_##reg##_powerpc }, NULL, NULL } + eFormatFloat, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, fpr_##reg##_powerpc }, NULL, NULL } #define DEFINE_VMX(reg, lldb_kind) \ { #reg, NULL, 16, VMX_OFFSET(reg), eEncodingVector, \ - eFormatVectorOfUInt32, { gcc_dwarf_##reg##_powerpc, gcc_dwarf_##reg##_powerpc, lldb_kind, gdb_##reg##_powerpc, vmx_##reg##_powerpc }, NULL, NULL } + eFormatVectorOfUInt32, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, vmx_##reg##_powerpc }, NULL, NULL } - // General purpose registers. GCC, DWARF, Generic, GDB + // General purpose registers. EH_Frame, DWARF, Generic, Process Plugin #define POWERPC_REGS \ DEFINE_GPR(r0, NULL, LLDB_INVALID_REGNUM), \ DEFINE_GPR(r1, "sp", LLDB_REGNUM_GENERIC_SP), \ @@ -103,7 +103,7 @@ DEFINE_FPR(f29, LLDB_INVALID_REGNUM), \ DEFINE_FPR(f30, LLDB_INVALID_REGNUM), \ DEFINE_FPR(f31, LLDB_INVALID_REGNUM), \ - { "fpscr", NULL, 8, FPR_OFFSET(fpscr), eEncodingUint, eFormatHex, { gcc_dwarf_fpscr_powerpc, gcc_dwarf_fpscr_powerpc, LLDB_INVALID_REGNUM, gdb_fpscr_powerpc, fpr_fpscr_powerpc }, NULL, NULL }, \ + { "fpscr", NULL, 8, FPR_OFFSET(fpscr), eEncodingUint, eFormatHex, { dwarf_fpscr_powerpc, dwarf_fpscr_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fpr_fpscr_powerpc }, NULL, NULL }, \ DEFINE_VMX(v0, LLDB_INVALID_REGNUM), \ DEFINE_VMX(v1, LLDB_INVALID_REGNUM), \ DEFINE_VMX(v2, LLDB_INVALID_REGNUM), \ @@ -136,8 +136,8 @@ DEFINE_VMX(v29, LLDB_INVALID_REGNUM), \ DEFINE_VMX(v30, LLDB_INVALID_REGNUM), \ DEFINE_VMX(v31, LLDB_INVALID_REGNUM), \ - { "vrsave", NULL, 4, VMX_OFFSET(vrsave), eEncodingUint, eFormatHex, { gcc_dwarf_vrsave_powerpc, gcc_dwarf_vrsave_powerpc, LLDB_INVALID_REGNUM, gdb_vrsave_powerpc, vmx_vrsave_powerpc }, NULL, NULL }, \ - { "vscr", NULL, 4, VMX_OFFSET(vscr), eEncodingUint, eFormatHex, { gcc_dwarf_vscr_powerpc, gcc_dwarf_vscr_powerpc, LLDB_INVALID_REGNUM, gdb_vscr_powerpc, vmx_vscr_powerpc }, NULL, NULL }, + { "vrsave", NULL, 4, VMX_OFFSET(vrsave), eEncodingUint, eFormatHex, { dwarf_vrsave_powerpc, dwarf_vrsave_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vrsave_powerpc }, NULL, NULL }, \ + { "vscr", NULL, 4, VMX_OFFSET(vscr), eEncodingUint, eFormatHex, { dwarf_vscr_powerpc, dwarf_vscr_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_powerpc }, NULL, NULL }, static RegisterInfo g_register_infos_powerpc64[] = diff --git a/source/Plugins/Process/Utility/RegisterInfos_x86_64.h b/source/Plugins/Process/Utility/RegisterInfos_x86_64.h index 5da74ff..a393089 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_x86_64.h +++ b/source/Plugins/Process/Utility/RegisterInfos_x86_64.h @@ -1,15 +1,21 @@ -//===-- RegisterInfos_x86_64.h ---------------------------------*- C++ -*-===// +//===-- RegisterInfos_x86_64.h ----------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===---------------------------------------------------------------------===// -#include "llvm/Support/Compiler.h" +//===----------------------------------------------------------------------===// +// C Includes #include <stddef.h> +// C++ Includes +// Other libraries and framework includes +#include "llvm/Support/Compiler.h" + +// Project includes + // Computes the offset of the given GPR in the user data area. #define GPR_OFFSET(regname) \ (LLVM_EXTENSION offsetof(GPR, regname)) @@ -44,7 +50,7 @@ #define DR_SIZE sizeof(((DBG*)NULL)->dr[0]) -// RegisterKind: GCC, DWARF, Generic, GDB, LLDB +// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB // Note that the size and offset will be updated by platform-specific classes. #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ @@ -58,25 +64,25 @@ #define DEFINE_FP_ST(reg, i) \ { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ eEncodingVector, eFormatVectorOfUInt8, \ - { gcc_dwarf_st##i##_x86_64, gcc_dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, gdb_st##i##_x86_64, lldb_st##i##_x86_64 }, \ + { dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \ NULL, NULL } #define DEFINE_FP_MM(reg, i) \ { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ eEncodingUint, eFormatHex, \ - { gcc_dwarf_mm##i##_x86_64, gcc_dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, gdb_st##i##_x86_64, lldb_mm##i##_x86_64 }, \ + { dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \ NULL, NULL } #define DEFINE_XMM(reg, i) \ { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \ eEncodingVector, eFormatVectorOfUInt8, \ - { gcc_dwarf_##reg##i##_x86_64, gcc_dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, gdb_##reg##i##_x86_64, lldb_##reg##i##_x86_64}, \ + { dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64}, \ NULL, NULL } #define DEFINE_YMM(reg, i) \ { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i), \ eEncodingVector, eFormatVectorOfUInt8, \ - { gcc_dwarf_##reg##i##h_x86_64, gcc_dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, gdb_##reg##i##h_x86_64, lldb_##reg##i##_x86_64 }, \ + { dwarf_##reg##i##h_x86_64, dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64 }, \ NULL, NULL } #define DEFINE_DR(reg, i) \ @@ -100,31 +106,31 @@ static RegisterInfo g_register_infos_x86_64[] = { - // General purpose registers. GCC, DWARF, Generic, GDB - DEFINE_GPR(rax, NULL, gcc_dwarf_rax_x86_64, gcc_dwarf_rax_x86_64, LLDB_INVALID_REGNUM, gdb_rax_x86_64), - DEFINE_GPR(rbx, NULL, gcc_dwarf_rbx_x86_64, gcc_dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, gdb_rbx_x86_64), - DEFINE_GPR(rcx, "arg4", gcc_dwarf_rcx_x86_64, gcc_dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, gdb_rcx_x86_64), - DEFINE_GPR(rdx, "arg3", gcc_dwarf_rdx_x86_64, gcc_dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, gdb_rdx_x86_64), - DEFINE_GPR(rdi, "arg1", gcc_dwarf_rdi_x86_64, gcc_dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, gdb_rdi_x86_64), - DEFINE_GPR(rsi, "arg2", gcc_dwarf_rsi_x86_64, gcc_dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, gdb_rsi_x86_64), - DEFINE_GPR(rbp, "fp", gcc_dwarf_rbp_x86_64, gcc_dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, gdb_rbp_x86_64), - DEFINE_GPR(rsp, "sp", gcc_dwarf_rsp_x86_64, gcc_dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, gdb_rsp_x86_64), - DEFINE_GPR(r8, "arg5", gcc_dwarf_r8_x86_64, gcc_dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, gdb_r8_x86_64), - DEFINE_GPR(r9, "arg6", gcc_dwarf_r9_x86_64, gcc_dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, gdb_r9_x86_64), - DEFINE_GPR(r10, NULL, gcc_dwarf_r10_x86_64, gcc_dwarf_r10_x86_64, LLDB_INVALID_REGNUM, gdb_r10_x86_64), - DEFINE_GPR(r11, NULL, gcc_dwarf_r11_x86_64, gcc_dwarf_r11_x86_64, LLDB_INVALID_REGNUM, gdb_r11_x86_64), - DEFINE_GPR(r12, NULL, gcc_dwarf_r12_x86_64, gcc_dwarf_r12_x86_64, LLDB_INVALID_REGNUM, gdb_r12_x86_64), - DEFINE_GPR(r13, NULL, gcc_dwarf_r13_x86_64, gcc_dwarf_r13_x86_64, LLDB_INVALID_REGNUM, gdb_r13_x86_64), - DEFINE_GPR(r14, NULL, gcc_dwarf_r14_x86_64, gcc_dwarf_r14_x86_64, LLDB_INVALID_REGNUM, gdb_r14_x86_64), - DEFINE_GPR(r15, NULL, gcc_dwarf_r15_x86_64, gcc_dwarf_r15_x86_64, LLDB_INVALID_REGNUM, gdb_r15_x86_64), - DEFINE_GPR(rip, "pc", gcc_dwarf_rip_x86_64, gcc_dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, gdb_rip_x86_64), - DEFINE_GPR(rflags, "flags", gcc_dwarf_rflags_x86_64, gcc_dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, gdb_rflags_x86_64), - DEFINE_GPR(cs, NULL, gcc_dwarf_cs_x86_64, gcc_dwarf_cs_x86_64, LLDB_INVALID_REGNUM, gdb_cs_x86_64), - DEFINE_GPR(fs, NULL, gcc_dwarf_fs_x86_64, gcc_dwarf_fs_x86_64, LLDB_INVALID_REGNUM, gdb_fs_x86_64), - DEFINE_GPR(gs, NULL, gcc_dwarf_gs_x86_64, gcc_dwarf_gs_x86_64, LLDB_INVALID_REGNUM, gdb_gs_x86_64), - DEFINE_GPR(ss, NULL, gcc_dwarf_ss_x86_64, gcc_dwarf_ss_x86_64, LLDB_INVALID_REGNUM, gdb_ss_x86_64), - DEFINE_GPR(ds, NULL, gcc_dwarf_ds_x86_64, gcc_dwarf_ds_x86_64, LLDB_INVALID_REGNUM, gdb_ds_x86_64), - DEFINE_GPR(es, NULL, gcc_dwarf_es_x86_64, gcc_dwarf_es_x86_64, LLDB_INVALID_REGNUM, gdb_es_x86_64), + // General purpose registers. EH_Frame, DWARF, Generic, Process Plugin + DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), + DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), + DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), + DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), + DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), + DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), + DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM), + DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM), + DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), + DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), + DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx), @@ -179,16 +185,16 @@ g_register_infos_x86_64[] = DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15), - // i387 Floating point registers. GCC, DWARF, Generic, GDB - DEFINE_FPR(fctrl, fctrl, gcc_dwarf_fctrl_x86_64, gcc_dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, gdb_fctrl_x86_64), - DEFINE_FPR(fstat, fstat, gcc_dwarf_fstat_x86_64, gcc_dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, gdb_fstat_x86_64), - DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_ftag_x86_64), - DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fop_x86_64), - DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fiseg_x86_64), - DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fioff_x86_64), - DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_foseg_x86_64), - DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gdb_fooff_x86_64), - DEFINE_FPR(mxcsr, mxcsr, gcc_dwarf_mxcsr_x86_64, gcc_dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, gdb_mxcsr_x86_64), + // i387 Floating point registers. EH_frame, DWARF, Generic, Process Plugin + DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), // FP registers. @@ -255,6 +261,7 @@ g_register_infos_x86_64[] = DEFINE_DR(dr, 6), DEFINE_DR(dr, 7) }; + static_assert((sizeof(g_register_infos_x86_64) / sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64, "g_register_infos_x86_64 has wrong number of register infos"); @@ -275,7 +282,6 @@ static_assert((sizeof(g_register_infos_x86_64) / sizeof(g_register_infos_x86_64[ #endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT - #ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS #define UPDATE_GPR_INFO(reg, reg64) \ diff --git a/source/Plugins/Process/Utility/StopInfoMachException.cpp b/source/Plugins/Process/Utility/StopInfoMachException.cpp index 7c68d0d..3bf766e 100644 --- a/source/Plugins/Process/Utility/StopInfoMachException.cpp +++ b/source/Plugins/Process/Utility/StopInfoMachException.cpp @@ -58,6 +58,7 @@ StopInfoMachException::GetDescription () } break; case llvm::Triple::arm: + case llvm::Triple::thumb: switch (m_exc_code) { case 0x101: code_desc = "EXC_ARM_DA_ALIGN"; break; @@ -104,6 +105,7 @@ StopInfoMachException::GetDescription () break; case llvm::Triple::arm: + case llvm::Triple::thumb: if (m_exc_code == 1) code_desc = "EXC_ARM_UNDEFINED"; break; @@ -188,6 +190,7 @@ StopInfoMachException::GetDescription () break; case llvm::Triple::arm: + case llvm::Triple::thumb: switch (m_exc_code) { case 0x101: code_desc = "EXC_ARM_DA_ALIGN"; break; @@ -408,6 +411,7 @@ StopInfoMachException::CreateStopReasonWithMachException break; case llvm::Triple::arm: + case llvm::Triple::thumb: if (exc_code == 0x102) // EXC_ARM_DA_DEBUG { // It's a watchpoint, then, if the exc_sub_code indicates a known/enabled diff --git a/source/Plugins/Process/Utility/StopInfoMachException.h b/source/Plugins/Process/Utility/StopInfoMachException.h index 130ee0b..25e05ec 100644 --- a/source/Plugins/Process/Utility/StopInfoMachException.h +++ b/source/Plugins/Process/Utility/StopInfoMachException.h @@ -38,19 +38,16 @@ public: { } - virtual ~StopInfoMachException() - { - } + ~StopInfoMachException() override = default; - - virtual lldb::StopReason - GetStopReason () const + lldb::StopReason + GetStopReason() const override { return lldb::eStopReasonException; } - virtual const char * - GetDescription (); + const char * + GetDescription() override; // Since some mach exceptions will be reported as breakpoints, signals, // or trace, we use this static accessor which will translate the mach @@ -71,7 +68,6 @@ protected: uint64_t m_exc_subcode; }; - } // namespace lldb_private -#endif // liblldb_StopInfoMachException_h_ +#endif // liblldb_StopInfoMachException_h_ diff --git a/source/Plugins/Process/Utility/ThreadMemory.h b/source/Plugins/Process/Utility/ThreadMemory.h index 07eb45d..1e7cbfa 100644 --- a/source/Plugins/Process/Utility/ThreadMemory.h +++ b/source/Plugins/Process/Utility/ThreadMemory.h @@ -1,4 +1,4 @@ -//===-- ThreadMemory.h -----------------------------------------*- C++ -*-===// +//===-- ThreadMemory.h ------------------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -10,13 +10,18 @@ #ifndef liblldb_ThreadMemory_h_ #define liblldb_ThreadMemory_h_ +// C Includes +// C++ Includes +#include <string> + +// Other libraries and framework includes +// Project includes #include "lldb/Target/Thread.h" class ThreadMemory : public lldb_private::Thread { public: - ThreadMemory (lldb_private::Process &process, lldb::tid_t tid, const lldb::ValueObjectSP &thread_info_valobj_sp); @@ -27,69 +32,65 @@ public: const char *queue, lldb::addr_t register_data_addr); - virtual - ~ThreadMemory(); + ~ThreadMemory() override; - //------------------------------------------------------------------ - // lldb_private::Thread methods - //------------------------------------------------------------------ - virtual lldb::RegisterContextSP - GetRegisterContext (); + lldb::RegisterContextSP + GetRegisterContext() override; - virtual lldb::RegisterContextSP - CreateRegisterContextForFrame (lldb_private::StackFrame *frame); + lldb::RegisterContextSP + CreateRegisterContextForFrame(lldb_private::StackFrame *frame) override; - virtual bool - CalculateStopInfo (); + bool + CalculateStopInfo() override; - virtual const char * - GetInfo () + const char * + GetInfo() override { if (m_backing_thread_sp) m_backing_thread_sp->GetInfo(); - return NULL; + return nullptr; } - virtual const char * - GetName () + const char * + GetName() override { if (!m_name.empty()) return m_name.c_str(); if (m_backing_thread_sp) m_backing_thread_sp->GetName(); - return NULL; + return nullptr; } - virtual const char * - GetQueueName () + const char * + GetQueueName() override { if (!m_queue.empty()) return m_queue.c_str(); if (m_backing_thread_sp) m_backing_thread_sp->GetQueueName(); - return NULL; + return nullptr; } - virtual void - WillResume (lldb::StateType resume_state); + void + WillResume(lldb::StateType resume_state) override; - virtual void - DidResume () + void + DidResume() override { if (m_backing_thread_sp) m_backing_thread_sp->DidResume(); } - virtual lldb::user_id_t - GetProtocolID () const + lldb::user_id_t + GetProtocolID() const override { if (m_backing_thread_sp) return m_backing_thread_sp->GetProtocolID(); return Thread::GetProtocolID(); } - virtual void - RefreshStateAfterStop(); + void + RefreshStateAfterStop() override; lldb::ValueObjectSP & GetValueObject () @@ -97,41 +98,36 @@ public: return m_thread_info_valobj_sp; } - virtual void - ClearStackFrames (); + void + ClearStackFrames() override; - virtual void - ClearBackingThread () + void + ClearBackingThread() override { m_backing_thread_sp.reset(); } - virtual bool - SetBackingThread (const lldb::ThreadSP &thread_sp) + bool + SetBackingThread(const lldb::ThreadSP &thread_sp) override { //printf ("Thread 0x%llx is being backed by thread 0x%llx\n", GetID(), thread_sp->GetID()); m_backing_thread_sp = thread_sp; return (bool)thread_sp; } - virtual lldb::ThreadSP - GetBackingThread () const + lldb::ThreadSP + GetBackingThread() const override { return m_backing_thread_sp; } protected: - - virtual bool - IsOperatingSystemPluginThread () const + bool + IsOperatingSystemPluginThread() const override { return true; } - - //------------------------------------------------------------------ - // For ThreadMemory and subclasses - //------------------------------------------------------------------ // If this memory thread is actually represented by a thread from the // lldb_private::Process subclass, then fill in the thread here and // all APIs will be routed through this thread object. If m_backing_thread_sp @@ -142,11 +138,9 @@ protected: std::string m_name; std::string m_queue; lldb::addr_t m_register_data_addr; + private: - //------------------------------------------------------------------ - // For ThreadMemory only - //------------------------------------------------------------------ DISALLOW_COPY_AND_ASSIGN (ThreadMemory); }; -#endif // liblldb_ThreadMemory_h_ +#endif // liblldb_ThreadMemory_h_ diff --git a/source/Plugins/Process/Utility/UnwindLLDB.cpp b/source/Plugins/Process/Utility/UnwindLLDB.cpp index 1cdae90..9be09c4 100644 --- a/source/Plugins/Process/Utility/UnwindLLDB.cpp +++ b/source/Plugins/Process/Utility/UnwindLLDB.cpp @@ -86,6 +86,9 @@ UnwindLLDB::AddFirstFrame () if (m_frames.size() > 0) return true; + ProcessSP process_sp (m_thread.GetProcess()); + ABI *abi = process_sp ? process_sp->GetABI().get() : NULL; + // First, set up the 0th (initial) frame CursorSP first_cursor_sp(new Cursor ()); RegisterContextLLDBSP reg_ctx_sp (new RegisterContextLLDB (m_thread, @@ -108,6 +111,10 @@ UnwindLLDB::AddFirstFrame () // cursor own it in its shared pointer first_cursor_sp->reg_ctx_lldb_sp = reg_ctx_sp; m_frames.push_back (first_cursor_sp); + + // Update the Full Unwind Plan for this frame if not valid + UpdateUnwindPlanForFirstFrameIfInvalid(abi); + return true; unwind_done: @@ -161,7 +168,14 @@ UnwindLLDB::GetOneMoreFrame (ABI* abi) // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to that and return // true. Subsequent calls to TryFallbackUnwindPlan() will return false. if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) + { + // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of + // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it. + if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa))) + return nullptr; + return GetOneMoreFrame (abi); + } if (log) log->Printf ("%*sFrame %d did not get a RegisterContext, stopping.", @@ -175,7 +189,14 @@ UnwindLLDB::GetOneMoreFrame (ABI* abi) // See if the regctx below this on the stack has a fallback unwind plan it can use. // Subsequent calls to TryFallbackUnwindPlan() will return false. if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) + { + // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of + // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it. + if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa))) + return nullptr; + return GetOneMoreFrame (abi); + } if (log) log->Printf("%*sFrame %d invalid RegisterContext for this frame, stopping stack walk", @@ -187,7 +208,14 @@ UnwindLLDB::GetOneMoreFrame (ABI* abi) // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to that and return // true. Subsequent calls to TryFallbackUnwindPlan() will return false. if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) + { + // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of + // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it. + if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa))) + return nullptr; + return GetOneMoreFrame (abi); + } if (log) log->Printf("%*sFrame %d did not get CFA for this frame, stopping stack walk", @@ -212,7 +240,14 @@ UnwindLLDB::GetOneMoreFrame (ABI* abi) || abi->CallFrameAddressIsValid(cursor_sp->cfa) == false) { if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) + { + // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of + // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it. + if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa))) + return nullptr; + return GetOneMoreFrame (abi); + } if (log) log->Printf("%*sFrame %d did not get a valid CFA for this frame, stopping stack walk", @@ -232,7 +267,14 @@ UnwindLLDB::GetOneMoreFrame (ABI* abi) // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to that and return // true. Subsequent calls to TryFallbackUnwindPlan() will return false. if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) + { + // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of + // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it. + if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa))) + return nullptr; + return GetOneMoreFrame (abi); + } if (log) log->Printf("%*sFrame %d did not get PC for this frame, stopping stack walk", @@ -244,7 +286,14 @@ UnwindLLDB::GetOneMoreFrame (ABI* abi) // If the RegisterContextLLDB has a fallback UnwindPlan, it will switch to that and return // true. Subsequent calls to TryFallbackUnwindPlan() will return false. if (prev_frame->reg_ctx_lldb_sp->TryFallbackUnwindPlan()) + { + // TryFallbackUnwindPlan for prev_frame succeeded and updated reg_ctx_lldb_sp field of + // prev_frame. However, cfa field of prev_frame still needs to be updated. Hence updating it. + if ( !(prev_frame->reg_ctx_lldb_sp->GetCFA(prev_frame->cfa))) + return nullptr; + return GetOneMoreFrame (abi); + } if (log) log->Printf("%*sFrame %d did not get a valid PC, stopping stack walk", @@ -263,6 +312,33 @@ UnwindLLDB::GetOneMoreFrame (ABI* abi) return cursor_sp; } +void +UnwindLLDB::UpdateUnwindPlanForFirstFrameIfInvalid (ABI *abi) +{ + // This function is called for First Frame only. + assert (m_frames.size() == 1 && "No. of cursor frames are not 1"); + + bool old_m_unwind_complete = m_unwind_complete; + CursorSP old_m_candidate_frame = m_candidate_frame; + + // Try to unwind 2 more frames using the Unwinder. It uses Full UnwindPlan + // and if Full UnwindPlan fails, then uses FallBack UnwindPlan. Also + // update the cfa of Frame 0 (if required). + AddOneMoreFrame(abi); + + // Remove all the frames added by above function as the purpose of + // using above function was just to check whether Unwinder of Frame 0 + // works or not. + for(uint32_t i=1; i<m_frames.size(); i++) + m_frames.pop_back(); + + // Restore status after calling AddOneMoreFrame + m_unwind_complete = old_m_unwind_complete; + m_candidate_frame = old_m_candidate_frame; + return; +} + + bool UnwindLLDB::AddOneMoreFrame (ABI *abi) { @@ -321,9 +397,17 @@ UnwindLLDB::AddOneMoreFrame (ABI *abi) m_frames.push_back(new_frame_v2); m_candidate_frame = GetOneMoreFrame(abi); if (m_candidate_frame) + { + // If control reached here then TryFallbackUnwindPlan had succeeded for Cursor::m_frames[m_frames.size() - 2]. + // It also succeeded to Unwind next 2 frames i.e. m_frames[m_frames.size() - 1] and a frame after that. + // For Cursor::m_frames[m_frames.size() - 2], reg_ctx_lldb_sp field was already updated during TryFallbackUnwindPlan + // call above. However, cfa field still needs to be updated. Hence updating it here and then returning. + if ( !(m_frames[m_frames.size() - 2]->reg_ctx_lldb_sp->GetCFA(m_frames[m_frames.size() - 2]->cfa))) + return false; return true; + } - // The new frame isn't helped in unwinding. Fall back to the original one as the default unwind + // The new frame hasn't helped in unwinding. Fall back to the original one as the default unwind // plan is usually more reliable then the fallback one. m_frames.pop_back(); m_frames.push_back(new_frame); diff --git a/source/Plugins/Process/Utility/UnwindLLDB.h b/source/Plugins/Process/Utility/UnwindLLDB.h index ce897cd..d3c0707 100644 --- a/source/Plugins/Process/Utility/UnwindLLDB.h +++ b/source/Plugins/Process/Utility/UnwindLLDB.h @@ -10,8 +10,12 @@ #ifndef lldb_UnwindLLDB_h_ #define lldb_UnwindLLDB_h_ +// C Includes +// C++ Includes #include <vector> +// Other libraries and framework includes +// Project includes #include "lldb/lldb-public.h" #include "lldb/Core/ConstString.h" #include "lldb/Symbol/FuncUnwinders.h" @@ -27,9 +31,8 @@ class UnwindLLDB : public lldb_private::Unwind { public: UnwindLLDB (lldb_private::Thread &thread); - - virtual - ~UnwindLLDB() { } + + ~UnwindLLDB() override = default; enum RegisterSearchResult { @@ -62,23 +65,23 @@ protected: }; void - DoClear() + DoClear() override { m_frames.clear(); m_candidate_frame.reset(); m_unwind_complete = false; } - virtual uint32_t - DoGetFrameCount(); + uint32_t + DoGetFrameCount() override; bool - DoGetFrameInfoAtIndex (uint32_t frame_idx, - lldb::addr_t& cfa, - lldb::addr_t& start_pc); + DoGetFrameInfoAtIndex(uint32_t frame_idx, + lldb::addr_t& cfa, + lldb::addr_t& start_pc) override; lldb::RegisterContextSP - DoCreateRegisterContextForFrame (lldb_private::StackFrame *frame); + DoCreateRegisterContextForFrame(lldb_private::StackFrame *frame) override; typedef std::shared_ptr<RegisterContextLLDB> RegisterContextLLDBSP; @@ -112,7 +115,6 @@ protected: } private: - struct Cursor { lldb::addr_t start_pc; // The start address of the function/symbol for this frame - current pc if unknown @@ -134,6 +136,15 @@ private: std::vector<ConstString> m_user_supplied_trap_handler_functions; + //----------------------------------------------------------------- + // Check if Full UnwindPlan of First frame is valid or not. + // If not then try Fallback UnwindPlan of the frame. If Fallback + // UnwindPlan succeeds then update the Full UnwindPlan with the + // Fallback UnwindPlan. + //----------------------------------------------------------------- + void + UpdateUnwindPlanForFirstFrameIfInvalid (ABI* abi); + CursorSP GetOneMoreFrame (ABI* abi); @@ -149,6 +160,6 @@ private: DISALLOW_COPY_AND_ASSIGN (UnwindLLDB); }; -} // namespace lldb_private +} // namespace lldb_private -#endif // lldb_UnwindLLDB_h_ +#endif // lldb_UnwindLLDB_h_ diff --git a/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h b/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h index 2695376..f195514 100644 --- a/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h +++ b/source/Plugins/Process/Utility/UnwindMacOSXFrameBackchain.h @@ -15,7 +15,6 @@ #include <vector> // Other libraries and framework includes - // Project includes #include "lldb/lldb-private.h" #include "lldb/Target/Unwind.h" @@ -24,29 +23,26 @@ class UnwindMacOSXFrameBackchain : public lldb_private::Unwind { public: UnwindMacOSXFrameBackchain (lldb_private::Thread &thread); - - virtual - ~UnwindMacOSXFrameBackchain() - { - } - + + ~UnwindMacOSXFrameBackchain() override = default; + protected: - virtual void - DoClear() + void + DoClear() override { m_cursors.clear(); } - virtual uint32_t - DoGetFrameCount(); + uint32_t + DoGetFrameCount() override; bool - DoGetFrameInfoAtIndex (uint32_t frame_idx, - lldb::addr_t& cfa, - lldb::addr_t& pc); + DoGetFrameInfoAtIndex(uint32_t frame_idx, + lldb::addr_t& cfa, + lldb::addr_t& pc) override; lldb::RegisterContextSP - DoCreateRegisterContextForFrame (lldb_private::StackFrame *frame); + DoCreateRegisterContextForFrame(lldb_private::StackFrame *frame) override; friend class RegisterContextMacOSXFrameBackchain; @@ -71,4 +67,4 @@ private: DISALLOW_COPY_AND_ASSIGN (UnwindMacOSXFrameBackchain); }; -#endif // lldb_UnwindMacOSXFrameBackchain_h_ +#endif // lldb_UnwindMacOSXFrameBackchain_h_ diff --git a/source/Plugins/Process/Utility/lldb-arm-register-enums.h b/source/Plugins/Process/Utility/lldb-arm-register-enums.h index a617f65..4d82c10 100644 --- a/source/Plugins/Process/Utility/lldb-arm-register-enums.h +++ b/source/Plugins/Process/Utility/lldb-arm-register-enums.h @@ -74,7 +74,55 @@ namespace lldb_private fpu_s30_arm, fpu_s31_arm, fpu_fpscr_arm, - k_last_fpr_arm = fpu_fpscr_arm, + fpu_d0_arm, + fpu_d1_arm, + fpu_d2_arm, + fpu_d3_arm, + fpu_d4_arm, + fpu_d5_arm, + fpu_d6_arm, + fpu_d7_arm, + fpu_d8_arm, + fpu_d9_arm, + fpu_d10_arm, + fpu_d11_arm, + fpu_d12_arm, + fpu_d13_arm, + fpu_d14_arm, + fpu_d15_arm, + fpu_d16_arm, + fpu_d17_arm, + fpu_d18_arm, + fpu_d19_arm, + fpu_d20_arm, + fpu_d21_arm, + fpu_d22_arm, + fpu_d23_arm, + fpu_d24_arm, + fpu_d25_arm, + fpu_d26_arm, + fpu_d27_arm, + fpu_d28_arm, + fpu_d29_arm, + fpu_d30_arm, + fpu_d31_arm, + fpu_q0_arm, + fpu_q1_arm, + fpu_q2_arm, + fpu_q3_arm, + fpu_q4_arm, + fpu_q5_arm, + fpu_q6_arm, + fpu_q7_arm, + fpu_q8_arm, + fpu_q9_arm, + fpu_q10_arm, + fpu_q11_arm, + fpu_q12_arm, + fpu_q13_arm, + fpu_q14_arm, + fpu_q15_arm, + k_last_fpr_arm = fpu_q15_arm, exc_exception_arm, exc_fsr_arm, exc_far_arm, |
