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Diffstat (limited to 'share/man/man4/nand.4')
| -rw-r--r-- | share/man/man4/nand.4 | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/share/man/man4/nand.4 b/share/man/man4/nand.4 index 4371e38..2b5adb0 100644 --- a/share/man/man4/nand.4 +++ b/share/man/man4/nand.4 @@ -43,27 +43,29 @@ The framework consists of a set of interfaces that aim to provide an extensible, object oriented environement for NAND controllers and NAND Flash memory chips from various hardware vendors, and to allow for uniform and flexible -management of the NAND devices. It comprises of the following major -components: +management of the NAND devices. +It comprises of the following major components: .Bl -bullet .It NAND Flash controller (NFC) interface. .Pp Defines methods which allow to send commands as well as send/receive data -between the controller and a NAND chip. Back-end drivers for specific NAND +between the controller and a NAND chip. +Back-end drivers for specific NAND controllers plug into this interface and implement low-level routines for a given NAND controller. .Pp -This layer implements basic functionality of a NAND Flash controller. It -allows to send command and address to chip, drive CS (chip select line), as -well as read/write to the selected NAND chip. This layer is independent of +This layer implements basic functionality of a NAND Flash controller. +It allows to send command and address to chip, drive CS (chip select line), +as well as read/write to the selected NAND chip. +This layer is independent of NAND chip devices actually connected to the controller. .It NAND chip interface. .Pp -Provides basic operations like read page, program page, erase block. Currently -three generic classes of drivers are available, which provide support for the -following chips: +Provides basic operations like read page, program page, erase block. +Currently three generic classes of drivers are available, which provide +support for the following chips: .Bl -bullet .It large page @@ -74,7 +76,8 @@ ONFI-compliant .El .Pp This layer implements basic operations to be performed on a NAND chip, like -read, program, erase, get status etc. Since these operations use specific +read, program, erase, get status etc. +Since these operations use specific commands (depending on the vendor), each chip has potentially its own implementation of the commands set. .Pp @@ -87,9 +90,10 @@ This layer is responsible for enumerating NAND chips in the system and establishing the hierarchy between chips and their supervising controllers. .Pp Its main purpose is detecting type of NAND chips connected to a given chip -select (CS line). It also allows manages locking access to the NAND -controller. NANDbus passes requests from an active chip to the chip +select (CS line). +It also allows manages locking access to the NAND controller. +NANDbus passes requests from an active chip to the chip controller. .It NAND character / GEOM device. .Pp |
