diff options
Diffstat (limited to 'lib/libpmc')
| -rw-r--r-- | lib/libpmc/pmc.core.3 | 4 | ||||
| -rw-r--r-- | lib/libpmc/pmc.xscale.3 | 4 | ||||
| -rw-r--r-- | lib/libpmc/pmc_capabilities.3 | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/lib/libpmc/pmc.core.3 b/lib/libpmc/pmc.core.3 index 73b2cea..73e8d81 100644 --- a/lib/libpmc/pmc.core.3 +++ b/lib/libpmc/pmc.core.3 @@ -180,7 +180,7 @@ The default is The following event names are case insensitive. Whitespace, hyphens and underscore characters in these names are ignored. -.Pp +.Pp Core PMCs support the following events: .Bl -tag -width indent .It Li BAClears @@ -193,7 +193,7 @@ produce a prediction. .It Li Br_BAC_Missp_Exec .Pq Event 8AH , Umask 00H The number of branch instructions executed that were mispredicted at -the front end. +the front end. .It Li Br_Bogus .Pq Event E4H , Umask 00H The number of bogus branches. diff --git a/lib/libpmc/pmc.xscale.3 b/lib/libpmc/pmc.xscale.3 index 521cc9c..965ea74 100644 --- a/lib/libpmc/pmc.xscale.3 +++ b/lib/libpmc/pmc.xscale.3 @@ -45,7 +45,7 @@ have 4 counters. Third generation cores also have an increased number of PMC events. .Pp .Tn Intel XScale -PMCs are documented in +PMCs are documented in .Rs .%B "3rd Generation Intel XScale Microarchitecture Developer's Manual" .%D May 2007 @@ -117,7 +117,7 @@ Self initiated address bus transaction. .It Li DATA_BUS_TRANS Data bus transaction. .El -.Ss Event Name Aliases +.Ss Event Name Aliases The following table shows the mapping between the PMC-independent aliases supported by .Lb libpmc diff --git a/lib/libpmc/pmc_capabilities.3 b/lib/libpmc/pmc_capabilities.3 index 5d5b29e..8c5916e 100644 --- a/lib/libpmc/pmc_capabilities.3 +++ b/lib/libpmc/pmc_capabilities.3 @@ -51,7 +51,7 @@ .Ft int .Fn pmc_width "pmc_id_t pmc" "uint32_t *width" .Sh DESCRIPTION -These functions retrieve information about performance monitoring +These functions retrieve information about performance monitoring hardware. .Pp Function |
