diff options
Diffstat (limited to 'contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM')
-rw-r--r-- | contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp | 64 |
1 files changed, 46 insertions, 18 deletions
diff --git a/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp index db03f45..f1cb41d 100644 --- a/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp +++ b/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp @@ -289,37 +289,65 @@ EmulateInstructionARM::GetRegisterInfo (uint32_t reg_kind, uint32_t reg_num, Reg uint32_t EmulateInstructionARM::GetFramePointerRegisterNumber () const { - if (m_opcode_mode == eModeThumb) + bool is_apple = false; + if (m_arch.GetTriple().getVendor() == llvm::Triple::Apple) + is_apple = true; + switch (m_arch.GetTriple().getOS()) { - switch (m_arch.GetTriple().getOS()) - { case llvm::Triple::Darwin: case llvm::Triple::MacOSX: case llvm::Triple::IOS: - return 7; + is_apple = true; + break; default: break; - } } - return 11; + + /* On Apple iOS et al, the frame pointer register is always r7. + * Typically on other ARM systems, thumb code uses r7; arm code uses r11. + */ + + uint32_t fp_regnum = 11; + + if (is_apple) + fp_regnum = 7; + + if (m_opcode_mode == eModeThumb) + fp_regnum = 7; + + return fp_regnum; } uint32_t EmulateInstructionARM::GetFramePointerDWARFRegisterNumber () const { - if (m_opcode_mode == eModeThumb) + bool is_apple = false; + if (m_arch.GetTriple().getVendor() == llvm::Triple::Apple) + is_apple = true; + switch (m_arch.GetTriple().getOS()) { - switch (m_arch.GetTriple().getOS()) - { case llvm::Triple::Darwin: case llvm::Triple::MacOSX: case llvm::Triple::IOS: - return dwarf_r7; + is_apple = true; + break; default: break; - } } - return dwarf_r11; + + /* On Apple iOS et al, the frame pointer register is always r7. + * Typically on other ARM systems, thumb code uses r7; arm code uses r11. + */ + + uint32_t fp_regnum = dwarf_r11; + + if (is_apple) + fp_regnum = dwarf_r7; + + if (m_opcode_mode == eModeThumb) + fp_regnum = dwarf_r7; + + return fp_regnum; } // Push Multiple Registers stores multiple registers to the stack, storing to @@ -12889,18 +12917,18 @@ EmulateInstructionARM::ReadInstruction () { if ((thumb_opcode & 0xe000) != 0xe000 || ((thumb_opcode & 0x1800u) == 0)) { - m_opcode.SetOpcode16 (thumb_opcode); + m_opcode.SetOpcode16 (thumb_opcode, GetByteOrder()); } else { - m_opcode.SetOpcode32 ((thumb_opcode << 16) | MemARead(read_inst_context, pc + 2, 2, 0, &success)); + m_opcode.SetOpcode32 ((thumb_opcode << 16) | MemARead(read_inst_context, pc + 2, 2, 0, &success), GetByteOrder()); } } } else { m_opcode_mode = eModeARM; - m_opcode.SetOpcode32 (MemARead(read_inst_context, pc, 4, 0, &success)); + m_opcode.SetOpcode32 (MemARead(read_inst_context, pc, 4, 0, &success), GetByteOrder()); } } } @@ -13510,15 +13538,15 @@ EmulateInstructionARM::TestEmulation (Stream *out_stream, ArchSpec &arch, Option if (arch.GetTriple().getArch() == llvm::Triple::arm) { m_opcode_mode = eModeARM; - m_opcode.SetOpcode32 (test_opcode); + m_opcode.SetOpcode32 (test_opcode, GetByteOrder()); } else if (arch.GetTriple().getArch() == llvm::Triple::thumb) { m_opcode_mode = eModeThumb; if (test_opcode < 0x10000) - m_opcode.SetOpcode16 (test_opcode); + m_opcode.SetOpcode16 (test_opcode, GetByteOrder()); else - m_opcode.SetOpcode32 (test_opcode); + m_opcode.SetOpcode32 (test_opcode, GetByteOrder()); } else |