diff options
Diffstat (limited to 'contrib/llvm/lib/Target/R600/SIRegisterInfo.h')
-rw-r--r-- | contrib/llvm/lib/Target/R600/SIRegisterInfo.h | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/R600/SIRegisterInfo.h b/contrib/llvm/lib/Target/R600/SIRegisterInfo.h index caec228..8148f7f 100644 --- a/contrib/llvm/lib/Target/R600/SIRegisterInfo.h +++ b/contrib/llvm/lib/Target/R600/SIRegisterInfo.h @@ -21,13 +21,11 @@ namespace llvm { class AMDGPUTargetMachine; -class TargetInstrInfo; struct SIRegisterInfo : public AMDGPURegisterInfo { AMDGPUTargetMachine &TM; - const TargetInstrInfo &TII; - SIRegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii); + SIRegisterInfo(AMDGPUTargetMachine &tm); virtual BitVector getReservedRegs(const MachineFunction &MF) const; @@ -43,6 +41,28 @@ struct SIRegisterInfo : public AMDGPURegisterInfo { /// \brief get the register class of the specified type to use in the /// CFGStructurizer virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const; + + virtual unsigned getHWRegIndex(unsigned Reg) const; + + /// \brief Return the 'base' register class for this register. + /// e.g. SGPR0 => SReg_32, VGPR => VReg_32 SGPR0_SGPR1 -> SReg_32, etc. + const TargetRegisterClass *getPhysRegClass(unsigned Reg) const; + + /// \returns true if this class contains only SGPR registers + bool isSGPRClass(const TargetRegisterClass *RC) const; + + /// \returns true if this class contains VGPR registers. + bool hasVGPRs(const TargetRegisterClass *RC) const; + + /// \returns A VGPR reg class with the same width as \p SRC + const TargetRegisterClass *getEquivalentVGPRClass( + const TargetRegisterClass *SRC) const; + + /// \returns The register class that is used for a sub-register of \p RC for + /// the given \p SubIdx. If \p SubIdx equals NoSubRegister, \p RC will + /// be returned. + const TargetRegisterClass *getSubRegClass(const TargetRegisterClass *RC, + unsigned SubIdx) const; }; } // End namespace llvm |