diff options
Diffstat (limited to 'contrib/llvm/lib/Target/PowerPC/PPCScheduleA2.td')
| -rw-r--r-- | contrib/llvm/lib/Target/PowerPC/PPCScheduleA2.td | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/contrib/llvm/lib/Target/PowerPC/PPCScheduleA2.td b/contrib/llvm/lib/Target/PowerPC/PPCScheduleA2.td index ba63b5c..ae084aa 100644 --- a/contrib/llvm/lib/Target/PowerPC/PPCScheduleA2.td +++ b/contrib/llvm/lib/Target/PowerPC/PPCScheduleA2.td @@ -749,3 +749,18 @@ def PPCA2Itineraries : ProcessorItineraries< [15, 7], [FPR_Bypass, FPR_Bypass]> ]>; + +// ===---------------------------------------------------------------------===// +// A2 machine model for scheduling and other instruction cost heuristics. + +def PPCA2Model : SchedMachineModel { + let IssueWidth = 1; // 2 micro-ops are dispatched per cycle. + let MinLatency = -1; // OperandCycles are interpreted as MinLatency. + let LoadLatency = 6; // Optimistic load latency assuming bypass. + // This is overriden by OperandCycles if the + // Itineraries are queried instead. + let MispredictPenalty = 6; + + let Itineraries = PPCA2Itineraries; +} + |
