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-rw-r--r--contrib/llvm/lib/Target/Mips/MipsTargetMachine.cpp69
1 files changed, 40 insertions, 29 deletions
diff --git a/contrib/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/contrib/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index bb48188..330ae19 100644
--- a/contrib/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/contrib/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -12,26 +12,29 @@
//===----------------------------------------------------------------------===//
#include "MipsTargetMachine.h"
+#include "MCTargetDesc/MipsABIInfo.h"
+#include "MCTargetDesc/MipsMCTargetDesc.h"
#include "Mips.h"
-#include "Mips16FrameLowering.h"
#include "Mips16ISelDAGToDAG.h"
-#include "Mips16ISelLowering.h"
-#include "Mips16InstrInfo.h"
-#include "MipsFrameLowering.h"
-#include "MipsInstrInfo.h"
-#include "MipsSEFrameLowering.h"
#include "MipsSEISelDAGToDAG.h"
-#include "MipsSEISelLowering.h"
-#include "MipsSEInstrInfo.h"
+#include "MipsSubtarget.h"
#include "MipsTargetObjectFile.h"
+#include "llvm/ADT/Optional.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/TargetTransformInfo.h"
+#include "llvm/CodeGen/BasicTTIImpl.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetPassConfig.h"
-#include "llvm/IR/LegacyPassManager.h"
+#include "llvm/IR/Attributes.h"
+#include "llvm/IR/Function.h"
+#include "llvm/Support/CodeGen.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
-#include "llvm/Transforms/Scalar.h"
+#include "llvm/Target/TargetOptions.h"
+#include <string>
using namespace llvm;
@@ -48,7 +51,7 @@ extern "C" void LLVMInitializeMipsTarget() {
static std::string computeDataLayout(const Triple &TT, StringRef CPU,
const TargetOptions &Options,
bool isLittle) {
- std::string Ret = "";
+ std::string Ret;
MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions);
// There are both little and big endian mips.
@@ -102,7 +105,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT,
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
CPU, FS, Options, getEffectiveRelocModel(CM, RM), CM,
OL),
- isLittle(isLittle), TLOF(make_unique<MipsTargetObjectFile>()),
+ isLittle(isLittle), TLOF(llvm::make_unique<MipsTargetObjectFile>()),
ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)),
Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this),
NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",
@@ -113,9 +116,9 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT,
initAsmInfo();
}
-MipsTargetMachine::~MipsTargetMachine() {}
+MipsTargetMachine::~MipsTargetMachine() = default;
-void MipsebTargetMachine::anchor() { }
+void MipsebTargetMachine::anchor() {}
MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
@@ -125,7 +128,7 @@ MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT,
CodeGenOpt::Level OL)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
-void MipselTargetMachine::anchor() { }
+void MipselTargetMachine::anchor() {}
MipselTargetMachine::MipselTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
@@ -151,6 +154,11 @@ MipsTargetMachine::getSubtargetImpl(const Function &F) const {
bool hasNoMips16Attr =
!F.getFnAttribute("nomips16").hasAttribute(Attribute::None);
+ bool HasMicroMipsAttr =
+ !F.getFnAttribute("micromips").hasAttribute(Attribute::None);
+ bool HasNoMicroMipsAttr =
+ !F.getFnAttribute("nomicromips").hasAttribute(Attribute::None);
+
// FIXME: This is related to the code below to reset the target options,
// we need to know whether or not the soft float flag is set on the
// function, so we can enable it as a subtarget feature.
@@ -162,6 +170,10 @@ MipsTargetMachine::getSubtargetImpl(const Function &F) const {
FS += FS.empty() ? "+mips16" : ",+mips16";
else if (hasNoMips16Attr)
FS += FS.empty() ? "-mips16" : ",-mips16";
+ if (HasMicroMipsAttr)
+ FS += FS.empty() ? "+micromips" : ",+micromips";
+ else if (HasNoMicroMipsAttr)
+ FS += FS.empty() ? "-micromips" : ",-micromips";
if (softFloat)
FS += FS.empty() ? "+soft-float" : ",+soft-float";
@@ -182,14 +194,14 @@ void MipsTargetMachine::resetSubtarget(MachineFunction *MF) {
Subtarget = const_cast<MipsSubtarget *>(getSubtargetImpl(*MF->getFunction()));
MF->setSubtarget(Subtarget);
- return;
}
namespace {
+
/// Mips Code Generator Pass Configuration Options.
class MipsPassConfig : public TargetPassConfig {
public:
- MipsPassConfig(MipsTargetMachine *TM, PassManagerBase &PM)
+ MipsPassConfig(MipsTargetMachine &TM, PassManagerBase &PM)
: TargetPassConfig(TM, PM) {
// The current implementation of long branch pass requires a scratch
// register ($at) to be available before branch instructions. Tail merging
@@ -209,35 +221,34 @@ public:
void addIRPasses() override;
bool addInstSelector() override;
void addPreEmitPass() override;
-
void addPreRegAlloc() override;
-
};
-} // namespace
+
+} // end anonymous namespace
TargetPassConfig *MipsTargetMachine::createPassConfig(PassManagerBase &PM) {
- return new MipsPassConfig(this, PM);
+ return new MipsPassConfig(*this, PM);
}
void MipsPassConfig::addIRPasses() {
TargetPassConfig::addIRPasses();
- addPass(createAtomicExpandPass(&getMipsTargetMachine()));
+ addPass(createAtomicExpandPass());
if (getMipsSubtarget().os16())
- addPass(createMipsOs16Pass(getMipsTargetMachine()));
+ addPass(createMipsOs16Pass());
if (getMipsSubtarget().inMips16HardFloat())
- addPass(createMips16HardFloatPass(getMipsTargetMachine()));
+ addPass(createMips16HardFloatPass());
}
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsPassConfig::addInstSelector() {
- addPass(createMipsModuleISelDagPass(getMipsTargetMachine()));
+ addPass(createMipsModuleISelDagPass());
addPass(createMips16ISelDag(getMipsTargetMachine(), getOptLevel()));
addPass(createMipsSEISelDag(getMipsTargetMachine(), getOptLevel()));
return false;
}
void MipsPassConfig::addPreRegAlloc() {
- addPass(createMipsOptimizePICCallPass(getMipsTargetMachine()));
+ addPass(createMipsOptimizePICCallPass());
}
TargetIRAnalysis MipsTargetMachine::getTargetIRAnalysis() {
@@ -257,14 +268,14 @@ TargetIRAnalysis MipsTargetMachine::getTargetIRAnalysis() {
// machine code is emitted. return true if -print-machineinstrs should
// print out the code after the passes.
void MipsPassConfig::addPreEmitPass() {
- MipsTargetMachine &TM = getMipsTargetMachine();
+ addPass(createMicroMipsSizeReductionPass());
// The delay slot filler pass can potientially create forbidden slot (FS)
// hazards for MIPSR6 which the hazard schedule pass (HSP) will fix. Any
// (new) pass that creates compact branches after the HSP must handle FS
// hazards itself or be pipelined before the HSP.
- addPass(createMipsDelaySlotFillerPass(TM));
+ addPass(createMipsDelaySlotFillerPass());
addPass(createMipsHazardSchedule());
- addPass(createMipsLongBranchPass(TM));
+ addPass(createMipsLongBranchPass());
addPass(createMipsConstantIslandPass());
}
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