diff options
Diffstat (limited to 'contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp')
-rw-r--r-- | contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp | 72 |
1 files changed, 69 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp b/contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp index 59b23f7..dedf802 100644 --- a/contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp +++ b/contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp @@ -15,6 +15,7 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/IR/Function.h" #include "llvm/Support/CommandLine.h" +#include "llvm/Support/raw_ostream.h" using namespace llvm; @@ -22,6 +23,53 @@ static cl::opt<bool> FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true), cl::desc("Always use $gp as the global base register.")); +// class MipsCallEntry. +MipsCallEntry::MipsCallEntry(const StringRef &N) { +#ifndef NDEBUG + Name = N; + Val = 0; +#endif +} + +MipsCallEntry::MipsCallEntry(const GlobalValue *V) { +#ifndef NDEBUG + Val = V; +#endif +} + +bool MipsCallEntry::isConstant(const MachineFrameInfo *) const { + return false; +} + +bool MipsCallEntry::isAliased(const MachineFrameInfo *) const { + return false; +} + +bool MipsCallEntry::mayAlias(const MachineFrameInfo *) const { + return false; +} + +void MipsCallEntry::printCustom(raw_ostream &O) const { + O << "MipsCallEntry: "; +#ifndef NDEBUG + if (Val) + O << Val->getName(); + else + O << Name; +#endif +} + +MipsFunctionInfo::~MipsFunctionInfo() { + for (StringMap<const MipsCallEntry *>::iterator + I = ExternalCallEntries.begin(), E = ExternalCallEntries.end(); I != E; + ++I) + delete I->getValue(); + + for (ValueMap<const GlobalValue *, const MipsCallEntry *>::iterator + I = GlobalCallEntries.begin(), E = GlobalCallEntries.end(); I != E; ++I) + delete I->second; +} + bool MipsFunctionInfo::globalBaseRegSet() const { return GlobalBaseReg; } @@ -38,8 +86,8 @@ unsigned MipsFunctionInfo::getGlobalBaseReg() { RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass; else RC = ST.isABI_N64() ? - (const TargetRegisterClass*)&Mips::CPU64RegsRegClass : - (const TargetRegisterClass*)&Mips::CPURegsRegClass; + (const TargetRegisterClass*)&Mips::GPR64RegClass : + (const TargetRegisterClass*)&Mips::GPR32RegClass; return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC); } @@ -60,7 +108,7 @@ void MipsFunctionInfo::createEhDataRegsFI() { for (int I = 0; I < 4; ++I) { const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>(); const TargetRegisterClass *RC = ST.isABI_N64() ? - &Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass; + &Mips::GPR64RegClass : &Mips::GPR32RegClass; EhDataRegFI[I] = MF.getFrameInfo()->CreateStackObject(RC->getSize(), RC->getAlignment(), false); @@ -72,4 +120,22 @@ bool MipsFunctionInfo::isEhDataRegFI(int FI) const { || FI == EhDataRegFI[2] || FI == EhDataRegFI[3]); } +MachinePointerInfo MipsFunctionInfo::callPtrInfo(const StringRef &Name) { + const MipsCallEntry *&E = ExternalCallEntries[Name]; + + if (!E) + E = new MipsCallEntry(Name); + + return MachinePointerInfo(E); +} + +MachinePointerInfo MipsFunctionInfo::callPtrInfo(const GlobalValue *Val) { + const MipsCallEntry *&E = GlobalCallEntries[Val]; + + if (!E) + E = new MipsCallEntry(Val); + + return MachinePointerInfo(E); +} + void MipsFunctionInfo::anchor() { } |